FA5643 Fuji

FA5640/41/42/43/44/48
Fuji Switching Power Supply Control IC
Green mode Quasi-resonant IC
FA5640/41/42/43/44/48
Application Note
April 2012
Fuji Electric Co., Ltd.

AN-064E Rev.1.3 http://www.fujielectric.co.jp/products/semiconductor/
1
April 2012
FA5640/41/42/43/44/48
Caution
1. The contents of this note (Product Specification, Characteristics, Data, Materials, and Structure etc.)
were prepared in April 2012.
The contents will subject to change without notice due to product specification change or some other
reasons. In case of using the products stated in this document, the latest product specification shall
be provided and the data shall be checked.
2. The application examples in this note show the typical examples of using Fuji products and this note
shall neither assure to enforce the industrial property including some other ri ghts nor grant the
license.
3. Fuji Electric Co.,Ltd. is always enhancing the product quality and reliability. However, semiconductor
products may get out of order in a certain probability.
Measures for ensuring safety, such as redundant design, spreading fire protection design,
malfunction protection design shall be taken, so that Fuji Electric semiconductor product may not
cause physical injury, property damage by fire and social damage as a result.
4. Products described in this note are manufactured and intended to be used in the following electronic
devices and electric devices in which ordinary reliability is required:
- Computer - OA equipment - Communication equipment (Pin) - Measuring equipment
- Machine tool - Audio Visual equipment - Home appliance - Personal equipment
- Industrial robot etc.
5. Customers who are going to use our products in the following high reliable equipments shall contact
us surely and obtain our consent in advance. In case when our products are used in the following
equipment, suitable measures for keeping safety such as a back-up-system for malfunction of the
equipment shall be taken even if Fuji Electric semiconductor products break down:
- Transportation equipment (in-vehicle, in-ship etc.) - Communication equipment for trunk line
- Traffic signal equipment - Gas leak detector and gas shutoff equipment
- Disaster prevention/Security equipment - Various equipment for the safety.
6. Products described in this note shall not be used in the following equipments that require extremely
high reliability:
- Space equipment - Aircraft equipment - Atomic energy control equipment
- Undersea communication equipment - Medical equipment.
7. When reprinting or copying all or a part of this note, our company’s acceptance in writing shall be
obtained.
8. If obscure parts are found in the contents of this note, contact Fuji Electric Co.,Ltd. or a sales agent
before using our products. Fuji Electric Co.,Ltd. and its sales agents shall not be liable for any
damage that is caused by a customer who does not follow the instructions in this cautionary
statement.

2
April 2012
FA5640/41/42/43/44/48
Contents
1. Overview ・・・・・・・・・・・・・・・・・ 4
2. Features ・・・・・・・・・・・・・・・・・ 4
3. Outline drawings ・・・・・・・・・・・・・・・・・ 4
4. Block diagram ・・・・・・・・・・・・・・・・・ 5-7
5. Functional description of pins ・・・・・・・・・・・・・・・・・ 8
6. Rating and Characteristics ・・・・・・・・・・・・・・・・・ 8-13
7. Characteristic curve ・・・・・・・・・・・・・・・・・ 14-18
8. Basic operation ・・・・・・・・・・・・・・・・・ 19
9. Description of the function ・・・・・・・・・・・・・・・・・ 20-26
10. How to use pin and advice designing ・・・・・・・・・・・・・・・ 27-36
11. Precautions for pattern design ・・・・・・・・・・・・・・・・・ 37
12. Example of application circuit ・・・・・・・・・・・・・・・・・ 38
Caution)
・The contents of this note will subject to change without notice due to improvement.
・The application examples or the components constants in this note are shown to help your design,
and variation of components and service conditions are not taken into account. In using these
components, a design with due consideration for these conditions shall be conducted.

3
April 2012
FA5640/41/42/43/44/48
1. Overview
FA5640 series are a quasi-resonant type switching power supply control IC with excellent stand-by characteristics.
Though it is a small package with 8 pins, it has a lot of functions and enables to decrease external parts. Therefore it is
possible to realize a small size and a high cost-performance power supply.
2. Features
• A quasi-resonant type switching power supply
• A power supply with excellent standby characteristics
• Low power consumption achieved by integrated startup circuit
• Low current consumption, During operation: 0.85 mA
• Control of number of bottom skips by on-off width detection
• Burst operation function under light load
• Built-in drive circuit directly connectable to a power MOSFET, Output current: 0.5 A (sink)/0.25 A (source)
• Built-in overload protection function
• Built-in latch protection function based on overvoltage detection on the secondary side
• Maximum input threshold voltage of IS pin and threshold voltage of stopping on-pulse are compensated by detecting
high-line voltage.
• Built-in under voltage lock out function, ON threshold voltage: 14 V and 10 V
• Package: SOP-8
Function list by types

Type Overload ON Operation Minimum Delay IS pin one Changing of Change point from
protection threshold compens switching time of shot latch overload 1st bottom to 2nd
voltage ation frequency restart function protection bottom
levels due to
external signal
detection
FA5640 Auto recovery 14V Yes No 25us No Yes 110kHz
FA5641 Auto recovery 14V Yes 25kHz 7.6us No Yes 110kHz
FA5542 Auto recovery 10V No No 25us No Yes 110kHz
FA5543 Auto recovery 14V Yes 25kHz 25us Yes No 110kHz
FA5544 Timer latch 14V Yes No 25us No Yes 110kHz
260kHz
FA5548 Auto recovery 14V Yes No 12.5us No No
(speeding up)
3. Outline drawings
0° ～ 10 °
SOP-8
3.9±0.2
6.0±0.3
0.65±0.25
1 PIN MARK
5.0±0.25
0. 2± 0.1
1.8 MAX
0.2
1.27
0.4±0.1

4
April 2012
FA5640/41/42/43/44/48
4. Block diagram
FA5640 VH
ZCD
ZCD Bottom
1 shot Input
detection Bottom Skip Startup Startup
(290ns) voltage
control management Current
set detection
enb 11V/9V
7.5V mode select
30k
Pulse width signal
detection VCC
VinH UVLO
Restart Timer
25μs 14V/8V
4.8V Off timer

(2μs)
MP1 4.8V Reg.
Resistance ratio
Internal
MP1 on/off
91.3%/100% supply
24k
84.1%/100% VinH Reset enb
S Q Driver
- Disable Max. Ton
4.8V (24μs) R2 OUT
+ R1
VthFB0 0.45V
10μA 0.35V VinH
Off timer
IS (4.5μs)
ZCD
Current Standby
comparator Standby
OVP1
150k
detection OVP
FB 1/6
0.55V detection
Soft start VthIS at Standby 6V

VthIS
(1ms) 0.5V 0.15V Latch
Latch timer
VinH 0.45V VinH 0.10V protection
Overload 60μs
Timer
enb OLP
200ms
3.5/3.3V protection GND
1600ms Reset
FA5641 VH
ZCD
ZCD Bottom
1 shot Input
detection Bottom Skip Startup Startup
(290ns) voltage
control management Current
set detection
enb 11V/9V
7.5V mode select
30k
Pulse width signal
detection VCC
VinH UVLO
Restart Timer
7.6μs 14V/8V
Min. fsw
Off timer (25kHz)
4.8V
(2μs)
MP1 4.8V Reg.
Resistance ratio
MP1 on/off Internal
91.3%/100% supply
24k 84.1%/100% VinH Reset enb
S Q Driver
- Disable Max. Ton
4.8V (24μs) R2 OUT
+ R1
VthFB0 0.45V
10μA 0.35V VinH
Off timer
IS (4.5μs)
ZCD
Current Standby
comparator Standby
OVP1
150k
detection OVP
FB 1/6
0.55V detection
Soft start VthIS at Standby 6V

VthIS
Latch timer
VinH 0.45V VinH 0.10V protection
Overload 60μs
Timer
enb OLP
200ms
1600ms Reset

5
April 2012
FA5640/41/42/43/44/48
FA5642 VH
ZCD
ZCD Bottom
detection Bottom Skip 1 shot Startup Startup
(290ns) Current
control set management
enb 11V/9V
7.5V
30k
Pulse width
detection VCC
UVLO
Restart Timer
25μs 10V/8V
4.8V Off timer

(2μs)
MP1 4.8V Reg.
Resistance ratio Internal

MP1 on/off supply
24k 91.3%/100%
Reset enb
S Q Driver
- Disable Max. Ton
4.8V (24μs) R2 OUT
+ R1
VthFB0
10μA 0.45V Off timer
IS (4.5μs)
ZCD
Current Standby
comparator Standby
OVP1
150k
detection OVP
FB 1/6
0.55V detection
Soft start 6V
VthIS VthIS at Standby
Latch timer
protection
Overload 60μs
Timer
enb OLP
200ms
1600ms Reset
FA5643 VH
ZCD
ZCD Bottom
1 shot Input
detection Bottom skip Startup Startup
(290ns) voltage
control set management current
detection
enb 11V/9V
7.5V Vin mode
30k
Pulse width select signal
detection VCC
VinH UVLO
Restart timer
25μs 14V/8V
Min. fsw
(25kHz)
4.8V
MP1 4.8V Reg.
Resistance ratio
MP1 on/off Internal
91.3%/100% supply
24k 84.1%/100% VinH Reset enb
S Q Driver
- Disable Max. Ton
4.8V (24μs) R2 OUT
+ R1
VthFB0 0.45V
10μA 0.35V VinH
Off timer
IS (4.5μs)
ZCD
Current Latch-off
comparator OVP1
150k
OVP
FB 1/6
0.97V detection
Soft start 6V
VthIS
(1ms) 0.5V Latch
VinH Latch timer
0.45V protection
Overload 60μs
Timer
enb OLP
200ms
1600ms Reset
FA5643

6
April 2012
FA5640/41/42/43/44/48
FA5644 VH
ZCD
ZCD Bottom
1 shot Input
(290ns) voltage
detection
enb 11V/9V
7.5V Vin mode
30k
Pulse width select signal
detection VCC
VinH UVLO
Restart timer
25μs 14V/8V
4.8V Off timer

(2μs)
MP1 4.8V Reg.
Resistance ratio
Internal
MP1 on/off
91.3%/100% supply
24k
84.1%/100% VinH Reset
S Q enb Driver
- Disable Max. Ton
4.8V (24μs) R2 OUT
+ R1
VthFB0 0.45V
10μA 0.35V VinH
Off timer
IS (4.5μs)
ZCD
Current Standby
comparator Standby
OVP1
150k
detection OVP
FB 1/6
0.55V detection
Soft start VthIS at standby 6V

VthIS
VinH Latch timer
0.45V VinH 0.10V protection
Overload 60μs
enb Timer
OLP
256ms
FA5644
FA5648 VH
ZCD
ZCD Bottom
1 shot Input
(140ns) voltage
detection
enb 11V/9V
7.5V Vin mode
30k
select signal
Pulse width VCC
detection VinH UVLO
Restart timer
14V/8V
12.5μs
4.8V Off timer

(530ns)
MP1 4.8V Reg.
Resistance ratio
Internal
MP1 on/off
91.3%/100% supply
24k
84.1%/100% VinH
Reset enb Driver
S Q
- Disable
4.8V Max. Ton R2 OUT
+ R1
(9μs)
VthFB0 0.45V
10μA 0.35V VinH
Off timer
IS (1μs)
ZCD
Current
comparator OVP1
150k
OVP
FB 1/6
detection
Soft start 6V
VthIS
(1ms) 0.5V Latch
VinH Latch timer
0.45V Timer protection
Overload 60μs
OLP
256ms
protection
enb 1656ms reset
3.5/3.3V GND
FA5648

7
April 2012
FA5640/41/42/43/44/48
5. Functional description of pins

Pin number Pin name Pin function
1 ZCD Zero current detection, OVP detection
2 FB Feedback input, OLP detection, Burst operation control
3 IS Current sense input, Over-current limiter, Standby signal detection
4 GND Ground
5 OUT Output
6 VCC Power supply, UVLO, VH pin current control
7 (N.C.) （No connection）
8 VH High voltage input
6. Rating and characteristics

* “+” shows sink and “–“ shows source in current prescription.
(1) Absolute maximum ratings
Item Symbol Rating Unit
Supply voltage Vcc 28 V
IoH -0.25 A
Peak current at OUT pin (Note 1)
IoL +0.5 A
The voltage at OUT pin Vout -0.3 to Vcc+0.3 V
Input voltage at FB and IS pin Vfb, Vis -0.3 to 5.0 V
The current at FB and IS pin Ifb, Iis -0.3 to +0.3 mA
IsoZCD -2.0 mA
The current at ZCD pin
IsiZCD +3.0 mA
The voltage at ZCD pin Vzcd -2 to +8 V
Input voltage at VH pin VVH -0.3 to 500 V
Power dissipation（Ta=25℃） Pd 400 mW
Operating junction temperature Tj -40 to +125 ℃
Storage temperature Tstg -40 to +150 ℃
Note 1) Please consider power supply voltage and load current well and use this IC within maximum power
dissipation, operating junction temperature and recommended ambient temperature in operation. The IC
may cross over maximum power dissipation at normal operating condition by power supply voltage or load
current within peak current absolute maximum rating.
* Allowable loss reduction characteristics
400
Pd [mW]
Package thermal resistor

θj-a= 250℃／W
Maximum dissipation
0
許容損失
-40 25 85 125
周囲温度
Ambiance temperature Ta [℃]

8
April 2012
FA5640/41/42/43/44/48
(2) Recommended operating conditions

Item Symbol MIN. TYP. MAX. Unit
Supply voltage Vcc 11 15 26 V
Input voltage at VH pin Vvh 50 － 450 V
Capacitance at VCC pin Cvcc 10 47 220 uF
Turn-off resonant period Trs － 2 4 us
Ambient temperature in operation Ta -40 － 85 ℃
(3) DC Electric characteristics (Unless otherwise specified : VCC=15V, VH=141V, ZCD=0V, FB=3V,
IS=open, Tj=25℃)
Current sense part (IS pin)
Item Symbol Conditions MIN. TYP. MAX. Unit
Input bias current IIS Vis=0V -15 -10 -5 uA
VthIS1 Vfb=3.2V, Vvh=141V 0.47 0.5 0.53 V
Maximum threshold voltage FA5640/41/43/44/48
VthIS2 0.42 0.45 0.48 V
Vfb=3.2V, Vvh=324V
Voltage gain AvIS ΔVfb/ΔVis 5.4 6.0 6.6 V/V
FA5640/41/42/44
Vfb=3.2V,Vis=1.5V
Minimum ON pulse width Tonmin 205 290 375 ns
FA5643
Vfb=3.2V,Vis=0.75V
FA5643
Minimum ON pulse width Tonmin 95 140 185 ns
Vfb=3.2V,Vis=1.5V
FA5640/41/42/44/48
IS input: 0V to 1.5V
(Pulse signal)
Delay to output TpdIS 30 70 150 ns
FA5643
IS input: 0V to 0.75V
(Pulse signal)
Latch shutdown threshold
VthISat FA5643 0.9 0.97 1.1 V
voltage
Feedback part (FB pin)

DUTY=0%
VthFB01 405 450 495 mV
Input threshold voltage of Vvh=141V
FA5640/41/43/44/48
stopping on-pulse VthFB02 DUTY=0% 315 350 385 mV
Vvh=324V
Vfb=1V to 2V
Rfb11 14.2 18.9 23.6 kΩ
Vvh=141V
FA5640/41/43/44/48
Rfb12 Vfb=1V to 2V 13.0 17.4 21.7 kΩ
Vvh=324V
FB pin input resistance
Vfb=0V to 0.3V
Rfb21 15.5 20.7 25.9 kΩ
Vvh=141V
FA5640/41/43/44/48
Rfb22 Vfb=0V to 0.3V 15.5 20.7 25.9 kΩ
Vvh=324V
FB pin source current Ifb0 Vfb=0V -260 -200 -160 uA
⊿Rfb1=Rfb11/Rfb21
⊿Rfb1 89.3 91.3 93.3 %
Vvh=141V
FB pin input resistance ratio FA5640/41/43/44/48
⊿Rfb2 ⊿Rfb2=Rfb12/Rfb22 82.1 84.1 86.1 %
Vvh=324V

9
April 2012
FA5640/41/42/43/44/48
Zero current detection part (ZCD pin)

Vthzcd1 Vzcd decreasing 40 60 80 mV
Input threshold voltage
Vthzcd2 Vzcd increasing 100 150 220 mV
Hysteresis Vhyzcd Vthzcd2-Vthzcd1 30 90 150 mV
Minimum detectable ZCD input pulse
Tzcdmin Vpulse=1V to 0V 300 －－ ns
pulse width f=100kHz
Izcd=+3mA
Vih 6.5 7.5 9.5 V
（high state）
Input clamp voltage
Izcd=-2mA
Vil -1.0 -0.8 -0.4 V
（low state）
ZCD pin internal ｒesistance Rzcd Vzcd=1V to 5V 22.5 30 37.5 kΩ
ZCD pin propagation delay time ZCD pulse:1V to 0V,
Tzcd 50 150 300 ns
OUT: turn-on
Changed 1st bottom to
Tb12 8.1 9.0 9.9 us
2nd bottom
Changed 2nd bottom to
Tb21 12.6 14.0 15.4 us
1st bottom
The ON/OFF pulse width of
changed number of bottom at Tb23 7.2 8.0 8.8 us
3rd bottom
turn-on Changed 3rd bottom to
Tb32 10.5 11.67 12.84 us
2nd bottom
(FA5640/41/42/43/44)
Changed 3rd bottom to
Tb34 6.3 7.0 7.7 us
4th bottom
Changed 4th bottom to
Tb43 9.0 10.0 11.0 us
3rd bottom
Changed 1st bottom to
Tb12 3.45 3.83 4.21 us
2nd bottom
Tb21 4.95 5.50 6.05 us
1st bottom
The ON/OFF pulse width of
changed number of bottom at Tb23 3.15 3.50 3.85 us
3rd bottom
turn-on Changed 3rd bottom to
Tb32 4.35 4.83 5.31 us
2nd bottom
(FA5648)
Changed 3rd bottom to
Tb34 2.85 3.17 3.49 us
4th bottom
Changed 4th bottom to
Tb43 3.75 4.17 4.59 us
3rd bottom
FA5640/42/43/44
20 25 30 us
OUT=low, Vzcd=0V
FA5641
Timeout after last ZCD trigger Trestart 6.7 7.6 8.5 us
OUT=low, Vzcd=0V
FA5648
10 12.5 15 us
OUT=low, Vzcd=0V
Over-voltage protection part (ZCD pin)

Vzcd is increased, and
Over-voltage threshold voltage Vovp timer latch function is 5.7 6.0 6.3 V
operated
FA5640/41/42/43/44
3.5 4.5 5.5 us
Delay from turn-off
Over-voltage detection timing Tlat1
FA5648
0.8 1.0 1.3 us
Delay from turn-off
Delay from upper the
Delay time to latch-off Tlaｔ2 40 60 80 us
Vovp voltage

10
April 2012
FA5640/41/42/43/44/48
Overload protection part (FB pin)

Volp1 Vfb increasing 3.3 3.5 3.8 V
OLP threshold voltage
Volp2 Vfb decreasing 3.0 3.3 3.6 V
Hysteresis Hysolp Volp1-Volp2 0.1 0.2 0.3 V
FA5640/41/42/43
140 200 260 ms
Delay from Vfb>Volp1
FA5644
Fault time duration Tolp 195 256 320 ms
FA5648
200 256 333 ms
Auto recovery mode latch-off FA5640/41/42/43
Toff The OFF time only by 980 1400 1820 ms
time duration
internal signal
Soft start part

Soft-start time Tsoft at start-up only 0.7 1.0 1.3 ms
Standby-mode function (IS pin) (FA5640,FA5641,FA5642,FA5644)

Stand-by detection threshold Read timing is turn-off
VISstb 0.5 0.55 0.6 V
voltage at IS pin after Tstb.
Stand-by detection timing Tstb Delay from turn-off 1.5 2.0 2.5 us
Vfb=3.2V
VthISsｔ1 0.12 0.15 0.18 V
Vvh=141V
Maximum threshold voltage at
FA5640/41/44
stand-by
VthISsｔ2 Vfb=3.2V 0.07 0.10 0.13 V
Vvh=324V
Other protection part

FA5640/41/42/43/44
Vis=0V, Vis=2V 20 24 28 us
Vzcd=0V
Maximum on pulse width Tonmax
FA5648
Vis=0V, Vis=2V 8 9 10 us
Vzcd=0V
FA5641/43
Minimum switching frequency Fmin 20.8 25 30.3 kHz
Vis=0V,Vfb=3.2V
Drive Output part (OUT pin)

Item Symbol Condition MIN. TYP. MAX. Unit
IOL=100mA
OUT Low voltage VOL 0.5 1.0 2.0 V
Vcc=15V
IOH=-100mA,
OUT High voltage VOH 12 13.2 14.5 V
Vcc=15V
Vcc=15V, CL=1nF
Rise time tr 20 40 80 ns
Tj=25℃
Vcc=15V, CL=1nF
Fall time tf 12.5 25 60 ns
Tj=25℃

11
April 2012
FA5640/41/42/43/44/48
High voltage input part (VH pin)

Vvh=400V,
IVHrun 10 30 60 uA
Vcc > Vstoff
Supply Current of VH pin
IVH1 Vvh=100V, VCC=6.5V 4.0 8.0 10.5 mA
IVH0 Vvh=100V, VCC=0V 0.49 0.7 1.4 mA
Ipre1 Vcc=8V, Vvh=100V -10 -7.4 -3.7 mA
Charge current for VCC pin Vcc=13V, Vvh=100V
Ipre2 -9 -5.7 -3 mA
At UVLO mode
FA5640/41/43/44/48
Vcc>Vstoff
VHdcH VH pin input voltage is 200 226 250 V
increasing by DC
The threshold voltage to change
voltage.
input voltage mode setting at DC
FA5640/41/43/44/48
input
Vcc>Vstoff
VHdcL VH pin input voltage is 190 212 235 V
decreasing by DC
voltage.
FA5640/41/43/44/48
Hysteresis voltage width at DC
VHdcHys VH: DC voltage input 8 14 18 V
input only
VHdcH-VHdcL
FA5640/41/43/44/48
The threshold voltage to change
Vcc>Vstoff
input voltage mode setting at AC
VHac VH pin input Voltage is 141 160 177 Vrms
input (AC RMS conversion
half-wave rectified AC
voltage)
waveform.
FA5640/41/43/44/48
Delay time of changing input
TpdVH Vcc>Vstoff 11 30 70 ms
voltage mode setting
(VCC charge off)
Low voltage malfunction protection circuit (UVLO) part (VCC pin)

FA5640/41/43/44/48
12.5 14 15.5 V
Vcc Increasing
Start-up threshold voltage VCCon
FA5642
9 10 11 V
Vcc Increasing
Shutdown threshold voltage VCCoff Vcc decreasing 7 8 9 V
FA5640/41/43/44/48
Hysteresis (UVLO) Vhys1 5 6 7 V
VCCon-VCCoff
FA5642
Istart-up off voltage 1.5 2 2.5 V
VCCon-VCCoff
Istart-up restart voltage Vstoff Vcc Increasing 9.5 11 12.5 V
Hysteresis width at Istart-up Vstrst Vcc decreasing 8 9 10 V

12
April 2012
FA5640/41/42/43/44/48
Current consumption (VCC pin)

FA5640/41/42/44/48
Vfb=2V, IS=open
Vzcd=0V
OUT= no load
ICCop1 0.7 0.85 1.5 mA
FA5643
Vfb=2V, IS=0.75
Vzcd=0V
Operating-state OUT= no load
supply current FA5640/41/42/44/48
Duty cycle=0%,
Vfb=0V, IS=open
Vzcd=0V
ICCop2 0.6 0.8 1.1 mA
FA5643
Duty cycle=0%,
Vfb=0V, IS=0.75
Vzcd=0V
FB=open
Latch mode supply current ICClat Vcc=11V 100 200 350 uA
At latch-mode
*1 : Regarding to these items, guaranteed by design.

The column showing ‘-‘ has no specified value.

13
April 2012
FA5640/41/42/43/44/48
7. Characteristic curve
・Unless otherwise specified : Tj=25℃, VCC=15V
・“+” shows sink and “–“ shows source in current prescription.
・Data listed here shows the typical characteristics of an IC and does not guarantee the characteristics.
IS pin maximum threshold voltage (VthIS1)

vs. FB pin voltage (VFB)
0.6
0.5
0.4
VthIS1 [V]
0.3
0.2
0.1
0
0 1 2 3 4
VFB [V]
IS pin maximum threshold voltage (VthIS1) IS pin maximum threshold voltage (VthIS2)
vs. Junction temperature (Tj) vs. Junction temperature (Tj)
0.53 0.48
0.52 0.47
0.51 0.46
VthIS1 [V]
VthIS2 [V]
0.5 0.45
0.49 0.44
0.48 0.43
0.47
0.42
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Tj [℃]
Tj [℃]
FB pin input threshold voltage switching off (VthFB01) FB pin input threshold voltage switching off (VthFB02)
vs. Junction temperature(Tj) vs. Junction temperature (Tj)
500 385
490
375
480
470 365
VthFB01 [mV]
VthFB02 [mV]
460
355
450
345
440
430 335
420
325
410
400 315
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Tj [℃] Tj [℃]

14
April 2012
FA5640/41/42/43/44/48
ZCD pin input threshold voltage (Vthzcd1) ZCD pin input threshold voltage (Vthzcd2)
220
80
200
70
60 180
Vthzcd2 [mV]
Vthzcd1 [mV]
50 160
40 140
30 120
20 100
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Tj [℃] Tj [℃]
ZCD pin internal resistance (Rzcd) ZCD pin OVP threshold voltage (Vovp)
37.5 6.3
35 6.2
32.5 6.1
Rzcd [kΩ ]
Vovp [V]
30 6
27.5 5.9
25 5.8
22.5 5.7
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Tj [℃] Tj [℃]
Delay time to OLP (Tolp) Delay time to OLP (Tolp)

260 310
240 290
FA5644/48
VFB＞Volp1
220 270
Tolp [ms]
Tolp (ms)
200 250
180 230
160 210
140 190
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Tj [℃] Tj (℃)

15
April 2012
FA5640/41/42/43/44/48
OLP off time (Toff)

vs. Junction temperature (Tj)
1800
1700
1600
1500
Toff [ms]
1400
1300
1200
1100
1000
900
-50 -25 0 25 50 75 100 125 150
Tj [℃]
IS pin maximum threshold voltage at standby IS pin maximum threshold voltage at standby
(VthISst1) (VthISst2)
0.2 0.2
0.18 0.18
0.16 0.16
0.14 0.14
VthISst1 [V]
VthISst2 [V]
0.12 0.12
0.1 0.1
0.08 0.08
0.06 0.06
0.04 0.04
0.02 0.02
0 0
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Tj [℃] Tj [℃]
Input current of VH pin (IVHrun) Input current of VH pin (IVH)

vs. Junction temperature (Tj) VH pin voltage (VVH)
60 10
55 9
50 8
45 7
40 6
IVHrun [uA]
IVH [mA]
35 5
30 4
25 3
20 2
15 1
10 0
-50 -25 0 25 50 75 100 125 150 0 100 200 300 400 500
Tj [℃] VVH [V]

16
April 2012
FA5640/41/42/43/44/48
Input current of VH pin (IVH1) Input current of VH pin (IVH0)

11 1.4
1.3
10
1.2
9 1.1
1
IVH1 [mA]
IVH0 [mA]
8
0.9
7
0.8
6 0.7
0.6
5
0.5
4 0.4
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Tj [℃] Tj [℃]
Charge current for VCC pin (Ipre1) Startup threshold voltage (VCCon)
-3
15.5
-4
15
-5
14.5
Ipre1 [mA]
VCCon [V]
-6
14
-7
13.5
-8
13
-9
-10 12.5
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Tj [℃] Tj [℃]
UVLO ON threshold voltage (VCCon)

vs. Junction temperature (Tj) Shutdown threshold voltage (VCCoff)
11 vs. Junction temperature (Tj)
9
10.8 8.8
10.6 VCC : increasing
8.6
FA5642
10.4 8.4
VCCon (V)
10.2 8.2
VCCoff [V]
10
8
9.8
7.8
9.6
7.6
9.4
7.4
9.2
7.2
9
7
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Tj (℃) Tj [℃]

17
April 2012
FA5640/41/42/43/44/48
Startup device ON voltage (Vstrst) Startup device OFF voltage (Vstoff)

10 12.5
9.8
12
9.6
9.4
11.5
9.2
Vstoff [V]
Vstrst [V]
9 11
8.8
10.5
8.6
8.4
10
8.2
8 9.5
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Tj [℃] Tj [℃]
Operating-state supply current (ICCop1) Operating-state supply current (ICCop1)

vs. VCC pin voltage (VCC) vs. Junction temperature (Tj)
1.6 1.5
1.4
1.4 1.3
1.2
1.2 1.1
1
1
0.9
ICCop1 [mA]
ICCop1 [mA]
0.8
0.8
0.7
0.6
0.6
0.5
0.4 0.4
0.3
0.2 0.2
0.1
0 0
0 5 10 15 20 25 30 -50 -25 0 25 50 75 100 125 150
VCC [V] Tj [℃]
Latch mode supply current (ICClat)

vs. Junction temperature (Tj)
350
300
250
ICClat [uA]
200
150
100
-50 -25 0 25 50 75 100 125 150
Tj [℃]

18
April 2012
FA5640/41/42/43/44/48
8. Basic operation(The values in the following description are typical values unless otherwise specified.)
The basic operation of the power supply using IC is not switching
operation with fixed frequency using an oscillator but switching with
self-excited oscillation. This is shown in Fig.1 Schematic circuit diagram OUT
(Q1 gate)
and Fig.2 Waveform in the basic operation.
t1 to t2
Q1 turns ON and then Q1 drain current Id (current of primary windings
Q1
of T1) begins to rise from zero. Q1 current is converted into the voltage Vds
by Rs and is input into IS pin.

t2
When the current of Q1 get to the reference voltage of the current Q1
Id
comparator that is fixed by the voltage of FB pin, a reset signal is input
into RS flip-flop and Q1 turns OFF.
t2 to t3 D1
When Q1 turns OFF, then the windings voltage of the transformer IF
turns over and the current IF is provided from the transformer into the
secondary side through D1.
t3 to t4 Vsub
When the current from the transformer into the secondary side stops
and the current of D1 gets to zero, the voltage of Q1 turns down
rapidly due to the resonance of the transformer inductance and the
ZCD Pin
60mV
capacitor Cd. At the same time the transformer auxiliary windings
voltage Vsub also drops rapidly.
ZCD pin receives this auxiliary windings voltage but then it has a little 1 shot
out put
delay time because of CR circuit composed with RZCD and CZCD on (Valley
signal、set)
the way.
t4
Current
If ZCD pin voltage turns down lower than the threshold voltage 50mV comparator
out put
of Bottom detection, a set signal is input into R-S flip-flop and Q1 turns (reset)
ON again. If the delay time of CR circuit placed between the auxiliary

t1 t2 t3 t4
windings and ZCD pin is adjusted properly, Q1 voltage can be turned
on at the bottom. This operation makes the switching loss of TURN Fig.2 Waveform in basic operation
ON to the minimum.
(Return to t1) IF
D1
Subsequently repeat from t1 to t4 and continue switching.
OUT
5 Q1
Vds
ZCD R1 Cd
1 shot Bottom
1
(290ns) Bottom Skip detection Rs
control
C1
Driver Set
Current Vsub
Q S Comparator IS
3
R Level
Rset 2
shift FB
Fig.1 Schematic circuit diagram in basic operation

19
April 2012
FA5640/41/42/43/44/48
9. Description of the function (The values in the following description are typical values unless otherwise specified.)
(1) Steady-state operation, bottom-skip operation, and burst operation
• Steady-state operation, bottom-skip operation (FA5640/41/42/43/44/48 *FA5648:See spec. of P10 )
The ON/OFF cycle, which is from turn-on of the driver signal to the end of fly-back voltage, is detected, and bottom-skip
operations are performed at the time detected. Since the relation between the ON/OFF width and the number of times of
bottom skip operations is exhibited in the hysteresis as shown in Fig. 4, waveform fluctuations can be prevented and
transformer audible noise can be decreased. Fig. 5 shows the change image of the switching frequency to the output
electric power. Fig. 6 shows the change image of the ON/OFF width.
Load decrease
Vds
1st 2nd 3rd 4th
ON-OFF width
On/Off
pulse
width T>9us 9us>T>8us 8us>T>7us T<7us
Bottom
Signal
OUT
pulse
Load increase
Vds
4th 3rd 2nd 1th
On/Off
pulse
width
T<10us 10us<T<11.67us 11.67us<T<14us T>14us
Bottom
Signal
OUT
pulse
Fig.3 Steady-state operation and bottom-skip operation timing chart

20
April 2012
FA5640/41/42/43/44/48
Load increase
Bottom count [th]

3
Load decrease
1
6 7 8 9 10 11 12 13 14 15
ON-OFF width [us] 11.67us
Fig.4 ON/OFF width at transfer to bottom-skip operation
150
Load decrease
Load increase
Switching freq. [kHz]
100 1st
2nd
4th 3rd
1st
50 2nd
4th 3rd
Bottom skip
0
0 20 40 60 80 100
Output power [W]
Fig.5 Change image of switching frequency
20
Load decrease
Load increase
15 1st
ON-OFF width [us]
2nd
3rd
10
4th 2nd 1st
3rd
5 4th Bottom skip
0
0 20 40 60 80 100
Output power [W]
Fig.6 Change image of ON/OFF width

21
April 2012
FA5640/41/42/43/44/48
• Burst operation
When the FB pin voltage decreases to lower than the pulse shutdown threshold voltage, switching is stopped. On the
contrary, if the FB voltage increases to higher than the pulse shutdown threshold voltage, switching is resumed. Overshoot
and undershoot of the FB pin voltage occur over and under the pulse shutdown threshold voltage for mode switching.
Continuous pulses are issued during this overshoot period, and long-cycle burst frequency is obtained during the
undershoot period. The pulse shutdown threshold voltage is switched to 0.45 V when input voltage is low, whereas it is
switched to 0.35 V when input voltage is high, as input voltage compensation.
FB pin
voltage
Pulse stop
voltage
VthFB01=0.45V
VthFB02=0.35V
OUT pin
switching
pulse
Heavy load Light load

(burst switching)
Fig.7 Burst operation at light load

22
April 2012
FA5640/41/42/43/44/48
(2) Startup circuit and auxiliary winding voltage

When power is turned on, the current supplied from the startup circuit to the VCC pin through the VH pin charges the
capacitor connected to the VCC pin to increase voltage. If the VCC pin voltage exceeds ON threshold voltage 14 V or 10 V,
the internal operation power is turned on, and the IC is start operating. At this time, if the voltage supplied from the auxiliary
winding is higher than 9 V, the startup circuit is operated at the time of startup only, and after the startup, auxiliary winding
voltage is used as power supply. Meanwhile, if the auxiliary winding voltage is lower than 9V, the IC maintains operation
within the VCC range between 9V and 11V by ON/OFF of startup circuit.
AC SW
Vcc
14V
11V
9V
8V
Startup
circuit
Switching
Fig.8 Startup and shutdown (When auxiliary winding voltage is higher than 9V)
AC SW
Vcc
14V
11V
9V
8V
Startup
circuit
Switching
Fig.9 Startup and shutdown (When auxiliary winding voltage is lower than 9V)

23
April 2012
FA5640/41/42/43/44/48
(3) Operation under overload

■Auto recovery type (FA5640/41/42/43/48 *FA5648: OLP Fault time duration=256ms)
Using the built-in timer, the duration of overload status of 200 ms or longer is detected, and switching is stopped forcibly.
If the switching is stopped, supply of current from the auxiliary winding is eliminated, and the VCC pin voltage reduces to 9
V or lower, the startup circuit is operated, and the VCC is maintained within the range from 9 V to 11 V. If overload status
continues for 200 ms or longer, the switching is stopped, and then after the elapse of 1400 ms, the switching is resumed.
At that time, if the overload status persists, start and stop switching are repeated. If the load returns to normal, normal
operation is resumed.
At the time of startup, it is necessary to increase the output voltage to the setting within the timer setting of 200 ms. Since
the operation is performed automatically using the built-in timer, even if external power is input directly to the VCC pin,
operation is reset automatically.
14V
11V
VCC pin
voltage 9V
8V
Start up on
Circuit
On/Off
signal
off
3.3V
FB pin
voltage
active
OLP timer 200ms 200ms 200ms
operation
1600ms 1600ms
disabled
200ms
OLP timer
output
1600ms
Output pin
switching
pulse
Normal Over Normal

load load load
Fig.10 Operation under overload (Auto recovery type)

24
April 2012
FA5640/41/42/43/44/48
■Timer latch type (FA5644)

Using the built-in timer, the duration of overload status of 256 ms or longer is detected, switching is stopped, and latch
mode is entered, with this state maintained. In a state in which switching is stopped due to overload latch, VCC is supplied
from the startup circuit while operation is suspended. To reset the overload latch, it is necessary to interrupt the input
voltage to stop the supply of VCC from the startup circuit, thus decreasing the OFF threshold voltage to 8.0 V or lower.
At the time of startup, it is necessary to increase the output voltage to the setting within the timer setting of 256 ms.
14V
11V
VCC pin
voltage 9V
8V
Start up on
Circuit
On/Off
signal
off
3.3V
FB pin
voltage
active
OLP timer 256ms 256ms
operation
disabled
200ms
OLP timer
output
1600ms
Output pin
switching
pulse
Normal Over
load load
Fig.11 Operation under overload (Timer latch type)

25
April 2012
FA5640/41/42/43/44/48
(4) Overvoltage protection function on the secondary side

In case of overvoltage of output, the voltage of the auxiliary winding also rises. The ZCD pin has the function of
cycle-by-cycle detecting the voltage of the auxiliary winding of transformer. If the state in which the ZCD pin voltage is 6.0
V or higher continues for 60 s or longer, switching is stopped and the operation is latched-off. This state is maintained
until the input voltage is interrupted, and the VCC decreases to the OFF threshold voltage of the UVLO.
For example if switching is made at 40 kHz, 60 s  40 kHz = 2.4: detection of twice or more is required.
(5) External latch-off function

By pulling up the ZCD pin to 6.0 V or higher for 60 s or longer, the IC is latched-off. This state is maintained until the input
voltage is interrupted and VCC decreases to the OFF threshold voltage of the UVLO.
(6) Compensating each threshold level by high-line voltage detection (Except FA5642)
By detecting the peak voltage of the VH pin, each threshold level is switched to compensate for high/low line voltage. The
threshold level to be switched by high-line voltage include the pulse shutdown FB voltage, which is related to the pulse
mode switching load, and the maximum input threshold voltage, which is the overcurrent limit level of the IS pin.
(7) Minimum switching frequency limitation and maximum ON width limitation

The maximum ON pulse width is limited to 24 s(FA5648:9s) to reduce the audible noise of the transformer when it is
started and stopped. In addition, FA5641 is integrated in minimum switching frequency that is limited at 25 kHz to reduce
audible noise more. See 10. (9) “Other advice on designing” for details.
(8) Switching of overload protection levels due to external signal detection (Standby-mode function) (Except
FA5643/48)
By pulling up the voltage of IS pin to higher than the IS pin standby detection voltage during the OFF period of the
MOSFET using external signals, overload protection levels can be switched. More specifically, by switching the maximum
input threshold voltage, which is the overcurrent limit level of the IS pin, the power can be limited to approximately 1/7 of
the overload protection level of normal operation.
This function is useful for limiting the power in standby mode, for example.
(9) Restart operation

If the MOSFET cannot be turned on based on bottom detection of the ZCD pin at the time of startup, restart operation is
performed using a timer to forcibly turn on the MOSFET. If the condition in which the OUT is Low (MOSFET is OFF) and
the voltage of the ZCD pin is below to input threshold voltage (Vthzcd2) 150 mV or lower, the timer starts counting and the
MOSFET is turned ON when the timeout from the last ZCD trigger.
(10) IS pin timer latch function (FA5643)

This IC has function in it that carries out latch shutdown instantly when the voltage higher than 0.97V is impressed to IS pin
to protect a transformer short circuit. This state is maintained until the input voltage is interrupted and VCC decreases to
the OFF threshold voltage of the UVLO.

26
April 2012
FA5640/41/42/43/44/48
10. How to use each pin and advice for designing (The values that appear in the following description are typical
values, unless otherwise specified.)
(1) Pin No. 1 (ZCD pin) • Connection method
Function The same as turn on timing in (ⅰ)
(ⅰ) Detects the timing that MOSFET is turned on. • Operation
(ⅱ)Performs latch-off protection by external signals. If the output voltage (Vo) on the secondary side enters
(ⅲ)Performs latch-off protection in case overvoltage on overvoltage state, the auxiliary winding voltage and ZCD
the secondary side. pin voltage also increase. This IC detects ZCD pin voltage
How to use elapsed time of 4.5 s(FA5648:1.0s) after MOSFET is
(ⅰ) Turn on timing detection turned off, and when the ZCD pin voltage exceed 6.0V and
• Connection method this states continues for 60 s or longer, latch-off operation
Connect the auxiliary winding of the transformer via the CR is performed to stop switching (Fig. 16).
circuits, R1 and C1 (Fig. 12). Once the latch operation is started, the VCC voltage is
Be careful the polarity of the auxiliary winding. maintained by the startup circuit to continue the latch
• Operation operation. Decrease the VCC to the OFF threshold voltage
If the voltage of the ZCD pin decreases to 60 mV or lower, of the UVLO or lower to reset the latch operation.
the MOSFET is turned on. The auxiliary winding voltage
fluctuates significantly in both positive and negative voltage
at the time of switching. To protect the IC from this voltage
fluctuation, a clamp circuit is integrated. If the auxiliary Cd
winding voltage is positive, current is fed as shown in Fig. ZCD

RZCD 1
13, and if it is negative, current is fed as shown in Fig. 14, to 30k R1
7.5V
clamp the voltage of the ZCD pin. C1
In turning ON based on bottom detection of the ZCD pin is

not possible at the time of startup, for example, restart Fig.12 ZCD pin circuit
operation is performed using timer to forcibly turn on the
MOSFET. If the OUT is Low (MOSFET is OFF) and the ZCD
1
voltage of the ZCD pin is below to input threshold voltage
(Vthzcd2) 150 mV or lower, the timer starts counting, and if 7.5V Clamp
30k
current
the time out time from the last trigger 25 s (FA5641:7.6
s,FA5648:12.5 s), the MOSFET is turned on.
Fig.13 Clamp circuit (When auxiliary winding is in
(ⅱ) Latch-off protection by external signals positive voltage.)
• Connection method
Pull up the ZCD pin by external signals. ZCD
1
Figure 15 is a typical connection showing the overvoltage
on the primary side. (Constants are examples. Check the 30k -0.8V Clamp
operation with the actual power supply unit.) current
• Operation
If the voltage of the ZCD pin exceeds 6.0 V, and this state Fig.14 Clamp circuit (When auxiliary winding is in
continues for 60 s or longer, latch-off operation is negative voltage.)
performed to stop output switching. 0.47uF
6
Once the latch-off operation is started, the VCC voltage is VCC 2.2k
maintained by the startup circuit to continue the latch-off
2.2k
operation.
Decrease the VCC to the OFF threshold voltage or lower to 24V
8.2k
ZCD
reset the latch operation. 1
＊定数は一例で、動作を
保証する値ではありません。
(ⅲ) Latch-off protection at overvoltage on the secondary
side Fig.15 Primary side overvoltage protection circuit

27
April 2012
FA5640/41/42/43/44/48
Advice for designing ISoZCD: ZCD pin input current (source current = 2.0 mA)
Immediately before the MOSFET is turned on, the
Nsub
MOSFET drain-source voltage is resonated due to the R1> VOUT(max) × －7.5 / ISiZCD
Ns
transformer inductance and the resonance capacitor Cd.
Adjust C1 to allow the MOSFET to be turned on at the ISiZCD: ZCD pin input current (sink current = +3.0 mA)
valley of this resonance (See Figs. 17 and 18). VOUT(max): Maximum output voltage
Since overvoltage threshold voltage is 5.7 V (min.), select Generally, R1 is around several tens k, whereas C1 is
resistance R1 not to allow the ZCD pin voltage to exceed around several tens pF. If timing of bottom detection is OK,
5.7 V, or allow the ZCD pin current to exceed the absolute C1 need not be connected.
maximum rating, in normal operation, ensuring that the Add Schottky diode between ZCD-GND as shown in Figure
following calculation formulae are satisfied. 18 when the terminal ZCD input current is not filled even if
R1 is appropriately adjusted.
VZCD=VthOVP×VNs / VOVP If R1 and C1 constants are not appropriate, overvoltage
where, protection may not function properly. Figure 19 shows the
VZCD: ZCD pin voltage at normal operation ZCD pin waveform at the time of overvoltage protection.
VthOVP: ZCD pin overvoltage threshold level (6 V) With the upper ZCD pin waveform, overvoltage on the
VNs: Line voltage secondary winding of transformer at secondary side is detected properly, and latch-off is
normal operation (Vo  VF) performed by fault protection. Meanwhile, with the lower
VOVP: Output voltage to be subjected to overvoltage ZCD pin waveform, protective function is not operated
latch-off because the threshold voltage is not reached in 4.5
s(FA5648:1.0s). In this case, adjust R1 and C1.
VNsub=VNs×Nsub / Ns
Vo
where,
VNsub: Line voltage of auxiliary winding of transformer 0V
60us Latch
Nsub: Number of turns of auxiliary windings of transformer 4.5us
NS: Number of turns of secondary windings of transformer 6.0V
zcd
Using the formula pin
VZCD=VNsub×RZCD / (R1＋RZCD) , 0V
R1 is found to be Fig.16 ZCD pin waveform at overvoltage on the

secondary side
R1=VNsub×RZCD / VZCD－RZCD
where,
RZCD: Internal resistance of ZCD pin (30 k)
If the capacitance of capacitor C1 is to be increased to Vds
prevent malfunction due to surge, for example, it may be
necessary to decrease the resistance R1 for bottom
detection of the auxiliary winding. If the overvoltage
detection level decreases as a result, add resistance R2 for Fig.17 Vds waveform
adjustment.
In this case, the following formula applies: VF
VNs Vo
R1= RZCD×R2 VNsub －1

Np Ns
RZCD+R2 VZCD
Since the source current of the ZCD pin input current Cd
ZCD
(absolute maximum rating) is 2.0 mA,+3.0mA the following RZCD VZCD VNsub
1
formula must be satisfied at the same time: 30k R1
C1 D1
7.5V
R2 Nsub
R1>√2×VAC(max)×Nsub / Np / ISoZCD
where, Fig.18 ZCD pin resistance R1 calculation

28
April 2012
FA5640/41/42/43/44/48
(2) Pin No. 2 (FB pin) 4.5us

Function
(ⅰ)Input feedback signals from the error amplifier on the
6.0V
secondary side.
(ⅱ)Detects overload status.
(ⅲ)Stops switching for burst operation.
How to use 0V
(ⅰ) Feedback signal input
6.0V
Connect the optocoupler corrector to this pin will allow
reguration. At the same time, to prevent generation of noise,
connect a capacitor in parallel to the optocoupler (Fig. 20). 0V
• Operation Fig.19 ZCD pin waveform at overvoltage
Pin No. 2 is biased from the IC internal power supply via the
resistance. The FB pin voltage is level-shifted and input into Advice for designing
the current comparator to provide the threshold voltage of The FB pin provides threshold voltage of the current
the MOSFET current signals to be detected with the IS pin. comparator. If noise is added to the pin, output pulse
fluctuation may result. To prevent generation of noise, a
(ⅱ) Overload detection capacitor having the capacitance of approximately 1000 pF
• Connection method to 0.01 F is connected for use as shown in Fig. 20.
The same as the feedback signal input in (ⅰ).
• Operation
4.8V
In case of overload, the output voltage decreases to lower
than the setting, therefore the FB pin overshoots to the high
side. This state is detected to judge overload status. The 24k
216k/ 1000pF～
threshold voltage for overload judgment is 3.5 V. 108k 0.01uF
By the automatic recovery function, overload status brings 2
FB
about hiccup operation, and once the overload state is
reset, operation is automatically resumed. See 9. (3)
“Operation under overload” for details of operation.
Fig.20 FB pin circuit
(ⅲ) Stopping switching for burst operation
The same as feedback signal input in (ⅰ)
• Operation
FB pin voltage decreases under light load. If this voltage
decreases to threshold voltage of stopping on-pulse or
lower, switching is stopped, and switching is resumed if the
voltage increases to the threshold voltage of stopping
on-pulse or higher. By repeating this operation, burst
operation is achieved. To undershoot the FB pin voltage
significantly at the time of burst operation, the internal FB
pin resistance is switched (Fig. 20).
To compensate the dependence of load point for entering
burst operation on the high-line voltage, the pulse shutdown
FB threshold voltage is switched to 0.35 V for high line
voltage, and 0.45 V for low line voltage.

29
April 2012
FA5640/41/42/43/44/48
(3) Pin No. 3 (IS pin) voltage of the IS pin is switched. In this case, the detection
Function level is decreased to approximately 1/7 of that of normal
(ⅰ) Detects and limits the current value of the MOSFET.
(ⅱ) Switches the maximum threshold voltage of current operation. But it is necessary to confirm output power in
limit by external signals.(Standby mode function) (Except actual power supply unit because the output power may
FA5643) vary with specification of transformer and circuit constant.
(ⅲ) Detection of transformer short circuit protection For example, the power of the power supply is limited in
How to use (FA5643) standby mode. Specifically, the maximum input threshold
(ⅰ) Current detection and current limiting voltage is switched between 0.15 V (low line voltage) and
• Connection method 0.1 V (high line voltage).
Connect a current detecting resistor Rs between the
MOSFET source pin and the GND. The current signals of If Low signals are input from the external signal, transistor
the MOSFET generated in the resistor are input (Fig. 21). Tr1 and the optocoupler are set to OFF, and transistor Tr2
• Operation is brought into continued state, and the IS pin is subjected
The current signals of the MOSFET input to the IS pin is to the effect of the auxiliary winding voltage. The auxiliary
then input to the current comparator, and if it reaches the winding voltage remain positive while the MOSFET is set to
threshold voltage determined by the FB pin, the MOSFET is OFF, and negative while it is set to ON, and thanks to the
turned off. This FB pin voltage fluctuates due to the function of diode D1, the IS pin voltage is increased to
feedback circuit from the output voltage to control the positive side only during the period in which the MOSFET
MOSFET current. remains OFF.
In addition, since the maximum input threshold voltage is
also input to the current comparator, the MOSFET current
is limited by the current equivalent to this voltage even in an
Current
emergency state such as transient state at the time of
Comparator
startup or overload status.
If overload state continues, the latch-off stop is performed
3
by the overload protection function. Generally, the output IS
Rs
current value that is stopped in the latch-off mode varies
depending on the high-line voltage, and there may be a
case in which the higher the line voltage, the larger the Fig.21 IS pin circuit
output current that is stopped in the latch mode. To
compensate the dependency of overload detection level on
D1 Vout
the line voltage, the maximum input threshold voltage is
vcc R3
switched between 0.5 V (low line voltage) and 0.45 V (high 6
D2
line voltage).
Tr2 External
( ⅱ ) Switching of current limiting maximum threshold Tr1 switch
signal
voltage by external signals(Standby mode function, Except IS
3
• Connection method FA5643) Rs
As shown in Fig. 22, a diode, current limiting resistor,

transistor switch, optocoupler, etc. are added between the Standby
auxiliary winding and the IS pin.
Standby detection
• Operation
voltage 0.55V(typ.) Delay
While the MOSFET remains ON, MOSFET current signals 2.0us
are kept input to the IS pin for comparison with the IS pin
threshold voltage that is determined by the FB pin. With this

Normal
IC, IS pin voltage level is detected during this OFF period.
By increasing the IS pin voltage to 0.55 V, which is the IS
Fig.22 Power limiting circuit and waveform at
pin standby detection voltage, or higher within 2 s after the standby detection
MOSFET is turned off, the maximum input threshold
30
April 2012
FA5640/41/42/43/44/48
(ⅲ) Detection of transformer short circuit protection dependency of overload detection level on line voltage has
• Connection method (FA5643) been compensated, this ratio may deviate. Confirm there is
The same as Current detection and current limiting in (ⅰ). no problem in application enough.
• Operation
This IC has function in it that carries out latch shutdown (3) Burst operation point adjustment 2 under light load
instantly when the voltage higher than 0.97V is impressed To allow bust operation to occur under slightly heavier load,
to IS pin to protect a transformer short circuit. thus to improvement the efficiency under light load, on
This function also carries out instantly latch shutdown condition that there is no transformer audible noise problem,
except a transformer short circuit when the voltage higher add resistor R5 between the IS pin and the OUT pin (Fig.
than 0.97V is impressed to IS pin. Therefore if the high 26). Note, however, that the overload detection level varies
voltage is impressed to the input side such as lightning in this case also. With this IC, though the dependency of
surge, the protection operation may carry out latch overload detection level on line voltage has been
shutdown. compensated, this ratio may deviate. Confirm there is no
In such a case the values of IS pin filter Ris, Cis and a problem in application enough.
surge protection element for the input line should be
readjusted. (See Fig.23.) C1
short
Ris
Advice for designing
IS
(1) Insertion of a filter 3 Cis Rs
Since this IC has a leading edge blanking (minimum ON

width: 290 ns), malfunction due to surge current generated
4
at the MOSFET is switched on does not occur. However, if GND
the surge current generated at the leading edge of OUT is

large, or external noise is added, malfunction may occur. In Fig.23 Transformer short circuit protection
such cases, add a CR filter to the IS pin as shown in Fig.
24.
Current
The filter constant depends on the magnitude of the noise, Comparator
but as the time constant of Ris  Cis, about 500 ns or less is Ris
3
recommended. Note, however, the overload detection level IS
Cis Rs
and the load level of starting burst operation may vary, thus
audible noise may be generated or standby power may vary.
Pay special attention to the above phenomena. Fig.24 IS pin filter
(2) Burst operation point adjustment 1 under light load OUT

5
If burst operation is started under heavy load, the audible R4
Ris
noise may be generated at transformer. To decrease the 3
burst point slightly, add resistor R4 between the IS pin and IS Rs
Cis
the OUT pin (Fig. 25). If R4 is connected, the positive bias 4
GND
voltage is applied to the IS pin voltage when the MOSFET
is turned-on, and consequently, the FB pin voltage also Fig.25 Burst operation point adjustment 1
remains high level. Since burst operation occurs if the FB
C1
pin voltage decrease to 0.45 V (at low line voltage) or lower,
burst operation does not tend to occur if the FB pin voltage
remains high. Even if a resistor is added between the IS pin IS
3 Ris Rs
and the OUT pin, the effect of resistor R4 may not be R5
obtained if Ris is small. In this case, decrease Cis and VCC
6
increase Ris, while fixing the time constant of the filter (Ris 4
GND
= 470  is recommended when R4 is added).
Note, however, that the standby power may increase, or
overload detection level may vary. With this IC, though the Fig.26 Burst operation point adjustment 2

31
April 2012
FA5640/41/42/43/44/48
(4) Switching of current limiting maximum threshold voltage

by external signals (Except FA5643/48)
Diodes D1 and D2 in Fig. 22 can share parts with the diode
connected between the VCC pin and the auxiliary winding.
While the MOSFET is turned-off, the voltage of auxiliary
windings is depended on output voltage on the secondary Ris
3
side and ratio of the number of turns of secondary windings IS Cis
R6 Rs
and number of turns of auxiliary windings. As the pull-up
level of the IS pin voltage, determine the value of R3 so that
the IS pin voltage reaches IS pin standby detection voltage Fig.27 Fine adjustment of overload detection level
0.55 V, or higher within 2 s after the turn OFF. In this case,
if Ris is small, the IS pin voltage may not increase.
Therefore, adjust the constant of the filter, following the
description in (2) “Burst operation point adjustment 1 under
light load.”
Diode D2 is added to prevent heating of the MOSFET in the
event diode D1 is short-circuited, causing negative voltage
to be applied to the IS pin and allowing the ON width to
increase abnormally.
(5) Fine adjustment of overload detection level

The overload detection level is determined by the value of
resistor Rs in principle. To fine-tune the level, add resistor
R6 as shown in Fig. 27 to input the voltage divided by
resistors Ris and R6 into the IS pin.

32
April 2012
FA5640/41/42/43/44/48
(4) Pin No. 4 (GND pin)

Function 6
Pin No. 4 serves as the basis of the voltage of each part of VCC
the IC. Driver

OUT
5
(5) Pin No. 5 (OUT pin)
GND
Function 4
Drives the MOSFET
How to use Fig.28 OUT pin circuit (1)
Connect pin No. 5 to the MOSFET gate (Figs. 28, 29, and
30). 6
• Operation VCC
While the MOSFET remains ON, it is in high state, and Driver

OUT
VCC voltage is output. 5
While the MOSFET remains OFF, it is in low state, and 0
GND
voltage is output. 4
Connect the gate resistor to limit the current fed to the OUT Fig.29 OUT pin circuit (2)
pin or prevent vibration of gate pin voltage.
Adjust the gate resistor not to exceed the IC output current
rating of 0.25 A (source) and 0.5 A (sink). 6
VCC
(6) Pin No. 6 (VCC pin) Driver

OUT
Function 5
Supplies for the IC.
GND
How to use 4
Generally, the pin is connected the auxiliary winding of the Fig.30 OUT pin circuit (3)
transformer which is rectified and smoothed (Fig. 31).
The auxiliary winding that can be connected to the ZCD pin
can be shared.
6
• Operation VCC C2
Set the voltage to be supplied from the auxiliary winding
within the 11 to 26 V range (recommended operation
condition) in normal operation. Since the startup circuit is
operated when the VCC pin voltage decreases to the
ZCD R1
startup current restart voltage, 9 V, or lower, the VCC pin 1
voltage is recommended to be used by 11 V or higher C1
because the startup circuit is not operated.
It is also possible to operate the IC not by using the Fig.31 VCC circuit
auxiliary winding but using the current supplied from the
startup circuit. However, standby power increases and
heating of IC also increases in these cases. Consequently,
to achieve low standby power, it is recommended to supply

VCC from the auxiliary winding.
At the same time, if the startup circuit only is used for
startup, the MOSFET to be driven must be selected
carefully because there is a limit in current to be supplied.

33
April 2012
FA5640/41/42/43/44/48

(1) Connection of the bypass capacitor • Operation
Since large current is fed to the VCC pin when the This IC, which integrates a startup circuit having withstand
MOSFET is driven, relatively large noise tends to be voltage of 500 V, achieves low power consumption.
generated. In addition, noise is also generated from the Figure 32 presents a typical connection method, in which
current supplied by the auxiliary winding. If this noise is the VH pin is connected to the half-wave rectification
large, malfunction of the IC may result. To minimize the waveform of the AC line voltage. With this method, the
noise that is generated at the VCC pin, add a bypass startup time is the longest of the three connection methods.
capacitor C2 (0.1 F or higher) adjacent to the VCC pin of In addition, since current supply from the VH pin is
the IC, between VCC and the GND, as shown in Fig. 31, in interrupted if the AC line voltage is interrupted after the IC
addition to the electrolytic capacitor. enters the latch-off mode, the latch-off mode can be reset in
a period of time as short as several seconds.
(2) Adjustment of power supply voltage input range
The recommended supplied voltage range is 11 V to 26 V.
When the load is light, the VCC pin voltage decreases,
whereas when the load is heavy, the voltage increases,
thus deviating from the power supply voltage range. In such
VH
cases, change the resistor between the VCC pin and the 8
diode to adjust the voltage. Also, by adding beads core at Startup circuit
起動回路
on/off signal VCC
start 6
the foot of the resistor, voltage fluctuation may be on/off信号
suppressed.
If the above methods do not work, it is recommended to
change the secondary winding and the auxiliary winding of Fig.32 VH pin circuit (1)
the transformer to bifilar winding.
With the connection shown in Fig. 33, the VH pin is
(3) When power is supplied directly to the VCC pin connected to the full wave rectification waveform of the AC
When directly supplying power to the VCC pin without using line voltage. The startup time of this method is
VH pin, open the VH pin or short-circuit the VH pin and the approximately half of that of the half-wave rectification
VCC pin for use. shown in Fig. 32. In addition, by interrupting the AC line
If the VH pin is connected to the GND, leakage current may voltage, the time required for resetting the latch mode is as
be generated. short as the case shown in Fig. 32. But this connection
method may malfunction when the model which is
(7) Pin No. 7 (N.C.) integrated line voltage compensation is used, so FA5642
Since this pin is placed adjacent to the high-voltage pin, it is only is recommended this connection.
not connected to inside the IC.
(8) Pin No. 8 (VH pin)

Function
(ⅰ) Supplies startup current.
VH
(ⅱ) Detects and compensates by the high-line voltage. 8
(Except FA5642) Startup circuit
起動回路
on/off signal VCC
start 6
How to use on/off信号
(ⅰ) Supply startup current.
Connect the pin to the high-voltage line. In this case, if Fig.33 VH pin circuit (2)
connection is to be made after rectification, connect it via a
resistor of several k (Fig. 34). On the other hand, if
connection is to be made before rectification, connect it to
the high-voltage line via a resistor of several k and a
diode (Figs. 32 and 33).

34
April 2012
FA5640/41/42/43/44/48
With the method shown in Fig. 34, the VH pin is connected The threshold level for switching based on input voltage
after the AC line voltage is rectified and smoothed. The include the pulse shutdown FB voltage, which is related to
startup time of this method is the shortest of the three the burst operation, and the maximum input threshold
connection methods. However, since the voltage charged in voltage, which is the overload limit level of the IS pin.
the bulk capacitor is applied to the VH pin even if the AC
line voltage is interrupted after the IC enters the latch-off
mode, longer time is required to reset the latch-off mode.
Note that several minutes are required to reset the latch-off
mode after the AC line is interrupted, although the duration
depends on the operating conditions.
VH
8
If power is turned on, the capacitor connected to the VCC VCC
起動回路
start 6
pin is charged due to the current supplied from the startup on/off信号
circuit to the VCC pin via the VH pin, and the VCC voltage
increases. When the ON threshold voltage of 14 V of the
low-voltage malfunction prevention circuit (UVLO) is Fig.34 VH pin circuit (3)
exceeded, the internal supply is started to operate the IC. If
VCC is not supplied from the auxiliary winding, the startup Advice for designing
circuit is stopped. Meanwhile, if power is not supplied from (1) Startup resistor
the auxiliary winding, the current supplied from the startup To prevent damage to the IC due to surge voltage of the AC
circuit is used for the normal operation of the IC. If VCC is line, it is recommended to connect a startup resistor whose
supplied only from the startup circuit, without the supply resistance within the 2 k to 10 k range to the VH pin in
from the auxiliary winding, the standby power increases, series.
and the heating of the IC may increase. Consequently, to Startup time or startup voltage cannot be adjusted using
keep the standby power at low level, it is desirable to supply this startup resistor. Note that a resistor having too large
VCC from the auxiliary winding. resistance may result in inability to startup.
At the same time, if the startup circuit only is used for
startup, there is a limit in current to be supplied. (2) To supply power directly to the VCC pin
Consequently, the MOSFET to be driven must be selected To supply power directly to the VCC pin without using a VH
carefully. pin, open the VH pin or short-circuit the VH and the VCC
pins.
The current fed from the VH pin to the VCC pin is If the VH pin is connected to the GND, leakage current may
approximately 8 mA when VCC = 6.5 V. Note that when be generated.
VCC = 0 V, the current decreases to 0.7 mA to cope with
abnormal state such as short circuit between pins.
(ⅱ) The peak voltage of the line voltage is detected to

subject it to high/low line voltage compensation. (Except
• Connection method FA5642)
The same as the method of supplying startup current in (i)
• Operation
If voltage after rectification is input to the VH pin, each
threshold level is switched at 226 V when the VH pin
voltage is increasing, and 212 V when it is decreasing. If
half-wave and full-wave rectification waveforms are input, it
is switched at 160 Vrms. The input detection switching
delay time is 30 ms.

35
April 2012
FA5640/41/42/43/44/48
(9) Other advice on designing (4) Loss calculation

(1) Surge that occurs at startup due to the minimum To use the IC within its rating, it is necessary to confirm the
switching frequency limiting loss of the IC. However, since it is difficult to measure the
Our lineup includes the one that the minimum switching loss directly, the method of confirming the loss by
frequency and the maximum ON width are set with this IC calculation is shown below. If the voltage applied to the VH
to reduce audible noise at the time of starting /stopping. pin is defined as VVH, the current fed to the VH pin during
However, due to this minimum switching frequency function, operation as IVHrun, power supply voltage as VCC, supply
there is a period in which the IC is operated in continuous current as Iccop1, gate input charge of the MOSFET to be
conduction mode at startup, which may result in increased used as Qg, and switching frequency as fsw, the total loss
surge voltage of the diode on the secondary side. Please Pd of the IC can be calculated using the following formula.
consider using the one that this minimum switching
Pd≈VCC×(ICCop1+Qg×fsw)+Vvh×IVHrun
frequency limiting function was not integrated if the serge of
the diode is a problem. A rough value can be found using the above formula, but
note that Pd is slightly larger than the actual loss value.
(2) Switching frequency at the time of bottom skip Also note that each specific characteristic value has
This IC detects ON/OFF width using the ZCD pin, thus temperature characteristics or variation.
controlling the number of times of bottom skips. Bottom skip
is performed up to the point where the IC is turned on at the Example:
fourth bottom depending on the load. At this time, If the VH pin is connected to a half-wave rectification
depending on the specifications of the power supply or waveform with AC 100 V input, the average voltage to be
design conditions of the transformer, the switching applied to the VH pin is approximately 45 V. In this state,
frequency at the time of bottom skip may be decreased to assume that VCC = 15 V, Qg = 80 nC, and fsw = 60 kHz
40 kHz or lower. If this frequency interferes with other (when Tj = 25C). Since IVHrun = 30 A and Iccop1 =
devices, causing problems, for example, adjust the 0.85mA from the specifications, the standard IC loss can be
resonance capacitor connected between the drain and the calculated as follows:
source of the MOSFET. If the capacitance is reduced, the Pd ≈ 15V x (0.85mA + 80nC x 60kHz) + 45V x 30µA ≈
resonance frequency increases, allowing the switching 86.1mW
frequency at bottom skip to increase.
(3) Preventing malfunction due to negative voltage of the

OUT Rg
pin 5
If large negative voltage is applied to each pin of the IC, the
parasitic devices within the IC may be operated, thus 4 SBD
causing malfunction. Confirm that the voltage of -0.3 V or GND
less is not applied to each pin.
The vibration of the voltage generated after the MOSFET is Fig.35 Negative charge prevention circuit
turned-off may be applied to the OUT pin through the
parasitic capacitance, resulting in a case in which negative
voltage is applied to the OUT pin.
In addition, negative voltage may be applied to the IS pin
due to the vibration of surge current generated at the
turn-on of the MOSFET.
In such cases, connect a Schottky diode between each pin
and the GND. The forward voltage of the Schottky diode
can suppress the negative voltage at each pin. In this case,
use a Schottky diode whose forward voltage is low. Figure
35 is a typical connection diagram where a Schottky diode
is connected to the OUT pin.

36
April 2012
FA5640/41/42/43/44/48
11. Precautions for pattern design

(1) Precautions for pattern design
In order to prevent the malfunction of the control IC (unstable voltage, unstable waveform, latch-off, etc.) caused by the surge
voltage (noise) when a current is applied to the pattern on the minus side because of a principal current, a lightning surge test,
an AC line surge test, and a static electricity test, consider the following contents when designing the pattern.
The power supply has the following current paths:

1) A principal current applied from the electrolytic capacitor to the primary winding of the transformer, the MOSFET, and the
current sensing resistor after AC power supply rectification
2) A rectified current applied from the auxiliary winding of the transformer to the electrolytic capacitor; a drive current applied
from the electrolytic capacitor to the control IC and the MOSFET gate.
3) A control current of the control IC for output feedback or the like
4) Filter and surge currents applied between the primary and secondary sides
▪ Separate the patterns on the minus side in 1) to 4) to avoid interference from each other.
▪ To reduce the surge voltage of the MOSFET, minimize the loop of the principal current path.
▪ Install the electrolytic and film capacitors between the VCC pin and the GND in a closest position to each pin in order to
connect them at the shortest distance.
▪ Install the filter capacitors for the FB, IS, and ZCD pins and the like in a closest position to each pin in order to connect them
at the shortest distance. Especially, connect the patterns on the negative side of the FB and IS pins to the GND pin of the IC,
separately from other patterns, keeping the wiring as short as possible.
▪ Avoid installing the control circuit and pattern with high impedance directly below the transformer.
Principal current
1 Output
AC Input
CN2
Drive current
6
8 7 6 5
VH (NC) VCC OUT
LAT FB IS GND
1 2 3 4
Filter and surge

Control current
current
Fig.36 Pattern design image

37
April 2012
FA5640/41/42/43/44/48
12. Example of application circuit

The typical application circuit shown here provides specifications common to each IC series.
470p 22
F1 D10XB60H P3
2200p 0.22u
2 13,14,15,16
1
4A,8mH
1 24V / 4A
1M 100k 0.1u 96W
AC85 to 470u
YG906C2R
2
0.47u 200V/20A
264V 3
1M 3
1KV,0.5A 4 0.1u
P2 T1 1500u 1500u 3
FB Np:Ns:Nb=40:12:10
5 2200p Lp=176uH
CN1 P1 4
5 9,10,
11,12 CN2
HS1 C23 P4
TR1
0.1u
FMV11N70E
700V/11A 220p
600V,1A 22 10k HS2 1.5k
130k
470
4.7k 47 0.1 PC1A
200V,1A TLP421F GR 510
4.7k 400V,1A 4.7k
FB 4.7 8
47k 0.047u
8 7 6 5 0.1u
VH (NC) VCC OUT SBD 100u
IC1 FA5640 7 HA17432HUP 15k

ZCD FB IS GND
56k 1 2 3 4
2200p
SBD RV1
SBD 39k 10p

5.1k
1000p PC1B 1000p
Note: This application circuit is a reference material for describing typical usage of this IC, and does not guarantee the
operation or characteristics of the IC.

38
April 2012

FA5643 Fuji

Uploaded by

Copyright:

Available Formats

FA5643 Fuji

Uploaded by

Document Information

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

FA5643 Fuji

Uploaded by

Copyright:

Available Formats

FA5640/41/42/43/44/48

Fuji Switching Power Supply Control IC

Green mode Quasi-resonant IC

Fuji Electric Co., Ltd.

Fuji Electric Co., Ltd.

Fuji Electric Co., Ltd.

Function list by types

Fuji Electric Co., Ltd.

4.8V Off timer

Soft start VthIS at Standby 6V

Soft start VthIS at Standby 6V

Fuji Electric Co., Ltd.

4.8V Off timer

Resistance ratio Internal

Fuji Electric Co., Ltd.

4.8V Off timer

Soft start VthIS at standby 6V

4.8V Off timer

Fuji Electric Co., Ltd.

5. Functional description of pins

6. Rating and characteristics

* Allowable loss reduction characteristics

Package thermal resistor

Fuji Electric Co., Ltd.

(2) Recommended operating conditions

Feedback part (FB pin)

Fuji Electric Co., Ltd.

Zero current detection part (ZCD pin)

Over-voltage protection part (ZCD pin)

Fuji Electric Co., Ltd.

Overload protection part (FB pin)

Soft start part

Standby-mode function (IS pin) (FA5640,FA5641,FA5642,FA5644)

Other protection part

Drive Output part (OUT pin)

Fuji Electric Co., Ltd.

High voltage input part (VH pin)

Low voltage malfunction protection circuit (UVLO) part (VCC pin)

Fuji Electric Co., Ltd.

Current consumption (VCC pin)

*1 : Regarding to these items, guaranteed by design.

Fuji Electric Co., Ltd.

IS pin maximum threshold voltage (VthIS1)

Fuji Electric Co., Ltd.

Delay time to OLP (Tolp) Delay time to OLP (Tolp)

Fuji Electric Co., Ltd.

OLP off time (Toff)

Input current of VH pin (IVHrun) Input current of VH pin (IVH)

Fuji Electric Co., Ltd.

Input current of VH pin (IVH1) Input current of VH pin (IVH0)

UVLO ON threshold voltage (VCCon)

Fuji Electric Co., Ltd.

Startup device ON voltage (Vstrst) Startup device OFF voltage (Vstoff)

Operating-state supply current (ICCop1) Operating-state supply current (ICCop1)

Latch mode supply current (ICClat)

Fuji Electric Co., Ltd.

by Rs and is input into IS pin.

ON again. If the delay time of CR circuit placed between the auxiliary

Fig.1 Schematic circuit diagram in basic operation

Fuji Electric Co., Ltd.