HCMUT

Course: Biomedical Electronics

Instructor: Hồ Trung Mỹ

Ch 3
Amplifiers & Signal Processing
(Các mạch khuếch đại và xử lý tín hiệu)

Refs:
1. Prof. Andrew Mason - Michigan State University, USA
2. J.G. Webster, “Medical Instrumentation Application and
Design”, John Wiley & Sons, 2010

1
 Outline
1. Ideal Op Amps 11. Frequency Response
2. Inverting Amplifiers 12. Offset Voltage
3. Noninverting Amplifiers 13. Bias Current
4. Differential Amplifiers 14. Input and Output Resistance
15. Phase-Sensitive
5. Comparators
Demodulators
6. Rectifiers 16. Timers
7. Logarithmic Amplifiers 17. Microcomputers in Medical
8. Integrators Instrumentation
9. Differentiators
10. Active Filters

2
Amplifiers and Analog Signal Processing

3
 Applications of Operational Amplifier
In Biological Signals and Systems

The three major operations done on biological signals using

Op-Amp:

1) Amplifications and Attenuations

2) DC offsetting: add or subtract a DC
3) Filtering: Shape signal’s frequency content

4
 3.1 Ideal Op-Amp

Most bioelectric signals are small and require amplifications

Figure 3.1 Op-amp equivalent circuit.

The two inputs are u1 and u 2. A differential voltage between them
causes current flow through the differential resistance Rd. The
differential voltage is multiplied by A, the gain of the op amp, to
generate the output-voltage source. Any current flowing to the output
terminal vo must pass through the output resistance Ro.
5
 Inside the Op-Amp (IC-chip)

20 transistors
11 resistors
1 capacitor

6
 Ideal Characteristics

1- A = ¥ (gain is infinity)
2- Vo = 0, when v1 = v2 (no offset voltage)
3- Rd = ¥ (input impedance is infinity)
4- Ro = 0 (output impedance is zero)
5- Bandwidth = ¥ (no frequency response limitations) and no phase shift
7
 Đặc tuyến truyền đạt của opamp
(Đường cong truyền đạt áp)
+VCC or VDD

v+ or v2 vo

v- or v1

–VEE or –VSS

Chú ý: Linear region:

• Với opamp BJT: CC (Collector) và EE VO = A(V2 – V1)
(Emitter)
• Với opamp FET: DD (Drain) và SS (Source)
• Cấp nguồn lưỡng cực: Typical values: X =-25 and Y = 25
Thường VCC = VEE Vsat+ = +VS (Vs < VCC)
•Cấp nguồn đơn (thường gặp trong ĐTYS): Vsat- = -VS
q VEE = 0 (thường gặp), hoặc
q VCC = 0
8
Op-Amp Properties

9
The ideal characteristics for an op amp and typical
actual values for a 741 op amp

10
Basic Op-Amp Principles

11
Basic Opamp Configuration

12
 Two Basic Rules

Rule 1
When the op-amp output is in its linear range, the two input terminals
are at the same voltage.

Rule 2
No current flows into or out of either input terminal of the op amp.
13
 3.2 Inverting Amplifier
uo

10 V
i
Rf
-10 V 10 V
i
ui
Ri
ui -
uo Slope = -Rf / Ri
+
-10 V
(a)
(b)

Rf vo Rf
vo = - vi G= =-
Ri vi Ri
Figure 3.3 (a) An inverting amplified. Current flowing through the
input resistor Ri also flows through the feedback resistor Rf . (b) The
input-output plot shows a slope of -Rf / Ri in the central portion, but the
output saturates at about ±13 V.
14
Summing Amplifier (Mạch KĐ tổng đảo)
R1 Rf
u1
- æ v1 v2 ö
R2 uo vo = - R f çç + ÷÷
u2 + è R1 R2 ø

15
 Example 3.1
The output of a biopotential preamplifier that measures the electro-
oculogram is an undesired dc voltage of ±5 V due to electrode half-
cell potentials, with a desired signal of ±1 V superimposed. Design a
circuit that will balance the dc voltage to zero and provide a gain of -
10 for the desired signal without saturating the op amp.

Ri Rf +10
10 kW 100 kW ui
ui

-
ui + ub /2
Voltage, V
+15V Rb uo 0
20 kW Time
5 kW +
vb

-15 V

-10 uo
(a) (b)
16
Fundamental Circuit: Source and Load

17
 Follower ( buffer)
Used as a buffer, to prevent a high
source resistance from being loaded -

uo
down by a low-resistance load. In ui +

another word it prevents drawing

current from the source. vo = vi G =1

18
 3.3 Noninverting Amplifier

uo
i i 10 V
Ri Rf Slope = (Rf + Ri )/ Ri

-10 V 10 V

ui
-

uo
ui
-10 V
+

R f + Ri R f + Ri æ Rf ö
vo = vi G= = çç1 + ÷÷
Ri Ri è Ri ø

19
 Mạch KĐ tổng không đảo

(a) Four input non-inverting summer. (b) Equivalent circuit for calculating vO.

20
 Input modes for op-amp

(a) Single-ended input b) Differential input (c) Common-mode

Ref: Floyd
21
Differential vs. Common Mode Signal

22
Noise in Differential Amplifiers

23
Desirable Properties of Amplifiers

24
3.4 Mạch KĐ vi sai (Differential Amplifiers)
Mạch KĐ hiệu Mạch KĐ vi sai
(Difference Amplifier)

R4
vo = (v4 - v3 )
R3

Áp dụng nguyên tắc xếp chồng Ø Độ lợi VS: Gd = Vo/(V4 – V3) = R4/R3
(supersition principle) ta có: Ø Độ lợi cách chung Gc: lý tưởng thì
VO = (1 + R2/R1)R4VI2/(R4+R3) – R2/R1VI1 Gc = 0, nhưng thực tế thường Gc ¹ 0.
Ø Tỉ số triệt cách chung CMRR
Nếu R4/R3 = R2/R1 thì ta có mạch
(Common Mode Rejection Ration):
KĐVS
CMRR = |Gd/Gc| hoặc
VO = (R2/R1)(VI2 – VI1) CMRRdB = 20 log10 |Gd/Gc|
= (R4/R3)(VI2 – VI1)
Ø Bất lợi của mạch này là tổng trở vào
nhỏ: Rin = 2R3 25
 Mạch KĐ vi sai có thêm mạch đệm

Mạch này có tổng trở vào: Rin = ¥

26
 Mạch KĐ đo lường (IA) dùng 3 opamp
IA = Instrumentation Amplifier

æ 2 R2 + R1 ö R4
vo = çç ÷÷ (v2 - v1 )
è R1 ø R3

Differential Mode Gain: v3 - v4 = i( R2 + R1 + R2 )

v1 - v2 = iR1
v3 - v4 2 R2 + R1
Gd = =
v1 - v2 R1
Advantages: High input impedance, High CMRR, Variable gain 27
Mạch KĐ đo lường (IA) dùng 2 opamp

• Điện áp ra Vo = G1V1 + G2V2

với
G1 = –(1 + R2/R1)R4/R3 và G2 = 1 + R4/R3

• Nếu R1/R2 = R4/R3 thì ta có mạch KĐVS:

Vo = (1 + R4/R3)(V2 – V1)

28
 3.5 Mạch so sánh (Comparator)
• Mạch so sánh là mạch op-amp so sánh hai điện áp đầu
vào và tạo ra đầu ra chỉ ra mối quan hệ giữa chúng. Các
đầu vào có thể là hai tín hiệu (như hai sóng hình sin)
hoặc tín hiệu và điện áp tham chiếu dc cố định VREF (còn
được gọi là điện áp chuẩn)
• Thường được sử dụng như một giao tiếp giữa tín hiệu số
và tín hiệu tương tự.

Vấn đề Giải pháp

29
 Mạch so sánh đơn giản
Vo Vo

VPS VPS
Vi Vo

Vi Vi
Vref
0 Vref 0 Vref
VNS VNS
Vo = VSAT sign(Vi – Vref )
Đặc tuyến truyền đạt Đặc tuyến truyền đạt thực tế
Chú ý: lý tưởng
Ø Điện áp bão hòa dương VPS = Vsat+ = +VSAT
Ø Điện áp bão hòa âm VNS = Vsat– = –VSAT
Ø Nếu cấp nguồn lưỡng cực và đối xứng thì (lý tưởng) VSAT = VCC = VEE.
Ø Nếu hoán đổi các đầu vào thì Vo = –VSAT sign(Vi – Vref ) và đặc tuếy truyền đạt
sẽ đảo ngược.
Ø Đây là mạch phát hiện mức zero.

30
 Mạch so sánh với mức ngưỡng VTH
R1 uo
ui VPS
- VTH = –R1Vref/R2
R2
uref uo
+
ui
VTH

VNS

Mạch so sánh có ngưỡng Đặc tuyến truyền đạt

• Điện thế tại ngõ đảo là (tổng quát thì Vref có thể dương, âm hay 0)
V- = (R2Vi + R1Vref)/(R1 + R2)
• Ta xét dấu V+ – V- = –(R2Vi + R1Vref)/(R1 + R2)
Vi < VTH VTH > VTH
V+ – V- + 0 –
Opamp bão hòa + –
Ngõ ra Vo VPS = +VSAT VNS = –VSAT

với điện áp ngưỡng (threshold voltage) VTH = –R1Vref/R2 31

Mạch so sánh với tham chiếu zero
Mạch phát hiện mức zero

+VSAT

32
 Mạch so sánh với tham chiếu zero có giới hạn
1. Giới hạn ở trị dương
Dz Vo
R +V +Vz
Vi Vo 0

-V -0.7V

2. Giới hạn ở trị âm

Dz
R Vo
+V
Vi +0.7V
0
Vo
-V -Vz

3. Giới hạn 2 đầu Vo

Dz1 Dz2 Vz2 + 0.7V
R +V 0
Vi
Vo
- (Vz1 + 0.7V)
-V 33
 Mạch so sánh có vòng trễ (hysteresis)
• Còn được gọi là mạch Schmitt trigger (có nhiều dạng mạch)
• Có hồi tiếp dương và đặc tuyến truyền đạt có vòng trễ.
v TD: Vo Vòng trễ= UTP – LTP
R1 VPS
Vi
-
R2 Vo
Vref + Vi
R3 LTP UTP

R4
VNS
• Xét dấu của V+ – V- với UTP = –R1Vref/R2 + (1 + R1/R2)R4VSAT/(R3 + R4)
• V- = (R2Vi + R1Vref)/(R1 + R2) LTP = –R1Vref/R2 – (1 + R1/R2)R4VSAT/(R3 + R4)
• V+ = R4Vo/(R3 + R4) UTP – LTP = 2(1 + R1/R2)R4VSAT/(R3 + R4)
• Khi Vi tăng trị từ trái qua phải, opamp bão hòa dương, Vo = VPS; tại điểm UTP thì
chuyển sang bão hòa âm.
UTP = –R1Vref/R2 + (1 + R1/R2)R4VSAT/(R3 + R4)
• Ngược lại, khi Vi giảm trị từ phải (từ điểm > UTP) ta có
LTP = –R1Vref/R2 – (1 + R1/R2)R4VSAT/(R3 + R4)
Chú ý: Còn nhiều dạng mạch so sánh khác! 34
 Normal diode
3.6 Rectifier
Superdiode

vi

vo

VTC (or Transfer Char.)

Voltage Transfer Curve (VTC) vo

Slope = 1
Slope = 1

VON (= 0.7V - Si) vi

The circuit will not work well with high frequency
VON vi signals.
• When the input signal becomes negative, the op amp
has no feedback at all, so the output pin of the op amp
vo swings negative as far as it can.
• When the input signal becomes positive again, the op
amp's output voltage will take a finite time to swing
back to zero, then to forward bias the diode and
VON
produce an output. This time is determined by the op
amp's slew rate 35
 Another Circuit
• The circuit below accepts an incomimng waveform and as usual with
op amps, inverts it. However, only the positive-going portions of the
output waveform, which correspond to the negative-going portions of
the input signal, actually reach the output.
• The direct feedback diode shunts any negative-going output back to
the "-" input directly, preventing it from being reproduced. The slight
voltage drop across the diode itself is blocked from the output by the
second diode. D1 allows positive-going output voltage to reach the
output.
VO = –R2Vi/R1 when Vi < 0
VO = 0 when Vi > 0

R2

R1

36
 uo
Rectifier 10 V

R
-10 V 10 V
D1 D2
xR (1-x)R ui

-
-10 V
ui + (b)
R
D4 ui
uo=
D3 x xR (1-x)R
- vo
- D2
+
(a) ui +

(a)

VO = (1 + R2/R1)Vi when Vi > 0

Full-wave precision rectifier: VO = 0 when Vi < 0
Therefore, when Vi > 0:
a) For ui > 0, VO = (1 + (1-x)/x)Vi = Vi/x
D2 and D3 conduct, whereas D1 and D4 are
reverse-biased.
Noninverting amplifier at the top is active
37
 Rectifier xRi R
R
D1 ui vo
D2
xR (1-x)R - D4

- +

ui + (b)
R VO = –R2Vi/R1 when Vi < 0
D4 ui VO = 0 when Vi > 0
uo=
D3 x Therefore, when Vi <0:
-
VO = –R/xR Vi = –Vi/x
+ uo
(a) 10 V

-10 V 10 V

ui

-10 V

Full-wave precision rectifier:

b) For ui < 0, (b)

D1 and D4 conduct, whereas D2 and D3 are reverse-biased.

Inverting amplifier at the bottom is active
38
 One-Op-Amp Full Wave Rectifier

Ri = 2 kW Rf = 1 kW
ui
v
o

- D
RL = 3 kW

(c)

For ui < 0, the circuit behaves like the inverting amplifier rectifier with
a gain of +0.5. For ui > 0, the op amp disconnects and the passive
resistor chain yields a gain of +0.5.
39
 3.7 Mạch KĐ Logarithm
v Mạch KĐ Logarithm dùng diode

v Mạch KĐ Logarithm dùng BJT

40
 Logarithmic Amplifiers
Khi BJT ở chế độ tích cực:
Uses of Log Amplifier IC = ISexp(VBE/VT)
với VT = kT/q = 26mV ở T = 300K
1. Multiply and divide variables Suy ra VBE = VTln(IC/IS) = 2.303VTlog(IC/IS)
2. Raise variable to a power Nếu T = 300 K Þ 2.303VT » 0.06 V
3. Compress large dynamic range into small ones
4. Linearize the output of devices
æ IC ö
Ic
Rf /9 VBE = 0.06 logçç ÷÷
è IS ø
VBE
Rf
æ vi ö
u
R
i
- vo = 0.06 logçç ÷
-13 ÷
i
u o è Ri ×10 ø
+

(a) Vo = –VBE = –VTln(IC/IS) = –VTln(Vi/(RiIS))

Figure 3.8 (a) A logarithmic amplifier makes use of the fact that a
transistor's VBE is related to the logarithm of its collector current.
For range of Ic equal 10-7 to 10-2 and the range of vo is -.36 to -0.66 V.
41
 Logarithmic Amplifiers
VBE Rf /9 vo
Ic
10 V

VBE Rf -10 V 10 V
9VBE
Ri
ui - ´1 ui
uo
+
-10 V ´10
(b)
(a)

Figure 3.8 (a) With the switch thrown in the alternate position, the
circuit gain is increased by 10. (b) Input-output characteristics show
that the logarithmic relation is obtained for only one polarity; ´1 and
´10 gains are indicated.

42
 3.8 Integrators (Low-pass filter)
t1
1
vo = -
Ri C f ò v dt + v
0
i ic

Vo ( jw ) Zf
=-
Vi ( jw ) Zi

Rf
Zf =
1 + jwR f C f
Vo ( jw ) - R f / Ri vo - Rf
= = for f << fc
Vi ( jw ) 1 + jwR f C f
vi Ri
• Rf/Ri must be sufficiently small to minimize the
vo -1
effect of the offset = for f >> fc
• RfCf must be sufficiently large so as to negligibly vi jw Ri C f
impact the input signal frequencies of interest 1
A large resistor Rf is used to prevent saturation fc =
2pR f C f 43
 Integrators

Figure 3.9 A three-mode integrator With S1 open and S2 closed, the

dc circuit behaves as an inverting amplifier. Thus uo = uic and uo can
be set to any desired initial conduction. With S1 closed and S2 open,
the circuit integrates. With both switches open, the circuit holds uo
constant, making possible a leisurely readout. 44
 Example 3.2
The output of the piezoelectric sensor may be fed directly into the
negative input of the integrator as shown below. Analyze the circuit
of this charge amplifier and discuss its advantages.
isC = isR = 0 R
i
vo = -vc s

C
dqs/ dt = is = K dx/dt -

uo
isC isR
+ FET

Piezo-electric
sensor

1 t1 Kdx Kx
vo = - ò dt = -
C 0 dt C
Long cables may be used without changing sensor sensitivity or time
constant. 45
 3.9 Differentiators (High-pass filter)

Lý tưởng thì R1 = 0, RF = R và
C1 = C
dvi
vo = - RC
dt
Vo ( jw ) Zf
=- = - jw RC
Vi ( jw ) Zi
Figure 3.11 A differentiator The dashed lines indicate that a small
capacitor must usually be added across the feedback resistor to
prevent oscillation. 46
Integrating/Differentiating Configurations

47
 Converting Configurations

Tải thả nổi Tải nối đất

Vin
io=vin/Rf

48
3.10 Active Filters

49
 Active Filters- Low-Pass Filter Cf

Vo ( jw ) - R f 1 Rf
=
Ri
ui -
Vi ( jw )
Gain = G =
Ri 1 + jwR f C f +
uo

(a)
|G|

Rf/Ri
0.707 Rf/Ri

freq
fc = 1/2pRfCf

Active filters
(a) A low-pass filter attenuates high frequencies
50
 Active Filters (High-Pass Filter)
Rf

Vo ( jw ) - R f jwRi Ci
Ci Ri
ui -
uo
Gain = G = =
Vi ( jw )
+
Ri 1 + jwRi Ci (b)
|G|

Rf/Ri
0.707 Rf/Ri

fc = 1/2pRiCi freq
Active filters
(b) A high-pass filter attenuates low frequencies and blocks dc.
51
 Active Filters (Band-Pass Filter)
Cf

Vo ( jw ) - j wR f C i Ci Rf
=
Ri

Vi ( jw ) (1 + jwR f C f )(1 + jwRi Ci )

-
ui
uo
+

|G| (c)

Rf/Ri
0.707 Rf/Ri

fcL = 1/2pRiCi fcH = 1/2pRfCf freq

Active filters
(c) A bandpass filter attenuates both low and high frequencies.
52
 3.11 Frequency Response of op-amp and
Amplifier
Open-Loop Gain
Compensation
Closed-Loop Gain
Loop Gain
Gain Bandwidth Product
Slew Rate

fT
53
3.12 Offset Voltage (non-ideal characteristics)

54
55
56
57
58
59
60
 OFFSET VOLTAGE ADJUSTMENT USING “OFFSET-NULL" PINS

Ref: Analog Devices 61

 OFFSET ADJUSTMENT (EXTERNAL METHODS) – 1/2
If an op amp doesn't have offset adjustment pins (popular duals and all quads
do not), and it is still necessary to adjust the amplifier and system offsets, an
external method can be used.
Inverting Op Amp External Offset Trim Methods

This circuit (B) is preferred.

Ref: Analog Devices 62

 OFFSET ADJUSTMENT (EXTERNAL METHODS) – 2/2
Non-Inverting Op Amp External Offset Trim Methods

The circuit can be used to inject a small offset voltage when using an op amp in the
non-inverting mode. This circuit works well for small offsets, where R3 can be made
much greater than R1. Note that otherwise, the signal gain might be affected as the
offset potentiometer is adjusted. The gain may be stabilized, however, if R3 is
connected to a fixed low impedance reference voltage sources, ±VR.
Ref: Analog Devices 63
3.13 Bias Current

64
65
66
67
68
69
Non-ideal Characteristics

70
 3.14 Input and Output Resistance

Ro uo
ii Rd ud
+
Aud io
ui -
+ RL CL

Dvi Dvo Ro
Rai = = ( A + 1) Rd Rao = =
Dii Dio A + 1
Typical value of Rd = 2 to 20 MW Typical value of Ro = 40 W
71
 3.15 PHASE-SENSITIVE DEMODULATORS

Phase Modulator for Linear variable differential transformer LVDT

+
-

+
-

72
Phase Modulator for Linear variable
differential transformer LVDT

+
-

+
-

73
Phase-Sensitive Demodulator

Used in many medical

instruments for signal detection,
averaging, and Noise rejection

74
 The Ring Demodulator
If vc is positive then D1 and D2 are forward-biased and vA = vB. So vo = vDB
If vc is negative then D3 and D4 are forward-biased and vA = vc. So vo = vDC

vc ³ 2vi

Figure 3.17 A ring demodulator This phase-sensitive detector produces a

full-wave-rectified output vo that is positive when the input voltage vi is in phase
with the carrier voltage vc and negative when vi is 180o out of phase with vc. 75