Imx477 DS
Imx477 DS
Imx477 DS
IMX477-AACK-C
Description
IMX477-AACK-C is a diagonal 7.857 mm (Type 1/2.3) 12.3 Mega-pixel CMOS active pixel type stacked image
sensor with a square pixel array. It adopts Exmor RS™ technology to achieve high speed image capturing by column
parallel A/D converter circuits and high sensitivity and low noise image (comparing with conventional CMOS image
sensor) through the backside illuminated imaging pixel structure. R, G, and B pigment primary color mosaic filter is
employed. It equips an electronic shutter with variable integration time. It operates with three power supply voltages:
analog 2.8 V, digital 1.05 V and 1.8 V for input/output interface and achieves low power consumption.
In addition, this product is designed for use in consumer use camcorder. When using this for another application,
Sony Semiconductor Solutions Corporation does not guarantee the quality and reliability of product.
Therefore, don't use this for applications other than consumer use camcorder.
In addition, individual specification change cannot be supported because this is a standard product.
Consult your Sony Semiconductor Solutions Corporation sales representative if you have any questions.
Features
Sony Semiconductor Solutions Corporation reserves the right to change products and specifications without prior notice.
This information does not convey any license by any implication or otherwise under any patents or other right.
Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony Semiconductor Solutions
Corporation cannot assume responsibility for any problems arising out of the use of these circuits.
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IMX477-AACK-C
Device Structure
(Top View)
M1 A1
Optical
Black
Array
V
M10 A10
H
Object Lens This sensor (Top view)
Note) Arrows in the figure indicate scanning direction during default readout in the vertical direction and the
horizontal direction.
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IMX477-AACK-C
*1
VANA: VDDSUB, VDDHAN, VDDHCM1 to 2, VDDHSN1 to 4 (2.8 V power supply)
*2
VDIG: VDDLSC1 to 4, VDDLCN1 to 2, VDDLPL1 to 2, VDDLIF (1.05 V power supply)
*3
VIF: VDDMIO1 to 2, VDDMIF (1.8 V power supply)
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IMX477-AACK-C
This USE RESTRICTION NOTICE ("Notice") is for customers who are considering or currently using the
image sensor products ("Products") set forth in this specifications book. Sony Semiconductor Solutions
Corporation ("SSS") may, at any time, modify this Notice which will be available to you in the latest
specifications book for the Products. You should abide by the latest version of this Notice. If a SSS
subsidiary or distributor has its own use restriction notice on the Products, such a use restriction notice will
additionally apply between you and the subsidiary or distributor. You should consult a sales representative of
the subsidiary or distributor of SSS on such a use restriction notice when you consider using the Products.
Use Restrictions
The Products are intended for incorporation into such general electronic equipment as office products,
communication products, measurement products, and home electronics products in accordance with
the terms and conditions set forth in this specifications book and otherwise notified by SSS from time
to time.
You should not use the Products for critical applications which may pose a life- or injury-threatening
risk or are highly likely to cause significant property damage in the event of failure of the Products. You
should consult your sales representative beforehand when you consider using the Products for such
critical applications. In addition, you should not use the Products in weapon or military equipment.
SSS disclaims and does not assume any liability and damages arising out of misuse, improper use,
modification, use of the Products for the above-mentioned critical applications, weapon and military
equipment, or any deviation from the requirements set forth in this specifications book.
Export Control
If the Products are controlled items under the export control laws or regulations of various countries,
approval may be required for the export of the Products under the said laws or regulations.
You should be responsible for compliance with the said laws or regulations.
No License Implied
The technical information shown in this specifications book is for your reference purposes only. The
availability of this specifications book shall not be construed as giving any indication that SSS and its
licensors will license any intellectual property rights in such information by any implication or otherwise.
SSS will not assume responsibility for any problems in connection with your use of such information or
for any infringement of third-party rights due to the same. It is therefore your sole legal and financial
responsibility to resolve any such problems and infringement.
Governing Law
This Notice shall be governed by and construed in accordance with the laws of Japan, without reference
to principles of conflict of laws or choice of laws. All controversies and disputes arising out of or relating
to this Notice shall be submitted to the exclusive jurisdiction of the Tokyo District Court in Japan as the
court of first instance.
General-0.0.9
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IMX477-AACK-C
Contents
Description ............................................................................................................................................................................. 1
Features ................................................................................................................................................................................. 1
Device Structure ..................................................................................................................................................................... 2
Optical Black Array and Readout Scan Direction ................................................................................................................... 2
Absolute Maximum Ratings .................................................................................................................................................... 3
Recommended Operating Voltage ......................................................................................................................................... 3
USE RESTRICTION NOTICE ................................................................................................................................................ 4
1. Optical Center ............................................................................................................................................................ 8
2. Pin Configuration ....................................................................................................................................................... 8
3. Pin Description........................................................................................................................................................... 9
4. Input / Output Equivalent Circuit .............................................................................................................................. 12
5. Peripheral Circuit Diagram ....................................................................................................................................... 13
5-1 Standard peripheral circuit diagram ..................................................................................................................... 13
5-2 Connecting for OIS compatible system................................................................................................................ 14
6. Functional Description ............................................................................................................................................. 15
6-1 System Outline .................................................................................................................................................... 15
6-2 Control register setting by the serial communication ........................................................................................... 16
6-2-1 2-wire Serial Communication Operation Specifications ................................................................................... 16
6-2-2 Communication Protocol ................................................................................................................................. 17
6-3 Clock generation and PLL ................................................................................................................................... 18
6-3-1 Clock System Diagram .................................................................................................................................... 18
6-4 Description of operation clocks ............................................................................................................................ 19
6-4-1 INCK ................................................................................................................................................................ 19
6-4-2 IVTCK, IOPCK (PLL output) ............................................................................................................................ 19
6-4-3 IVTPXCK Clock ............................................................................................................................................... 19
6-4-4 IOPPXCK Clock .............................................................................................................................................. 19
6-5 Image Readout Operation ................................................................................................................................... 20
6-5-1 Physical alignment of imaging pixel array........................................................................................................ 20
6-5-2 Color coding and order of reading image date ................................................................................................ 21
6-6 Output Image Format........................................................................................................................................... 21
6-6-1 Embedded Data Line control ........................................................................................................................... 22
6-6-2 Image size of mode ......................................................................................................................................... 22
6-6-3 Description about operation mode ................................................................................................................... 23
6-6-4 Image area control capabilities ........................................................................................................................ 24
6-6-5 Readout Scan Direction................................................................................................................................... 25
6-7 Gain setting ......................................................................................................................................................... 26
6-8 Image compensation function .............................................................................................................................. 26
6-8-1 Defect Pixel Correction .................................................................................................................................... 26
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IMX477-AACK-C
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IMX477-AACK-C
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IMX477-AACK-C
1. Optical Center
(Top View)
Package outline
10.70 ± 0.1 mm
5.374 ± 0.075 mm
PKG A1 pin
M1 A1
4.172 ± 0.075 mm
Vertical readout direction
8.50 ± 0.1 mm
Optical
center
(Default)
4056 pixel
Note) The optical center is the center of the active image area 4056 (H) × 3040 (V) pixel.
Please refer to “Figure 12 Physical alignment of the imaging pixel array (Top View) ” for active image area.
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IMX477-AACK-C
3. Pin Description
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IMX477-AACK-C
Pin
Symbol I/O A/D Pin description Remarks
No.
Digital GND
(When using OIS combined system,
D1 TEST1/CSBC I D Digital input
this pin has the function of the SPI
Communication for OIS control)
Digital GND
(When using OIS combined system,
D2 TEST2/SCKC I D Digital input
this pin has the function of the SPI
Communication for OIS control)
D3 VDDHAN Power A VANA power supply
D8 VDDHSN2 Power A VANA power supply
E1 FSTROBE O D Digital output Flash strobe
E3 VSSHAN GND A VANA GND
E8 VDDHCM1 Power A VANA power supply
F3 TVMON O A Analog output NC
F8 VDDLPL1 Power D VDIG power supply
G3 TVCDSIN I A Analog input NC
G8 VSSLPL1 GND D VDIG GND
G9 VSSLCN2 GND D VDIG GND
G10 VDDLCN2 Power D VDIG power supply
H1 VDDLSC3 Power D VDIG power supply
H2 VSSLSC4 GND D VDIG GND
H8 VDDLPL2 Power D VDIG power supply
H9 SWDIO I/O D Digital I/O NC (Pull-up)
H10 SWTCK I D Digital input NC (Pull-down)
J1 VDDLIF Power D VDIG power supply
J2 VSSLSC5 GND D VDIG GND
J8 VSSLPL2 GND D VDIG GND
J9 XCLR I D Digital input Chip clear (Pull-down)
J10 VDDMIO2 Power D VIF power supply
K1 VDDMIF Power D VIF power supply
K2 VSSLSC6 GND D VDIG GND
K3 VDDHSN3 Power A VANA power supply
K4 VSSHSN3 GND A VANA GND
K5 VDDSUB Power A VANA power supply
K6 VDDHSN4 Power A VANA power supply
K7 VSSHSN4 GND A VANA GND
K8 VDDHCM2 Power A VANA power supply
K9 VSSLSC7 GND D VDIG GND
K10 INCK I D Digital input
L1 VSSLSC8 GND D VDIG GND
L2 DMO3P O D Digital output MIPI output (DATA+)
L3 DMO1P O D Digital output MIPI output (DATA+)
L4 VSSLSC9 GND D VDIG GND
L5 DCKP O D Digital output MIPI output (CLK+)
L6 VSSLSC10 GND D VDIG GND
L7 DMO2P O D Digital output MIPI output (DATA+)
L8 DMO4P O D Digital output MIPI output (DATA+)
L9 VSSLSC11 GND D VDIG GND
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IMX477-AACK-C
Pin
Symbol I/O A/D Pin description Remarks
No.
L10 VDDLSC4 Power D VDIG power supply
M2 DMO3N O D Digital output MIPI output (DATA–)
M3 DMO1N O D Digital output MIPI output (DATA–)
M4 VSSLSC12 GND D VDIG GND
M5 DCKN O D Digital output MIPI output (CLK–)
M6 VSSLSC13 GND D VDIG GND
M7 DMO2N O D Digital output MIPI output (DATA–)
M8 DMO4N O D Digital output MIPI output (DATA–)
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IMX477-AACK-C
Digital VIF
Input Schmitt Buffer
Digital VIF
XCLR, Input
INCK SLASEL
DGND DGND
DGND DGND
VIF VIF
GPO,
Digital Digital
FSTROBE, VIF Schmitt Buffer
Output Input
SDO, GYINT
SCK,
SCSB
DGND DGND
SDI
DGND
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IMX477-AACK-C
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IMX477-AACK-C
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IMX477-AACK-C
6. Functional Description
Flash
FSTROBE
Strobe
Timing generator XVS
Row decoder
Imaging GPO
Pixel
array Test
OB Reference
Pattern
clamp Voltage
generator
Image
Process
Image
block CSI2
Analog AD Digital data
Column analog block serial
gain converter gain trans-
output
mitter
Column logic block
Gyro Serial
Bias PLL Control/status Micro
control OTP communication
registers processor
block block
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IMX477-AACK-C
SCL
Master IMX477
SDA
The control registers and status registers of IMX477-AACK-C are mapped on the 16-bit address space and the
register categories shown as below. Detail register information is shown in Register Map.
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IMX477-AACK-C
R/W
A/A
S A A A P
[7:1] [15:8] [7:0] [7:0]
MSB LSB H
0 0 1 0 0 0 0 R/W
R/W shows the direction of communication.
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IMX477-AACK-C
Typically, IMX477-AACK-C can be driven from the dual PLL mode to operate the both of PLLs, but it also supports
single PLL mode to move only one side of the PLL.
DMO[1/2/3/4][P/N]
MIPI
Charge
ADC PipeLine FIFO DPHY
Pump DCK[P/N]
serializer
ADCK(auto setting)
IVTPXCK
IOPPXCK
IVTPXCK
CPCK
IOPCK
DIVIDER ADCK
Div_CP CPCK
Clock tree [div:2]
Div_AD
PLL_MULT_DRIV Div_IVT_
cont HCLK
PLL
[div:2]
INCK PreDiv_IVT MPY_IVT IVTCK
IVT_PREPLLCK_DIV IVT_PLL_MPY 1
EXCK_FREQ Div_IVT_px IVTPXCK
SEL
IVT_SYCK_DIV × IVT_PXCK_DIV
0
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IMX477-AACK-C
DMO[1/2/3/4][P/N]
MIPI
Charge
ADC PipeLine FIFO DPHY
Pump DCK[P/N]
serializer
ADCK(auto setting)
IOPPXCK
IVTPXCK
IVTPXCK
CPCK
IOPCK
DIVIDER ADCK
Div_CP CPCK
Clock tree [div:2]
Div_AD
PLL_MULT_DRIV Div_IVT_
cont HCLK
PLL
[div:2]
INCK PreDiv_IVT MPY_IVT IVTCK
EXCK_FREQ IVT_PREPLLCK_DIV IVT_PLL_MPY 1
Div_IVT_px IVTPXCK
SEL
IVT_SYCK_DIV × IVT_PXCK_DIV
0
6-4-1 INCK
INCK is an external input clock (6 to 27 MHz). See “AC characteristics” for electrical requirements to INCK.
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IMX477-AACK-C
64 OPB dummy
16 OPB effective
32 OPB dummy
8 Opened dummy
Total image area : 4072 (H) × 3176 (V) approx. 12.93 M pixels
Effective image area : 4072 (H) × 3064 (V) approx. 12.47 M pixels
Active image area : 4056 (H) × 3040 (V) approx. 12.33 M pixels
8 Opened dummy
8 Opened dummy
Vertical Readout Direction (default)
3176
3064
3040
4056
4072
16 Opened dummy
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IMX477-AACK-C
Gb B Gb B Gb B
R Gr R Gr R Gr
Gb B Gb B Gb B
R Gr R Gr R Gr
Gb B Gb B Gb B
R Gr R Gr R Gr
FS
Embedded data lines
2
R G R G
G B G B
PF FRM_LENGTH_LINES
Long Packet
3040
4056
R G R G
G B G B
Frame
Blanking
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IMX477-AACK-C
See Software reference manual for contents and output sequence of Embedded Data Lines.
FS
Embedded data lines
R G R G
G B G B
Long Packet
Active image area
PH PF Line
Blanking
R G R G
G B G B
Gyro data FE
Frame
Blanking
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IMX477-AACK-C
Modes
Normal Operation Normal Operation DOL-HDR
Full resolution 2 Binning (V:1/2, H:1/2) Full resolution
10 bit / 12 bit 10 bit 10 bit / 12 bit
Number of vertical lines in
3044 1524
imaging area
*1
Number of horizontal pixels in
4056 2028
active area
Number of lines and Start Number Start Number Start Number
start position position of lines position of lines position of lines
Frame start 1 1 1 1
Name of the areas
*1
See DOL-HDR manual for details.
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IMX477-AACK-C
(X_ADD_MIN, Y_ADD_MIN)
(X_ADD_STA, Y_ADD_STA)
(X_ADD_END, Y_ADD_END)
(X_ADD_MAX, Y_ADD_MAX))
Binning/
sub-sampling
digital crop
DIG_CROP_Y_OFFSET
DIG_CROP_IMAGE_WIDTH
DIG_CROP_IMAGE_HEIGHT
DIG_CROP_X_OFFSET
scaling
SCALE_MODE
SCALE_M
output crop
X_OUT_SIZE
Y_OUT_SIZE
final image
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IMX477-AACK-C
1.0
0.9 G
0.8
B R
0.7
Relative Response [a.u.]
0.6
0.5
0.4
0.3
0.2
0.1
0.0
400 450 500 550 600 650 700
WaveLength[nm]
40