PCS-9705S Bay Control Unit

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Although every reasonable effort is made to present current and accurate information, this
document does not purport to cover all details or variations in equipment nor provide for every
possible contingency to be met in connection with installation, operation, or maintenance. Should
further information be desired or should particular problems arise which are not covered sufficiently
for your purposes, please do not hesitate to contact us.
Preface
Preface
About This Document
This document describes the setting and calculation principle with examples for protection settings
and other settings of the PCS-9705S Bay Control Unit.
Instead of final commissioning or service settings, this guide aims to provide a reference of setting
principle and method.
Safety Information
This manual is not a complete index of all safety measures required for operation of the equipment
(module or device). However, it comprises important information that must be followed for personal
safety, as well as to avoid material damage. Information is highlighted and illustrated as follows
according to the degree of danger:
Indicates an imminently hazardous situation that, if not avoided, will result
in death or serious injury.
Indicates a potentially hazardous situation that, if not avoided, could
result in death or serious injury.
Indicates a potentially hazardous situation that, if not avoided, may result
in minor or moderate injury or equipment damage.
Indicates that property damage can result if the measures specified are
not taken.
Important information about the product, please pay attention to avoid
undesired result.
Instructions and Warnings
The firmware may be upgraded to add new features or enhance/modify

existing features, please MAKE SURE that the version of this manual is
compatible with the product in your hand.
Document Conventions
⚫ Menu path is connected with the arrow "→" and bold.
Settings Guide - PCS-9705S Bay Control Unit I
Date: 22 December 2020

Preface
For example: the access path of protection settings is: Main Menu → Settings → Protection
Settings
⚫ Settings not in the table should be placed in brackets.
For example: the system setting [Opt_SysFreq]
⚫ Cross-references are presented in italics.
For example: refer to Figure 1.1-1, refer to Table 1.1-1, reference to Section 1.1
⚫ Binary input signals, binary output signals, LED lights, buttons, and other fixed meanings,
should be written in double quotes and bold.
For example: press the button "ENT".
Three-phase Corresponding Relationship
Basic
A, B, C L1, L2, L3 R, Y, B
AN, BN, CN L1N, L2N, L3N RN, YN, BN
ABC L123 RYB
U (voltage) V U
Example
Ia, Ib, Ic, I0 IL1, IL2, IL3, IN IR, IY, IB, IN
Ua, Ub, Uc VL1, VL2, VL3 UR, UY, UB
Uab, Ubc, Uca VL12, VL23, VL31 URY, UYB, UBR
U0, U1, U2 VN, V1, V2 UN, U1, U2
Warranty
This product is covered by the standard NR 10-year warranty. For warranty details, please
consult the manufacturer or agent for warranty information.
Document Revision History

P/N: ZL_PCS-9705S_X_Settings Guide_EN_Overseas General_X
Current Version: R1.00
II Settings Guide - PCS-9705S Bay Control Unit

Preface
Version
Release Date Description of Change
Document Firmware
23 December
R1.00 R1.16 Initial draft
2020
Settings Guide - PCS-9705S Bay Control Unit III

Preface
IV Settings Guide - PCS-9705S Bay Control Unit

1 Introduction
1 Introduction
Table of Contents
1.1 Introduction............................................................................................................................ 1-1
1.2 Application Scenarios ........................................................................................................... 1-1

1
1.3 Basic Functions..................................................................................................................... 1-2
1.4 Control .................................................................................................................................... 1-2
1.5 Protection ............................................................................................................................... 1-2
1.6 Measurement and Metering.................................................................................................. 1-4
1.7 Synchrophasor Measurement.............................................................................................. 1-4
1.8 Monitoring .............................................................................................................................. 1-5
1.9 Communication ..................................................................................................................... 1-5
1.10 User Interfaces .................................................................................................................... 1-6
1.11 Additional Functions ........................................................................................................... 1-6
Settings Guide - PCS-9705S Bay Control Unit 1-a

1 Introduction
1-b Settings Guide - PCS-9705S Bay Control Unit

1 Introduction
1.1 Introduction
The PCS-9705S Bay Control Unit (BCU) is a general-purpose control, protection and automation
device in all substations, power plants and industrial domain applications. The modular conception
permits the hardware adaption exact to client requirements.
The PCS-9705S is applicable not only to conventional substations but also to digital substations. It
1
supports IEC 61850 edition 1.0 and 2.0 standard for modelling of various signals and provides
MMS/GOOSE/SV network interfaces for independent or hybrid network in real-time. The process
layer supports peer-to-peer (P2P) mode and networking mode, including single network mode and
dual network mode. The station layer could receive and send MMS messages, such as interlocking
signals, or GOOSE messages, such as switch positions and tripping signals.
The function diagram of this relay is shown in Figure 1.1-1.
Busbar
1VT
52
25 79
3VTs
VTS 59P 59G 59Q 59P os 27P 81O 81U 81R
3CTs
*
CTS 50BF 50/51P 50/51G 50/51Q 37 90V 32R PMU
1CT
*
FR
CSWI XCBR XSWI CILO 84 PQS
Figure 1.1-1 Functional diagram of PCS-9705S
1.2 Application Scenarios

⚫ Single circuit breaker (double or single busbar, optional protection functions, with optional
integrated Phasor Measurement Unit)
⚫ Double circuit breakers
⚫ Multiple busbars (max. 4) or two busbars with bus coupler
⚫ Transformer sides (max. 4)
Settings Guide - PCS-9705S Bay Control Unit 1-1

1 Introduction
⚫ Multiple bays of one busbar (max. 6)
⚫ A complete one-and-half breaker diameter
⚫ IO box (all slots for IO modules)
1 1.3 Basic Functions

⚫ Multiple setting groups
⚫ Flexibly configurable binary inputs (max. 361)
⚫ Flexibly configurable binary outputs (max. 107)
⚫ Setup of max.40 users and allow each user to own different password and access authority
⚫ Function shortcuts key, which can be configured by software tool to execute express
operations.
⚫ Clock synchronization using IRIG-B, SNTP (Simple Network Time Protocol), PPS (Pulse-Per-
Second) and PPM (Pulse-Per-Minute), IEEE 1588
⚫ Auxiliary functions for simple tests and commissioning
1.4 Control
⚫ Switchgear control
⚫ Double point status synthesis
⚫ Remote/Local control mode switch
⚫ Interlocking logic for control
⚫ Direct control
⚫ Closing synchronism check with voltage selection
⚫ Switchgear trip counter
⚫ Tap position indicator and control (84)
⚫ Automatic voltage regulation (90V)
⚫ Parallel voltage regulation (PVR)
1.5 Protection
ANSI Protection Remark
⚫ Up to 6 stages with independent logic

Phase overcurrent
50/51P ⚫ Optional definite-time or inverse-time characteristic for each stage
protection
⚫ Trip purpose or alarm purpose for each stage
1-2 Settings Guide - PCS-9705S Bay Control Unit

1 Introduction

50/51G Ground fault protection ⚫ Optional definite-time or inverse-time characteristic for each stage
⚫ Selectable trip purpose or alarm purpose for each stage
50/51Q
Negative-sequence ⚫ Up to 2 stages with independent logic 1
overcurrent protection ⚫ Optional definite-time or inverse-time characteristic for each stage
⚫ Optional auxiliary criterion, including CB position check and

37 Undercurrent protection current check

⚫ Optional definite-time or inverse-time characteristic for each stage
Phase overvoltage
59P ⚫ Optional phase voltage or phase-to-phase voltage
protection
⚫ Optional "1-out-of-3" logic or "3-out-of-3" logic
Positive-sequence
59Pos ⚫ Selectable trip purpose or alarm purpose for each stage
overvoltage protection
Negative-sequence ⚫ Up to 2 stages with independent logic

59Q
overvoltage protection ⚫ Selectable trip purpose or alarm purpose for each stage
Residual overvoltage ⚫ Up to 2 stages with independent logic

59G
protection ⚫ Selectable trip purpose or alarm purpose for each stage

⚫ Optional definite-time or inverse-time characteristic for each stage
⚫ Optional phase voltage or phase-to-phase voltage
Phase undervoltage ⚫ Optional "1-out-of-3" logic or "3-out-of-3" logic
27P
protection
⚫ Blocked by instantaneous VT circuit failure
⚫ Optional auxiliary criterion, including CB position check and
current check

81O Overfrequency protection
⚫ Voltage control element

81U Underfrequency protection
⚫ Voltage control element
Rate of change of ⚫ Up to 6 stages with independent logic

81R
frequency protection ⚫ Voltage control element

32R Reverse power protection
⚫ Phase-segregated re-trip and three-phase re-trip

50BF Breaker failure protection
⚫ Optional current criterion (phase overcurrent element, zero-

1 Introduction

sequence overcurrent element, negative-sequence overcurrent
element)
⚫ Optional circuit breaker position check logic
⚫ Two time delay settings
1 TT Transfer trip protection ⚫ Three-phase or phase-segregated
⚫ One shot or multi-shot

⚫ 1-pole AR, 3-pole AR or 1/3-pole AR
79 Auto-reclosing ⚫ Optional trigger mode, including protection operating and external
binary input
⚫ Support synchro-check and voltage check
1.6 Measurement and Metering

⚫ U, I, P, Q, Cos, f
⚫ Positive, negative and zero sequences
⚫ Max.15th harmonics
⚫ Energy metering (active and reactive energies for import and export)
⚫ Power Quality Supervision (PQS) with Total Harmonic Distortion (THD), deviation and
unbalance
⚫ DC analogue inputs (0~±20mA or 0~±10V)
⚫ DC analogue outputs (4~20mA, 0~10V, 0~5V or 0~20mA)
1.7 Synchrophasor Measurement

⚫ The integrated Phasor Measurement Unit (PMU) function of synchrophasor measurement is
compatible with IEEE C37.118-2005, IEEE C37.118.1-2011, IEEE C37.118.2-2011 and IEEE
C37.118.1a-2014.
⚫ Supporting time synchronization by IRIG-B signal
⚫ Supporting P Class or M Class measurement (user selectable)
⚫ Measurement of three-phase and single-phase voltage and current
⚫ Measurement of positive/negative/zero-sequence voltage and current
⚫ Calculation of active power, reactive power, system frequency, and rate-of-change of

frequency (ROCOF)
⚫ Measurement of up to 32 binary status (user configurable)
⚫ Output of synchrophasor with timestamp, support of multiple protocols (TCP, TCP-UDP, UDP)
and multiple data rates for maximum 4 clients (PDC)

1 Introduction
1.8 Monitoring
⚫ CT circuit failure Supervision (CTS)
⚫ VT circuit failure Supervision (VTS)
⚫ Self-diagnostic
1
⚫ Powerful faults recording (max. buffer for 10,000 sampled points at 4.8 or 9.6 kHz)
⚫ Event recorder of 1024 change-of-state events, 1024 supervision events, 256 control logs and
1024 device logs
⚫ Disturbance recorder of 32 disturbance records with waveforms (format compatible with

COMTRADE)
⚫ Single line diagram representation in display
1.9 Communication
⚫ Support of various protocols
➢ Modbus
➢ DNP3
➢ IEC 60870-5-103
➢ IEC 61850 Ed1 & Ed2
➢ IEC 62439 Parallel Redundancy Protocol (PRP)
➢ IEC 62439 High-availability Seamless Ring (HSR) Redundancy Protocol
➢ IEEE 802.1w Rapid Spanning Tree Protocol (RSTP)
⚫ Support for digital substation
➢ Extendable quantity of communication interfaces
➢ Support of IEC 61850 MMS Server
➢ Support of IEC 61850-8-1 GOOSE
➢ Support of IEC 61850-9-2LE SV
⚫ Up to four 10Base-T/100Base-TX copper Ethernet ports
⚫ Up to four 100Base-FX optical Ethernet ports
⚫ Two RS-485 serial ports for communication, the second one could be used as a RS-232 port
for printer
⚫ One RS-485/TTL serial port for clock synchronization

1 Introduction
⚫ One BNC connector for clock synchronization
⚫ RJ45 debugging ports for both front and rear sides
1.10 User Interfaces
1 ⚫ Friendly HMI interface with LCD, easy-to-use keypad aids simple navigation and set-point
adjustment
⚫ Push buttons for open/close, switch for selection between local and remote control, and user's
login and logout authority management
⚫ 4 Programmable operator push-buttons with user-configurable labels
⚫ Up to 15/18 programmable target LEDs with user-configurable labels
⚫ Language switchover: English+ selected language
⚫ Configuration tool: PCS-Studio
1.11 Additional Functions

⚫ User programmable logic
⚫ System phase sequences rotation function (ABC or ACB)
⚫ Clock synchronization
➢ IRIG-B: IRIG-B via RS-485 differential level, TTL level or BNC connector
➢ PPS: Pulse per second (PPS) via RS-485 differential level, binary input or BNC connector
➢ PPM: Pulse per minute (PPM) via RS-485 differential level or binary input
➢ IEEE 1588: Clock message based on IEEE 1588 via Ethernet network
➢ SNTP (PTP): Unicast (point-to-point) SNTP mode via Ethernet network
➢ SNTP (BC): Broadcast SNTP mode via Ethernet network
➢ Message (IEC103/Modbus/DNP3): Clock messages through IEC103 protocol, Modbus

protocol and DNP3 protocol
⚫ Cyber security
➢ NERC CIP
➢ IEC 62351
➢ IEC 62443
➢ IEEE 1686

2 Global Settings
2 Global Settings
Table of Contents
2.1 System Settings .................................................................................................................... 2-1
2.1.1 Setting List ............................................................................................................................ 2-1
2.1.2 Setting Principle ................................................................................................................... 2-1
2.2 Device Settings...................................................................................................................... 2-2
2.2.1 Setting List ............................................................................................................................ 2-2

2
2.3 Disturbance Fault Recording Settings................................................................................ 2-5
2.3.1 Setting List ............................................................................................................................ 2-5
2.4 Label Settings ........................................................................................................................ 2-6
2.4.1 Setting List ............................................................................................................................ 2-6
2.5 Clock Synchronization Settings .......................................................................................... 2-7
2.5.1 Setting List ............................................................................................................................ 2-7

2 Global Settings

2 Global Settings
2.1 System Settings
2.1.1 Setting List
Device LCD: MainMenu  Settings  Global Settings  System Settings
PCS-Studio: Project Node  IED Node  Setting  Global  Global_Settings 

System_Settings
Name Range Step Unit
Active_Grp 1~20 1 2
PrimaryEquip_Name Max 20 characters
Opt_SysFreq 50, 60 Hz
Opt_PhSeq ABC, ACB
XXXX.I1n 0~60000 1 A
XXXX.I2n 1~5 1 A
Disabled
XXXX.En_RevCT
Enabled
XXXX.U1n 1.00~1100.00 0.01 kV
XXXX.U2n 1.00~200.00 0.01 V
2.1.2 Setting Principle
⚫ [Active_Grp]
The sequence number of the active setting group
Up to 20 setting groups can be configured for certain functions, such as protection and
synchronism check, but only one is active at a time. The settings in each group are the same
except their values which can be changed to suit for different application scenarios.
⚫ [PrimaryEquip_Name]
The name of the protected primary equipment, such as Bus1, Transfo2, etc.
This setting is case sensitive and only letters, numbers and underscores are allowed.
⚫ [Opt_SysFreq]
The option of the rated system power frequency
⚫ [Opt_PhSeq]
The option of the system phase sequence
The device CT and VT inputs, which are labeled as A, B and C, should be connected to system

2 Global Settings
phases A, B and C. Either ABC or ACB could be selected to affect the calculation of positive
and negative sequence quantities with related functions.
⚫ [XXXX.I1n]
The primary rated current (three-phase) by the bay indication of XXXX
⚫ [XXXX.I2n]
The secondary rated current (three-phase) by the bay indication of XXXX
⚫ [XXXX.En_RevCT]
2 Enabling/Disabling the reverse of the CT polarity
⚫ [XXXX.U1n]
The primary rated voltage (three-phase or phase-phase) by the bay indication of XXXX
⚫ [XXXX.U2n]
The secondary rated voltage (three-phase or phase-phase) by the bay indication of XXXX
2.2 Device Settings
2.2.1 Setting List
Device LCD: MainMenu  Settings  Global Settings  Device Settings

Device_Settings
Disabled
En_DebugPort
Enabled
Disabled
En_TelnetPort 1
Enabled
Disabled
En_VirtualLCDPort
Enabled
Ctrl_Password 000~999 1
Disabled
En_NoCtrlPwd
Enabled
Un_BinaryInput 24~250 0.1 V
DC
Opt_Pwr_BI AC50Hz 0.1
AC60Hz

2 Global Settings
U_Pickup_BI 50.0%Un~80.0%Un 0.1 %
U_Dropoff_BI 50.0%Un~80.0%Un 0.1 %
Mon_Window_Jitter 0.000~500.000 0.001 s
Num_Blk_Jitter 2~500000 1
Blk_Window_Jitter 0.000~500.000 0.001 s
2
Num_Reblk_Jitter 1~500000
Disabled
En_Jitter_Blk
Enabled
Disabled
En_PopupRecord_Blkd
Enabled
Disabled
En_BICheckInstP 1
Enabled
⚫ [En_DebugPort]
Enabling/Disabling the debugging port
The debugging port is used for debugging tool connection, program download, variable
debugging, etc. via PCS-Studio configuration tool. It should be disabled for strict cybersecurity
requirement.
⚫ [En_TelnetPort]
Enabling/Disabling the telnet port
The telnet port should be disabled for strict cybersecurity requirement.
⚫ [En_VirtualLCDPort]
Enabling/Disabling the virtual LCD
The virtual LCD can simulate a virtual HMI to acquire device information via PCS-Studio
configuration tool in debugging PC. It should be disabled for strict cybersecurity requirement.
⚫ [Ctrl_Password]
The password of control operations via LCD
If the setting [En_NoCtrlPwd] is enabled, this setting will be invalid.
⚫ [En_NoCtrlPwd]
Enabling/Disabling the override of control operation password via LCD

2 Global Settings
To ensure the cybersecurity and the management of user authority, this setting should be set
as disabled.
⚫ [En_PopupRecord_Blkd]
Enabling/Disabling the blocking of automatic pop up of event records
All the events, including disturbance records, supervision events, IO events and control events,
can be blocked to pop up automatically in the main graph of local LCD. They can still be viewed
through the corresponding menus.
2 ⚫ [Un_BinaryInput]
The rated voltage level of binary input
The setting value should be the same as the rated voltage level of external binary input source.
⚫ [Opt_Pwr_BI]
The power supply mode of binary input
The setting value should be the same as the specifications of external binary input source.
⚫ [U_Pickup_BI]
The pickup voltage of binary input
The setting value should be less than the minimal rated voltage level of binary inputs.
Recommended value: 63.0 %Un
⚫ [U_Dropoff_BI]
The drop-off voltage of binary input
The setting value should be less than setting value of [U_Pickup_BI].
⚫ [Mon_Window_Jitter]
The monitoring window of binary input jitter processing
If the setting [En_Jitter_Blk] is enabled, this setting will be invalid.
⚫ [Num_Blk_Jitter]
The limit of times to block binary input status change due to jitter
⚫ [Blk_Window_Jitter]
The blocking window of binary input status change due to jitter
⚫ [Num_Reblk_Jitter]
The limit of times to initiate immediately another blocking window of binary input status change

2 Global Settings
due to continuous jitter
⚫ [En_Jitter_Blk]
Enabling/Disabling the jitter processing function in case of binary input voltage variation
⚫ [En_BICheckInstP]
Enabling/Disabling the high power conducting mode with constant current drain of binary input
Recommended value: more than 20ms to avoid the default jitter processing delay
2.3 Disturbance Fault Recording Settings 2

2.3.1 Setting List
Device LCD: MainMenu  Settings  Global Settings  DFR Settings

DFR_Settings
RecDur_PreTrigDFR 0.000~1.000 0.001 s
RecDur_PostFault 0.000~10.000 0.001 s
MaxRecDur_PostTrigDFR 0.000~10.000 0.001 s
⚫ [RecDur_PreTrigDFR]
The waveform recording duration before the trigger element operation
A high setting value means that the waveform file size will be too large to cost more storage
space and transmission bandwidth; A low setting value means that the recorded waveform file
may be insufficient for fault analysis.
Recommended value: 0.100 s
⚫ [RecDur_PostFault]
The waveform recording duration after the trigger element drop-off
If there are 2 or more DFR trigger elements, this setting refers to the duration after the drop-
off of the last trigger element.
The recommended setting value is proposed according to the DFR trigger mode that is shown

2 Global Settings
in the following table.
DFR trigger mode Recommended setting value
Level trigger
0.100 s
(high-level trigger or low-level trigger)
Edge trigger
1.000 s
(falling-edge trigger, rising-edge trigger, bilateral-edge trigger)
Combination of Level trigger and Edge trigger 1.000 s
2 ⚫ [MaxRecDur_PostTrigDFR]
The maximum waveform recorded duration after the trigger element operation
If there are 2 or more DFR trigger elements, this setting refers to the maximum duration after
the first trigger element operating.
Recommended value: 1.000 s
2.4 Label Settings
2.4.1 Setting List
Device LCD: MainMenu  Settings  Global Settings  Label Settings

Label_Settings
Bxx.Name_***_GCommLink Max. 30 characters
Bxx.Name_***_SVCommLink Max. 30 characters
⚫ [Bxx.Name_***_GCommLink]
The label to describe the GOOSE receiving link *** through the module in slot xx
⚫ [Bxx.Name_***_SVCommLink]
The label to describe the SV receiving link *** through the module in slot xx

2 Global Settings
2.5 Clock Synchronization Settings
2.5.1 Setting List
Device LCD: MainMenu  Settings  Global Settings  ClockSyn Settings

ClockSyn_Settings
Conventional 2
Opt_TimeSyn SAS
NoTimeSyn
OffsetHour_UTC -12~12
OffsetMinute_UTC 0~60
IP_Server_SNTP 0.0.0.0~255.255.255.255
IP_StandbyServer_SNTP 0.0.0.0~255.255.255.255
Disabled
DST.En
Enabled
DST.OffsetMinute 0~255 1
Jan, Feb, Mar, Apr, May, Jun, Jul, Aug,

DST.MonthInYear_Start
Sep, Oct, Nov, Dec
DST.WeekInMonth_Start 1st, 2nd, 3nd, 4th, Last
Sunday, Monday, Tuesday, Wednesday,

DST.DayInWeek_Start
Thursday, Friday, Saturday
DST.HourInDay_Start 0~23 1
Jan, Feb, Mar, Apr, May, Jun, Jul, Aug,

DST.MonthInYear_End
Sep, Oct, Nov, Dec
DST.WeekInMonth_End 1st, 2nd, 3nd, 4th, Last
Sunday, Monday, Tuesday, Wednesday,

DST.DayInWeek_End
Thursday, Friday, Saturday
DST.HourInDay_End 0~23 1
⚫ [Opt_TimeSyn]
The option of device time synchronization mode
➢ Conventional
IRIG-B (RS-485): IRIG-B via RS-485 differential level.

2 Global Settings
PPS (RS-485): Pulse per second (PPS) via RS-485 differential level.
IRIG-B (Fibre): IRIG-B via optical-fibre interface.
PPS (Fibre): Pulse per second (PPS) via optical-fibre interface.
IEEE 1588 (Copper or Fibre): Clock message via IEEE 1588.
PPM (DIN): Pulse per minute (PPM) via the binary input [BI_TimeSyn].
PPS (DIN): Pulse per second (PPS) via the binary input [BI_TimeSyn].
2 ➢ SAS
SNTP (PTP): Unicast (point to point) SNTP mode via Ethernet network.
SNTP (BC): Broadcast SNTP mode via Ethernet network.
IEC103: Clock messages through IEC 60870-5-103 protocol.
Modbus: Clock messages through Modbus protocol.
➢ NoTimeSyn
If the time synchronization function is not necessary, this option may be selected. There
will be no more time synchronization alarm.
⚫ [OffsetHour_UTC]
The local time zone, i.e. the hour offset from local time to UTC
⚫ [OffsetMinute_UTC]
The minute offset from local time to UTC
⚫ [IP_Server_SNTP]
The IP address of SNTP server
The setting value takes the format of dotted-decimal notation of IPv4.
If there is no SNTP server, set it to be “0.0.0.0”.
⚫ [IP_StandbyServer_SNTP]
The IP address of SNTP standby server
If there is no SNTP server, set it to be “0.0.0.0”.
⚫ [DST.En]
Enabling/Disabling the Daylight Saving Time (DST)

2 Global Settings
⚫ [DST.OffsetMinute]
The minute offset from local time to DST
⚫ [DST.MonthInYear_Start]
The starting month of DST
⚫ [DST.WeekInMonth_Start]
The starting week of DST
⚫ [DST.DayInWeek_Start]
2
The starting day of DST
⚫ [DST.HourInDay_Start]
The starting hour of DST
⚫ [DST.MonthInYear_End]
Ending month of DST
⚫ [DST.WeekInMonth_End]
The ending week of DST
⚫ [DST.DayInWeek_End]
The ending day of DST
⚫ [DST.HourInDay_End]
The ending hour of DST

2 Global Settings

3 Protection Settings
Table of Contents
3.1 Phase Overcurrent Protection (50/51P) .............................................................................. 3-1
3.1.1 Setting List ............................................................................................................................ 3-1
3.1.2 Calculation Principle ............................................................................................................. 3-2
3.2 Ground Fault protection (50/51G) ...................................................................................... 3-11
3.2.1 Setting List .......................................................................................................................... 3-11
3.2.2 Calculation Principle ........................................................................................................... 3-12
3.3 Negative-sequence Overcurrent Protection (50/51Q) ..................................................... 3-22

3
3.3.1 Setting List .......................................................................................................................... 3-22
3.4 Undercurrent Protection (37) ............................................................................................. 3-30
3.4.1 Setting List .......................................................................................................................... 3-30
3.5 Phase Overvoltage Protection (59P) ................................................................................. 3-32
3.5.1 Setting List .......................................................................................................................... 3-32
3.6 Positive-sequence Overvoltage Protection (59Pos) ....................................................... 3-37
3.6.1 Setting List .......................................................................................................................... 3-37
3.7 Negative-sequence Overvoltage Protection (59Q) .......................................................... 3-40
3.7.1 Setting List .......................................................................................................................... 3-40
3.8 Residual Overvoltage Protection (59G) ............................................................................ 3-42
3.8.1 Setting List .......................................................................................................................... 3-42
3.9 Undervoltage Protection (27P)........................................................................................... 3-45
3.9.1 Setting List .......................................................................................................................... 3-45

3.10 Overfrequency Protection (81O) ...................................................................................... 3-50
3.10.1 Setting List ........................................................................................................................ 3-50
3.10.2 Calculation Principle ......................................................................................................... 3-51
3.11 Underfrequency Protection (81U) .................................................................................... 3-51
3.11.1 Setting List ........................................................................................................................ 3-51
3.12 Frequency Rate-of-change Protection (81R).................................................................. 3-52
3.12.1 Setting List ........................................................................................................................ 3-52
3 3.12.2 Calculation Principle ......................................................................................................... 3-53
3.13 Reverse Power Protection (32R) ..................................................................................... 3-54
3.13.1 Setting List ........................................................................................................................ 3-54
3.14 Breaker Failure Protection (50BF) ................................................................................... 3-55
3.14.1 Setting List ........................................................................................................................ 3-55
3.15 Transfer Trip (TT) ............................................................................................................... 3-59
3.15.1 Setting List ........................................................................................................................ 3-59
3.16 Automatic Reclosing (79) ................................................................................................. 3-60
3.16.1 Setting List ........................................................................................................................ 3-60

Multiple setting groups may be available. The settings values should be set
independently.
3.1 Phase Overcurrent Protection (50/51P)
3.1.1 Setting List
Device LCD: MainMenu  Settings  Protection Settings  OC Settings
PCS-Studio: Project Node → Device Node → Setting  Group*  Protection_Settings 

OC_Settings
Setting Range Step Unit
50/51Px.I_Set (0.050~40.000)×In 0.001 A 3

50/51Px.t_Op 0.000~100.000 0.001 s
50/51Px.t_DropOut 0.000~100.000 0.001 s
Disabled
50/51Px.En -
Enabled
Trp
50/51Px.Opt_Trp/Alm -
Alm
ANSIE
ANSIV
ANSIN
ANSIM
ANSIDefTime
ANSILTE
ANSILTV
ANSILT
50/51Px.Opt_Curve -
IECN
IECV
IECI
IECE
IECST
IECLT
IECDefTime
UserDefine
Inst
50/51Px.Opt_Curve_DropOut DefTime -
IDMT

50/51Px.TMS 0.040~20.000 0.001 -
50/51Px.tmin 0.000~10.000 0.001 s
50/51Px.K 0.0010~120.0000 0.0001 -
50/51Px.Alpha 0.0100~3.0000 0.0001 -
50/51Px.C 0.0000~1.0000 0.0001 -
3.1.2 Calculation Principle
The device can provide six stages of phase overcurrent protection. Each stage has independent
operating current, time delay and control logic settings. Generally, the stage 1 requires an
instantaneous operation, and the protection area shall not be less than 20% of the total line. The
3 stage 2 shall protect the whole line. The stage 3 and the stage 4 can be the backup protection of
the line and can also be the remote backup protection of the adjacent line.
⚫ [50/51Px.I_Set]
The current setting of the stage x of phase overcurrent protection
➢ For line protection
 In order to guarantee the selectivity, the operating range of instantaneous overcurrent

protection shall not exceed the end of protected line. The operating current of
instantaneous overcurrent protection shall be larger than the maximum short-circuit
current when a fault happens at the end of the protected line.
(3)
[50/51Px. I_Set] = K rel × Ik.max
Where:
Ik.max is the maximum short-circuit current measured at the location where the device
is installed in case of short-circuit fault at the end of the protected line.
Krel is the reliability coefficient, considering the relay setting value error, the short-
circuit current calculation error, and the influence of non-periodic component on
protection in short-circuit current. It takes 1.2~1.3 or above.
 Phase overcurrent protection with definite time delay needs to protect the whole line
and cooperates with the phase overcurrent protection of the adjacent line. According
to specific condition of the adjacent line protection, the setting calculation principle is:
In coordination with the instantaneous overcurrent protection of the adjacent lines

I
[50/51Px. I_Set] = K rel × K b.max × Iop.1
Where:

Kb.max is the branching coefficient of current, which is equal to the ratio of the current
passing through the device to the current passing through the faulty line during a
ground fault at the end of the protected zone of the coordinated stage of overcurrent
protection of the power line.
Iop.1 is the operating current of the instantaneous overcurrent protection of the

adjacent line
Krel is the reliability coefficient, taking 1.1 or above.
 When the next stage is transformer with differential protection, the definite-time
overcurrent protection shall be set and calculated according to the following equation.
(3)
[50/51Px. I_Set] = K op × Ik.max
Where:
3
Ik.max is the maximum three-phase short-circuit current of the line (for the overcurrent
protection which is allowed to get deeper into the transformer and reacts to fault at
other sides of transformer).
Kop is the coordination coefficient, Kop ≥ 1.3.
 The closer to power supply source the fault is, the longer the operating time is. The
inverse-time overcurrent protection is adopted to shorten the operating time, the
setting calculation principle is:
K rel × K ss
[50/51Px. I_Set] = IL.max
K re
Where:
Krel is the reliability coefficient or coordination coefficient, taking 1.2;
Kre is the return coefficient, taking 0.9~0.95;
Kss is the self-starting coefficient, determined by specific connection and load property
via network;
IL.max is the maximum load current through the protected area.
 Being used as the overload alarm
It can take the value of 1.1 times of the rated current.
➢ For transformer protection
 The setting shall be greater than the rated current of the transformer.
K rel
[50/51Px. I_Set] = I
K r 2n

Where:
Krel is the reliability coefficient, taking 1.2.
Kr is the drop-off coefficient, taking 0.95.
I2n is the secondary rated current of the transformer.
 The setting is set in coordination with other overcurrent protection.
[50/51Px. I_Set] = K p × K br × Idz
Where:
Kp is the coordination coefficient, taking 1.15-1.25.
Kbr is the branching coefficient of current, which is equal to the ratio of the current
passing through the device to the current passing through the faulty line during a
3 ground fault at the end of protection section of the coordinated stage of overcurrent
protection of the power line.
Idz is the current setting of the overcurrent protection to be coordinated.
 The setting should be sensitive enough during a busbar fault at the local end.
Imin
[50/51Px. I_Set] =
K sen
Where:
Ksen is the sensitivity coefficient, taking 1.5.
Imin is the minimum current value during a short-circuit fault at the local bus.
When the coordination is not considered, the recommended value is:
K rel
[50/51Px. I_Set] = × In
Kr
Where:
Krel=1.2, Kr=0.95
 For inverse-time characteristic
The setting is set according the rated current of transformer, which can be equal to
the minimum current value of the definite-time phase overcurrent protection.
When it coordinates with other overcurrent protection, the recommended value is:
[50/51Px. I_Set] = K p × Idz
Where:
Kp is the coordination coefficient, taking 1.15~1.25.

Idz is the current setting of the overcurrent protection to be coordinated.
 Being used as the overload alarm
It can take the value of 1.1 times of the rated current.
⚫ [50/51Px.t_Op]
The operating time setting of the stage x of definite-time phase overcurrent protection
➢ For line protection:
 When the primary operating current is in coordination with instantaneous overcurrent

protection of adjacent line, the operating time of definite-time phase overcurrent
protection is:
[50/51Px. t_Op]＝t1 + Δt
t1 is the fixed operating time of instantaneous overcurrent protection of adjacent line.

3
It is 0.06~0.1s or could be neglected
Δt is the time difference, usually taking 0.3s.
 When the operating current is in coordination with the coordinated stage of phase
overcurrent protection of adjacent line, the operating time of definite-time phase
overcurrent protection is:
[50/51Px. t_Op]＝t2 + Δt
Where:
t2 is the fixed operating time of the coordinated stage of phase overcurrent protection
of adjacent line.
Δt is the time difference, usually taking 0.3s.
➢ For transformer protection:
 In coordination with the main protection of the transformer:
[50/51Px. t_Op] = 0.5s
 In coordination with phase-to-phase overcurrent protection of the line:
[50/51Px. t_Op] = t max + Δt
Where:
tmax is the maximum time delay of line protection.
Δt is the time difference, taking 0.3~0.5.
 For the time delay of different stages, the following equation is recommended.

t n+1 = t n + Δt
Where:
tn+1 is the time delay of the stage n+1.
tn is the time delay of the stage n.
Δt is the time difference, taking 0.3~0.5s.
⚫ [50/51Px.t_DropOut]
The dropout time setting of the stage x of phase overcurrent protection
This setting is valid when the definite-time dropout characteristic is selected. When I<0.95Ip,
the protection drops out with a time delay of the setting value (tdr), and the dropout
characteristic curve is shown in the following figure:
3 Start time
I>Ip
Start
signal
Operating
signal
Protection
Operating threshold operate
Operating
counter
t dr t dr t dr
Dropout time setting
Dropout time
Dropout time
Figure 3.1-1 Definite-time dropout characteristic of phase overcurrent protection
⚫ [50/51Px.En]
Enabling/Disabling the stage x of phase overcurrent protection
⚫ [50/51Px.Opt_Trp/Alm]
The option of operation type of the stage x of phase overcurrent protection
➢ Trp: tripping

➢ Alm: alarm
⚫ [50/51Px.Opt_Curve]
The option of operating characteristic curve of the stage x of phase overcurrent protection
The closer to power supply source the fault is, the longer the operating time is. The inverse-
time overcurrent protection is adopted to shorten the operating time
User can select the operating characteristic from various inverse-time characteristics shown
in the following table.
50/51Px.Opt_Curve Time Characteristic k α c tr
ANSIE ANSI Extremely Inverse 28.2 2.0 0.1217 29.1
ANSIV ANSI Very inverse 19.61 2.0 0.491 21.6
ANSIN ANSI Normal Inverse 0.0086 0.02 0.0185 0.46 3

ANSIM ANSI Moderately Inverse 0.0515 0.02 0.114 4.85
ANSIDefTime ANSI Definite Time - - - -
ANSILTE ANSI Long Time Extremely Inverse 64.07 2.0 0.25 30
ANSILTV ANSI Long Time Very Inverse 28.55 2.0 0.712 13.46
ANSILT ANSI Long Time Inverse 0.086 0.02 0.185 4.6
IECN IEC Normal Inverse 0.14 0.02 0 -
IECV IEC Very inverse 13.5 1.0 0 -
IEC IEC Inverse 0.14 0.02 0 -
IECE IEC Extremely inverse 80.0 2.0 0 -
IECST IEC Short-time inverse 0.05 0.04 0 -
IECLT IEC Long-time inverse 120.0 1.0 0 -
IECDefTime IEC Definite Time - - - -
UserDefine Programmable
User may also configure the setting as “UserDefine” to customize the inverse-time
characteristic curve with the constants “K”, “α” and “C”.
⚫ [50/51Px.Opt_Curve_DropOut]
The option of dropout characteristic curve of the stage x of phase overcurrent protection
➢ Inst: instantaneous
➢ DefTime: definite-time
➢ IDMT: inverse-time
When the operating characteristic is definite-time, IEC inverse-time or user-defined inverse-

time, the dropout characteristic can only be instantaneous or definite-time. If the inverse-time

dropout is selected, the alarm signal "Fail_Settings" will be issued and the device will be
blocked.
When the operating characteristic is ANSI inverse-time, the dropout characteristic can be
instantaneous, definite-time and ANSI inverse-time.
➢ Instantaneous dropout
When I<0.95Ip, the protection drops out immediately.
➢ Definite-time dropout
When I<0.95Ip, the protection drops out with a time delay of tdr (i.e. the value of the
setting [50/51Px.t_DropOut]), and the dropout characteristic curve is shown in the
following figure.
3 Start time
I>Ip
Start
signal
Operating
signal
Protection
Operating
counter
t dr t dr t dr
Dropout time
Dropout time
Figure 3.1-2 Definite-time dropout characteristic of phase overcurrent protection
➢ Inverse-time dropout
When I>Ip, the inverse-time operating accumulator starts, the accumulated value after tp
(Assuming that tp is less than the theoretical operating time) is calculated according to the
following equation:

tp
1
Itp = ∫ dt
t(I)
0
At this time, if I<0.95Ip, the protection element starts to drop out, and the dropout
characteristic meets the following equation:
TR
1
Itp − ∫ dt = 0
t R (I)
0
Where:
TR is the dropout time;
tR(I) is the dropout characteristic equation
When I<0.95Ip, the inverse-time dropout characteristic equation is as follows: 3

tr
tR = { } × TMS
1 − (I/Ip )2
Where:
Ip is the current setting [50/51Px.I_Set];
TMS is the inverse-time factor, i.e. the setting [50/51Px.TMS];
tr is the dropout time coefficient, it is the time required for current to drop to 0 after the
protection operates.
I is the measured current.
When 0.95Ip<I<Ip, the accumulator will neither accumulate nor drop out.
The inverse time dropout characteristic curve is shown in the figure below.

tr
I
3
IP
Figure 3.1-3 Inverse-time dropout characteristic curve of phase overcurrent protection
The correspondence between the start signal, the operating signal, and the operating
accumulator in the inverse-time dropout characteristic is shown in the figure below:
Start time
I>Ip
Start
signal
Operating
signal
Protection
Operating
counter
tr Dropout time coefficient

Dropout time
Dropout time
Figure 3.1-4 Inverse-time dropout characteristic of phase overcurrent protection
⚫ [50/51Px.TMS]
The time multiplier of the stage x of inverse-time phase overcurrent protection
This setting can be deduced according to the operating time required for the inverse-time

overcurrent protection.
⚫ [50/51Px.tmin]
The minimum operating time of the stage x of inverse-time phase overcurrent protection
When inverse-time characteristic is selected, if the calculated operating time is less than this
setting, then the operating time changes to this setting value automatically.
If it coordinates with other protections, it can be set as “tmin+Δt”.
Where:
tmin is the minimum operating time of other protections.
Recommended value: 0.02 second

3
⚫ [50/51Px.K]
The constant "K" of the stage x of customized inverse-time phase overcurrent protection
It shall be set according to the inverse-time characteristic of phase overcurrent protection.
Only when the setting [50/51Px.Opt_Curve] is set as “UserDefine”, i.e. the user-defined
inverse-time characteristic is adopted, this setting is valid.
⚫ [50/51Px.Alpha]
The constant "α" of the stage x of customized inverse-time phase overcurrent protection
⚫ [50/51Px.C]
The constant "C" of the stage x of customized inverse-time phase overcurrent protection
3.2 Ground Fault protection (50/51G)
3.2.1 Setting List
Device LCD: MainMenu  Settings  Protection Settings  ROC Settings

ROC_Settings

50/51Gx.3I0_Set (0.050~40.000)×In 0.001 A
50/51Gx.t_Op 0.000~100.000 0.001 s
50/51Gx.t_DropOut 0.000~100.000 0.001 s
Disabled
50/51Gx.En
Enabled
Trp
50/51Gx.Opt_Trp/Alm
Alm
ANSIE
ANSIV
ANSIN
3 ANSIM
ANSIDefTime
ANSILTE
ANSILTV
ANSILT
50/51Gx.Opt_Curve
IECN
IECV
IECI
IECE
IECST
IECLT
IECDefTime
UserDefine
Inst
50/51Gx.Opt_Curve_DropOut DefTime
IDMT
50/51Gx.TMS 0.040~20.000 0.001
50/51Gx.tmin 0.000~10.000 0.001 s
50/51Gx.K 0.0010~120.0000 0.0001
50/51Gx.Alpha 0.0100~3.0000 0.0001
50/51Gx.C 0.0000~1.0000 0.0001
The device can provide six stages of ground fault protection. Each stage has independent current,
time delay and control logic settings.

⚫ [50/51Gx.3I0_Set]
The current setting of the stage x of ground fault protection
 When the stage x of ground fault protection is used as fast protection, the following
conditions should be considered.
✓ The operating current shall be larger than the maximum residual current under
pole disagreement condition.
✓ The operating current shall be larger than the maximum residual current when
internal fault happens at the end of the line.
The calculation principle is
[50/51Gx. 3I0_Set] = K rel × 3I0.max 3

Where:
I0.max is the maximum zero-sequence current for an external fault.
Krel is the reliability coefficient, usually taking 1.3 or above.
 When the stage x of ground fault protection is used as definite-time protection, it

should coordinate with the protection of other adjacent line.
✓ The operating current shall be larger than the maximum residual current under
pole disagreement condition.
✓ The operating current shall coordinate with the measurement element of the
adjacent line and ensure enough sensitivity for the fault happens at the end of
the line.
[50/51Gx. 3I0_Set] = K rel × K br × I0.Adj
Where:
Krel is the reliability coefficient, usually taking 1.1~1.3.
Kbr is the branching coefficient of residual current, which is equal to the ratio of the
residual current passing through the device to that passing through the faulty line
when a ground fault happens at the end of the protected zone of the ground fault
protection of the line. It takes the maximum value among various operation conditions.
I0.Adj is the current setting of the coordinated stage of the adjacent line.
 When the ground fault protection is used as the standby protection for the ground
fault of line through resistor and for the ground fault of adjacent elements, its primary
current value should not be larger than 300A. To avoid the maximum unbalance

current of three-phase short circuit at other sides of the transformer at the end of line,
it is necessary to meet the requirement that the fault at the end of the adjacent lines
has enough sensitivity; it is necessary to check the coordination condition between
the definite-time ground fault protections of adjacent lines, and the operating time is
set according to the coordination relation.
(3)
[50/51Gx. 3I0_Set] = K rel × K aper × K st × fi × I0p.1
Where:
Krel is the reliability coefficient, taking 1.1 or above;
Kaper is the periodic component coefficient, taking 1.5~2.0;
Kst is the same type coefficient, taking 0.5 when the transformer is of the same type;
3 fi is the amplitude error of transformer, generally taking 0.1;
I0p.1(3) is the three-phase short circuit current at the end of the line.
 When the ground fault protection is used as inverse-time protection, the calculation
principle is:
[50/51Gx. 3I0_Set] = K p × Idz
Where:
Idz is the current setting of the inverse-time ground fault protection to be coordinated
➢ For transformer protection:
 The ground fault protection of transformer normally coordinates with the ground fault
protection of line.
[50/51Gx. 3I0_Set] = K rel × K br × I0p.o
Where:
Kbr is the branching coefficient of residual current, which is equal to the ratio of the
residual current passing through the device to that passing through the faulty line
during a ground fault at the end of the protected section of the coordinated stage of
ground fault protection of the line. It takes the maximum value among various
operation conditions.
Krel is the reliability factor, taking 1.1.
I0p.o is the setting (secondary value) of the coordinated stage of residual protection of
the line.

 The setting should be sensitive enough during a busbar fault at the local end.
Imin
[50/51Gx. 3I0_Set] =
K sen
Where:
Ksen is the sensitivity coefficient, taking 1.5.
Imin is the minimum residual current during a busbar short-circuit fault at the end.
 If the ground fault protection is used independently, the current setting should be
greater than maximum unbalanced current of the system.
Recommended value: (0.3~0.5) p.u (p.u. is the secondary rated current at the relative
side of the transformer).
 When the ground fault protection is used as an inverse-time protection, the calculation 3
principle is:
[50/51Gx. 3I0_Set] = K p × Idz
Where:
Idz is the current setting of the inverse-time protection to be coordinated.
 When the ground fault protection is used for a grounding transformer, the operating
current should be larger than the line capacitive current.
⚫ [50/51Gx.t_Op]
The operating time setting of the stage x of ground fault protection
 When definite-time ground fault protection coordinates with the adjacent line, this
setting should coordinate with the time delay of the ground fault protection of the
subordinate line. The calculation principle is:
[50/51Gx.t_Op] = t 0.Adj + Δt
Where:
t0.Adj is the time delay of the coordinated stage of the adjacent line.
Δt is the extra time delay, usually taking 0.3~0.5s.
 If the protection is used independently, the setting should be larger than the maximum
operating time under pole disagreement condition.

➢ For transformer protection
 The protection coordinates with the corresponding ground fault protection of the line.
[50/51Gx. t_Op] = t max + Δt
Where:
tmax is the maximum operating time delay of the coordinated stage of ground fault
protection of the line.
 The protection is used independently. The setting should be greater than the
maximum operating time delay under pole disagreement condition.
For the time delay of different stages, the following equation is recommended.
3 t n+1 = t n + Δt
Where:
tn+1 is the time delay of the stage n+1.
tn is the time delay of the stage n.
⚫ [50/51Gx.t_DropOut]
The dropout time setting of the stage x of ground fault protection
This setting is valid when the definite-time dropout characteristic is selected. When I0<0.95Iop,
the protection drops out with a time delay of the setting value (tdr), the dropout characteristic
curve is shown in the following figure.

Start time
I0>I0p
Start
signal
Operating
signal
Protection
Operating
counter
3
t dr t dr t dr
Dropout time
Dropout time
Figure 3.2-1 Definite-time dropout characteristic of ground fault protection
⚫ [50/51Gx.En]
Enabling/Disabling the stage x of ground fault protection
⚫ [50/51Gx.Opt_Trp/Alm]
The option of operation type of the stage x of ground fault protection
➢ Trp: tripping
➢ Alm: alarm
⚫ [50/51Gx.Opt_Curve]
The option of operating characteristic curve of the stage x of ground fault protection
Ground fault protection supports definite-time, IEC & ANSI standard inverse time and user-
defined inverse-time characteristics.
50/51Gx.Opt_Curve Time Characteristic k α c tr
ANSIN ANSI Normal Inverse 0.0086 0.02 0.0185 0.46

50/51Gx.Opt_Curve Time Characteristic k α c tr
IECE IEC Extremely inverse 80.0 2.0 0 -

3 IECST IEC Short-time inverse 0.05 0.04 0 -
⚫ [50/51Gx.Opt_Curve_DropOut]
The option of dropout characteristic curve of the stage x of ground fault protection

time, the dropout characteristic can only be instantaneous or definite-time. If the inverse-time
blocked.
When I0<0.95I0p, the protection drops out immediately.
When I0<0.95I0p, the protection drops out with a time delay of tdr (i.e. the value of the

setting [50/51Gx.t_DropOut]), and the dropout characteristic curve is shown in the

following figure.
Start time
I0>I0p
Start
signal
Operating
signal
Operating threshold
Protection
operate
3
Operating
counter
t dr t dr t dr
Dropout time
Dropout time
Figure 3.2-2 Definite-time dropout characteristic of ground fault protection
When I0>I0p, the inverse-time operating accumulator starts, the accumulated value after tp
(Assuming tp is less than the theoretical operating time) is calculated according to the
following equation:
tp
1
Itp = ∫ dt
t(I0 )
0
At this time, if I0<0.95I0p, the protection element starts to drop out, and the dropout
TR
1
Itp − ∫ dt = 0
t R (I)
0
Where:
tR(I) is the dropout characteristic equation.

When I0<0.95I0p, the inverse-time dropout characteristic equation is as follows:
tr
tR = { } × TMS
1 − (I0/I0p )2
Where:
I0P is the current setting [50/51Gx.3I0_Set];
TMS is the inverse-time factor, i.e. the setting [50/51Gx.TMS];
tr is the dropout time coefficient, it is the dropout time required for current to drop to 0 after
the protection operates.
I0 is the measured current.
When 0.95I0p<I0<I0p, the accumulator will neither accumulate nor drop out.
3 The inverse time dropout characteristic curve is shown in the figure below.
tr
I0 P I0
Figure 3.2-3 Inverse-time dropout characteristic curve of ground fault protection

Start time
I0>I0p
Start
signal
Operating
signal
Protection
Operating
counter

3
Dropout time
Dropout time
Figure 3.2-4 Inverse-time dropout characteristic of ground fault protection
⚫ [50/51Gx.TMS]
The time multiplier of the stage x of inverse-time ground fault protection
ground fault protection.
⚫ [50/51Gx.tmin]
The minimum operating time of stage x of inverse-time ground fault protection
If it coordinates with other protections, it can be set as “tmin+Δt”.
Where:
tmin is the minimum operating time of other protections.
If the protection is used independently, the recommended value is 0.02s.
⚫ [50/51Gx.K]
The constant "K" of the stage x of customized inverse-time ground fault protection
It shall be set according to the inverse-time characteristic of ground fault protection.

Only when the setting [50/51Gx.Opt_Curve] is set as “UserDefine”, i.e. the user-defined
inverse-time characteristic is selected, this setting is valid.
⚫ [50/51Gx.Alpha]
The constant "α" of the stage x of customized inverse-time ground fault protection
Only when the setting [50/51Gx.Opt_Curve] is set as “UserDefine”, i.e. the user-defined
⚫ [50/51Gx.C]
The constant "C" of the stage x of customized inverse-time ground fault protection

3 Only when the setting [50/51Gx.Opt_Curve] is set as “UserDefine”, i.e. the user-defined
3.3 Negative-sequence Overcurrent Protection (50/51Q)
3.3.1 Setting List
Device LCD: MainMenu  Settings  Protection Settings  NegOC Settings

NegOC_Settings
Settings Range Step Unit
50/51Qx.I2_Set (0.050~40.000)×In 0.001 A
50/51Qx.t_Op 0.000~100.000 0.001 s
50/51Qx.t_DropOut 0.000~100.000 0.001 s
Disabled
50/51Qx.En
Enabled
Trp
50/51Qx.Opt_Trp/Alm
Alm

Settings Range Step Unit
ANSIE
ANSIV
ANSIN
ANSIM
ANSIDefTime
ANSILTE
ANSILTV
ANSILT
50/51Qx.Opt_Curve
IECN
IECV
IECI
IECE
IECST 3
IECLT
IECDefTime
UserDefine
Inst
50/51Qx.Opt_Curve_DropOut DefTime
IDMT
50/51Qx.TMS 0.040~20.000 0.001
50/51Qx.tmin 0.000~10.000 0.001 s
50/51Qx.K 0.0010~120.0000 0.0001
50/51Qx.Alpha 0.0100~3.0000 0.0001
50/51Qx.C 0.0000~1.0000 0.0001
The device can provide two stages of negative-sequence overcurrent protection. Each stage has
independent operating current, time delay and control logic setting.
⚫ [50/51Qx.I2_Set]
The current setting of the stage x of negative-sequence overcurrent protection
When a two-phase short circuit fault happens, the following equation is satisfied.
(2) 1
I2 = I (3)
2
Where:

I2(2) is the negative-sequence component of the two-phase short-circuit current;
I(3) is the three-phase short-circuit current.
When the pickup current of the negative-sequence overcurrent element is fixedly equal to
0.5 times of the pickup setting of phase overcurrent element, the relative sensitivity
coefficient of two-phase short circuit is equal to 1. For setting calculation, the coordination
of sensitivity can be carried out only according to the three-phase short circuit and the
overcurrent protection with adjacent lines.
This setting can be referred to the phase overcurrent setting.
[50/51Qx. I2_Set] = K n × IL.max
Where:
3 IL.max is the maximum value of three-phase short circuit current of this line;
Kn is the negative-sequence coefficient, taking 0.5.
⚫ [50/51Qx.t_Op]
The operating time delay of the stage x of negative-sequence overcurrent protection
It should be identical with the time delay setting of phase overcurrent protection.
For phase overcurrent protection and negative sequence overcurrent protection, if a fault
happens at the same point, the protection with high sensitivity and short operating time
will take precedence to trip.
⚫ [50/51Qx.t_DropOut]
The dropout time delay of the stage x of negative-sequence overcurrent protection
This setting is valid when definite-time dropout characteristic is selected. When I2<0.95I2p,
the protection drops out with a time delay of the setting value (tdr), and the dropout
characteristic curve is shown in the following figure:

Start time
I2>I2p
Start
signal
Operating
signal
Protection
Operating
counter
3
t dr t dr t dr
Dropout time
Dropout time
Figure 3.3-1 Definite-time dropout characteristic of negative-sequence overcurrent protection
⚫ [50/51Qx.En]
Enabling/Disabling the stage x of negative-sequence overcurrent protection
⚫ [50/51Qx.Opt_Trp/Alm]
The option of operation type of the stage x of negative-sequence overcurrent protection
➢ Trp: tripping
➢ Alm: alarm
⚫ [50/51Qx.Opt_Curve]
The option of operating characteristic curve of the stage x of negative-sequence overcurrent

protection
Negative-sequence overcurrent protection supports definite-time, IEC & ANSI standard

inverse time and user-defined inverse-time characteristics.
50/51Qx.Opt_Curve Time Characteristic k α c tr

50/51Qx.Opt_Curve Time Characteristic k α c tr
ANSIN ANSI Normal Inverse 0.0086 0.02 0.0185 0.46

3 IECE IEC Extremely inverse 80.0 2.0 0 -
IECST IEC Short-time inverse 0.05 0.04 0 -
⚫ [50/51Qx.Opt_Curve_DropOut]
The option of dropout characteristic curve of the stage x of negative-sequence overcurrent

protection

time, the dropout characteristic can only be instantaneous or definite-tim. If the inverse-time
blocked.
When I2<0.95I2p, the protection drops out immediately.

When I2<0.95I2p, the protection drops out with a time delay of tdr (i.e. the value of the
setting [50/51Qx.t_DropOut]), and the dropout characteristic curve is shown in the
following figure:
Start time
I2>I2p
Start
signal
Operating
3
signal
Protection
Operating
counter
t dr t dr t dr
Dropout time
Dropout time
Figure 3.3-2 Definite-time dropout characteristic of negative-sequence overcurrent protection
When I2>I2p, the inverse-time operating accumulator starts, the accumulated value after tp
(Assuming tp is less than the theoretical operating time) is calculated according to the
following equation:
tp
1
Itp = ∫ dt
t(I2 )
0
At this time, if I2<0.95I2p, the protection element starts to drop out, and the dropout
TR
1
Itp − ∫ dt = 0
t R (I2 )
0
Where:

tR(I2) is the dropout characteristic equation.
When I2<0.95I2p, the inverse-time dropout characteristic equation is as follows:
tr
t R (I2 ) = { 2} × TMS
1 − (I2 /I2p )
Where:
I2p is the current setting [50/51Qx.I2_Set];
TMS is the inverse-time factor, i.e. the setting [50/51Qx.TMS];
tr is the dropout time coefficient, it is the dropout time required for the current to drop to 0
after the protection operates.
3
I2 is the measured negative-sequence current.
When 0.95I2p<I2<I2p, the accumulator will neither accumulate nor drop out.
The inverse time dropout characteristic curve is shown in the figure below.
tr
Figure 3.3-3 Inverse-time dropout characteristic curve of negative-sequence overcurrent protection

Start time
I2>I2p
Start
signal
Operating
signal
Protection
Operating
counter

3
Dropout time
Dropout time
Figure 3.3-4 Inverse-time dropout characteristic of negative-sequence overcurrent protection
⚫ [50/51Qx.TMS]
The time multiplier of the stage x of inverse-time negative-sequence overcurrent protection
negative-sequence overcurrent protection.
⚫ [50/51Qx.tmin]
The minimum operating time of the stage x of inverse-time negative-sequence overcurrent

protection
⚫ [50/51Qx.K]
The constant "K" of the stage x of customized inverse-time negative-sequence overcurrent

protection
It shall be set according to the inverse-time characteristic of negative-sequence overcurrent

protection.
Only when the setting [50/51Qx.Opt_Curve] is set as “UserDefine”, i.e. the user-defined

⚫ [50/51Qx.Alpha]
The constant "α" of the stage x of customized inverse-time negative-sequence overcurrent

protection
It shall be set according to the inverse-time characteristic of negative-sequence overcurrent

protection.
⚫ [50/51Qx.C]
The constant "K" of the stage x of customized inverse-time negative-sequence overcurrent

protection
3 It shall be set according to the inverse-time characteristic of negative-sequence overcurrent

protection.
3.4 Undercurrent Protection (37)
3.4.1 Setting List
Device LCD: MainMenu  Settings  Protection Settings  UC Settings

UC_Settings
37.I_Set (0.100~1.000)×In 0.001 A
37.t_Op 0.000~100.000 0.001 s
1P
37.Opt_1P/3P
3P
None
Curr
37.Opt_LogicMode CBPos
CurrOrCBPos
CurrAndCBPos
Disabled
37.En
Enabled

Trp
37.Opt_Trp/Alm
Alm
The device can provide a one-stage undercurrent protection for the monitoring of motor or capacitor.
If the circuit breaker of the protected equipment is closed and the current is less than the predefined
setting, the undercurrent protection will operate.
⚫ [37.I_Set]
The current setting of undercurrent protection
The protection should reliably operate after the bus connected with the capacitor loses the
voltage, and should reliably restore after the bus voltage returns to normal.
[37. I_Set] = (0.3~0.6) × I2n 3

The setting is generally set as 0.3 to 0.6 times of the rated current.
⚫ [37.t_Op]
The operating time delay of undercurrent protection
The operating time should coordinate with the standby protection operating time of outgoing
line at this side.
[37. t_Op] = t ′ + ∆t
Where:
t' is the standby protection operating time required for coordination;
∆t is the coordination time, taking 0.3~0.5s.
⚫ [37.Opt_1P/3P]
The option of current criterion of undercurrent protection
➢ 3P: 3-out-of-3 mode, the protection will not operate unless all three phase operating
criteria are met.
➢ 1P: 1-out-of-3 mode, the protection can operate if any phase criterion is met.
⚫ [37.Opt_LogicMode]
The option of auxiliary criterion check mode of undercurrent protection
➢ None: no check
➢ Curr: current condition
➢ CBPos: auxiliary normally open contact indicating CB position

Select the check mode according to the site situation. When the load current is relatively fixed
and is larger than 0.04In, such as the capacitor and reactor load, the current condition is
recommended. Otherwise, the CB position criterion is recommended.
If the CB position can be acquired, and the load current is also larger than 0.04In, the
comprehensive criterion can also be used.
In case the incoming line CB have been tripped and the busbar loses voltage, the protection
is still desired to operate. The CB position criterion needs to be selected. If there is no CB
position to connected, the option “None” can be selected. But user must use other methods to
ensure that the protection will not always operate before the equipment is put into operation
(the CB is not closed and there is no current) and it can reset reliably after the protection
operation.
3 ⚫ [37.En]
Enabling/Disabling undercurrent protection
⚫ [37.Opt_Trp/Alm]
The option of operation type of undercurrent protection
➢ Trp: tripping
➢ Alm: alarm
3.5 Phase Overvoltage Protection (59P)
3.5.1 Setting List
Device LCD: MainMenu  Settings  Protection Settings  OV Settings

OV_Settings
Up
59Px.Opt_Up/Upp
Upp
3P
59Px.Opt_1P/3P
1P
59Px.U_Set 57.700~200.000 0.001 V
59Px.K_DropOut 0.930~1.000 0.001
59Px.t_Op 0.100~100.000 0.001 s
59Px.t_DropOut 0.000~100.000 0.001 s

Disabled
59Px.En
Enabled
Trp
59Px.Opt_Trp/Alm
Alm
ANSIDefTime
IECDefTime
59Px.Opt_Curve
UserDefine
InvTime_U
Inst
59Px.Opt_Curve_DropOut
DefTime
59Px.TMS 0.040~20.000 0.001

3
59Px.tmin 0.000~10.000 0.001 s
59Px.K 0.0010~120.0000 0.0001
59Px.Alpha 0.0100~3.0000 0.0001
59Px.C 0.0000~1.0000 0.0001
The device can provide two stages of overvoltage protection. Each stage has independent
operating current, time delay and control logic settings.
⚫ [59Px.Opt_Up/Upp]
The voltage option of calculation of the stage x of phase overvoltage protection
➢ Up: phase-to-ground voltage
➢ Upp: phase-to-phase voltage
⚫ [59Px.Opt_1P/3P]
The option of voltage criterion of the stage x of phase overvoltage protection
criteria are met.
⚫ [59Px.U_Set]
The voltage setting of the stage x of phase overvoltage protection
This setting should be set according to the actual isolation requirements of the protected
equipment. Meanwhile, the value of the corresponding [59Px.Opt_Up/Upp] should be

considered for the consistency.
➢ For definite-time characteristic
[59Px.U_Set] = (1.1~1.5)Un
Where:
Un: the secondary rated voltage.
For example:
 In using phase-to-phase voltage, 1.3 times Un (Un=110V) is assigned for overvoltage

protection. The settings should be:
[59Px.Opt_Up/Upp]=Upp, [59Px.U_Set]=143V
 In using phase-to-ground voltage, 1.3 times of Un (Un=63.5V) is assigned for

3 overvoltage protection. The settings should be:
[59Px.Opt_Up/Upp]=Up, [59Px.U_Set]=82.55V
➢ For inverse-time characteristic
[59Px.U_Set] = K rel × Umax
Where:
Krel is the reliability coefficient, taking 1.05~1.1.
Umax is the maximum long-term voltage which could be phase-to-phase or phase-to-

ground value depending on [59Px.Opt_Up/Upp].
⚫ [59Px.K_DropOut]
The dropout coefficient of the stage x of phase overvoltage protection
Recommended value: 0.98.
⚫ [59Px.t_Op]
The operating time delay of the stage x of phase overvoltage protection
Recommended value: 0.3s~1s.
⚫ [59Px.t_DropOut]
The dropout time delay of the stage x of phase overvoltage protection
This setting is valid when the definite-time dropout characteristic is selected. When
U<[59Px.K_DropOut]Up, the protection drops out with a time delay of the setting value (tdr),
and the dropout characteristic curve is shown in the following figure:

Start time
U>Up
Start
signal
Operating
signal
Protection
Operating
counter 3
t dr t dr t dr
Dropout time
Dropout time
Figure 3.5-1 Definite-time dropout characteristic of phase overvoltage protection
Recommended value: 0.
⚫ [59Px.En]
Enabling/Disabling the stage x of phase overvoltage protection
⚫ [59Px.Opt_Trp/Alm]
The option of operation type of the stage x of phase overvoltage protection
➢ Trp: tripping
➢ Alm: alarm
⚫ [59Px.Opt_Curve]
The option of operating characteristic curve of the stage x of phase overvoltage protection
Phase overvoltage protection supports definite-time, IEC & ANSI standard inverse time and
user-defined inverse-time characteristics.
59Px.Opt_Curve Time Characteristic k α c
ANSIDefTime ANSI Definite Time - - -
IECDefTime IEC Definite Time - - -
UserDefine UserDefine

InvTime_U InvCrv_U 1 1 0
⚫ [59Px.Opt_Curve_DropOut]
The option of dropout characteristic curve of the stage x of phase overvoltage protection
When U<[59Px.K_DropOut]Up, the protection drops out immediately.
3 When U<[59Px.K_DropOut]Up, the protection drops out with a time delay of tdr (i.e. the
value of the setting [59Px.t_DropOut]), and the dropout characteristic curve is shown in
the following figure:
Start time
U>Up
Start
signal
Operating
signal
Protection
Operating
counter
t dr t dr t dr
Dropout time
Dropout time
Figure 3.5-2 Definite-time dropout characteristic of phase overvoltage protection
⚫ [59Px.TMS]
The time multiplier of the stage x of inverse-time phase overvoltage protection

overvoltage protection.
⚫ [59Px.tmin]
The minimum operating time of the stage x of inverse-time phase overvoltage protection
Recommended value: 0.02 second.
⚫ [59Px.K]
The constant "K" of the stage x of customized inverse-time phase overvoltage protection
It shall be set according to the inverse-time characteristic of overvoltage protection.
Only when the setting [59Px.Opt_Curve] is set as “UserDefine”, i.e. the user-defined inverse-
time characteristic is selected, this setting is valid.
3
⚫ [59Px.Alpha]
The constant "α" of the stage x of customized inverse-time phase overvoltage protection
⚫ [59Px.C]
The constant "C" of the stage x of customized inverse-time phase overvoltage protection
3.6 Positive-sequence Overvoltage Protection (59Pos)
3.6.1 Setting List
Device LCD: MainMenu  Settings  Protection Settings  PosOV Settings

PosOV_Settings
59Pos.U1_Set 2.000~100.000 0.001 V
59Pos.K_DropOut 0.93.~1.000 0.001
59Pos.t_Op 0.100~100.000 0.001 s

59Pos.t_DropOut 0.000~100.000 0.001 s
Disabled
59Pos.En
Enabled
Trp
59Pos.Opt_Trp/Alm
Alm
The device provides a one-stage positive-sequence overvoltage protection.
⚫ [59Pos.U1_Set]
The voltage setting of positive-sequence overvoltage protection
[59Pos. U1_Set] = (1.1~1.5) × U2n /1.732

3 Where:
U2n is the secondary rated voltage of VT.
Normally, the positive-sequence overvoltage protection is used to reflect the system

overvoltage. Thus, 1.1 times of the rated voltage is recommended as the setting value.
For example:
The secondary rated value of VT is 100V and the voltage multiple is 1.1.
[59Pos.U1_Set]=1.1100÷1.732=63.5V.
⚫ [59Pos.K_DropOut]
The dropout coefficient of positive-sequence overvoltage protection
To avoid frequent jitter, when the operating threshold is low, this setting value can be
appropriately reduced.
⚫ [59Pos.t_Op]
The operating time delay of positive-sequence overvoltage protection
When the operating threshold is large, this setting value can be appropriately reduced, such
as 1s; when the operating threshold is small, this setting could be larger, such as 5s.
⚫ [59Pos.t_DropOut]
The dropout time delay of positive-sequence overvoltage protection
The dropout characteristics could be instantaneous or definite-time.

When U1<[59Pos.K_DropOut]×[59Pos.U1_Set], the protection drops out immediately.
When U1 <[59Pos.K_Dropout]×[59Pos.U1_Set], the protection drops out with a time delay

of the setting value (tdr), and the dropout characteristic curve is shown in the following
figure:
Start time
U 1> U1p
Start signal
3
Operating
signal
Protection
Operating
counter
t dr t dr t dr
Dropout time
Dropout time
Figure 3.6-1 Definite-time dropout characteristic of positive-sequence overvoltage protection
⚫ [59Pos.En]
Enabling/Disabling positive-sequence overvoltage protection
⚫ [59Pos.Opt_Trp/Alm]
The option of operation type of positive-sequence overvoltage protection
➢ Trp: tripping
➢ Alm: alarm

3.7 Negative-sequence Overvoltage Protection (59Q)
3.7.1 Setting List
Device LCD: MainMenu  Settings  Protection Settings  NegOV Settings

NegOV_Settings
59Qx.U2_Set 2.000~100.000 0.001 V
59Qx.K_DropOut 0.930~1.000 0.001
59Qx.t_Op 0.100~100.000 0.001 s
3 59Qx.t_DropOut 0.000~100.000 0.001 s
Disabled
59Qx.En
Enabled
Trp
59Qx.Opt_Trp/Alm
Alm
The device provides two stages of negative-sequence overvoltage protection
⚫ [59Qx.U2_Set]
The voltage setting of the stage x of negative-sequence overvoltage protection
[59Qx. U2_Set] = K rel × U2n /1.732
Where:
U2n is the VT secondary rated voltage.
Krel is the reliable coefficient.
If the protection is used to release the relevant current protection when detecting the reverse
phase sequence connection or a asymmetric fault, the setting value should not be too sensitive,
and Krel is recommended to be 0.1.
If the protection is used to detect the unbalance situation of rotating motor and prevent the
motor from overheating, Krel is recommended to be 0.03.
For example:
The secondary rated value of VT is 100V, Krel is 0.1.
[59Qx.U2_Set]=0.1×100÷1.732=5.78V.

In addition, the setting value should avoid the maximum unbalance negative-sequence voltage
during normal operation.
⚫ [59Qx.K_DropOut]
The dropout coefficient of the stage x of negative-sequence overvoltage protection
To avoid frequent jitter, when the operating threshold is low, this setting value can be
appropriately reduced.
⚫ [59Qx.t_Op]
The operating time delay of the stage x of negative-sequence overvoltage protection
When the operating threshold is large, this setting value can be appropriately reduced, such
as 1s; when the operating threshold is small, this setting could be larger, such as 5s. 3
⚫ [59Qx.t_Dropout]
The dropout time delay of the stage x of negative-sequence overvoltage protection
When U2<[59Qx.K_Dropout]×[59Qx.U2_Set], the protection drops out immediately.
When U2<[59Qx.K_Dropout]×[59Qx.U2_Set], the protection drops out with a time delay

of the setting value (tdr), and the dropout characteristic curve is shown in the following
figure:

Start time
U 2> U2p
Start signal
Operating
signal
Protection
Operating
3 counter
t dr t dr t dr
Dropout time
Dropout time
Figure 3.7-1 Definite-time dropout characteristic of negative-sequence overvoltage protection
⚫ [59Qx.En]
Enabling/Disabling the stage x of negative-sequence overvoltage protection
⚫ [59Qx.Opt_Trp/Alm]
The option of operation type of the stage x of negative-sequence overvoltage protection
➢ Trp: tripping
➢ Alm: alarm
3.8 Residual Overvoltage Protection (59G)
3.8.1 Setting List
Device LCD: MainMenu  Settings  Protection Settings  ROV Settings

ROV_Settings
59Gx.3U0_Set 1.000~200.000 0.001 V
59Gx.K_DropOut 0.930~1.000 0.001

59Gx.t_Op 0.100~100.000 0.001 s
59Gx.t_DropOut 0.000~100.000 0.001 s
Disabled
59Gx.En
Enabled
Trp
59Gx.Opt_Trp/Alm
Alm
The device provides two stages of residual overvoltage protection. Each stage has independent
⚫ [59Gx.3U0_Set] 3
The voltage setting of the stage x of residual overvoltage protection
The setting should be larger than the maximum unbalance residual voltage under normal
condition.
➢ For small current grounding system
This protection is generally used for alarm.
0.5 × U2n
[59Gx. 3U0_Set] =
1.732
➢ For grounding system via gap
2 × U2n
[59Gx. 3U0_Set] =
1.732
➢ For single-phase ground fault of ungrounded system
1.2 × U2n
[59Gx. 3U0_Set] =
1.732
Where:
U2n is the VT secondary rated voltage.
⚫ [59Gx.K_DropOut]
The dropout coefficient of the stage x of residual overvoltage protection
⚫ [59Gx.t_Op]
The operating time delay of the stage x of residual overvoltage protection
The setting value should be able to keep the protection away from the influence of transient

characteristic.
Recommended value: 0.3s~0.5s.
⚫ [59Gx.t_DropOut]
The dropout time delay of the stage x of residual overvoltage protection
When U0<[59Gx.K_DropOut]×U0p, the protection drops out immediately.
When U0<[59Gx.K_DropOut]×U0p, the protection drops out with a time delay of the setting
value (tdr), and the dropout characteristic curve is shown in the following figure:
3
Start time
U0>U0p
Start
signal
Operating
signal
Protection
Operating
counter
t dr t dr t dr
Dropout time
Dropout time
Figure 3.8-1 Definite-time dropout characteristic of residual overvoltage protection
⚫ [59Gx.En]
Enabling/Disabling the stage x of residual overvoltage protection
⚫ [59Gx.Opt_Trp/Alm]
The option of operation type of the stage x of residual overvoltage protection

➢ Trp: tripping
➢ Alm: alarm
3.9 Undervoltage Protection (27P)
3.9.1 Setting List
Device LCD: MainMenu  Settings  Protection Settings  UV Settings

UV_Settings
Up
27P.Opt_Up/Upp
Upp
3
3P
27P.Opt_1P/3P
1P
None
Curr
27P.Opt_LogicMode CBPos
CurrOrCBPos
CurrAndCBPos
27Px.U_Set 5.000~120.000 0.001 V
27Px.K_DropOut 1.000~1.200 0.001
27Px.t_Op 0.100~100.000 0.001 s
27Px.t_DropOut 0.000~100.000 0.001 s
Disabled
27Px.En_VTS_Blk
Enabled
Disabled
27Px.En
Enabled
Trp
27Px.Opt_Trp/Alm
Alm
ANSIDefTime
IECDefTime
27Px.Opt_Curve
UserDefine
InvTime_U
Inst
27Px.Opt_Curve_DropOut
DefTime

27Px.TMS 0.040~20.000 0.001
27Px.tmin 0.030~10.000 0.001 s
27Px.K 0.0010~120.0000 0.0001
27Px.Alpha 0.0100~3.0000 0.0001
27Px.C 0.0000~1.0000 0.0001
The protection can provide two stages of undervoltage protection. Each stage has independent
⚫ [27P.Opt_Up/Upp]
3
The voltage option of calculation of phase undervoltage protection
➢ Up: phase-to-ground voltage
➢ Upp: phase-to-phase voltage
⚫ [27P.Opt_1P/3P]
The option of voltage criterion of phase undervoltage protection
criteria are met.
⚫ [27P.Opt_LogicMode]
The option of auxiliary criterion check mode of undervoltage protection
➢ None: no check
➢ Curr: current condition
➢ CBPos: auxiliary normally open contact indicating CB position
Select the check mode according to the site situation. When the load current is relatively fixed
and is larger than 0.04In, such as the capacitor and reactor load, the current condition is
recommended. Otherwise, the CB position criterion is recommended.
If the CB position can be acquired, and the load current is also larger than 0.04In, the
comprehensive criterion can also be used.
In case the incoming line CB have been tripped and the busbar loses voltage, the protection
is still desired to operate. The CB position criterion needs to be selected. If there is no CB
position to connected, the option “None” can be selected. But user must use other methods to

ensure that the protection will not always operate before the equipment is put into operation
(the CB is not closed and there is no current) and it can reset reliably after the protection
operation.
⚫ [27Px.U_Set]
The voltage setting of the stage x of phase undervoltage protection
This setting should be set according to the actual stability level of power system. But it should
ensure enough sensitivity for a fault at the end of line and not be larger than the minimum
operating voltage under normal conditions. Meanwhile, the value of the corresponding
[27Px.Opt_Up/Upp] should be considered for the consistency
For example:
➢ In using phase-to-phase voltage, 70% of Un (Un=110V) is assigned for undervoltage

protection. The settings should be:
3
[27Px.Opt_Up/Upp]=Upp, [27Px.U_Set]=77V
➢ In using phase-to-ground voltage, 70% of Un (Un=63.5V) is assigned for undervoltage

protection. The setting should be:
[27Px.Opt_Up/Upp]=Up, [27Px.U_Set]=44.45V
⚫ [27Px.K_DropOut]
The dropout coefficient of the stage x of phase undervoltage protection
⚫ [27Px.t_Op]
The operating time delay of the stage x of phase undervoltage protection
⚫ [27Px.t_DropOut]
The dropout time delay of the stage x of phase undervoltage protection
This setting is valid when the definite-time dropout characteristic is selected. When
U>[27Px.K_DropOut]×Up, the protection drops out with a time delay of the setting value (tdr),
and the dropout characteristic curve is shown in the following figure:

Start time
U<Up
Start
signal
Operating
signal
Protection
Operating
3 counter
t dr t dr t dr
Dropout time
Dropout time
Figure 3.9-1 Definite-time dropout characteristic of undervoltage protection
⚫ [27Px.En_VTS_Blk]
Enabling/Disabling the blocking criterion by VT circuit supervision alarm of the stage x of phase
undervoltage protection
⚫ [27Px.En]
Enabling/Disabling the stage x of phase undervoltage protection
⚫ [27Px.Opt_Trp/Alm]
The option of operation type of the stage x of phase undervoltage protection
➢ Trp: tripping
➢ Alm: alarm
⚫ [27Px.Opt_Curve]
The option of operating characteristic curve of the stage x of phase undervoltage protection
Undervoltage protection supports definite-time, IEC & ANSI standard inverse time and user-
defined inverse-time characteristics.

ANSIDefTime ANSI Definite Time - - -
IECDefTime IEC Definite Time - - -
UserDefine UserDefine
InvTime_U InvCrv_U 1 1 0
⚫ [27Px.Opt_Curve_DropOut]
The option of dropout characteristic curve of the stage x of phase undervoltage protection
3
When U>[27Px.K_DropOut]×Up, the protection drops out immediately.
When U>[27Px.K_DropOut]×Up, the protection drops out with a time delay of tdr (i.e. the
value of the setting [27Px.t_DropOut]), and the dropout characteristic curve is shown in
the following figure:
Start time
U<Up
Start
signal
Operating
signal
Protection
Operating
counter
t dr t dr t dr
Dropout time
Dropout time
Figure 3.9-2 Definite-time dropout characteristic of undervoltage protection

⚫ [27Px.TMS]
The time multiplier of the stage x of inverse-time phase undervoltage protection
undervoltage protection.
⚫ [27Px.tmin]
The minimum operating time of the stage x of inverse-time phase undervoltage protection
setting, then the operating time changes to the value of this setting value automatically.
Recommended value: 0.03s.
⚫ [27Px.K]
3 The constant "K" of the stage x of customized inverse-time phase undervoltage protection
It shall be set according to the inverse-time characteristic of undervoltage protection.
⚫ [27Px.Alpha]
The constant "α" of the stage x of customized inverse-time phase undervoltage protection
⚫ [27Px.C]
The constant "C" of the stage x of customized inverse-time phase undervoltage protection
3.10 Overfrequency Protection (81O)
3.10.1 Setting List
Device LCD: MainMenu  Settings  Protection Settings  FreqProt Settings

FreqProt_Settings

81.Upp_Blk 10.000~150.000 0.001 V
81Ox.f_Set 50.000~65.000 0.001 Hz
81Ox.t_Op 0.050~100.000 0.001 s
Disabled
81Ox.En
Enabled
The device provides six stages of overfrequency protection. Each stage has independent operating
frequency, time delay and control logic settings.
⚫ [81.Upp_Blk]
The lower limit of phase-to-phase voltage to block all frequency protection

3
Recommended value: 0.7 of the rated phase-to-phase voltage
⚫ [81Ox.f_Set]
The frequency setting of the stage x of overfrequency protection
All stages can be set based on the same graduation. After rejecting some power supplies and
each stage operation, the system frequency should be restored near the rated frequency.
Because of the compound mode of generators (hydroelectric, thermal power, nuclear power
with different capacity and proportion, different adaptability to abnormal frequency), the system
structure and operation mode are different in different power system. The setting should be set
according to the system frequency and stability control strategy.
⚫ [81Ox.t_Op]
The operating time delay of the stage x of overfrequency protection
The setting should be set according to the system frequency and stability control strategy.
⚫ [81Ox.En]
Enabling/Disabling the stage x of overfrequency protection
3.11 Underfrequency Protection (81U)
3.11.1 Setting List

FreqProt_Settings

81.Upp_Blk 10.000~150.000 0.001 V
81Ux.f_Set 45.000~60.000 0.001 Hz
81Ux.t_Op 0.050~100.000 0.001 s
Disabled
81Ux.En
Enabled
The device provides six stages of underfrequency protection. Each stage has independent
operating frequency, time delay and control logic settings.
⚫ [81.Upp_Blk]
3 The lower limit of phase-to-phase voltage to block all frequency protection
⚫ [81Ux.f_Set]
The frequency setting of the stage x of underfrequency protection
All stages can adopt the cascade connection, and small graduation can be set among them.
Taking 0.2Hz as an example, select one stage of the protection to avoid that the system
frequency stays on a certain frequency. When some loads are shed by the operation of other
stages of protection, this special stage could operate to shed major loads and make the system
frequency restore to normal value.
⚫ [81Ux.t_Op]
The operating time delay of the stage x of underfrequency protection.
It shall be set according to the system frequency and stability control strategy.
⚫ [81Ux.En]
Enabling/Disabling the stage x of underfrequency protection
3.12 Frequency Rate-of-change Protection (81R)
3.12.1 Setting List

FreqProt_Settings

81.Upp_Blk 10.000~150.000 0.001 V
81Rx.df/dt_Set -5.000~5.000 0.001 Hz/s
81Rx.t_Op 0.050~100.000 0.001 s
81Rx.f_Pkp 45.000~65.000 0.001 Hz
Disabled
81Rx.En
Enabled
The device provides six stages of rate-of-change frequency protection. Each stage has
independent operating frequency, time delay and control logic settings.
⚫ [81.Upp_Blk] 3
The lower limit of phase-to-phase voltage to block all frequency protection
⚫ [81Rx.df/dt_Set]
The ROCOF setting of the stage x of rate-of-change of frequency protection
If fast reduction of frequency caused due to large active power shortage after the system fault,
it is required to remove excess load line fast and prevent frequency reduction as early as
possible, to avoid frequency collapse accident, and the set value is recommended to be -0.8
~ -2Hz/s.
If fast increase of frequency caused when the system power is too large(e.g. more than 20%)
due to sudden surplus, the measures for link tripping together with generator cutting shall be
provided, to avoid large increase of frequency, and the set value is recommended to be 0.8 ~
2Hz/s.
⚫ [81Rx.t_Op]
The operating time delay of the stage x of rate-of-change of frequency protection
Recommended value: 0.1~0.2s.
⚫ [81Rx.f_Pkp]
The pickup time delay of the stage x of rate-of-change of frequency protection
Recommended value: 50Hz or 60Hz.
⚫ [81Rx.En]
Enabling/Disabling the stage x of rate-of-change of frequency protection

3.13 Reverse Power Protection (32R)
3.13.1 Setting List
Device LCD: MainMenu  Settings  Protection Settings  RevPower Settings

RevPower_Settings
32Rx.U1_VCE 5.000~60.000 0.001 V
32Rx.I1_CCE 0.010~1.000 0.001 p.u.
32Rx.U2_VCE 8.000~60.000 0.001 V
3 32Rx.P_Set 0.100~10.000 0.001 p.u.
32Rx.t_Op 0.010~100.000 0.001 s
Disabled
32Rx.En
Enabled
Trp
32Rx.Opt_Trp/Alm
Alm
The device provides two stages of reverse power protection. Each stage has independent operating
power, time delay and control logic settings.
⚫ [32Rx.U1_VCE], [32Rx.I1_CCE]
The lower limits of positive-sequence voltage and positive-sequence current to block the stage
x of reverse power protection
When the positive-sequence voltage and the positive-sequence current are both lower than
the corresponding settings at the same time, the reverse power protection will be blocked.
Recommended values: voltage 5V; current 0.1 p.u.
⚫ [32Rx.U2_VCE]
The upper limit of negative-sequence voltage to block the stage x of reverse power protection
When the negative-sequence voltage is greater than the setting, the reverse power protection
will be blocked.
Recommended value: 8V.
⚫ [32Rx.P_Set]
The active power setting of the stage x of reverse power protection

Generally, the minimum measurable power during reverse power situation is taken.
Recommended value: 0.01p.u.~0.03p.u.
⚫ [32Rx.t_Op]
The operating time delay of the stage x of reverse power protection
For a synchronous motor, the setting should ensure that after the power supply is interrupted,
the reverse power protection can operate to trip the circuit breaker before the power supply is
restored, so to avoid non-synchronous impact on the motor.
⚫ [32Rx.En]
Enabling/Disabling the stage x of reverse power protection
⚫ [32Rx.Opt_Trp/Alm]
The option of operation type of the stage x of reverse power protection

3
➢ Trp: tripping
➢ Alm: alarm
3.14 Breaker Failure Protection (50BF)
3.14.1 Setting List
Device LCD: MainMenu  Settings  Protection Settings  BFP Settings
PCS-Studio: Project Node  Device Node  Setting  Group*  Protection Settings  BFP
Settings
CBx.50BF.I_Set (0.050~40.000)×In 0.001 A
CBx.50BF.3I0_Set (0.050~40.000)×In 0.001 A
CBx.50BF.I2_Set (0.050~40.000)×In 0.001 A
CBx.50BF.t_ReTrp 0.000~20.000 0.001 s
CBx.50BF.t1_Op 0.000~20.000 0.001 s
CBx.50BF.t2_Op 0.000~20.000 0.001 s
Disabled
CBx.50BF.En
Enabled
Disabled
CBx.50BF.En_ReTrp
Enabled
CBx.50BF.En_t1 Disabled


Enabled
Disabled
CBx.50BF.En_t2
Enabled
Disabled
CBx.50BF.En_Ip
Enabled
Disabled
CBx.50BF.En_3I0_1P
Enabled
Disabled
CBx.50BF.En_3I0_3P
Enabled
Disabled
CBx.50BF.En_I2_3P
3 Enabled
Disabled
CBx.50BF.En_CB_Ctrl
Enabled
Disabled
CBx.50BF.En_Alm_Init
Enabled
⚫ [CBx.50BF.I_Set]
The phase current setting of breaker failure detection.
The setting should be able to detect the fault with small fault current. It could be set in
accordance with the most sensitive protection function that initiate the breaker failure
protection.
⚫ [CBx.50BF.3I0_Set]
The zero-sequence current setting of breaker failure detection.
In grounded systems via high impedance, the residual current is normally much smaller than
the short-circuit current if a single-phase earth fault happens. To reliably detect the circuit
breaker failure under the single-phase earth fault, it is necessary to enable the zero-sequence
current criterion by the setting [CBx.50BF.En_3I0_1P]. At this time, the phase current setting
[CBx.50BF.I_Set] could be set more sensitive.
In considering that the fault current is too small for a generator or a transformer fault, the
sensitivity of phase current element may not meet the requirements. Thus, the zero-sequence
current criterion and the negative-sequence current criterion are provided in addition to the
phase overcurrent element for breaker failure protection initiated by the external tripping signal
[CBx.50BF.ExTrp3P]. They can be enabled or disabled by the settings [CBx.50BF.En_3I0_3P]

and [CBx.50BF.En_I2_3P] respectively.
The setting [CBx.50BF.3I0_Set] shall be greater than the maximum zero-sequence unbalance
current (3I0) under normal operation condition.
⚫ [CBx.50BF.I2_Set]
The negative-sequence current setting of breaker failure detection.
The setting should be greater than the maximum negative-sequence unbalance current (I2)
under normal operation condition.
Please refer to the previous paragraph for the setting principle.
⚫ [CBx.50BF.t_ReTrp]
The re-trip time delay of breaker failure protection.
The setting is generally set to be 5ms~50ms.

3
Recommended value: 50 ms.
⚫ [CBx.50BF.t1_Op]
The first time delay of breaker failure protection.
The breaker failure protection will send three-phase tripping command to trip local circuit
breaker when this time delay has expired. The setting [CBx.50BF.t1_Op] is set as short as
possible on the premise that the selectivity of breaker failure protection is warrantable.
[CBx.50BF.t1_Op] = t0+tB+Δt
Where:
t0 is the circuit breaker operation time, generally taking 0.03~0.06s.
tB is the drop off time of the operation element, generally taking 0.02~0.04s.
Δt is the safety margin time, generally taking 0.03s.
Normally, it is used to trip local circuit breaker again before the second operation of breaker
failure protection in case that the local circuit breaker could not open and to prevent the tripping
of adjacent circuit breakers.
⚫ [CBx.50BF.t2_Op]
The second time delay of breaker failure protection.
The breaker failure protection will send three-phase tripping command to trip adjacent circuit
breakers when the time delay of [CBx.50BF.t2_Op] is expired. The setting [CBx.50BF.t2_Op]
is set as short as possible on the premise that the selectivity of breaker failure protection is

warrantable and undesired operation must be avoided. Besides, the setting should be greater
than the setting [CBx.50BF.t1_Op] with safety margin.
[CBx.50BF.t2_Op] = t0+tB+Δt
Where:
t0 is the circuit breaker operation time, generally taking 0.03~0.06s.
tB is the drop off time of the operation element, generally taking 0.02~0.04s.
Δt is the safety time, generally taking 0.1s.
⚫ [CBx.50BF.En]
Enabling/Disabling breaker failure protection.

3
⚫ [CBx.50BF.En_ReTrp]
Enabling/Disabling re-trip function of breaker failure protection.
After receiving the tripping command from the device and the corresponding current criterion
or CB position criterion is met, the instantaneous re-trip command will be issued to trip the
local circuit breaker.
⚫ [CBx.50BF.En_t1]
Enabling/Disabling the first breaker failure protection.
⚫ [CBx.50BF.En_t2]
Enabling/Disabling the second breaker failure protection.
⚫ [CBx.50BF.En_Ip]
Enabling/Disabling the phase overcurrent criterion of breaker failure protection via the three-
phase external-initiating signal "CBx.50BF.ExTrp3P".
⚫ [CBx.50BF.En_3I0_1P]
Enabling/Disabling the zero-sequence current criterion of breaker failure protection via a

single-phase external-initiating signal.
⚫ [CBx.50BF.En_3I0_3P]
Enabling/Disabling the zero-sequence overcurrent criterion of breaker failure protection via the
three-phase external-initiating signal "CBx.50BF.ExTrp3P".
⚫ [CBx.50BF.En_I2_3P]
Enabling/Disabling the negative-sequence overcurrent criterion of breaker failure protection

via the three-phase external-initiating signal "CBx.50BF.ExTrp3P".

⚫ [CBx.50BF.En_CB_Ctrl]
Enabling/Disabling the CB open position criterion of breaker failure protection via the three-
phase external-initiating signal "CBx.50BF.ExTrp3P".
For certain protection such as mechanical protection or voltage protection, the fault current
maybe is too small to meet the current criterion. In order to make breaker failure protection
operate under such situation, the CB open position is adopted instead of the current criterion.
The precondition is that input signal "CBx.50BF.ExTrp_WOI" is triggered by external trip signal.
⚫ [CBx.50BF.En_Alm_Init]
Enabling/Disabling abnormality check of breaker failure initiating signal.
During the supervision of binary initiating signal of breaker failure protection, if the triggering
status of the binary initiating signal maintains more than 10s, the initiating signal will be
considered as invalid and an alarm "CBx.50BF.Alm_Int" will be issued.
3
3.15 Transfer Trip (TT)
3.15.1 Setting List
Device LCD: MainMenu  Settings  Protection Settings  TT Settings
PCS-Studio: Project Node  Device Node  Setting  Group*  Protection Settings  TT

Settings
TT.t_Op 0.000~100.000 0.001 s
Disabled
TT.En
Enabled
Disabled
TT.En_FD_Ctrl
Enabled
Disabled
TT.En_BlkAR
Enabled
Disabled
TT.En_CB_Ctrl
Enabled
⚫ [TT.t_Op]
The time delay of transfer trip.
Recommended value: 0.005 s.

⚫ [TT.En]
Enabling/Disabling transfer trip.
⚫ [TT.En_FD_Ctrl]
Enabling/Disabling the transfer trip depending on local fault detector element.
The transfer trip can operate only when the device picks up.
⚫ [TT.En_BlkAR]
Enabling/Disabling the block of automatic reclosing depending on transfer trip operation.
⚫ [TT.En_CB_Ctrl]
Enabling/Disabling the transfer trip depending on circuit breaker position.
3 The transfer trip can operate only when the circuit breaker of any phase is closed.
3.16 Automatic Reclosing (79)
3.16.1 Setting List
Device LCD: MainMenu  Settings  Protection Settings  AR Settings
PCS-Studio: Project Node  Device Node  Setting  Group*  Protection Settings  AR

Settings
setting Range Step Unit
CBx.79.Num 1~4 1
CBx.79.t_Dd_1PS1 0.000~600.000 0.001 s
CBx.79.t_Dd_3PS1 0.000~600.000 0.001 s
CBx.79.t_Dd_3PS2 0.000~600.000 0.001 s
CBx.79.t_Dd_3PS3 0.000~600.000 0.001 s
CBx.79.t_Dd_3PS4 0.000~600.000 0.001 s
CBx.79.t_CBClsd 0.000~600.000 0.001 s
CBx.79.t_CBReady 0.000~600.000 0.001 s
CBx.79.t_Wait_Chk 0.000~600.000 0.001 s
CBx.79.t_Reclaim 0.000~600.000 0.001 s
CBx.79.t_DDO_Blk 0.000~600.000 0.001 s
CBx.79.t_AddDly 0.000~600.000 0.001 s
CBx.79.t_WaitMaster 0.000~600.000 0.001 s

CBx.79.t_SecFault 0.000~600.000 0.001 s
CBx.79.t_PersistTrp 0.000~600.000 0.001 s
CBx.79.t_Fail 0.000~600.000 0.001 s
CBx.79.t_PW 0.000~600.000 0.001 s
Disabled
CBx.79.En_AddDly
Enabled
Disabled
CBx.79.En_FailCheck
Enabled
Disabled
CBx.79.En_PDF_Blk
Enabled
3
Disabled
CBx.79.En_CutPulse
Enabled
Disabled
CBx.79.En
Enabled
Setting
CBx.79.Opt_Enable
Setting&Config
Disabled
CBx.79.En_CBInit
Enabled
Config
CBx.79.Opt_ValidMode
Setting
Disabled
CBx.79.En_1P
Enabled
Disabled
CBx.79.En_3P
Enabled
Disabled
CBx.79.En_1P/3P
Enabled
None
CB**.79.Opt_Priority High
Low
Config
CBx.79.Opt_RSYN_ValidMode
Setting
Disabled
CBx.79.En_SynChk
Enabled

Disabled
CBx.79.En_SynDd_RefDd
Enabled
Disabled
CBx.79.En_SynLv_RefDd
Enabled
Disabled
CBx.79.En_SynDd_RefLv
Enabled
Disabled
CBx.79.En_NoChk
Enabled
⚫ [CBx.79.Num]
3
The maximum number of reclosing attempts.
The AR function could be set as one-shot or multi-shot. Through the setting [CBx.79.N_Rcls],
the maximum number of reclosing attempts can be set up to 4.
Generally, one-shot AR is preferred.
The table below shows the number of reclosing attempts with respect to the settings and AR
modes.
1-pole AR 3-pole AR 1/3-pole AR

[CBx.79.Num]
N-1AR N-3AR N-1AR N-3AR N-1AR N-3AR
1 1 0 0 1 1 1
2 1 0 0 2 1 2
3 1 0 0 3 1 3
4 1 0 0 4 1 4
N-1AR: the reclosing number of 1-pole AR
N-3AR: the reclosing number of 3-pole AR
⚫ [CBx.79.t_Dd_1PS1]
The dead time of the first shot of 1-pole reclosing.
The setting should be set according to system stability requirements. Meanwhile, arc-
extinguishing of instantaneous fault and insulation recovery ability should also be considered.
Generally, this setting is greater than 0.5s.

The dead time of the first shot of 3-pole reclosing.
The setting should be set according to system stability requirements. Meanwhile, arc-
extinguishing of instantaneous fault and insulation recovery ability should also be considered.
In addition, the possibility for two-side protection (double power supplies) to cut off fault with
different time limit should be considered.
The dead time of the second shot of 3-pole reclosing.
It will be active only if the setting [CBx.79.Num] is set to be more than 1.
Recommended value: 0.6 s. 3

The dead time of the third shot of 3-pole reclosing.
The dead time of the fourth shot of 3-pole reclosing.
⚫ [CBx.79.t_CBClsd]
The waiting time of circuit-breaker closing position to obtain the AR ready state.
It is the minimum time delay for circuit breaker closing position before AR gets ready. The
duration of the circuit breaker closing position before fault occurrence should not be less than
the setting [CBx.79.t_CBClsd] for a successful reclosing.
⚫ [CBx.79.t_CBReady]
The waiting time of CB healthy state
It begins to timing when the input signal "CBx.79.CB_Healthy" is de-energized. If the signal is
not energized within this time delay, AR will be blocked.
The input signal "CBx.79.CB_Healthy" must be energized before auto-reclosing gets ready.
Because most circuit breakers can finish one complete process: open-closed-open. It is
necessary that circuit breaker has enough energy before reclosing. When the dead time delay

of AR has exhausted, if the input signal "CBx.79.CB_Healthy" is still not energized within the
time delay [CBx.79.t_CBReady], AR will be blocked. If this function is not required, the input
signal "CBx.79.CB_Healthy" may not be configured, and its logical state will be thought as "1"
by default.
⚫ [CBx.79.t_Wait_Chk]
The maximum waiting time of synchronism check.
It is valid only if the synchronism check mode is selected. If the synchronism check condition
is not met after the delay time elapsed, the synchronism check failed and the auto-reclosing
will be blocked.
Recommended value: 10 s.
⚫ [CBx.79.t_Reclaim]
3
The reclaim time after operation of AR.
With the assignment of closing command, AR goes into the reclaim state. During this time, it
is decided if the current reclosing cycle was successful or not.
During the reclaim time, if no further tripping occurs, the currently running AR cycle was
successful. If another tripping occurs, the currently running AR cycle was not successful. If
other AR cycles are permitted, one of these cycles will be used to continue the process. In
contrast, if the currently executed cycle was the last permissible cycle, the AR process ends
and is reported as unsuccessful.
⚫ [CBx.79.t_DDO_Blk]
The dropout time delay of blocking AR
When the blocking signal disappears, the AR blocking condition drops out after this time delay.
⚫ [CBx.79.t_AddDly]
The additional time delay of AR.
AR will be initiated by a tripping command. In the process of a channel abnormality, an internal

fault occurs on the transmission line, the backup protection at both ends of line will operate to
trip the circuit breaker at each end. The operation time of the backup protection at both ends
is possibly inconsistent. Meanwhile, the time delay of AR needs to consider the arc-
extinguishing and insulation recovery ability in case of transient fault. Thus, the time delay of
AR shall be considered comprehensively according to the operation time of protection at both
ends. When the communication channel of main protection is abnormal (the input signal

"CBx.79.PLC_Lost" is energized), and the setting [CBx.79.En_AddDly] is set as "Enabled", the

dead time delay of AR shall be equal to the original dead time delay of AR plus the extra time
delay [CBx.79.t_AddDly], so as to ensure the recovery of insulation intensity of fault point when
reclosing after transient fault. This extra time delay [CBx.79.t_AddDly] is only valid for the first
shot AR. This time should consider the operation time difference between both ends.
⚫ [CBx.79.t_WaitMaster]
The maximum waiting time of reclosing permission signal from master AR.
To prevent further impacts by slave AR reclosing, the output signal "CBx.79.WaitToSlave" of

master AR is usually configured to be the signal "CBx.79.WaitMaster" of slave AR. Slave AR
is permitted to reclose only if master AR has reclosed successfully.
This setting is invalid if the setting [CBx.79.Opt_Priority] is set as "None".

3
⚫ [CBx.79.t_SecFault]
The time delay of discriminating another fault in AR process. The timer starts after 1-pole AR
initiation. If another fault happens during this time delay, 3-pole AR will be initiated. If another
fault happens after this time delay, It will be recognized as the second fault and AR will be
blocked if the setting [CBx.79.En_PDF_Blk] is set as "Enabled".
⚫ [CBx.79.t_PersistTrp]
The time delay of excessive trip signal to block AR.
For overhead line fault, the relevant circuit breakers will be tripped normally. After that the fault
is cleared, the tripping command will drop off immediately. In case of circuit breaker failures,
the tripping signal maintains and exceeds the time delay [CBx.79.t_PersistTrp], AR will be
blocked. This setting should be longer than the longest tripping time of circuit breaker plus
safety margin.
⚫ [CBx.79.t_Fail]
The waiting time of CB closing position to confirm the success of reclosing.
The setting should be greater than the operation time of circuit breaker reclosing. This time will
be valid if the setting [CBx.79.En_FailCheck] is set as "Enabled".
During the waiting time, if CB remains open, the currently running AR cycle is unsuccessful.
The AR process will end and the device will issue the signal "CBx.79.Fail_Rcls" to indicate the
reclosing failure. AR will not change to the ready state unless the circuit breaker position drops
off, and can only begin to change to the ready state again after the circuit breaker is closed.

⚫ [CBx.79.t_PW]
The pulse width of AR closing signal
The setting should be set according to actual requirements. If there is no tripping latch circuit,
the setting value should be greater than the reclosing time of circuit breaker.
For a circuit breaker without anti-pump interlock, the setting [CBx.79.En_CutPulse] is available
to control the reclosing pulse. When this function is enabled, if the device operates to trip during
reclosing, the reclosing pulse will drop off immediately, so as to prevent multi-shot reclosing
onto fault.
⚫ [CBx.79.En_AddDly]
3 Enabling/Disabling AR with an additional dead time delay.
Please refer to the setting principle of [CBx.79.t_AddDly].
⚫ [CBx.79.En_FailCheck]
Enabling/Disabling the confirmation of AR success by checking CB status.
⚫ [CBx.79.En_PDF_Blk]
Enabling/Disabling the AR blocking by fault under pole discrepancy condition.
Please refer to the setting principle of [CBx.79.t_SecFault].
⚫ [CBx.79.En_CutPulse]
Enabling/Disabling the length adjustment of reclosing pulse.
Please refer to the setting principle of [CBx.79.t_PW].
⚫ [CBx.79.En]
Enabling/Disabling auto-reclosing function.
⚫ [CBx.79.Opt_Enable]
Option of AR enabling/disabling mode
➢ Setting: the mode only depends on the setting [CBx.79.En].
➢ Setting&Config: the mode depends on both the setting [CBx.79.En] and external binary
input which could be configured via the PCS-Studio configuration tool.
For the "Setting&Config" mode, AR can be enabled if the following conditions are all satisfied:
➢ [CBx.79.En] = Enabled;
➢ "CBx.79.Enable" is energized;

➢ "CBx.79.Block" is de-energized.
⚫ [CBx.79.En_CBInit]
Enabling/Disabling the AR initiation by CB opening position.
Under normal conditions, when AR is ready to reclose, it will be initiated if the circuit breaker
is open and the corresponding phase current is null. Besides, the 1-pole and 3-pole initiation
of AR are optional.
⚫ [CBx.79.Opt_ValidMode]
The control option of AR mode
➢ Config: select AR mode by the configuration signals "CBx.79.Sel_1PAR",

"CBx.79.Sel_3PAR" and "CBx.79.Sel_1P/3PAR"
➢ Setting: select AR mode by settings [CBx.79.En_1PAR], [CBx.79.En_3PAR] and 3

[CBx.79.En_1P/3PAR]
⚫ [CBx.79.En_1P]
Enabling/Disabling 1-pole AR mode
Recommended value: Disabled
⚫ [CBx.79.En_3P]
Enabling/Disabling 3-pole AR mode
Recommended value: Disabled
⚫ [CBx.79.En_1P/3P]
Enabling/Disabling 1/3-pole AR mode.
Recommended value: Enabled
⚫ [CBx.79.Opt_Priority]
The option of AR priority
The setting is especially adopted for the sequence CB reclosing in one and a half breakers
application scenario.
➢ None: single breaker arrangement
➢ High: master AR in double breakers arrangement
➢ Low: slave AR in double breakers arrangement
The output signal "CBx.79.WaitToSlave" of master AR will usually be configured to the input
signal "CBx.79.WaitMaster" of slave AR. Slave AR is permitted to reclose only if master AR
has reclosed successfully.

⚫ [CBx.79.Opt_RSYN_ValidMode]
The control option of the synchronism check mode of AR
➢ Config: select the synchronism check mode by the configuration signals

"CBx.79.Sel_SynChk", "CBx.79.Sel_SynDd_RefDd", "CBx.79.Sel_SynLv_RefDd",
"CBx.79.Sel_SynDd_RefLv" and "CBx.79.Sel_NoChk"
➢ Setting: select the synchronism check mode of AR by the settings [CBx.79.En_SynChk],

[CBx.79.En_SynDd_RefDd], [CBx.79.En_SynLv_RefDd], [CBx.79.En_SynDd_RefLv] and
[CBx.79.En_NoChk]
⚫ [CBx.79.En_SynChk]
Enabling/Disabling the synchronization check of AR synchronism check
3 ⚫ [CBx.79.En_SynDd_RefDd]
Enabling/Disabling the dead charge check for both the synchronization voltage and the
reference voltage of AR synchronism check
⚫ [CBx.79.En_SynLv_RefDd]
Enabling/Disabling the live charge check for the synchronization voltage and the dead charge
check for the reference voltage of AR synchronism check
⚫ [CBx.79.En_SynDd_RefLv]
Enabling/Disabling the dead charge check for the synchronization voltage and the live charge
check for the reference voltage of AR synchronism check
⚫ CBx.79.En_NoChk
Enabling/Disabling the no check mode of AR synchronism check

4 Control Settings
4 Control Settings
Table of Contents
4.1 Synchronism Check Settings .............................................................................................. 4-1
4.1.1 Settings List .......................................................................................................................... 4-1
4.2 Voltage Selection ................................................................................................................... 4-4
4.2.1 Settings List .......................................................................................................................... 4-5
4.3 Double Point Status Settings ............................................................................................... 4-5
4.3.1 Settings List .......................................................................................................................... 4-5
4.4 Control Settings .................................................................................................................... 4-6

4
4.4.1 Settings List .......................................................................................................................... 4-6
4.5 Tap Position Indicator Settings ........................................................................................... 4-8
4.5.1 Settings List .......................................................................................................................... 4-8
4.6 Interlocking Logic Settings ................................................................................................ 4-13
4.6.1 Settings List ........................................................................................................................ 4-13
4.6.2 Setting Principle ................................................................................................................. 4-14
4.7 Automatic Tap Changer Control Settings ......................................................................... 4-14
4.7.1 Settings List ........................................................................................................................ 4-14
4.8 Parallel Voltage Regulation Settings ................................................................................. 4-18
4.8.1 Settings List ........................................................................................................................ 4-18

4 Control Settings

4 Control Settings
4.1 Synchronism Check Settings

Settings for different circuit breakers (CB**) and multiple setting groups may be available. Their
values in each group are set independently.
4.1.1 Settings List
Device LCD: Main Menu  Settings  Meas Control Settings  Syn Settings
PCS-Studio: Project Node  IED Node  Setting  Group* Meas Control Settings  Syn
Settings
Setting
CB**.25.Opt_ValidMode
Config
Disabled
CB**.25.En_SynChk
Enabled
Disabled
CB**.25.En_DdChk
Enabled
4
CB**.25.U_UV 0.00~100.00 0.01 %
CB**.25.U_OV 100.00~170.00 0.01 %
CB**.25.f_UF 0.000~65.000 0.001 Hz
CB**.25.f_OF 0.000~65.000 0.001 Hz
Ua
Ub
Uc
CB**.25.Opt_U_SynChk
Uab
Ubc
Uca
CB**.25.U_Diff_Set 0.00~100.00 0.01 V
Disabled
CB**.25.En_f_Diff_Chk
Enabled
CB**.25.f_Diff_Set 0.00~2.00 0.01 Hz
Disabled
CB**.25.En_df/dt_Chk
Enabled
CB**.25.df/dt_Set 0.00~2.00 0.01 Hz/s
CB**.25.phi_Diff_Set 0.00~180.00 0.01 °
CB**.25.phi_Comp 0.00~360.00 0.01 °

4 Control Settings
SynDdRefDd
SynLvRefDd
SynDdRefLv
CB**.25.Opt_Mode_DdChk RefDd
SynDd
SynLvRefDd/SynDdRefLv
AnySideDd
CB**.25.U_DdChk 0.00~100.00 0.01 V
CB**.25.U_LvChk 0.00~100.00 0.01 V
CB**.25.t_Reset 0~60 1 s
CB**.25.t_Close_CB 0~2000 1 ms
⚫ [CB**.25.Opt_ValidMode]
4 The option of the decision mode of synchronism check
➢ Setting: the mode depends on the setting values of [CB**.25.En_SynChk] and

[CB**.25.En_DdChk];
➢ Config: the mode depends on the input signal values of "in_syn_chk" and "in_vol_chk" in
the functional bloc via the configuration tool PCS-Studio.
⚫ [CB**.25.En_SynChk]
Enabling/Disabling the synchro-check mode (valid when [CB**.25.Opt_ValidMode] = Setting)
⚫ [CB**.25.En_DdChk]
Enabling/Disabling the dead charge check mode (valid when [CB**.25.Opt_ValidMode] =

Setting)
⚫ [CB**.25.U_UV]
The lower limit (in percentage) of voltage to block CB synchronous closing
Recommended value: 80.00% Un
⚫ [CB**.25.U_OV]
The upper limit (in percentage) of voltage to block CB synchronous closing
Recommended value: 170.00% Un
⚫ [CB**.25.f_UF]
The lower limit of frequency to block CB synchronous closing

4 Control Settings
Recommended value: 45.000 Hz
⚫ [CB**.25.f_OF]
The upper limit of frequency to block CB synchronous closing
⚫ [CB**.25.Opt_U_SynChk]
The option of single-phase or phase-phase voltage in synchronism check (valid when the
synchronization side or the reference side voltage is three-phase)
⚫ [CB**.25.U_Diff_Set]
The threshold of the voltage difference in synchro-check
Recommended value: 10.00 V
⚫ [CB**.25.En_f_Diff_Chk]
Enabling/Disabling the frequency difference check
⚫ [CB**.25.f_Diff_Set]
4
The threshold of the frequency difference in synchro-check
⚫ [CB**.25.En_df/dt_Chk]
Enabling/Disabling the frequency variation difference check
⚫ [CB**.25.df/dt_Set]
The threshold of the frequency variation in synchro-check
Recommended value: 1.00 Hz/s
⚫ [CB**.25.phi_Diff_Set]
The threshold of the phase difference in synchro-check
Recommended value: 15.00 degree
⚫ [CB**.25.phi_Comp]
The compensation angle of phase difference in synchro-check
⚫ [CB**.25.Opt_Mode_DdChk]
The option of the dead charge check mode
Setting Value Dead charge check mode
SynDdRefDd Dead check for both the reference and the synchronous

4 Control Settings
Setting Value Dead charge check mode
sides
Live check for synchronous side and dead check for

SynLvRefDd
reference side
Dead check for synchronous side and live check for

SynDdRefLv
reference side
RefDd Dead check for reference side
SynDd Dead check for synchronous side
SynLvRefDd/SynDdRefLv Option 2 or 3
AnySideDd Option 1, 2 or 3
⚫ [CB**.25.U_DdChk]
The threshold of the dead voltage in dead charge check

4 ⚫ [CB**.25.U_LvChk]
The threshold of the live voltage in dead charge check
⚫ [CB**.25.t_Reset]
The time window to check the synchronous closing criteria
The window starts from the receiving moment of synchronous closing command and ends when
all synchronous closing criteria are met or timeout. The timeout causes the synchronism check
failure.
Recommended value: 5 seconds
⚫ [CB**.25.t_Close_CB]
The time window to check the CB closing operation
The window starts from the receiving moment of synchronous closing command and ends when
CB status changes to be closing.
Set according to the CB mechanism operating time.
Recommended value: 20 ms
4.2 Voltage Selection

Settings for different circuit breakers (CB**) may be available.

4 Control Settings
4.2.1 Settings List
Device LCD: Main Menu  Settings  Global Settings  System Settings
PCS-Studio: Project Node  IED Node  Setting  Global Global Settings  System
Settings
NoVoltSel, DblBusOneCB, one-and-halfBusCB, one-and-

CB**.VoltSel.Opt_CBConfig
halfTieCB
⚫ [CB**.VoltSel.Opt_CBConfig]
The option of CB application scenarios for voltage selection
When “NoVoltSel” is selected, the voltage selection logic is disabled.
Set according to the site CB arrangement.
4.3 Double Point Status Settings

4
Settings for different circuit breakers (CB**), disconnectors (DS**) may be available.
4.3.1 Settings List
Device LCD: Main Menu  Settings  Meas Control Settings  DPS Settings
PCS-Studio: Project Node  IED Node  Setting  Global  Meas Control Settings  DPS
Settings
CB**.DPS.t_DPU 0~60000 1 ms
CB**.DPS.En_Alm Disabled or Enabled
CB**.DPS.t_Alm 0~60000 1 ms
DS**.DPS.t_DPU 0~60000 1 ms
DS**.DPS.En_Alm Disabled or Enabled
DS**.DPS.t_Alm 0~60000 1 ms
⚫ [CB**.DPS.t_DPU]
The Delay PickUp (DPU) time, i.e. debounce time, of CB DPS
The setting value should be greater than the CB operating time to avoid the intermediate state
in the process of CB opening or closing.

4 Control Settings
⚫ [CB**.DPS.En_Alm]
Enabling/Disabling alarm when CB DPS_BAD or DPS_INT appears
⚫ [CB**.DPS.t_Alm]
The delay of CB DPS alarm
⚫ [DS**.DPS.t_DPU]
The Delay PickUp (DPU) time, i.e. debounce time, of DS DPS
The setting value should be greater than the DS operating time to avoid the intermediate state
in the process of DS opening or closing.
⚫ [DS**.DPS.En_Alm]
4 Enabling/Disabling alarm when DS DPS_BAD or DPS_INT appears
⚫ [DS**.DPS.t_Alm]
The delay of DS DPS alarm
4.4 Control Settings

Settings for different circuit breakers (CB**), disconnectors (DS**) and direct control objects
(DirCtrl**) may be available.
4.4.1 Settings List
Device LCD: Main Menu  Settings  Meas Control Settings  Control Settings
PCS-Studio: Project Node  IED Node  Setting  Global  Meas Control Settings 
Control Settings
CB**.t_PW_Opn 0~60000 1 ms
CB**.t_PW_Cls 0~60000 1 ms
DS**.t_PW_Opn 0~60000 1 ms
DS**.t_PW_Cls 0~60000 1 ms
DirCtrl**.t_PW_Opn 0~60000 1 ms

4 Control Settings
DirCtrl**.t_PW_Cls 0~60000 1 ms
⚫ [CB**.t_PW_Opn]
The Pulse Width (PW), i.e. holding time, of CB opening output
The setting value should be long enough to start the relay in the CB opening circuit.
⚫ [CB**.t_PW_Cls]
The Pulse Width (PW), i.e. holding time, of CB closing output
The setting value should be long enough to start the relay in the CB closing circuit.
⚫ [DS**.t_PW_Opn]
The Pulse Width (PW), i.e. holding time, of DS opening output 4

The setting value should be long enough to start the relay in the DS opening circuit.
⚫ [DS**.t_PW_Cls]
The Pulse Width (PW), i.e. holding time, of DS closing output
The setting value should be long enough to start the relay in the DS closing circuit.
⚫ [DirCtrl**.t_PW_Opn]
The Pulse Width (PW), i.e. holding time, of direct control opening output
The setting value should be long enough to start the relay in the direct control opening circuit.
⚫ [DirCtrl**.t_PW_Cls]
The Pulse Width (PW), i.e. holding time, of direct control closing output
The setting value should be long enough to start the relay in the direct control closing circuit.

4 Control Settings
4.5 Tap Position Indicator Settings
4.5.1 Settings List
Device LCD: Main Menu  Settings  Meas Control Settings  TP Settings
PCS-Studio: Project Node  IED Node  Setting  Global  Meas Control Settings  TP
Settings
Resv,
BCD,
Carry,
84.Opt_Code
Independent,
BCD-PhSeg,
Independent-PhSeg
84.t_DPU 0~6000 1 ms
84.En_RunawayTrip Disabled or Enabled

4 84.t_RunawayTrip 0~6000 1 ms
84.Num_AI_Segment 0~48 1
84.Rated_AI_Segment** -220.00~220.00 0.01
84.Devn_AI_Segment** 0.00~100.00 0.01 %
84.Value_Segment** -50~50 1
Device LCD: Main Menu  Settings  Meas Control Settings  Control Settings
Control Settings
84CSWI1.t_PW_Opn 0~60000 1 ms
84CSWI1.t_PW_Cls 0~60000 1 ms
84CSWI2.t_PW_Opn 0~60000 1 ms
84CSWI2.t_PW_Cls 0~60000 1 ms
Device LCD: Main Menu  Settings  Meas Control Settings  Interlock Settings
Interlock Settings

4 Control Settings
84CSWI1.En_CILO_Opn Disabled or Enabled
84CSWI1.En_CILO_Cls Disabled or Enabled
84CSWI2.En_CILO_Opn Disabled or Enabled
84CSWI2.En_CILO_Cls Disabled or Enabled
⚫ [84.Opt_Code]
The option of the input code of tap position indication (TPI)
➢ Resv: direct input or DC analogue channel
➢ BCD: 6-bit BCD for max. 39 positions
Max. 39 positions, Example: 17 = 01 0111 (BI_06 -> BI_01)
Validation condition (AND):
The lower 4 bits represent a decimal number which is smaller than 9; 4

At least one of the 6 bits appear to be 1.
No. Input Signal Description
1 84.in_tap01
2 84.in_tap02
Decimal number 0~9 of units
3 84.in_tap03
4 84.in_tap04
5 84.in_tap05
Decimal number 0~3 of tens
6 84.in_tap06
➢ Carry: 13-bit carry inputs for max. 29 positions
Max. 29 positions, Example: 17 = 011 0001 0000 00 (BI_13 -> BI_01)
Validation condition (AND):
Only one of the higher 3 bits, which represent units, tens and twenties, appear to be 1;
Only one of the lower 10 bits, which represent decimal numbers, appear to be 1.
**: 01~10
1 84.in_tap**

4 Control Settings
Validation for decimal number of units

2 84.in_tap11 1: valid
0: invalid
Validation for decimal number of tens

0: invalid
Validation for decimal number of twenties

0: invalid
➢ Independent: 26-bit independent contacts for max. 26 positions
Max. 26 positions, Example: 17 = 0000 0000 0100 0000 0000 0000 00 (BI_26 -> BI_01)
Validation condition:
Only one of the 26 bits appear to be 1.
4 No. Input Signal Description
**: 01~26
1 84.in_tap** Decimal number 1~26
If all inputs are "0", they represent the decimal number 0
➢ BCD-PhSeq: 18-bit BCD for max. 39 phase-segregated positions
Max. 39 positions, Example: 17 = 01 0111 (BI_06 -> BI_01 and BI_12 -> BI_07 and
BI_18 -> BI_13)
Validation condition (AND, for each phase):
The lower 4 bits represent a decimal number which is smaller than 9;
At least one of the 6 bits appear to be 1.
Input Signal
No. Description
Phase A Phase B Phase C
1 84.in_tap01 84.in_tap07 84.in_tap13

3 84.in_tap05 84.in_tap11 84.in_tap17 Decimal number 0~3 of tens

4 Control Settings
Input Signal
No. Description
Phase A Phase B Phase C
➢ Independent-PhSeq: 24-bit independent contacts for max. 8 phase-segregated

positions
Max. 8 positions, Example: 7 = 0100 0000 (BI_08 -> BI_01 and BI_16 -> BI_09 and
BI_24 -> BI_17)
Validation condition (for each phase):
Only one of the 8 bits appear to be 1.
Phase A decimal number 1~8

1 84.in_tap** **: 01~08
Phase B decimal number 1~8

2 84.in_tap** **: 09~16
If all inputs are "0", they represent the decimal number 0 4
Phase C decimal number 1~8
3 84.in_tap** **: 17~24
⚫ [84.t_DPU]
The Delay PickUp (DPU) time, i.e. debounce time, of TPI
The setting value should be greater than the operating time to avoid the intermediate state in
the process of tap change.
⚫ [84.En_RunawayTrip]
Enabling/Disabling the trip of tap changer motor power supply during the situation "Tap
runaway"
⚫ [84.t_RunawayTrip]
The holding time of output signal for the trip of tap changer motor power supply during the
situation "Tap runaway"
⚫ [84.Num_AI_Segment]
The number of the defined segments, i.e. tap positions, in the DC analog input range of TPI
For the DC analog input mode [84.Opt_Code] = Resv, the indicator adopts a channel of DCAI

4 Control Settings
module as the input. By parameterization, the DC analog input range could be defined into
several step segments which correspond to different tap positions. Thus, the input is converted
into three-phase tap position indication.
TPI
DCAI
R-Δ R R+Δ
Figure 4.5-1 Diagram of conversion from DC analog input to TPI

In the above diagram of conversion, take the second segment as an example:
R is [84.Rated_AI_Segment02] that defines the rated value of DC analog input in segment No.2.
Δ is [84.Devn_AI_Segment02] that defines the corresponding deviation.
4 The [84.Value_Segment02] = 9 is set to indicate that an input within this second segment, which
is defined in the range (R-Δ, R+Δ), represents the tap position 9.
Similarly, the first segment is defined to present TPI 3 and the third segment is defined to
present TPI 5.
Beside, [84.Num_AI_Segment] should be defined to involve the maximum number of possible

tap position indication.
⚫ [84.Rated_AI_Segment**]
The rated value corresponding to the No.** segment in DC analog input range of TPI
⚫ [84.Devn_AI_Segment**]
The rated value deviation corresponding to the No.** segment in DC analog input range of TPI
⚫ [84.Value_Segment**]
The TPI number of the No.** segment in DC analog input range
Set according to the correspondence between the TPI number and the segment.
⚫ [84CSWI1.t_PW_Opn]
The Pulse Width (PW), i.e. holding time, of tap changer descending output
The setting value should be long enough to start the relay in the tap changer descending circuit.

4 Control Settings
⚫ [84CSWI1.t_PW_Cls]
The Pulse Width (PW), i.e. holding time, of tap changer raising output
The setting value should be long enough to start the relay in the tap changer rasising circuit.
⚫ [84CSWI2.t_PW_Opn]
The Pulse Width (PW), i.e. holding time, of tap changer emergency stop output
The setting value should be long enough to start the relay in the tap changer emergency stop
circuit.
⚫ [84CSWI2.t_PW_Cls]
Reserved
⚫ [84CSWI1.En_CILO_Opn]
Enabling/Disabling interlocking logic control of the tap changer descending output

4
⚫ [84CSWI1.En_CILO_Cls]
Enabling/Disabling interlocking logic control of the tap changer raising output
⚫ [84CSWI2.En_CILO_Opn]
Enabling/Disabling interlocking logic control of the tap changer emergency stop output
⚫ [84CSWI2.En_CILO_Cls]
Reserved
4.6 Interlocking Logic Settings

Settings for different circuit breakers (CB**), disconnectors (DS**) and direct control objects
(DirCtrl**) may be available.
4.6.1 Settings List
Device LCD: Main Menu  Settings  Meas Control Settings  Interlock Settings
Interlock Settings
CB**.En_CILO_Opn Disabled or Enabled
CB**.En_CILO_Cls Disabled or Enabled

4 Control Settings
DS**.En_CILO_Opn Disabled or Enabled
DS**.En_CILO_Cls Disabled or Enabled
DirCtrl**.En_CILO_Opn Disabled or Enabled
DirCtrl**.En_CILO_Cls Disabled or Enabled
⚫ [CB**.En_CILO_Opn]
Enabling/Disabling interlocking logic control of CB opening output
⚫ [CB**.En_CILO_Cls]
Enabling/Disabling interlocking logic control of CB closing output
⚫ [DS**.En_CILO_Opn]
Enabling/Disabling interlocking logic control of DS opening output
4 ⚫ [DS**.En_CILO_Cls]
Enabling/Disabling interlocking logic control of DS closing output
⚫ [DirCtrl**.En_CILO_Opn]
Enabling/Disabling interlocking logic control of direct control opening output
⚫ [DirCtrl**.En_CILO_Cls]
Enabling/Disabling interlocking logic control of direct control closing output
4.7 Automatic Tap Changer Control Settings
4.7.1 Settings List
Device LCD: Main Menu  Settings  Meas Control Settings  ATCC Settings
PCS-Studio: Project Node  IED Node  Setting  Global  Meas Control Settings  ATCC
Settings
90V.U_Target_1 0.00~160.00 0.01 V
90V.U_Target_2 0.00~160.00 0.01 V
90V.U_Target_3 0.00~160.00 0.01 V
90V.U_Target_4 0.00~160.00 0.01 V
90V.U_Bandwidth 0.10~30.00 0.01 %

4 Control Settings
Ua
Ub
Uc
90V.Opt_U
Uab
Ubc
Uca
90V.TP_Max 0~64 1
90V.TP_Min 0~64 1
90V.U_UV 0.00~150.00 0.01 V
Disabled
90V.En_Alm_UV
Enabled
Disabled
90V.En_UV_Blk
Enabled
90V.U_OV 0.00~150.00 0.01 V
Disabled
4
90V.En_Alm_OV
Enabled
Disabled
90V.En_OV_Blk
Enabled
90V.I_OC 0.00~100.00 0.01 A
Disabled
90V.En_Alm_OC
Enabled
Disabled
90V.En_OC_Blk
Enabled
Disabled
90V.En_IDMT
Enabled
90V.t1_Intvl 0~600 1 s
90V.t2_Intvl 0~600 1 s
Disabled
90V.En_LDCRX
Enabled
90V.X_LDC -100.00~100.00 0.01 ohm
90V.R_LDC 0~100.00 0.01 ohm
90V.t_ReguFail 0~3600 1 s
90V.Num_Regu 1~1000 1

4 Control Settings
90V.t_Period_Regu 1~24 1 h
⚫ [90V.U_Target_*]
The ATCC target voltage values (secondary value)
⚫ [90V.U_Bandwidth]
The permissive bandwidth of the ATCC target voltage
The ATCC process shall be initiated when the regulated voltage is out of the bandwidth.
⚫ [90V.Opt_U]
The phase option of the target voltage
⚫ [90V.TP_Max]
The upper limit of the regulatable tap position range of ATCC
4 ⚫ [90V.TP_Min]
The lower limit of the regulatable tap position range of ATCC
⚫ [90V.U_UV]
The threshold of the ATCC undervoltage supervision function
⚫ [90V.En_Alm_UV]
Enabling/Disabling the alarm function by ATCC undervoltage situation
⚫ [90V.En_UV_Blk]
Enabling/Disabling the blocking function by ATCC undervoltage
⚫ [90V.U_OV]
The threshold of ATCC overvoltage
⚫ [90V.En_Alm_OV]
Enabling/Disabling the alarm function by ATCC overvoltage
⚫ [90V.En_OV_Blk]
Enabling/Disabling the blocking function by ATCC overvoltage
⚫ [90V.I_OC]
The threshold of ATCC overcurrent

4 Control Settings
⚫ [90V.En_Alm_OC]
Enabling/Disabling the alarm function by ATCC overcurrent
⚫ [90V.En_OC_Blk]
Enabling/Disabling the blocking function by ATCC overcurrent
⚫ [90V.En_IDMT]
Enabling/Disabling the inverse-time characteristic of the ATCC initial command
⚫ [90V.t1_Intvl]
The delay 1 of ATCC operation
⚫ [90V.t2_Intvl]
The delay 2 of ATCC operation
⚫ [90V.En_LDCRX] 4
Enabling/Disabling the line voltage drop compensation function of ATCC
⚫ [90V.X_LDC]
The line reactance of the line voltage drop compensation of ATCC
The setting value is converted according to the secondary values.
Ratio_CT
X Sec = X Pri ×
Ratio_VT
⚫ [90V.R_LDC]
The line resistance of the line voltage drop compensation of ATCC
⚫ [90V.t_ReguFail]
The judging period of ATCC failure
⚫ [90V.Num_Regu]
The limit of times of regulation in an ATCC process
⚫ [90V.t_Period_Regu]
The regulation period of an ATCC process
Recommended value: 24 hours

4 Control Settings
4.8 Parallel Voltage Regulation Settings
4.8.1 Settings List
Device LCD: Main Menu  Settings  Meas Control Settings  PVR Settings
PCS-Studio: Project Node  IED Node  Setting  Global  Meas Control Settings  PVR
Settings
PVR.t_Wait 0~60 1 s
PVR.t_Stable 0~60 1 s
PVR.t_UnmatchedTP 0~30 1 s
Forward
PVR.Opt_Dir_TP
Reverse
4 ⚫ [PVR.t_Wait]
The waiting time of a tap changer operation of PVR
⚫ [PVR.t_Stable]
The waiting time of the stable state of PVR
⚫ [PVR.t_UnmatchedTP]
The debounce time of the TPI consistency judgement of PVR
⚫ [PVR.Opt_Dir_TP]
The option of the tap change sequence of PVR

5 Measurement Settings
Table of Contents
5.1 Function Settings .................................................................................................................. 5-1
5.1.1 Settings List .......................................................................................................................... 5-1
5.2 DC Measuring Transducer Settings .................................................................................... 5-3
5.2.1 Settings List .......................................................................................................................... 5-3
5.3 DC Analogue Output Settings .............................................................................................. 5-4
5.3.1 Settings List .......................................................................................................................... 5-4
5.4 Energy Metering Settings ..................................................................................................... 5-5
5.4.1 Settings List .......................................................................................................................... 5-5


5.1 Function Settings

Settings for different bays or other measurement objects (XXXX) and for different DC analogue
input modules (B**) may be available.
5.1.1 Settings List
Device LCD: Main Menu  Settings  Meas Control Settings  Function Settings
Function Settings
XXXX.En_Alm_ROV Disabled or Enabled
XXXX.3U0_Alm_ROV 0.0~100.0 %Un
XXXX.En_Alm_ROC Disabled or Enabled
XXXX.3I0_Alm_ROC 0.0~100.0 %In
XXXX.En_Alm_UV Disabled or Enabled
XXXX.U_Alm_UV 0.0~100.0 %Un
XXXX.Opt_CT_Measmt Ia-Ib-Ic or Ia-Ic
XXXX.ZeroDrift_U 0.00~1.00 0.01 %

5
XXXX.ZeroDrift_I 0.00~1.00 0.01 %
XXXX.ZeroDrift_PQ 0.00~1.00 0.01 %
Syn.ZeroDrift_U 0.00~1.00 0.01 %
B**.ZeroDrift 0.00~1.00 0.01 %
⚫ [XXXX.En_Alm_ROV]
Enabling/Disabling the residual overvoltage supervision function
⚫ [XXXX.3U0_Alm_ROV]
The alarm threshold (in percentage of the rated voltage) of residual overvoltage supervision
(calculated value)
⚫ [XXXX.En_Alm_ROC]
Enabling/Disabling the residual overcurrent supervision function

⚫ [XXXX.3I0_Alm_ROC]
The alarm threshold (in percentage of the rated current) of residual overcurrent supervision
(calculated value)
Recommended value: 10.0 %In
⚫ [XXXX.En_Alm_UV]
Enabling/Disabling the undervoltage supervision function
⚫ [XXXX.U_Alm_UV]
The alarm threshold (in percentage of the rated voltage) of undervoltage supervision
⚫ [XXXX.Opt_CT_Measmt]
The option of the measurement CT connection mode
Ia-Ib-Ic: three-phase mode;
Ia-Ic: Ib is calculated according to Ia and Ic, → = −(→ + →).

𝐼𝑏 𝐼𝑎 𝐼𝑐
⚫ [XXXX.ZeroDrift_U]
The zero-drift threshold (in percentage of the rated voltage) of the three-phase voltage
5 sampling
Due to temperature or other environmental factors, a sampled value that is less than this
setting will be regarded as a zero drift and ignored.
Recommended value: 0.20 %
⚫ [XXXX.ZeroDrift_I]
The zero-drift threshold (in percentage of the rated current) of the three-phase current
sampling
⚫ [XXXX.ZeroDrift_PQ]
The zero-drift threshold (in percentage of the rated power) of the calculated active and
reactive power
Due to temperature or other environmental factors, a calculated value that is less than this

⚫ [Syn.ZeroDrift_U]
The zero-drift threshold (in percentage of the rated voltage) of the single-phase voltage
sampling
⚫ [Bxx.ZeroDrift]
The zero-drift threshold (in percentage of the upper limit of the DC input range, i.e. 20mA or
10V) of the DC analogue sampling by the DCAI module in the No.xx slot
Due to temperature or other environmental factors, a sampled value less than this setting will
be regarded as a zero drift and ignored.
5.2 DC Measuring Transducer Settings

Settings for different DC analogue input modules (B**) may be available.
5.2.1 Settings List
Device LCD: Main Menu  Settings  Meas Control Settings DCAI Settings
5
PCS-Studio: Project Node  IED Node  Setting  Global  Meas Control Settings  DCAI
Settings
0~10V
B**.DCAI.Opt_Type_Transducer**
0~20mA
B**.DCAI.Min_Transducer** -60000~60000 1
B**.DCAI.Max_Transducer** -60000~60000 1
⚫ [B**.DCAI.Opt_Type_Transducer**]
The option of the DC analogue input type
Set according to transducer type.
⚫ [B**.DCAI.Min_Transducer**], [B**.DCAI.Max_Transducer**]
The lower and the upper limits of the DC analogue input range corresponding to the original

physical quantity
A DC measuring transducer input typically converts a value which represents a physical

quantity such as temperature or pressure. Therefore, a characteristic curve that assigns the
physical quantity to the DC analogue value is necessary. The following figure shows an
example.
Temperature (⁰C)
Tmax
P
Tmin Tp
ITransd (mA)
ip 20
O
Figure 5.2-1 Characteristic curve of a DC measuring transducer input

In this example, the setting of the range for the scaled value goes from a usable range of 0mA
5 to +20mA. The measured value 0mA means a temperature of Tmin which is defined by the
setting [B**.DCAI.Min_Transducer**] and the measured value 20mA signifies a temperature of
Tmax which is defined by the setting [B**.DCAI.Max_Transducer**]. Thus, for the actual point
P, the measured transducer current ip can be converted into a value of temperature.
5.3 DC Analogue Output Settings

Settings for different DC analogue output modules (B**) may be available.
5.3.1 Settings List
Device LCD: Main Menu  Settings  Meas Control Settings DCAOSettings
PCS-Studio: Project Node  IED Node  Setting  Global  Meas Control Settings  DCAO
Settings
4~20mA
0~10V
B**.DCAO**.Opt_Type_Regu
0~5V
0~20mA

B**.DCAO**.Min_Regu -60000~60000 1
B**.DCAO**.Max_Regu -60000~60000 1
⚫ [B**.DCAO**.Opt_Type_Regu]
The option of the DC analogue output type
Set according to regulated object type.
⚫ [B**.DCAO**.Min_Regu, B**.DCAO**.Max_Regu]
The lower and the upper limits of the DC analogue output range corresponding to the regulated
physical quantity
User may define the maximal and the minimal values of each DC analogue output channel to
create a characteristic curve that connects the physical quantities to DC analogue output values.
So as to simply the physical signification understanding. The following figure shows an example.
Output (mA)
20mA
DC output value
P
5
4mA
Regulation value
0
Min. Object Max.
Figure 5.3-1 Characteristic curve of a DC analogue output

In the example, the output range is defined as 4~20mA. The lower limit 4mA is related to the
minimal regulation value which is defined by the setting [B**.DCAO**.Min_Regu] while the
upper limit 20mA is related to the maximal regulation value which is defined by the setting
[B**.DCAO**.Max_Regu]. Thus, the regulation value can be converted into a corresponding
DC analogue output value between 4~20mA for the object point P.
5.4 Energy Metering Settings
5.4.1 Settings List
Device LCD: Main Menu  Settings  Meas Control Settings  Energy Metering Settings
PCS-Studio: Project Node  IED Node  Setting  Global  Meas Control Settings  Energy

Metering Settings
MMTR.U2n 1.00~120.00 0.01 V
MMTR.I2n 1.00~5.00 0.01 A
⚫ [MMTR.U2n]
The secondary rated voltage of metering
⚫ [MMTR.I2n]
The secondary rated current of metering

6 PMU Settings
6 PMU Settings
Table of Contents
6.1 PMU Global Settings ............................................................................................................. 6-1
6.1.1 Settings List .......................................................................................................................... 6-1
6.2 PMU Communication Settings ............................................................................................. 6-2
6.2.1 Settings List .......................................................................................................................... 6-2
6.3 PMU Bay Settings.................................................................................................................. 6-4
6.3.1 Settings List .......................................................................................................................... 6-4
6.4 PMU Binary Input Settings ................................................................................................... 6-6
6.4.1 Settings List .......................................................................................................................... 6-6
6.5 PMU Label Settings ............................................................................................................... 6-7
6.5.1 Settings List .......................................................................................................................... 6-7

6 PMU Settings

6 PMU Settings
6.1 PMU Global Settings
6.1.1 Settings List
Device LCD: Main Menu  Settings  PMU Settings  PMU Global Settings
PCS-Studio: Project Node  IED Node  Setting  Global  PMU Settings  PMU Global
Settings
Disabled
En_PMU
Enabled
P_Class
Opt_Class_PMU
M_Class
DataRate 10~120 1 fps
Substation_PMU Max. 16 characters
N_Chgd_CFG 0~65535 1
Port_TCP 0~65535 1
Port_UDP 1024~65535 1
⚫ [Opt_Class_PMU]
The option of the calculation method of synchrophasor data
➢ P_Class: the algorithm adopts a short-time window, so it has fast response speed and is
suitable for fast protection and control, but its ability to suppress the out-of-band signals is 6
poor.
➢ M_Class: the algorithm adopts a long-time window, so it has high accuracy for steady and
dynamic signal measurement and has the ability to suppress the out-of-band signals, but
its response speed is slower than that of P_Class.
⚫ [DataRate]
The transmission rate of synchrophasor data from PMU to superior equipment, such as PDC
or PMU master station
The rate is generally equal to or less than the rated frequency of power system.
For a 50Hz system: 100, 50, 25 or 10 frames per second.
For a 60Hz system: 120, 60, 30, 20, 15, 12 or 10 frames per second.

6 PMU Settings
⚫ [Substation_PMU]
The PMU station name
The name will be used in the CFG1 and CFG2 frames.
⚫ [N_Chgd_CFG]
The indication of changed times of CFG1
The initial setting value is 0, and it increases by 1 each time CFG1 is adjusted. For example,
changing the branch name or rating.
⚫ [Port_TCP]
The TCP port number of PMU based on the IEEE C37.118 standard
There are three kinds of communication modes available for PMU: TCP, UDP and TCP-UDP.
When adopting the TCP or TCP-UDP mode, the TCP port will be used. It is a global setting,
and the port values of all TCP clients should be consistent with the setting value.
The default port number of TCP is 4712, and it is invalid when adopting UDP communication.
⚫ [Port_UDP]
The UDP port number of PMU based on IEEE C37.118 standard
There are three kinds of communication modes available for PMU, TCP, UDP and TCP-UDP.
When adopting the UDP or TCP-UDP mode, the UDP port will be used. It is a global setting,
and the port values of all UDP receivers should be consistent with the setting value.
The default port number of UDP is 4713, and it is invalid when adopting TCP communication.
6 6.2 PMU Communication Settings
6.2.1 Settings List
Device LCD: Main Menu  Settings  PMU Settings  PMU Comm Settings  PDC** Settings
PCS-Studio: Project Node  IED Node  Setting  Global  PMU Comm Settings  PDC**
Settings
PDC**.Name Max. 20 characters
PDC**.IP_TCP 0.0.0.0~255.255.255.255
PDC**.IP_UDP_Dest 0.0.0.0~255.255.255.255
PDC**.IP_MulticastSrc 0.0.0.0~255.255.255.255
PDC**.Opt_Protocol None

6 PMU Settings

TCP
UDP
TCP-UDP
Unicast
PDC**.Opt_UDP Broadcast
Multicast
PDC**.IDCODE 1~65534
⚫ [PDC**.Name]
The configurable name of the PDC** for identification
The name length should not exceed 20 characters.
⚫ [PDC**.IP_TCP]
The IP address of the PDC** using the TCP communication protocol.
The IP address will be used when the communication mode adopts TCP or TCP-UDP. The
communication of PMU is based on whitelisting. Only when the IP address of TCP client has
been set in the PMU, the client has the right to communicate with PMU using TCP
communication protocol.
Set the IP address according to the site conditions. If the PDC does not exist or the TCP (or
TCP-UDP) mode is not adopted, the IP address can be set to “0.0.0.0”.
⚫ [PDC**.IP_UDP_Dest]
6
The destination IP address of the PDC** using the UDP communication protocol.
The address will be used when the communication mode adopts UDP or TCP-UDP. The PMU
transmits the UDP message to this address.
Set the IP address according to the site conditions. It may be a unicast address, a broadcast
address or a multicast address. It is noted that the IP address should be consistent with the
setting [PDC**.Opt_UDP].
⚫ [PDC**.IP_MulticastSrc]
The multicast source IP address of the PDC** using the UDP communication protocol.
It is consistent with certain IED IP address in the network. This network interface uses this IP
address to transmit UDP message to multicast groups. Since the IP address of the multicast
group and any network interface of the IED have the different network segments, this setting
essentially informs the PMU which network interface to send UDP multicast message.

6 PMU Settings
Set the IP address of the network interface to transmit UDP multicast message.
⚫ [PDC**.Opt_Protocol]
The option of the communication protocol of the PDC**
➢ None: no communication between PDC and PMU.
➢ TCP: TCP for the transmission of configuration frame, command frame and data frame.
➢ UDP: UDP for the transmission of configuration frame, command frame and data frame.
➢ TCP-UDP: TCP for the transmission of configuration frame and command frame; UDP for
the transmission of data frame.
Set according to the site requirements and the setting value should be consistent with that of
the PDC at the opposite end.
⚫ [PDC**.Opt_UDP]
The option of the transmission type using the UDP communication protocol
Set according to the site requirements. For the communication with a PCS-996S-G PDC of NR,
the TCP mode is recommended. For the communication with third party devices, the multicast
mode is recommended.
⚫ [PDC**.IDCODE]
The ID number of the PDC** for identification in protocol
Set according to the site conditions. The setting should be consistent with the IDCODE of the
PDC at the opposite end.
6 6.3 PMU Bay Settings

The prefix ”xx” in the following settings is configurable by the setting value of [Name_PMUBay].
6.3.1 Settings List
Device LCD: Main Menu  Settings  PMU Settings  PMUBay Settings
PCS-Studio: Project Node  IED Node  Setting  Global  PMU Settings  PMUBay
Settings
Name_PMUBay Max. 12 characters
xx.U1n 0.001~1000.000 0.001 kV
xx.I1n 0.1~20000.0 0.1 A
xx.Opt_UnitType None 1

6 PMU Settings

Bay
Bus(U_3P)
Bus(U_1P)
U1
Ua
xx.Opt_U_MeasFreq 1
Ub
Uc
Disabled
xx.En_TrigDFR
Enabled
xx.Up_UpLmt 0.010~2.000 0.001 Un
xx.U1_UpLmt 0.010~2.000 0.001 Un
xx.U2_UpLmt 0.010~2.000 0.001 Un
xx.U0_UpLmt 0.010~2.000 0.001 Un
xx.Up_LowLmt 0.010~2.000 0.001 Un
xx.U1_LowLmt 0.010~2.000 0.001 Un
xx.Ip_UpLmt 0.010~2.000 0.001 In
xx.I1_UpLmt 0.010~2.000 0.001 In
xx.I2_UpLmt 0.010~2.000 0.001 In
xx.I0_UpLmt 0.010~2.000 0.001 In
xx.f_Diff_Lmt 0.01~10.00 0.01 Hz
xx.df/dt_Lmt 0.01~50.00 0.01 Hz/s

6
⚫ [Name_PMUBay]
The bay name of PMU
The name of a PMU bay is generally composed of station code and bay name in the total length
of 12 characters.
This setting joints the [Name_XXXX] (in PMU Label Settings, 4 characters) together to form a
complete measurement point name whose total length should be less than 16 characters.
⚫ [xx.Opt_UnitType]
The option of the bay application scenario
➢ None: disabled

6 PMU Settings
➢ Bay: measuring three-phase voltage and three-phase current.
➢ Bus(U_3P): measuring three-phase voltage without current or power quantity
➢ Bus(U_1P): measuring single phase voltage without current or power quantity. Besides,
the calculation of zero- and negative-sequence voltage are disabled. Their values are fixed
to “0”.
When adopting “Bus(U_1P)”, it is recommended to use the phase-A voltage.
⚫ [xx.Opt_U_MeasFreq]
The option of the base voltage for frequency measurement
➢ U1: positive sequence voltage
➢ Ua: phase-A voltage
➢ Ub: phase-B voltage
➢ Uc: phase-C voltage
Recommended value: U1 (to avoid the influence of frequency measurement in case of single-
phase or phase-phase VT failure)
⚫ [xx.En_TrigDFR]
Enabling/Disabling the DFR triggering function
If the triggering function is enabled and the triggering condition is met, the triggering flag will be
mapped in the “STAT” field of PMU data frame with a time delay of four power frequency cycles.
For an independent PMU device, the recording will be performed. But for an IED with PMU
function, it will not affect the recording function. The IED initiates the DFR according to its own
6 criteria.
⚫ [xx.Up_UpLmt], [xx.U1_UpLmt], [xx.U2_UpLmt], [xx.U0_UpLmt], [xx.Up_LowLmt],

[xx.U1_LowLmt], [xx.Ip_UpLmt], [xx.I1_UpLmt], [xx.I2_UpLmt], [xx.I0_UpLmt],
[xx.f_Diff_Lmt] and [xx.df/dt_Lmt]
The threshold values of the DFR triggering function
Their default values are recommended.
6.4 PMU Binary Input Settings
6.4.1 Settings List
Device LCD: Main Menu  Settings  PMU Settings  PMU BI Settings
PCS-Studio: Project Node  IED Node  Setting  Global  PMU Settings  PMU BI Settings

6 PMU Settings
Name_BI_** Max. 16 characters
Disabled
Link_BI_TrigDFR
Enabled
Disabled
BI_**.En_TrigDFR
Enabled
⚫ [Name_BI_**]
The name of the transmitted binary input**
It is generally composed of station name and binary input name.
The total length should not exceed 16 characters.
⚫ [Link_BI_TrigDFR]
Enabling/Disabling the DFR triggering function by binary signal state changing (general logic
link)
mapped in the “STAT” field of PMU data frame. For an independent PMU device, the recording
will be performed. But for an IED with PMU function, it will not affect the recording function. The
IED initiates the DFR according to its own criteria.
⚫ [BI_**.En_TrigDFR]
Enabling/Disabling the DFR triggering function by binary signal state changing (independent to
each BI)
6
mapped in the “STAT” field of PMU data frame. For an independent PMU device, the recording
will be performed. But for an IED with PMU function, it will not affect the recording function. The
IED initiates the DFR according to its own criteria.
6.5 PMU Label Settings
6.5.1 Settings List
Device LCD: Main Menu  Settings  PMU Settings  PMU Label Settings
PCS-Studio: Project Node  IED Node  Setting  Global  PMU Settings  PMU Label
Settings

6 PMU Settings
Name_Amp_Ua Max. 4 characters
Name_Amp_Ub Max. 4 characters
Name_Amp_Uc Max. 4 characters
Name_Amp_U0 Max. 4 characters
Name_Amp_Ia Max. 4 characters
Name_Amp_Ib Max. 4 characters
Name_Amp_Ic Max. 4 characters
Name_Amp_I0 Max. 4 characters
Name_Ang_Ua Max. 4 characters
Name_Ang_Ub Max. 4 characters
Name_Ang_Uc Max. 4 characters
Name_Ang_U0 Max. 4 characters

6 Name_Ang_Ia Max. 4 characters
Name_Ang_Ib Max. 4 characters
Name_Ang_Ic Max. 4 characters
Name_Ang_I0 Max. 4 characters
Name_f Max. 4 characters
Name_df/dt Max. 4 characters
Name_P Max. 4 characters
Name_Q Max. 4 characters

6 PMU Settings
⚫ [Name_XXXX]
The type names of measurement points, such as phasor amplitude, angle, frequency and
power, etc.
Generally, the type name is composed of one hyphen and three characters of specific type,
such as “-UAV” or “-UAM”. If the setting value has been changed, it will affect all the
measurement points’ name with the same type.

6 PMU Settings

7 Monitoring Settings
Table of Contents
7.1 VT Supervision Settings ....................................................................................................... 7-1
7.1.1 Settings List .......................................................................................................................... 7-1
7.2 CT Circuit Supervision (CTS) ............................................................................................... 7-2
7.2.1 Setting List ............................................................................................................................ 7-2


7.1 VT Supervision Settings

Settings for different bays or other measurement objects (XXXX) may be available.
7.1.1 Settings List
Device LCD: MainMenu  Settings Global Settings  System Settings
PCS-Studio: Project Node → IED Node → Setting  Global  Global Settings  System
Settings
Disabled
XXXX.En_VT
Enabled
Device LCD: MainMenu  Settings Global Settings  Superv Settings
PCS-Studio: Project Node → IED Node → Setting  Global  Global Settings  Superv
Settings
Disabled
VTS.En
Enabled
Bus
VTS.Opt_VT
Bay
VTS.t_DPU 0.200~30.000 0.001 s
VTS.t_DDO 0.200~30.000 0.001 s
VTS.U1_Set 0~100 0.01 V
VTS.3U0_Set 0~100 0.01 V
VTS.U2_Set 0~100 0.01 V
7.1.2 Setting Principle 7

⚫ [XXXX.En_VT]
Enabling/Disabling the voltage sampling by instrument transformer
⚫ [VTS.En]
Enabling/Disabling the alarm function of VT circuit supervision
⚫ [VTS.Opt_VT]
The option of VT for busbar or bay

⚫ [VTS.t_DPU]
The Delay PickUp (DPU) time of alarm of VT circuit supervision
⚫ [VTS.t_DDO]
The Delay dropout (DDO) time of alarm of VT circuit supervision
Recommended value: 10 second
⚫ [VTS.U1_Set]
The threshold of the positive-sequence voltage of VT circuit supervision
Recommended value: 30 V
⚫ [VTS.3U0_Set]
The threshold of the calculated residual voltage of VT circuit supervision
⚫ [VTS.U2_Set]
The threshold of the negative sequence voltage of VT circuit supervision
7.2 CT Circuit Supervision (CTS)
7.2.1 Setting List
Device LCD: MainMenu  Settings  Global Settings  Superv Settings
PCS-Studio: Project Node  Device Node  Setting  Global  Global Settings  Superv
Settings

7 CBx.CTS.3I0_Set 0.00~200.00 0.01 A
CBx.CTS.3U0_Set 0.00~200.00 0.01 V
CBx.CTS.t_DPU 0.000~100.000 0.001 s
CBx.CTS.t_DDO 0.000~100.000 0.001 s
Disabled
CBx.CTS.En
Enabled

⚫ [CBx.CTS.3I0_Set]
The zero-sequence current setting of CT circuit supervision.
It should be greater than the maximum unbalanced current and less than the load current. At
the same time, it should be sensitive enough.
⚫ [CBx.CTS.3U0_Set]
The zero-sequence voltage setting of CT circuit supervision.
It should be greater than the maximum unbalanced voltage and sensitive enough.
⚫ [CBx.CTS.t_DPU]
The pickup time delay of CT circuit supervision.
⚫ CBx.CTS.t_DDO
The drop-off time delay of CT circuit supervision.
⚫ CBx.CTS.En
Enabling/Disabling CT circuit supervision.


8 Communication Settings
Table of Contents
8.1 General Communication Settings ....................................................................................... 8-1
8.1.1 Setting List ............................................................................................................................ 8-1
8.2 IEC 61850 Communication Settings.................................................................................... 8-5
8.2.1 Setting List ............................................................................................................................ 8-5
8.3 DNP Communication Settings ............................................................................................. 8-6
8.3.1 Setting List ............................................................................................................................ 8-6
8.4 IEC 60870-5-103 Communication Settings ....................................................................... 8-11
8.4.1 Setting List .......................................................................................................................... 8-11
8.5 Modbus Communication Settings ..................................................................................... 8-13
8.5.1 Setting List .......................................................................................................................... 8-13
8.6 SV Communication Settings .............................................................................................. 8-13
8.6.1 Setting List .......................................................................................................................... 8-13


8.1 General Communication Settings
8.1.1 Setting List
Device LCD: MainMenu  Settings  Global Settings  Comm Settings  General Comm
Settings
PCS-Studio: Project Node  IED Node  Setting  Global  Comm_Settings 

General_Comm_Settings
IP_LAN1 0.0.0.0~255.255.255.255
Mask_LAN1 0.0.0.0~255.255.255.255
Disabled
En_LAN1
Enabled
IP_LAN2 0.0.0.0~255.255.255.255
Mask_LAN2 0.0.0.0~255.255.255.255
Disabled
En_LAN2
Enabled
IP_LAN3 0.0.0.0~255.255.255.255
Mask_LAN3 0.0.0.0~255.255.255.255
Disabled
En_LAN3
Enabled
IP_LAN4 0.0.0.0~255.255.255.255
Mask_LAN4 0.0.0.0~255.255.255.255
Disabled
En_LAN4
Enabled
Gateway 0.0.0.0~255.255.255.255
4800
9600
Baud_Printer
19200
38400
bps 8
57600
115200
Disabled
En_AutoPrint
Enabled
Protocol_RS485-1 IEC103


Modbus
IEC103
Protocol_RS485-2
Modbus
4800
9600
19200
Baud_RS485-1 bps
38400
57600
115200
4800
9600
19200
Baud_RS485-2 bps
38400
57600
115200
Addr_RS485-1 1~254 1
Addr_RS485-2 1~254 1
Cfg_NetPorts_Bond 0~255
Normal
1-2:Normal, 3-4:HSR
B01.Opt_NetMode
1-2:Normal, 3-4:PRP
1-2:Normal, 3-4:RSTP
IP_SyslogServer01 0.0.0.0~255.255.255.255
IP_SyslogServer02 0.0.0.0~255.255.255.255
IP_SyslogServer03 0.0.0.0~255.255.255.255
IP_SyslogServer04 0.0.0.0~255.255.255.255
Disabled
En_IP_Whitelist
Enabled
8 IP**_Whitelist 0.0.0.0~255.255.255.255
⚫ [IP_LAN*]
The IP address of the No.* Ethernet port

⚫ [Mask_LAN*]
The subnet mask of the No.* Ethernet port
⚫ [En_LAN*]
Enabling/Disabling the No.* Ethernet port
⚫ [Gateway]
The IP address of the gateway or the router
If there is no gateway, set it to be “0.0.0.0”.
⚫ [Baud_Printer]
The baud rate of the printer port.
The setting value should be the same as the transmission baud rate of the connected printer.
⚫ [En_AutoPrint]
Enabling/Disabling the automatic printing function when events appear, such as disturbance
reports, supervision events, IO events, etc.
⚫ [Protocol_RS485-*]
The option of communication protocol of the No.* rear RS-485 serial port
⚫ [Baud_RS485-*]
The baud rate of the No.* rear RS-485 serial port
⚫ [Addr_RS485-*]
The communication address between the device and the client, such as SCADA or RTU, via
the No.* RS-485 serial port
⚫ [Cfg_NetPorts_Bond]
The port bonding value for the hot standby mode of two Ethernet ports in station level
8
communication
For redundancy or increased throughput of the communication, dual network structure may be
adopted along with channel bonding technology. The two bonded interfaces, who share the
identical IP address and MAC address, work in hot standby mode. If the link via the active
interface fails, the link via standby interface turns to be activated automatically to ensure a
reliable communication.
The value of this setting is a 4-bit number. Each bit represents a corresponding Ethernet port’s

bonding status. Use the following map to decide the setting value. The default setting value “0”
means the bonding function is disabled.
Ethernet port 1
Port 4 Port 3 Port 2 Port 1 Setting Port 4 Port 3 Port 2 Port 1 Setting
Binary Bonding Bonding Binary
Bit 3 Bit 2 Bit 1 Bit 0 Value Bit 3 Bit 2 Bit 1 Bit 0 Value
0 0 1 1 0011 3 1 0 0 1 1001 9
Ethernet port 2
0 1 0 1 0101 5 0 1 1 0 0110 6
Ethernet port 3
1 0 1 0 1010 10 1 1 0 0 1100 12
Ethernet port 4
CPU Module
The hot standby mode operating logic is:
Take the bonding of device Ethernet ports 1 & 2 (setting value = 3) for example and assume
that the port 1 is connected to the network 1 while the port 2 is connected to the network 2.
1. After the device is powered on, only the port 1 is activated when both network 1 and
network 2 are normal.
2. If the network 1 is abnormal, the port 2 will be activated if the network 2 is normal; If the
network 1 is abnormal, the port 2 cannot be activated if the network 2 is also abnormal.
The device will keep trying on the port 1.
3. If the port 2 is working, the device maintains this operational state even the if network 1
has been restored to normal. It will be switched to the port 1 only if the network 2 is
abnormal.
⚫ [B01.Opt_NetMode]
The option of networking mode of the CPU module in slot 01
The digit in the option represents the Ethernet port sequence number.
⚫ [IP_SyslogServer**]
8 The IP address of the No.** syslog server for security auditing
Syslog is a communication protocol of message logging for security auditing.
⚫ [En_IP_Whitelist]
Enabling/Disabling the communication whitelist function

The whitelist is a list of IP addresses that are granted access to a certain system or protocol.
When the whitelist is enabled, all IP addresses are denied access, except those included in
the whitelist.
⚫ [IP**_Whitelist]
The No.** IP address in the whitelist (**=01...16)
8.2 IEC 61850 Communication Settings
8.2.1 Setting List
Device LCD: MainMenu  Settings  Global Settings  Comm Settings  IEC61850 Settings

IEC61850_Settings
Pcnt_Deadband 0.00~100.00 0.01 %
Threshold_ZeroDrift 0.001~0.500 0.001
Disabled
En_Send_MMS_Qual_Chg
Enabled
IEC61850
Opt_DualNetMode_MMS
GB32890
IEDNAME
Disabled
En_IEC62351_TCP_Port
Enabled
Disabled
En_IEC61850_TCP_Port
Enabled
⚫ [Pcnt_Deadband]
8
The dead band in percentage value for measurements transmission in using the IEC 61850
protocol
A measurements variation that is smaller than this setting will be ignored and not transmitted
to the communication client, such as SCADA.
⚫ [Threshold_ZeroDrift]
The threshold to suppress the zero drift of measurements in using the IEC 61850 protocol

A measurement that is smaller than this setting willed be ignored and not transmitted to the
communication client, such as SCADA.
⚫ [En_Send_MMS_Qual_Chg]
Enabling/Disabling the spontaneous report function of quality change in MMS (Manufacturing

Message Specification) network
⚫ [Opt_DualNetMode_MMS]
The option of the MMS network mode
➢ IEC61850
The instances of Report Control Block (RCB) cannot be shared, so different clients should
use different report instances to send reports. This mode is preferred overseas.
➢ GB32890
For different clients meeting the redundancy conditions of A and B networks, if one client
enables an RCB instance, the device will only send a report to the enabled client. When
the enabled client is interrupted, another redundant client will cancel and re-enable the
RCB instance, and the device will send a report to the re-enabled redundant client. This
mode is a special mod]e which needs client supporting, and widely used in China.
⚫ [IEDNAME]
The logical device name in using the IEC 61850 protocol
The name cannot be an empty string and should be unique within one SCD file.
This setting is case sensitive and should start with a letter. Only letters, numbers and
underscores are allowed.
⚫ [En_IEC62351_TCP_Port]
Enabling/Disabling TCP port in using the IEC 62351 protocol for station level cyber security
⚫ [En_IEC61850_TCP_Port]
Enabling/Disabling TCP port in using the IEC 61850 protocol
8.3 DNP Communication Settings

8
8.3.1 Setting List
Device LCD: MainMenu  Settings  Global Settings  Comm Settings  DNP Settings

DNP_Settings
TCP* signifies the network client 1~4 in the following list.

Disabled
En_TCP*_DNP
Enabled
Addr_Slave_TCP*_DNP 0~65519 1
Addr_Master_TCP*_DNP 0~65519 1
IP_Master_TCP*_DNP 0.0.0.0~255.255.255.255
Opt_Map_TCP*_DNP 0~4 1
t_AppLayer_TCP*_DNP 1~5 1 s
t_KeepAlive_TCP*_DNP 0~7200 1 s
Disabled
En_UR_TCP*_DNP
Enabled
Disabled
En_MsgCtrlUR_TCP*_DNP
Enabled
Num_URRetry_TCP*_DNP 2~10 1
t_UROfflRetry_TCP*_DNP 1~5000 1 s
Class_BI_TCP*_DNP 0~3 1
Class_AI_TCP*_DNP 0~3 1
t_Select_TCP*_DNP 0~240 1 s
t_TimeSynIntvl_TCP*_DNP 0~3600 1 s
1-BISingleBit
Obj01DefltVar_TCP*_DNP
2-BIWithStatus
1-BIChWoutT
Obj02DefltVar_TCP*_DNP 2-BIChWithAbsTime
3-BIChWithRelTime
1-AI32Int
2-AI16Int
Obj30DefltVar_TCP*_DNP 3-AI32IntWoutF
4-AI16IntWoutF
5-AI32Flt
8
1-AI32IntEvWoutT
Obj32DefltVar_TCP*_DNP 2-AI16IntEvWoutT
5-AI32FltEvWoutT
1-AO32Int
Obj40DefltVar_TCP*_DNP
2-AO16Int


3-AO32Flt
⚫ [En_TCP*_DNP]
Enabling/Disabling the No.* network DNP session
⚫ [Addr_Slave_TCP*_DNP]
The slave (local) address of the No.* network DNP session
⚫ [Addr_Master_TCP*_DNP]
The master (connected device) address of the No.* network DNP session
⚫ [IP_Master_TCP*_DNP]
The master (connected device) IP address of the No.* network DNP session
⚫ [Opt_Map_TCP*_DNP]
The option of communication map of the No.* network DNP session
Each option corresponds to a communication map that is pre-configured by the PCS-Studio

configuration tool.
⚫ [t_AppLayer_TCP*_DNP]
The timeout duration of the application layer of the No.* network DNP session
⚫ [t_KeepAlive_TCP*_DNP]
The heartbeat time interval of the No.* network DNP session
⚫ [En_UR_TCP*_DNP]
Enabling/Disabling the Unsolicited Response (UR) message of the No.* network DNP session
⚫ [En_MsgCtrlUR_TCP*_DNP]
➢ Enabled: the master station must activate UR reporting by enabling unsolicited application
8 function (Function code: 20). After the activation, the No.* network DNP session begins to
send Class 1, 2, 3 events to the master station spontaneously.
➢ Disabled: this device sends event data spontaneously to the master station.
⚫ [Num_URRetry_TCP*_DNP]
The online retransmission number of UR message of the No.* network DNP session

⚫ [t_UROfflRetry_TCP*_DNP]
The offline retransmission time interval of UR message of the No.* network DNP session
⚫ [Class_BI_TCP*_DNP]
The option of the default class level of “Binary Input” of the No.* network DNP session
➢ 0: device binary inputs will NOT generate any event of the No.* network DNP session;
➢ 1: device binary inputs may generate class 1 events of the No.* network DNP session;
➢ 2: device binary inputs may generate class 2 events of the No.* network DNP session;
➢ 3: device binary inputs may generate class 3 events of the No.* network DNP session.
⚫ [Class_AI_TCP*_DNP]
The option of the “Analogue Input” default class level of the No.* network DNP session
➢ 0: device analog inputs will NOT generate any event of the No.* network DNP session
➢ 1: device analog inputs may generate class 1 events of the No.* network DNP session
⚫ [t_Select_TCP*_DNP]
The timeout duration of the remote control and adjustment selection of the No.* network DNP
session
⚫ [t_TimeSynIntvl_TCP*_DNP]
The time interval of the time synchronization function of the No.* network DNP session
⚫ [Obj01DefltVar_TCP*_DNP]
The option of the default variation of the object group 1 (“Obj01”) of the No.* network DNP
session
➢ 1-BISingleBit: Binary Input (Single Bit) – packet format
The “Object group 1, variation 1”, which contains a single-bit binary input state without
8
status flags, is adopted to report the current value of binary input.
➢ 2-BIWithStatus: Binary Input – With Status flags
The “Object group 1, variation 2”, which contains a status octet that includes the state of
the binary input, is adopted to report the current value of binary input.

session
➢ 1-BIChWoutT: Binary Input status Change event – Without Time
The “Object group 2, variation 1”, which contains an octet for reporting the state of the
input and status flags, is adopted to report events related to binary input
➢ 2-BIChWithAbsTime: Binary Input status Change event – With Absolute Time
input and status flags, and the absolute time when the event occurred, is adopted to report
events related to binary input.
➢ 3-BIChWithRelTime: Binary Input status Change event – With Relative Time
input and status flags, and the relative time when the event occurred, is adopted to report
events related to binary input. A preceding common time-of-occurrence (CTO) object,
group 51, establishes the basis of the relative time.
session
➢ 1-AI32Int: Analog Input – 32-bit Integer with flag
The “Object group 30, variation 1”, which contains a flag octet and a 32-bit signed integer
value, is adopted to report the current value of analog input.
➢ 2-AI16Int: Analog Input – 16-bit Integer with flag
value, is adopted to report the current value of analog input.
➢ 3-AI32IntWoutF: Analog Input – 32-bit Integer Without Flag
The “Object group 30, variation 3”, which contains a 32-bit signed integer value, is adopted
to report the current value of analog input.
➢ 4-AI16IntWoutF: Analog Input – 16-bit Integer Without Flag
8 The “Object group 30, variation 4”, which contains a 16-bit signed integer value, is adopted
to report the current value of analog input.
➢ 5-AI32Flt: Analog Input – 32-bit single-precision, Floating-point with flag
The “Object group 30, variation 5”, which contains a flag octet and a 32-bit single-precision
floating-point value, is adopted to report the current value of analog input.

session
➢ 1-AI32IntEvWoutT: Analog Input – 32-bit Integer Event Without Time
value, is adopted to report events related to analog input.
➢ 2-AI16IntEvWoutT: Analog Input – 16-bit Integer Event Without Time
value, is adopted to report events related to analog input.
➢ 5-AI32FltEvWoutT: Analog Input – 32-bit single-precision, Floating-point Event Without

Time
The “Object group 32, variation 5”, which contain a flag octet and a 32-bit single-precision
floating-point value, is adopted to report events related to analog input.
session
➢ 1-AO32Int: Analog Output status – 32-bit Integer with flag
value, is adopted to report the status of analog output.
➢ 2-AO16Int: Analog Output status – 16-bit Integer with flag
value, is adopted to report the status of analog output.
➢ 3-AO32Flt: Analog Output status – 32-bit single-precision, Floating-point with flag
The “Object group 40, variation 3”, which contains a flag octet and a 32-bit single-precision
floating-point value, is adopted to report the status of analog output.
8.4 IEC 60870-5-103 Communication Settings
8.4.1 Setting List

8
Device LCD: MainMenu  Settings  Global Settings  Comm Settings  IEC103 Settings

IEC103_Settings

Disabled
En_Broadcast_LAN1
Enabled
Disabled
En_Broadcast_LAN2
Enabled
Disabled
En_Broadcast_LAN3
Enabled
Disabled
En_Broadcast_LAN4
Enabled
DisturbData
Format_Wave_Sent
File
Pcnt_Deadband_Net 0~100.00 0.01 %
Period_Measmt_Net 0~65535 1 s
Current_Language
Opt_Caption_103 Fixed_Chinese
Fixed_English
Disabled
En_103_TCP&UDP_Port
Enabled
⚫ [En_Broadcast_LAN*]
Enabling/Disabling the transmission of UDP messages through the No.* Ethernet port in using
the NR network 103 protocol
⚫ [Format_Wave_Sent]
The option of the data format of waveform list transmission in using the NR network 103
protocol
➢ DisturbData: ASDU23 mode;
➢ File: ASDU222 mode.
8 Recommended value: File (for faster transmission)
⚫ [Pcnt_Deadband_Net]
The dead band in percentage value of measurements transmission in using the NR network
103 protocol
A measurements variation that is smaller than this setting will be ignored and not transmitted
to the communication client, such as SCADA.

⚫ [Period_Measmt_Net]
The period of measurements transmission in using the NR network 103 protocol
Set this setting to be 0, if not all measurements need to be transmitted spontaneously based
on the integrity period.
⚫ [Opt_Caption_103]
The option of the group caption language in using the IEC 60870-5-103 or the NR network 103
protocol
⚫ [En_103_TCP&UDP_Port]
Enabling/Disabling both the TCP port and the UDP port in using the NR network 103 protocol
8.5 Modbus Communication Settings

Device LCD: MainMenu  Settings  Global Settings  Comm Settings  Modbus Settings

Modbus_Settings
8.5.1 Setting List
Disabled
En_Modbus_TCP_Port
Enabled
⚫ [En_Modbus_TCP_Port]
Enabling/Disabling the TCP port in using the Modbus network protocol
8.6 SV Communication Settings
8.6.1 Setting List
Device LCD: MainMenu  Settings  Global Settings  Comm Settings  SV Settings
PCS-Studio: Project Node  IED Node  Setting  Global  Comm_Settings  SV_Settings

8
NetMode
Opt_RecvMode_SV P2P
Resv
SampleRate_SV 0~65535 1

t_Dly_Interp_Net_SV 1500~15000 1 μs
t_Dly_Interp_P2P_SV 600~1500 1 μs
⚫ [Opt_RecvMode_SV]
The option of the SV receiving mode
➢ NetMode: network mode
All devices in the same SV network must share the same clock synchronization source.
➢ P2P: peer-to-peer mode
Direct connection between two devices or no SV connection is adopted.
➢ Resv: Reserved
⚫ [SampleRate_SV]
The sampling rate of SV receiving from merging unit
The setting value should be the same as the sampling rate of SV transmission in the merging
unit.
⚫ [t_Dly_Interp_Net_SV]
The time delay of SV interpolation in network mode
Recommended value: 2000μs
⚫ [t_Dly_Interp_P2P_SV]
The time delay of SV interpolation in P2P mode
Recommended value: 850μs

9 Logic Links
9 Logic Links
Table of Contents
9.1 Function Links ....................................................................................................................... 9-1
9.1.1 Setting List ............................................................................................................................ 9-1
9.2 GOOSE Sending Links.......................................................................................................... 9-1
9.2.1 Setting List ............................................................................................................................ 9-1
9.3 GOOSE Receiving Links ....................................................................................................... 9-2
9.3.1 Setting List ............................................................................................................................ 9-2
9.4 SV Receiving Links ............................................................................................................... 9-3
9.4.1 Setting List ............................................................................................................................ 9-3

9 Logic Links

9 Logic Links
9.1 Function Links
9.1.1 Setting List
Device LCD: Main Menu  Settings  Logic Links  Function Links
PCS-Studio: Project Node  IED Node  Setting  Global  Logic Links  Function Links
Disabled
Link_**
Enabled
Disabled
90V.Link_Auto
Enabled
Disabled
PVR.Link_Master
Enabled
Disabled
PVR.Link_Standalone
Enabled
⚫ [Link_**]
Enabling/Disabling the corresponding customized programmable logic
This setting is usually adopted when remotely enable/disable a functional element.
⚫ [90V.Link_Auto]
Enabling/Disabling the automatic mode of voltage regulation
⚫ [PVR.Link_Master]
Enabling/Disabling the master operating mode in parallel voltage regulation function
⚫ [PVR.Link_Standalone]
Enabling/Disabling the standalone operating mode in parallel voltage regulation function
9.2 GOOSE Sending Links
9.2.1 Setting List
Device LCD: Main Menu  Settings  Logic Links  GOOSE Send Links
PCS-Studio: Project Node  IED Node  Setting  Global  Logic Links  GOOSE Send
Links
9

9 Logic Links
GLink_Send Disabled or Enabled
⚫ [GLink_Send]
Enabling/Disabling the corresponding GOOSE sending link
The configurable setting name takes “GLink_Send” as default. It could be modified by setting
the Basic Information  English Description parameter through the path Project Node 
IED Node  Program  Process_Config  UserPage_GOOSE  GSLogicLink_* in PCS-
Studio configuration tool.
9.3 GOOSE Receiving Links
9.3.1 Setting List
Device LCD: Main Menu  Settings  Logic Links  GOOSE Recv Links
PCS-Studio: Project Node  IED Node  Setting  Global  Logic Links  GOOSE Recv
Links
B01.GOOSE_Link**.GLink_Recv Disabled or Enabled
GLink_RecvSim Disabled or Enabled
⚫ [B01.GOOSE_Link**.GLink_Recv]
Enabling/Disabling the GOOSE receiving link ** through the module in slot 01
The configurable link description name takes “B01.GOOSE_Link**” as default. It could be

9 modified by setting the corresponding label setting in the Section 2.4 Label Settings.

9 Logic Links
⚫ ]GLink_RecvSim]
Enabling/Disabling the reception function of the GOOSE message whose "Simulation" bit is 1
9.4 SV Receiving Links
9.4.1 Setting List
Device LCD: Main Menu  Settings  Logic Links  SV Recv Links
PCS-Studio: Project Node  IED Node  Setting  Global  Logic Links  SV Recv Links
B01.SV_Link**.SVLink_Recv Disabled or Enabled
SVLink_RecvSim Disabled or Enabled
⚫ [B01.SV_Link**.GLink_Recv]
Enabling/Disabling the SV receiving link ** through the module in slot 01
The configurable link description name takes “B01.SV_Link**” as default. It could be modified
by setting the corresponding label setting in the Section 2.4 Label Settings.
⚫ [SVLink_RecvSim]
Enabling/Disabling the reception function of the SV message whose "Simulation" bit is 1

9 Logic Links

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Indicates an imminently hazardous situation that, if not avoided, will result

in death or serious injury.

Indicates a potentially hazardous situation that, if not avoided, could

result in death or serious injury.

Indicates a potentially hazardous situation that, if not avoided, may result

in minor or moderate injury or equipment damage.

Important information about the product, please pay attention to avoid

Instructions and Warnings

The firmware may be upgraded to add new features or enhance/modify

Settings Guide - PCS-9705S Bay Control Unit I

Date: 22 December 2020

Three-phase Corresponding Relationship

AN, BN, CN L1N, L2N, L3N RN, YN, BN

ABC L123 RYB

Ia, Ib, Ic, I0 IL1, IL2, IL3, IN IR, IY, IB, IN

Ua, Ub, Uc VL1, VL2, VL3 UR, UY, UB

Uab, Ubc, Uca VL12, VL23, VL31 URY, UYB, UBR

U0, U1, U2 VN, V1, V2 UN, U1, U2

Document Revision History

Current Version: R1.00

II Settings Guide - PCS-9705S Bay Control Unit

Date: 22 December 2020

Settings Guide - PCS-9705S Bay Control Unit III

Date: 22 December 2020

IV Settings Guide - PCS-9705S Bay Control Unit

Date: 22 December 2020

1.2 Application Scenarios ........................................................................................................... 1-1

1.4 Control .................................................................................................................................... 1-2

1.5 Protection ............................................................................................................................... 1-2

1.6 Measurement and Metering.................................................................................................. 1-4

1.7 Synchrophasor Measurement.............................................................................................. 1-4

1.8 Monitoring .............................................................................................................................. 1-5

1.9 Communication ..................................................................................................................... 1-5

1.10 User Interfaces .................................................................................................................... 1-6

1.11 Additional Functions ........................................................................................................... 1-6

Settings Guide - PCS-9705S Bay Control Unit 1-a

Date: 22 December 2020

1-b Settings Guide - PCS-9705S Bay Control Unit

Date: 22 December 2020

The function diagram of this relay is shown in Figure 1.1-1.

VTS 59P 59G 59Q 59P os 27P 81O 81U 81R

CTS 50BF 50/51P 50/51G 50/51Q 37 90V 32R PMU

CSWI XCBR XSWI CILO 84 PQS

Figure 1.1-1 Functional diagram of PCS-9705S

1.2 Application Scenarios

⚫ Double circuit breakers

⚫ Multiple busbars (max. 4) or two busbars with bus coupler

⚫ Transformer sides (max. 4)

Settings Guide - PCS-9705S Bay Control Unit 1-1

Date: 22 December 2020

⚫ Multiple bays of one busbar (max. 6)

⚫ A complete one-and-half breaker diameter

⚫ IO box (all slots for IO modules)

1 1.3 Basic Functions

⚫ Flexibly configurable binary inputs (max. 361)

⚫ Flexibly configurable binary outputs (max. 107)

⚫ Auxiliary functions for simple tests and commissioning

⚫ Double point status synthesis

⚫ Remote/Local control mode switch