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Assignment-1 CMOS

The document provides 10 questions as a weekly assignment on CMOS and MOSFET concepts. It instructs students to answer each question in half a page or less and notes that the questions can be used for revision during interviews. The last part of the document shares the LEF definition for a CMOS inverter macro.

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siva kumaar
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136 views

Assignment-1 CMOS

The document provides 10 questions as a weekly assignment on CMOS and MOSFET concepts. It instructs students to answer each question in half a page or less and notes that the questions can be used for revision during interviews. The last part of the document shares the LEF definition for a CMOS inverter macro.

Uploaded by

siva kumaar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as TXT, PDF, TXT or read online on Scribd
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Hi All,

Please find the assignment questions for this week.

1. Explain the MOS Operation.


2. Explain CMOS Inverter Operation and DC Characteristics.
3. Explain the Various Capacitance present in the MOSFET.
4. What happens to delay if you increase load capacitance?
5. Which is bigger in terms of area? Nand or And? Explain.
6. Explain Power dissipation in CMOS.
7. What is Latch-up Effect in CMOS? Explain with the CMOS cross-section diagram.
8. Which is preferred (Nand/Nor)? Why?
9. List all the MOS second-order effects.
10. Draw the CMOS Circuit for the below equations.
• A+AB
• AB+AB’
• A’BC+AC
• A’B+ABC’+ABC
* ABC+A'B'C+A'BC+A'B'C

Instructions:
1) Write the assignment in A4 sheet or Long plain notebook only.
2) Answer should not be more than 1/2 page for each question.

These Assignments are basically interview questions & can be used for revision at
the time of interview.

#Assignments #CMOS

MACRO INVX0_HVT
CLASS CORE ;
ORIGIN 0 0 ;
SIZE 0.76 BY 1.672 ;
SYMMETRY X Y R90 ;
SITE unit ;

PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER M1 ;
RECT 0.2490 0.6800 0.4210 0.7300 ;
RECT 0.2490 0.7300 0.3620 0.8150 ;
END
ANTENNAGATEAREA 0.0237 ;
END A

PIN VDD
DIRECTION INOUT ;
USE POWER ;
PORT
LAYER M1 ;
RECT 0.0000 1.6420 0.7600 1.7020 ;
RECT 0.2790 0.9280 0.3290 1.6420 ;
END
END VDD

PIN VSS
DIRECTION INOUT ;
USE GROUND ;
PORT
LAYER M1 ;
RECT 0.0000 -0.0300 0.7600 0.0300 ;
RECT 0.2790 0.0300 0.3290 0.5640 ;
END
END VSS

PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER M1 ;
RECT 0.4310 0.3050 0.4810 0.5370 ;
RECT 0.4310 0.8230 0.5210 0.8730 ;
RECT 0.4310 0.8730 0.4810 1.2880 ;
RECT 0.4710 0.5870 0.6630 0.6630 ;
RECT 0.4710 0.6630 0.5210 0.8230 ;
RECT 0.4310 0.5370 0.6630 0.5870 ;
END
ANTENNADIFFAREA 0.0805 ;
END Y
OBS
LAYER M1 ;
RECT 0.1150 0.6790 0.8750 1.7730 ;
END
END INVX0_HVT

#LEF #PHYSICAL_LIBRARY

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