EM5305

12V Synchronous Buck controller

General Description Features
The EM5305 series are compact synchronous
Tracking mode
-rectified buck controllers specifically designed to

300 kHz fixed frequency operation.
operate from 5V or 12V supply voltage. The output

Voltage mode PWM control with external
voltage is tightly regulated to the external compensation (GM)
reference voltage from 0.4V to 3.0V. These devices

Internal soft start
operate at fixed 300 kHz frequency and provide an

Integrated bootstrap diode
optimal level of integration to redwuce size and
cost of the power supply.
Low side MOS OC protection
The controllers integrate internal MOSFET drivers
OUT UV protection
that support 12V+12V bootstrapped voltage for
OUT OV protection
high efficiency power conversion. The bootstrap
Power Good Indicator
diode is built-in to simplify the circuit design and

0.8V Reference Output
minimize external part count.
Other features include internal soft-start, Pin Configuration
under-voltage protection, over-voltage protection,
over-current protection and shutdown function.
With aforementioned functions, these parts
provide customers a compact, high efficiency,
well-protected and cost-effective solutions. These
parts are available in DFN3x3-10L package.

Ordering Information
Part Number Package Remark
DFN3x3-10L
EM5305VT
Lead-Free
Typical Application Circuit
VIN

Applications +5V to +12V

OFS
9
5
VCC

1
BOOT
+3.3V +5V +12V

CS RS
UGATE
10 2
REFOUT

Power Supplies for Microprocessors or COMP/ GND PHASE
3
Subsystem Power Supplies SD# 7
LGATE
Disable 4

Cable Modems, Set Top Boxes, and xDSL Enable

FB 6 POK
8

Modems

5V or 12V Input DC-DC Regulators Option π×RS×CS)≦30KHz
1. 1/(2×π

Graphics Cards

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 EM5305
Pin Assignment
Pin Name Pin No. Pin Function

Bootstrap Supply for the floating upper gate driver. Connect the bootstrap
capacitor C BOOT between BOOT pin and the PHASE pin to form a bootstrap circuit.
BOOT 1 The bootstrap capacitor provides the charge to turn on the upper MOSFET. Typical
values for C BOOT range from 0.1uF to 0.47uF. Ensure that C BOOT is placed near the
IC.
Upper Gate Driver Output. Connect this pin to the gate of upper MOSFET. This pin
UGATE 2 is monitored by the adaptive shoot-through protection circuitry to determine when
the upper MOSFET has turned off.
PHASE Switch Node. Connect this pin to the source of the upper MOSFET and the
drain of the lower MOSFET. This pin is used as the sink for the UGATE driver, and to
monitor the voltage drop across the lower MOSFET for over current protection.
PHASE 3 This pin is also monitored by the adaptive shoot-through protection circuitry to
determine when the upper MOSFET has turned off. A Schottky diode between this
pin and ground is recommended to reduce negative transient voltage which is
common in a power supply system.
Lower Gate Driver Output. Connect this pin to the gate of lower MOSFET. This pin
LGATE 4 is monitored by the adaptive shoot-through protection circuitry to determine when
the lower MOSFET has turn off.
Supply Voltage. This pin provides the bias supply for the EM5305 and the lower
gate driver. The supply voltage is internally regulated to 5VDD for internal control
VCC 5
circuit. Connect a well-decoupled 4.5V to 13.2V supply voltage to this pin. Ensure
that a decoupling capacitor is placed near the IC.
Feedback Voltage. This pin is the inverting input to the error amplifier. A resistor
FB 6
divider from the output to GND is used to set the regulation voltage.
Error Amplifier Output. This pin is the output of error amplifier and the
non-inverting input of the PWM comparator. Use this pin in combination with the
COMP/
7 FB pin to compensate the voltage control feedback loop of the converter. Pulling
SD#
this pin lower than 0.4V disables the controller and causes the oscillator to stop,
the UGATE and LGATE outputs to be held low.
POK 8 Power OK Indicator
External Reference Input. This pin receives a voltage with range from 0.4V to 3.0V
as the reference voltage at the non-inverting input of the error amplifier. Pulling
OFS 9
this pin lower than 0.3V or higher than 3.3V disables the controller and causes the
oscillator to stop, the UGATE and LGATE outputs to be held low.
REFOUT 10 0.8V Reference Voltage Output
Signal and Power Ground for the IC. All voltages levels are measured with respect
Thermal
GND to this pin. Tie this pin to the ground island/plane through the lowest impedance
PAD
connection available.

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 EM5305
Function Block Diagram

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 EM5305
Absolute Maximum Ratings (Note1)
 Supply voltage, VCC---------------------------------------------------------- -0.3V to 16V
 PHASE to GND
DC------------------------------------------------------------------------------- -5V to 16V
<200ns------------------------------------------------------------------------- -10V to 30V
 BOOT to PHASE--------------------------------------------------------------- 16V
 BOOT to GND
DC------------------------------------------------------------------------------ -0.3V to PHASE+16V
<200ns------------------------------------------------------------------------ -0.3V to 40V
 UGATE
DC ----------------------------------------------------------------------------- VPHASE -0.3V to VBOOT + 0.3V
<200ns------------------------------------------------------------------------- VPHASE -5V to VBOOT +5V
 LGATE
DC------------------------------------------------------------------------------- -0.3V to VCC + 0.3V
<200ns------------------------------------------------------------------------- -5V to VCC+5V
 COMP/SD# & FB & OFS & REFOUT & POK------------------------------ -0.3V to 7V
 Power Dissipation, PD @ TA = 25℃, DFN3x3-10L------------------- 1.67W
 Package Thermal Resistance, ΘJA, DFN3x3-10L (Note 2)------------ 60℃/W
 Junction Temperature------------------------------------------------------- 150℃
 Lead Temperature (Soldering, 10 sec.)---------------------------------- 260℃
 Storage Temperature Range----------------------------------------------- -65℃ to 150℃
 ESD susceptibility (Note3)
HBM (Human Body Mode)------------------------------------------------ 2KV
MM (Machine Mode)------------------------------------------------------- 200V
Recommended Operating Conditions (Note4)
 Supply voltage, VCC-------------------------------------------------------------- 4.5V to 13.2V
 Junction Temperature Range-------------------------------------------------- −40°C to 125°C
 Ambient Temperature Range--------------------------------------------------- −40°C to 85°C

Electrical Characteristics
VCC=12V, TA=25℃, unless otherwise specified
Parameter Symbol Test Conditions Min Typ Max Units
Supply Input Section
Supply Voltage VCC 4.5 13.2 V
Supply Current ICC LGATE, UGATE open, Switching. 1.5 mA
Shutdown Current 0.4 mA
Power on Reset Threshold VCCRTH 3.8 4.05 4.3 V
Power on Reset Hysteresis VCCHYS 0.3 0.45 0.6 V

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 EM5305
Internal Oscillator
Free Running Frequency fOSC 270 300 330 kHz
Ramp Amplitude △VOSC 1.5 Vp-p
Max. Duty Cycle DMAX 80 85 90 %
Error Amplifier
Trans-conductance Gm 700 uA/V
Max. Comp Source Current 100 200 uA
Max. Comp Sink Current 100 200 uA
PWM Controller Gate Drivers
VBOOT - VPHASE = 12V,
Upper Gate Sourcing Current IUG_SRC 1.2 A
VBOOT - VUGATE = 6V
VBOOT - VPHASE = 12V,
Upper Gate RDS(ON) Sinking RUG_SNK 3 Ω
VUGATE – VPHASE = 0.1V
Lower Gate Sourcing Current ILG_SRC VCC – VLGATE = 6V 1.2 A
Lower Gate RDS(ON) Sinking RLG_SNK VLGATE = 0.1V 1.8 Ω
PHASE Falling to LGATE Rising VCC = 12V; (VUGATE - VPHASE)< 1.2V
30 90 ns
Delay to VLGATE > 1.2V
LGATE Falling to UGATE Rising VCC = 12V; VLGATE < 1.2V to
30 90 ns
Delay (VUGATE - VPHASE) > 1.2V
Reference Voltage
Feedback Voltage VFB VOFS= 0.8V 0.792 0.8 0.808 V
Reference Output VREFOUT 0.792 0.8 0.808 V
Reference Output Source/Sink IREFOUT 5 mA
Protection section
FB Under Voltage Protection VFB_UVP FB falling 50 60 70 %
UVP delay time 7.5 10 us
FB Over Voltage Protection VFB_OVP FB rising 120 130 140 %
OVP delay time 7.5 10 us
LGATE OC Setting Current IOCSET 8.5 10 11.5 uA
Built in Max. OCP Threshold -630 mV
Soft-Start Interval TSS 1 2 3 ms
VCOMP/
COMP Shutdown Threshold 0.4 V
SD#
POK Threshold VPOK 88 90 92 %
POK Delay 1 2 3 ms
Power Good Leakage Current 1 uA
Temperature Shutdown TSD 140 ℃
Temperature Shutdown
TSD_Hys 40 ℃
Hysteresis

Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
2
Note 2. θJA PSOP-8 packages is 52°C /W on JEDEC 51-7 (4 layers,2S2P) thermal test board with 50mm copper area.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

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 EM5305
Typical Operating Characteristics
(VIN = VCC=12V, TA = +25, unless otherwise noted.)

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 EM5305
Power on-off from EN signal

CH1:VCC, CH2:EN, CH3:Vo, CH4:COMP

Dynamic Vo Transition 1.1V to 1.5V Power on from VCC

CH1:OFS, CH2:Vo, CH3:POK, CH4:COMP CH1:VCC, CH2:Vo, CH3:POK, CH4:COMP

Vo Ripple UGATE AND LGATE Dis-overlap

CH1:UGATE, CH2:LGATE, CH3:Vo(ac) CH1:UGATE, CH2:LGATE, CH3:PHASE

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 EM5305
Under feedback voltage protection Over feedback voltage protection

CH1:FB, CH2:Vo, CH3:Comp, CH4:POK CH1:FB, CH2:Vo, CH3:Comp, CH4:POK

Under OFS voltage protection Over OFS voltage protection

CH1:OFS, CH2:Comp, CH3:POK CH1:OFS, CH2:Vo, CH3:POK

REFOUT short to GND protection Load transient response (0.1A to 25A)

CH1:REFOUT, CH2:UGATE, CH3:Vo, CH4:POK CH1:Vo(ac), CH2:Io

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 EM5305
Functional Description
EM5305 is a voltage mode synchronous buck PWM UVP, Under Voltage Protection
controller. This device provides complete The FB voltage is monitored for under voltage
protection function such as over current protection, protection. The UVP threshold is typical 60% VOFS.
under voltage protection and over voltage When UVP is triggered, EM5305 will shut down the
protection. converter and cycles the soft start function in a
hiccup mode.
Supply Voltage
The VCC pin provides the bias supply of EM5305 OVP, Over Voltage Protection
control circuit, as well as lower MOSFET’s gate and The FB voltage is monitored for over voltage
the BOOT voltage for the upper MOSFET’s gate. A protection. The OVP threshold is typical 130% VOFS.
minimum 0.1uF ceramic capacitor is recommended When OVP is triggered, EM5305 will turn off upper
to bypass the supply voltage. MOSFET and turn on lower MOSFET.

Power ON Reset REFOUT and OFS

To let EM5305 start to operation, VCC voltage must The REFOUT pin provides the 0.8V voltage output
be higher than its POR voltage even when the with 5mA sourcing/sinking capability. The OFS pin
COMP/SD# voltage is pulled higher than enable is high impedance input and receives a voltage
high voltage. Typical POR voltage is 4.05V. range from 0.4V to 3V as the reference voltage.
Connecting a resistor between REFOUT pin and
Shutdown OFS pin can provide 0.8V as the reference input. By
The COMP/SD# pin can be used to enable or sourcing or sinking OFS pin through the resistor can
disable EM5305. Pull down COMP/SD# pin below adjust the input reference. Show as Fig.1
0.4V can disable the controller. FB
6
GM

Soft Start
OFS
EM5305 provides soft start function internally. The 9
FB voltage will track the internal soft start signal, Source/sink
control
which ramps up from zero during soft start period.
REFOUT 0.8V
10
OCP, Over Current Protection
The over current function protects the converter
from a shorted output by using lower MOSFET’s Fig.1 REFOUT and OFS application.
on-resistance to monitor the current. The OCP level
can be calculated as the following equation:

IOCSET • R OCSET
IOCP =
R DS(ON)

When OCP is triggered, EM5305 will shut down the

converter and cycles the soft start function in a
hiccup mode. If over current condition still exist
after 3 times of hiccup, EM5305 will shut down the
controller and latch.

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 EM5305
Feedback Compensation Fig.3 shows the Bode plot for the control loop. The
If fESR is lower than fcross and close to fLC, the compensation gain uses external impedance
phase lead of the capacitor ESR zero almost cancels networks ZIN and ZFB to provide a stable loop. A
the phase loss of one of the complex poles of the stable control loop has a gain crossing with
LC filter around the crossover frequency. Use a -20db/decade slope and phase margin greater than
Type II compensation network with a one zero and 45 degrees.
a high-frequency pole to stabilize the loop. In
Figure 2, RF and CF introduce a one zero (fZ1). RF
and CCF in the Type II compensation network
provide a high-frequency pole (fP1), which
mitigates the effects of the output high-frequency
ripple.

Fig.3 Bode Plot of Voltage Mode Buck Converter

Fig.2 Compensation II for Voltage Mode Buck Converter
When using a low-ESR tantalum or OSCON type, Output Inductor Selection
the ESR-induced zero frequency is usually above The output inductor is selected to meet the output
the targeted zero crossover frequency (fcross). Use voltage ripple requirements and minimize the
Type III compensation Fig3.Type III compensation response time to the load transient. The inductor
provides two zeros to cancel the pair of complex value determines the current ripple and voltage
poles introduced by LC filter. ripple. The ripple current is approximately the
following equation:

VIN − VOUT V
ΔIL = ∗ OUT
L VIN * FSW

Output Capacitor Selection

An output capacitor is required to filter the output
and supply the load transient. The selection of
output capacitor depends on the output ripple
voltage. The output ripple voltage is approximately
bounded by the following equation:
Fig.2 Compensation III for Voltage Mode Buck Converter
1
ΔVOUT = ΔIL * (ESR + )
8 * FSW * COUT

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 EM5305
Input Capacitor Selection
Use a mix of input bypass capacitors to control the Power MOSFET Selection
voltage overshoot across the MOSFET. Use small The EM5305 requires two N-Channel power
ceramic capacitors for high frequency decoupling MOSFETs. These should be selected based upon
and bulk capacitors to supply the current needed on-resistance, breakdown voltage, gate supply
each time the upper MOSFET turn on. Place the requirement, and thermal management
small ceramic capacitors physically close to the requirements.
MOSFETs and between the drain of the upper In high current applications, the MOSFET power
MOSFET and the source of the lower MOSFET. The dissipation, package selection and heat sink are the
important parameters of the input capacitor are dominate design factor. The power dissipation
the voltage rating and the RMS current rating. includes two loss components: conduction loss and
The capacitor voltage rating should be at least 1.25 switching loss. The conduction losses are the
times greater than the maximum input voltage and largest component of power dissipation for both
a voltage rating of 1.5 times is a conservative the upper and lower MOSFETs. These losses are
guideline. The RMS current rating requirement can distributed between the two MOSFETs according
be expressed as the following equation: to duty factor.
The power dissipations in the two MOSFETs are
IRMS = IOUT D(1 - D) approximately the following equation:

For a through hole design, several electrolytic PDUPPER = I2OUT * RDS(ON) * D + 0.5 * IOUT * VIN * FSW * tSW
capacitors may be needed. For surface mount
designs, solid tantalum capacitors can also be used PDLOWER = I2OUT * RDS(ON) * (1 - D)
but caution must be exercised with regard to the
capacitor surge current rating. These capacitors Where D is the duty cycle, tSW is the combined
must be capable of handling the surge current at switch ON and OFF time.
power-up. Some capacitor series available from
reputable manufacturers are surge current tested.

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 EM5305
Marking Information
Device Name: EM5305VT for DFN3X3-10L

EM
EM5305 Device Name
5305
ABCDEFG ABCDEFG: Date Code

Outline Drawing
E

b
D

A1
A3
E2

A
10 1
D2

6 5

L K

Dimension in mm
Dimension A A1 A3 b D E D2 E2 e L K
Min. 0.7 0.00 0.18 2.20 1.40 0.30 0.20
Typ. 0.75 0.02 0.2 0.25 3.0 3.0 0.50 0.40
Max. 0.80 0.05 0.30 2.70 1.75 0.50

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