ADuM5020 5028

Low Emission,
Isolated DC-to-DC Converters

Data Sheet ADuM5020/ADuM5028
FEATURES FUNCTIONAL BLOCK DIAGRAMS
isoPower integrated, isolated dc-to-dc converter NIC 1 16 NIC
ADuM5020
100 mA output current for ADuM5020
GND1 2 15 GNDISO
60 mA output current for ADuM5028
PDIS 3 PCS 14 VSEL
Meets CISPR22 Class B emissions limits at full load on a
GND1 4 13 GNDISO
2-layer PCB
16-lead SOIC_W package with 7.8 mm minimum creepage VDDP 5 OSC RECT REG 12 VISO
8-lead SOIC_IC package with 8.3 mm minimum creepage GND1 6 11 GNDISO
High temperature operation: 125°C maximum NIC 7 10 NIC
Safety and regulatory approvals GND1 8 9 GNDISO
16520-001
UL recognition (pending)
3000 V rms for 1 minute per UL 1577 NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING.
CSA Component Acceptance Notice 5A (pending) Figure 1. ADuM5020 Functional Block Diagram
VDE certificate of conformity (pending)
VDE V 0884-10
VIORM = 565 V peak
ADuM5028
CQC certification per GB4943.1-2011 (pending) PDIS 1 PCS 8 VSEL
APPLICATIONS GND1 2 7 GNDISO
RS-485/RS-422/CAN transceiver power VDDP 3 OSC RECT REG 6 VISO
16520-102
Power supply start-up bias and gate drives GND1 4 5 GNDISO
Isolated sensor interfaces

Industrial PLCs Figure 2. ADuM5028 Functional Block Diagram
GENERAL DESCRIPTION
The ADuM5020 and ADuM50281 are isoPower®, integrated, The ADuM5020 and ADuM5028 isolated dc-to-dc converters
isolated dc-to-dc converters. Based on the Analog Devices, Inc., provide two different package variants: the ADuM5020 in a
iCoupler® technology, these dc-to-dc converters provide wide body, 16-lead SOIC_W package, and the ADuM5028 in
regulated, isolated power that is below CISPR22 Class B limits at the space saving, 8-lead, wide body SOIC_IC. For 5 V input
full load on a 2-layer printed circuit board (PCB) with ferrites. operations, use the ADuM5020-5BRWZ and the ADuM5028-
Common voltage combinations and the associated current 5BRIZ. For 3.3 V input to 3.3 V output operations, use the
output levels are shown in Table 1 through Table 6. ADuM5020-3BRWZ and the ADuM5028-3RIZ. See the Pin
The ADuM5020 and ADuM5028 eliminate the need to design Configuration and Function Descriptions section and the
and build isolated dc-to-dc converters in applications up to Ordering Guide for more information.
500 mW. The iCoupler chip scale transformer technology is used
for the magnetic components of the dc-to-dc converter. The
result is a small form factor, isolated solution.
1
Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.
Rev. A Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2018 Analog Devices, Inc. All rights reserved.
Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
ADuM5020/ADuM5028 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1 Recommended Operating Conditions .......................................9
Applications ....................................................................................... 1 Absolute Maximum Ratings ......................................................... 10
Functional Block Diagrams ............................................................. 1 ESD Caution................................................................................ 10
General Description ......................................................................... 1 Pin Configuration and Function Descriptions........................... 11
Revision History ............................................................................... 2 Typical Performance Characteristics ........................................... 13
Specifications..................................................................................... 3 Theory of Operation ...................................................................... 16
Electrical Characteristics—5 V Primary Input Supply/5 V Applications Information .............................................................. 17
Secondary Isolated Supply .......................................................... 3 PCB Layout ................................................................................. 17
Electrical Characteristics—5 V Primary Input Supply/3.3 V Thermal Analysis ....................................................................... 18
Secondary Isolated Supply .......................................................... 4
EMI Considerations ................................................................... 18
Electrical Characteristics—3.3 V Primary Input Supply/3.3 V
Secondary Isolated Supply .......................................................... 5 Insulation Lifetime ..................................................................... 18
Regulatory Approvals................................................................... 6 Outline Dimensions ....................................................................... 20
Insulation and Safety Related Specifications ............................ 6 Ordering Guide .......................................................................... 21
Package Characteristics ............................................................... 7

DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics .............................................................................. 7
REVISION HISTORY
12/2018—Rev. 0 to Rev. A
Change to Features Section ............................................................. 1
Change to General Description Section ........................................ 1
Changes to Table 1 Table Title, Efficiency at IISO (MAX) Parameter,
Table 1, and Table 2 .......................................................................... 3
Changes to Table 3 and Table 4 ....................................................... 4
Added Electrical Characteristics—3.3 V Primary Input
Supply/3.3 V Secondary Isolated Supply Section, Table 5, and
Table 6; Renumbered Sequentially ................................................. 5
Changes to Table 14 .......................................................................... 9
Changes to Table 17, Table 18, and Table 19 ............................... 11
Changes to Figure 7, Figure 8, and Figure 9................................ 12
Change to Theory of Operations Section .................................... 15
Changes to Ordering Guide .......................................................... 20
6/2018—Revision 0: Initial Version
Rev. A | Page 2 of 20
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY
All typical specifications are at TA = 25°C, VDDP = VISO = 5 V. Minimum and maximum specifications apply over the entire recommended
operation range, which is 4.5 V ≤ VDDP ≤ 5.5 V, 4.5 V ≤ VISO ≤ 5.5 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted.
Table 1. ADuM5020-5BRIZ DC-to-DC Converter Static Specifications

Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC-TO-DC CONVERTER SUPPLY
Setpoint VISO 4.75 5.0 5.25 V VISO output current (IISO) = 10 mA
Line Regulation VISO (LINE) 2 mV/V IISO = 50 mA, VDDP = 4.5 V to 5.5 V
Load Regulation1 VISO (LOAD) 1 5 % IISO = 10 mA to 90 mA
Output Ripple1 VISO (RIP) 75 mV p-p 20 MHz bandwidth, bypass output capacitance (CBO) =
0.1 µF||10 µF, IISO = 90 mA
Output Noise1 VISO (NOISE) 200 mV p-p CBO = 0.1 µF||10 µF, IISO = 90 mA
Switching Frequency fOSC 180 MHz
Pulse-Width Modulation (PWM) fPWM 625 kHz
Frequency
Output Supply Current 1 IISO (MAX) 50 mA 4.75 V < VISO < 5.25 V
100 mA 4.5 V < VISO < 5.25 V
Efficiency at IISO (MAX) 33 % IISO = 100 mA, TA = 25°C
VDDP Supply Current
No VISO Load IDDP (Q) 8 25 mA
Full VISO Load IDDP (MAX) 310 mA
Thermal Shutdown
Shutdown Temperature 154 °C
Thermal Hysteresis 10 °C
1
Maximum VISO output current is derated by 1.75 mA/ºC for TA > 85ºC.
Setpoint VISO 4.75 5.0 5.25 V IISO = 10 mA
Output Ripple1 VISO (RIP) 75 mV p-p 20 MHz bandwidth, CBO = 0.1 µF||10 µF, IISO = 54 mA
PWM Frequency fPWM 625 kHz
VDDP Supply Current
Thermal Shutdown
1
Maximum VISO output current is derated by 1 mA/ºC for TA > 85ºC.
ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
All typical specifications are at TA = 25°C, VDDP = 5.0 V, VISO = 3.3 V. Minimum/maximum specifications apply over the entire
recommended operation range, which is 4.5 V ≤ VDDP ≤ 5.5 V, 3.0 V ≤ VISO ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted.

100 mA 3.0 V < VISO < 3.465 V
VDDP Supply Current
Thermal Shutdown
1
Maximum VISO output current is derated by 1.75 mA/ºC for TA > 85ºC.

60 mA 3.0 V < VISO < 3.465 V
VDDP Supply Current
Thermal Shutdown
1
Maximum VISO output current is derated by 1 mA/ºC for TA > 85ºC.
ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
All typical specifications are at TA = 25°C, VDDP = 3.3 V, VISO = 3.3 V. Minimum/maximum specifications apply over the entire
recommended operation range, which is 3.0 V ≤ VDDP ≤ 3.6 V, 3.0 V ≤ VISO ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted.
Table 5. ADuM5020-3BRWZ DC-to-DC Converter Static Specifications

70 mA 3.0 V < VISO < 3.465 V
VDDP Supply Current
Thermal Shutdown
1
Maximum VISO output current is derated by 2 mA/°C for TA > 105°C.
60 mA 3.0 V < VISO < 3.465 V
VDDP Supply Current
Thermal Shutdown
1
Maximum VISO output current is derated by 2 mA/°C for TA > 105°C.
REGULATORY APPROVALS
Table 7.
UL (Pending) 1 CSA (Pending) VDE (Pending) 2 CQC (Pending)
Recognized Under 1577 Component Approved under CSA Component DIN V VDE V 0884-10 Certified under
Recognition Program1 Acceptance Notice 5A (VDE V 0884-10):2006-12 CQC11-471543-2012
Single Protection, 3000 V rms CSA 60950-1-07+A1+A2 and Reinforced insulation GB4943.1-2011:
Isolation Voltage IEC 60950-1, second edition, +A1+A2 565 V peak, surge isolation Basic insulation at 780 V rms
voltage (VIOSM) = (1103 V peak)
6000 V peak
Basic insulation at 780 V rms Transient voltage (VIOTM) = Reinforced insulation at
(1103 V peak) 4242 V peak 390 V rms (552 V peak)
Reinforced insulation at 390 V rms
(552 V peak)
IEC 60601-1 Edition 3.1:
Basic insulation (1 means of patient
protection (1 MOPP)), 585 V rms
(827 V peak)
CSA 61010-1-12 and IEC 61010-1 third
edition:
Basic insulation at 300 V rms mains,
780 V rms (1103 V peak)
Reinforced insulation at 300 V rms
mains, 390 V rms (552 V peak)
File E214100 File 205078 File 2471900-4880-0001 File (pending)
1
In accordance with UL 1577, each ADuM5020 and ADuM5028 are proof tested by applying an insulation test voltage ≥ 3600 V rms for 1 sec.
2
In accordance with DIN V VDE V 0884-10, each ADuM5020 and ADuM5028 are proof tested by applying an insulation test voltage ≥ 1059 V peak for 1 sec (partial
discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY RELATED SPECIFICATIONS

For additional information, see www.analog.com/icouplersafety.
Table 8. ADuM5020 Insulation and Safety

Parameter Symbol Value Unit Test Conditions/Comments
Rated Dielectric Insulation Voltage 3000 V rms 1-minute duration
Minimum External Air Gap (Clearance) L (I01) 7.8 mm min Measured from input terminals to output terminals,
shortest distance through air
Minimum External Tracking (Creepage) L (I02) 7.8 mm min Measured from input terminals to output terminals,
shortest distance path along body
Minimum Clearance in the Plane of the Printed L (PCB) 8.3 mm min Measured from input terminals to output terminals,
Circuit Board (PCB Clearance) shortest distance through air, line of sight, in the PCB
mounting plane
Minimum Internal Gap (Internal Clearance) 25.5 μm min Insulation distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >600 V DIN IEC 112/VDE 0303 Part 1
Material Group I Material Group (DIN VDE 0110, 1/89, Table 1)
Table 9. ADuM5028 Insulation and Safety

Parameter Symbol Value Unit Test Conditions/Comments
Rated Dielectric Insulation Voltage 3000 V rms 1-minute duration
Minimum External Air Gap (Clearance) L (I01) 8.3 mm min Measured from input terminals to output terminals,
shortest distance through air
Minimum External Tracking (Creepage) L (I02) 8.3 mm min Measured from input terminals to output terminals,
shortest distance path along body
Minimum Clearance in the Plane of the Printed L (PCB) 8.3 mm min Measured from input terminals to output terminals,
Circuit Board (PCB Clearance) shortest distance through air, line of sight, in the PCB
mounting plane
Minimum Internal Gap (Internal Clearance) 25.5 μm min Insulation distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >600 V DIN IEC 112/VDE 0303 Part 1
Material Group I Material Group (DIN VDE 0110, 1/89, Table 1)
PACKAGE CHARACTERISTICS
Table 10. ADuM5020 Package Characteristics
Resistance (Input to Output) 1 RI-O 1013 Ω
Capacitance (Input to Output)1 CI-O 2.2 pF f = 1 MHz
Input Capacitance 2 CI 4.0 pF
IC Junction to Ambient Thermal θJA 45 °C/W Thermocouple located at center of package
Resistance underside 3
1
This device is considered a 2-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
2
Input capacitance is from any input data pin to ground.
3
The value of θJA is based on devices mounted on a JEDEC JESD-51 standard 2s2p board and still air.
Table 11. ADuM5028 Package Characteristics
Resistance (Input to Output) 1 RI-O 1013 Ω
Capacitance (Input to Output)1 CI-O 2.2 pF f = 1 MHz
Input Capacitance 2 CI 4.0 pF
IC Junction to Ambient Thermal θJA 80 °C/W Thermocouple located at center of package
Resistance underside 3
1
This device is considered a 2-terminal device: Pin 1 through Pin 4 are shorted together, and Pin 5 through Pin 8 are shorted together.
2
Input capacitance is from any input data pin to ground.
3
The value of θJA is based on devices mounted on a JEDEC JESD-51 standard 2s2p board and still air.
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
These isolators are suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by
the protective circuits. The asterisk (*) marking on packages denotes DIN V VDE V 0884-10 approval.
Table 12. ADuM5020 VDE Characteristics

Description Test Conditions/Comments Symbol Characteristic Unit
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms I to IV
For Rated Mains Voltage ≤ 300 V rms I to III
For Rated Mains Voltage ≤ 400 V rms I to II
Climatic Classification 40/125/21
Pollution Degree per DIN VDE 0110, Table 1 2
Maximum Working Insulation Voltage VIORM 565 V peak
Input to Output Test Voltage, Method b1 VIORM × 1.875 = VPR, 100% production test, tm = 1 sec, VPR 1059 V peak
partial discharge < 5 pC
Input to Output Test Voltage, Method a VPR
After Environmental Tests Subgroup 1 VIORM × 1.5 = Vpd(m), tini = 60 sec, tm = 10 sec, Vpd(m) 848 V peak
After Input or Safety Test Subgroup 2 VIORM × 1.2 = Vpd(m), tini = 60 sec, tm = 10 sec, Vpd(m) 678 V peak
and Subgroup 3 partial discharge < 5 pC
Highest Allowable Overvoltage Transient overvoltage, tTR = 10 sec VIOTM 4242 V peak
Withstand Isolation Voltage 1 minute withstand rating VISO 3000 V rms
Surge Isolation Voltage Reinforced VIOSM(TEST) = 10 kV; 1.2 µs rise time; 50 µs, 50% fall time VIOSM 6000 V peak
Safety Limiting Values Maximum value allowed in the event of a failure
(see Figure 3)
Case Temperature TS 150 °C
Total Power Dissipation at 25°C IS1 2.78 W
Insulation Resistance at TS VIO = 500 V RS >109 Ω
Table 13. ADuM5028 VDE Characteristics
Description Test Conditions/Comments Symbol Characteristic Unit
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms I to IV
For Rated Mains Voltage ≤ 300 V rms I to III
For Rated Mains Voltage ≤ 400 V rms I to II
Climatic Classification 40/125/21
Pollution Degree per DIN VDE 0110, Table 1 2
Maximum Working Insulation Voltage VIORM 565 V peak
Input to Output Test Voltage, Method b1 VIORM × 1.875 = VPR, 100% production test, tm = 1 sec, VPR 1059 V peak
Input to Output Test Voltage, Method a VPR
After Environmental Tests Subgroup 1 VIORM × 1.5 = Vpd(m), tini = 60 sec, tm = 10 sec, Vpd(m) 848 V peak
After Input and/or Safety Test Subgroup 2 VIORM × 1.2 = Vpd(m), tini = 60 sec, tm = 10 sec, Vpd(m) 678 V peak
and Subgroup 3 partial discharge < 5 pC
Highest Allowable Overvoltage Transient overvoltage, tTR = 10 sec VIOTM 4242 V peak
Withstand Isolation Voltage 1 minute withstand rating VISO 3000 V rms
Surge Isolation Voltage Reinforced VIOSM(TEST) = 10 kV; 1.2 µs rise time; 50 µs, 50% fall time VIOSM 6000 V peak
Safety Limiting Values Maximum value allowed in the event of a failure
(see Figure 4)
Case Temperature TS 150 °C
Total Power Dissipation at 25°C IS1 1.56 W
Insulation Resistance at TS VIO = 500 V RS >109 Ω
3.0
RECOMMENDED OPERATING CONDITIONS
2.5 Table 14.
SAFE LIMITING POWER (W)
Parameter Symbol Min Typ Max Unit

2.0 Operating Temperature1 TA −40 +125 °C
Supply Voltages 2 VDDP
1.5 ADuM5020-5BRWZ, 4.5 5.5 V
ADuM5028-5BRIZ,
1.0 VDDP at VISO = 3.135 V
to 3.465 V
0.5 ADuM5020-3BRWZ, 3.0 3.6 V
ADuM5028-3BRIZ,
VDDP at VISO = 3.135 V
0
to 3.465 V
16520-002
0 50 100 150 200
AMBIENT TEMPERATURE (°C) ADuM5020-5BRWZ, 4.5 5.5 V
Figure 3. ADuM5020 Thermal Derating Curve, Dependence of Safety Limiting ADuM5028-5BRIZ,
Values with Ambient Temperature per DIN V VDE V 0884-10 VDDP at VISO = 4.75 V
to 5.25 V
1.8
1.6
1
Operation at >85°C requires reduction of the maximum load current.
2
Each voltage is relative to its respective ground.
SAFETY LIMITING POWER (W)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
16520-104
0 50 100 150 200

AMBIENT TEMPERATURE (°C)
Figure 4. ADuM5028 Thermal Derating Curve, Dependence of Safety Limiting

Values with Ambient Temperature per DIN V VDE V 0884-10
ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted. Table 16. Maximum Continuous Working Voltage
Table 15. Supporting 50-Year Minimum Lifetime1
Parameter Rating Applicable
Parameter Max Unit Certification
Storage Temperature (TST) −55°C to +150°C
AC Voltage
Ambient Operating Temperature (TA) −40°C to +125°C
Bipolar Waveform 560 V peak 50-year operation
Supply Voltages (VDDP, VISO)1 −0.5 V to +7.0 V
Unipolar Waveform
VISO Supply Current
Basic Insulation 560 V peak 50-year operation
ADuM5020 100 mA
DC Voltage
ADuM5028 60 mA
Basic Insulation 1000 V peak 50-year operation
Input Voltage (PDIS, VSEL)1, 2 −0.5 V to VDDI + 0.5 V
Common-Mode Transients3 −200 kV/µs to +200 kV/µs 1
Maximum continuous working voltage refers to the continuous voltage
magnitude imposed across the isolation barrier. See the Insulation Lifetime
1
All voltages are relative to their respective ground. section for more information.
2
VDDI is the input side supply voltage.
3
Common-mode transients refer to common-mode transients across the
insulation barrier. Common-mode transients exceeding the absolute ESD CAUTION
maximum ratings may cause latch-up or permanent damage.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

NIC 1 16 NIC
GND1 2 15 GNDISO
PDIS 3 14 VSEL
GND1 4 ADuM5020 13 GNDISO
TOP VIEW
VDDP 5 (Not to Scale) 12 VISO
GND1 6 11 GNDISO
NIC 7 10 NIC
GND1 8 9 GNDISO
16520-003
NIC = NO INTERNAL CONNECTION.
LEAVE THESE PINS FLOATING.
Figure 5. Pin Configuration
Table 17. ADuM5020 Pin Function Descriptions

Pin No. Mnemonic Description
1, 7, 10, 16 NIC No Internal Connection. Leave these pins floating.
2, 4, 6, 8 GND1 Ground 1. Ground reference for the primary. It is recommended that these pins be connected to a common ground.
3 PDIS Power Disable. When tied to any GND1 pin, the VISO output voltage is active. When a logic high voltage is applied,
the VISO output voltage is shut down. Do not leave this pin floating.
5 VDDP Primary Supply Voltage.
9, 11, 13, 15 GNDISO Ground Reference for VISO on Side 2. It is recommended that these pins be connected to a common ground.
12 VISO Secondary Supply Voltage Output for External Loads.
14 VSEL Output Voltage Selection. Connect VSEL to VISO for 5 V output or connect VSEL to GNDISO for 3.3 V output. This pin has a
weak internal pull-up. Therefore, do not leave this pin floating. It is recommended that the ADuM5020-3BRWZ and
the ADuM5028-3BRIZ are only used for 3.3 V input to 3.3 V operation, therefore connect VSEL to GNDISO.
PDIS 1 8 VSEL
GND1 2 ADuM5028 7 GNDISO
TOP VIEW
VDDP 3 (Not to Scale) 6 VISO
16520-106
GND1 4 5 GNDISO
Figure 6. ADuM5028 Pin Configuration
Table 18. ADuM5028 Pin Function Descriptions

Pin No. Mnemonic Description
1 PDIS Power Disable. When tied to any GND1 pin, the VISO output voltage is active. When a logic high voltage is applied, the
VISO output voltage is shut down. Do not leave this pin floating.
2, 4 GND1 Ground 1. Ground reference for the primary. It is recommended that these pins be connected to a common ground.
3 VDDP Primary Supply Voltage.
5, 7 GNDISO Ground Reference for VISO on Side 2. It is recommended that these pins be connected together.
6 VISO Secondary Supply Voltage Output for External Loads.
8 VSEL Output Voltage Selection. Connect VSEL to VISO for 5 V output or connect VSEL to GNDISO for 3.3 V output. This pin has a
weak internal pull-up; therefore, do not leave this pin floating. It is recommended that the ADuM5020-3BRWZ and the
ADuM5028-3BRIZ are only used for 3.3 V input to 3.3 V operation, therefore connect VSEL to GNDISO.
Table 19. Truth Table (Positive Logic)

VDDP (V) VSEL Input PDIS Input VISO Output (V) Notes
5 High Low 5
5 Low Low 3.3
5 Don’t care High 0
3.3 Low Low 3.3
3.3 High Low 5 Configuration not recommended
3.3 Don’t care High 0
TYPICAL PERFORMANCE CHARACTERISTICS

35 5.10
30 5.08
25 5.06
EFFICIENCY (%)
20 5.04
VISO (V)
15 5.02
10 5.00
5 3.3V IN/3.3V OUT 4.98

5V IN/5V OUT
5V IN/3.3V OUT
0 4.96
16520-004
16520-007
0 0.02 0.04 0.06 0.08 0.10 0 0.02 0.04 0.06 0.08 0.10
IISO OUTPUT CURRENT (A) IISO OUTPUT CURRENT (A)
Figure 7. Typical Power Supply Efficiency in Supported Supply Configurations Figure 10. VISO vs. IISO Output Current, Input = 5 V, VISO = 5 V
0.10 3.36
0.09
3.34
0.08
IISO OUTPUT CURRENT (A)
0.07 3.32
0.06
3.30
VISO (V)
0.05
3.28
0.04
0.03 3.26
0.02
3.3V IN/3.3V OUT 3.24
0.01 5V IN/5V OUT
5V IN/3.3V OUT
0
16520-005
3.22
16520-008
0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0 0.02 0.04 0.06 0.08 0.10
INPUT CURRENT (A) IISO OUTPUT CURRENT (A)
Figure 8. IISO Output Current vs. Input Current in Supported Power Figure 11. VISO vs. IISO Output Current, Input = 5 V,
Configurations VISO = 3.3 V
1.1 5.10
1.0
5.08
TOTAL POWER DISSIPATION (W)
0.9
0.8
5.06
0.7
5.04
VISO (V)
0.6
0.5
5.02
0.4
0.3 5.00
0.2
3.3V IN/3.3V OUT
4.98
0.1 5V IN/5V OUT
5V IN/3.3V OUT
0 4.96
16520-006
16520-009
0 0.02 0.04 0.06 0.08 0.10 –50 –25 0 25 50 75 100 125

IISO OUTPUT CURRENT (A) TEMPERATURE (°C)
Figure 9. Total Power Dissipation vs. IISO Output Current in Supported Power Figure 12. VISO vs. Temperature, Input = 5 V, VISO Output = 5 V
Configurations
3.32 3.0
POWER DISSIPATION
IDD1
IDD1 (A) AND POWER DISSIPATION (W)

3.30
2.5
3.28
2.0
3.26
VISO (V)
1.5
3.24
1.0
3.22
0.5
3.20
3.18 0
16520-011
16520-014
–50 –25 0 25 50 75 100 125 3.5 4.0 4.5 5.0 5.5
TEMPERATURE (°C) VDDP (V)
Figure 13. VISO vs. Temperature, Input = 3.3 V, VISO Output = 3.3 V Figure 16. Short-Circuit Input Current (IDD1) and Power Dissipation vs. VDDP
15 1,000
VISO AT 5V (mV)
PERCENT LOAD
10 500
VISO (mV)
5 0
5V VISO(RIP) (mV)
0 –500
–5 100
RATED LOAD (%)

–1,000
–10 50
–15 0
16520-012
16520-015
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 1.0 2.0 3.0 4.0 5.0 6.0
TIME (µs) TIME (ms)
Figure 14. VISO Ripple, 5 V Input to 5 V Output at 90% Load, Figure 17. VISO Transient Load Response 5 V Input to 5 V Output 10% to 90%
Bandwidth = 20 MHz Load Step
15 1,000
VISO AT 3.3V (mV)
PERCENT LOAD
10 500
VISO (mV)
3.3V VISO(RIP) (mV)
5 0
0 –500
–5 100
RATED LOAD (%)
–1,000
–10 50
–15 0
16520-013
16520-115
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 –1.0 0 1.0 2.0 3.0 4.0
TIME (µs) TIME (ms)
Figure 15. VISO Ripple, 5 V Input to 3.3 V Output at 90% Load, Figure 18. VISO Transient Load Response 5 V Input to 3.3 V Output, 10% to
Bandwidth = 20 MHz 90% Load Step
7 5
VISO AT 10% LOAD (V) VISO AT 10% LOAD (V)
VISO AT 90% LOAD (V) VISO AT 90% LOAD (V)
6
4
5
3
4
VISO (V)
VISO (V)
3 2
2
1
1
0
0
–1 –1
16520-016
16520-017
0 1 2 3 4 0 1 2 3 4
TIME (ms) TIME (ms)
Figure 19. 5 V Input to 5 V Output VISO Start-Up Transient at 10% and 90% Figure 20. 5 V Input to 3.3 V Output VISO Start-Up Transient at 10% and 90%
Load Load
THEORY OF OPERATION
The ADuM5020/ADuM5028 dc-to-dc work on principles that regulates the output by creating a PWM control signal that is sent
are common to most standard power supplies. The converters to the primary (VDDP) side by a dedicated iCoupler data
have a split controller architecture with isolated PWM feedback. channel. The PWM modulates the oscillator circuit to control the
VDDP power is supplied to an oscillating circuit that switches power being sent to the secondary side. Feedback allows
current into a chip scale air core transformer. Power transferred to significantly higher power and efficiency.
the secondary side is rectified and regulated to 3.3 V or 5.0 V, The ADuM5020/ADuM5028 implement undervoltage lockout
depending on the setting of the VSEL pin. Note that the (UVLO) with hysteresis on the primary and secondary side input
ADuM5020-3BRWZ and the ADuM5028-3BRIZ can only be and output pins as well as the VDDP power input. The UVLO
used for 3.3 V input to 3.3 V output applications, and the feature ensures that the converters do not go into oscillation due
ADuM5020-5BRWZ and ADuM5028-5BRIZ operate best for to noisy input power or slow power-on ramp rates.
5 V input applications. The secondary (VISO) side controller
APPLICATIONS INFORMATION
PCB LAYOUT for several operating frequencies. Noise suppression requires a
The ADuM5020 and ADuM5028 isoPower integrated dc-to-dc low inductance, high frequency capacitor, whereas ripple
converters require power supply bypassing at the input and suppression and proper regulation require a large value capacitor.
output supply pins (see Figure 21 and Figure 22). Low effective These capacitors are most conveniently connected between the
series resistance (ESR) 0.1 μF bypass capacitors are required VDDP pin and GND1 pin, and between the VISO pin and GNDISO pin.
between the VDDP pin and GND1 pin, as close to the chip pads To suppress noise and reduce ripple, a parallel combination of at
as possible. Low ESR 0.1 μF or 0.22 μF capacitors are required least two capacitors is required. The recommended capacitor values
between the VISO pin and GNDISO pin, as close to the chip pads are 0.1 μF and 10 μF for VDDP and VISO. The smaller capacitor
as possible (see the CISO note in Figure 23 and Figure 24 for must have a low ESR. For example, use of a ceramic capacitor is
more information). The isoPower inputs require multiple advised. The total lead length between the ends of the 0.1 μF low
passive components to bypass the power effectively, as well as ESR capacitors, and the power supply pins must not exceed 2 mm.
set the output voltage and bypass the core voltage regulator (see To reduce the level of electromagnetic radiation, the impedance
Figure 21 through Figure 26). to high frequency currents between the VISO and GNDISO pins and
PDIS
the PCB trace connections can be increased. Using this method
3
GND1
of electromagnetic interference (EMI) suppression controls the
4
radiating signal at its source by placing surface-mount ferrite beads
VDDP
5 in series with the VISO and GNDISO pins, as shown in Figure 25
GND1
10µF 0.1µF 6 and Figure 26. The impedance of the ferrite bead is chosen to be
about 1.8 kΩ between the 100 MHz and 1 GHz frequency range to
16520-018
reduce the emissions at the 180 MHz primary switching frequency

Figure 21. ADuM5020 VDDP Bias and Bypass Components and the 360 MHz secondary side rectifying frequency and
harmonics. See Table 20 for examples of appropriate surface-
PDIS
1 mount ferrite beads.
GND1
2
VDDP Table 20. Surface-Mount Ferrite Beads Example

3
GND1 Manufacturer Part No.
10µF 0.1µF 4
Taiyo Yuden BKH1005LM182-T
16520-122
Murata Electronics BLM15HD182SN1
Figure 22. ADuM5028 VDDP Bias and Bypass Components

ADuM5020
VSEL
14
NIC NIC
GNDISO
13 GND1 GNDISO
VISO FB1 PDIS VSEL
12 VISO OUT
GND 1 GNDISO
GNDISO
11 CISO 10µF VDDP VISO VISO OUT
FB2 GND1 GNDISO
10µF 0.1µF NIC NIC CISO FERRITES 10µF
16520-019
GND1 GNDISO
CISO = 0.1µF FOR VDDP = 5V AND VISO = 5V,
CISO = 0.22µF FOR VDDP = 5V AND VISO = 3.3V
BYPASS <2mm
Figure 23. ADuM5020 VISO Bias and Bypass Components
16520-020

CISO = 0.22µF FOR VDDP = 5V AND VISO = 3.3V
VSEL
8
Figure 25. Recommended ADuM5020 PCB Layout
GNDISO
7
FB1
ADuM5028
VISO
6 VISO OUT
GNDISO PDIS VSEL
5 CISO 10µF
GND1 GNDISO
FB2
VDDP VISO VISO OUT
GND1 GNDISO
10µF 0.1µF
16520-124
CISO FERRITES 10µF

CISO = 0.22µF FOR VDDP = 5V AND VISO = 3.3V BYPASS <2mm
16520-126

Figure 24. ADuM5028 VISO Bias and Bypass Components CISO = 0.22µF FOR VDDP = 5V AND VISO = 3.3V
The power supply section of the ADuM5020 and ADuM5028 Figure 26. Recommended ADuM5028 PCB Layout
uses a 180 MHz oscillator frequency to efficiently pass power
through its chip scale transformers. Bypass capacitors are required
In applications involving high common-mode transients, ensure surface insulation of components that allows the components to be
that board coupling across the isolation barrier is minimized. categorized in different material groups. Lower material group
Furthermore, design the board layout such that any coupling ratings are more resistant to surface tracking and, therefore, can
that does occur equally affects all pins on a given component provide adequate lifetime with smaller creepage. The minimum
side. Failure to ensure these steps can cause voltage differentials creepage for a given working voltage and material group is in
between pins, exceeding the absolute maximum ratings specified in each system level standard and is based on the total rms voltage
Table 15, thereby leading to latch-up or permanent damage. across the isolation, pollution degree, and material group. The
material group and creepage for the ADuM5020 and ADuM5028
THERMAL ANALYSIS
are presented in Table 8 and Table 9.
The ADuM5020 and ADuM5028 each consist of three internal
die attached to a split lead frame. For thermal analysis, the die is Insulation Wear Out
treated as a thermal unit, with the highest junction temperature The lifetime of insulation caused by wear out is determined by
reflected in the θJA values, shown in Table 10 and Table 11. The its thickness, material properties, and the voltage stress applied.
value of θJA is based on measurements taken with the devices It is important to verify that the product lifetime is adequate at
mounted on a JEDEC standard, 4-layer board with fine width the application working voltage. The working voltage supported
traces and still air. Under normal operating conditions, the by an isolator for wear out may not be the same as the working
ADuM5020 and ADuM5028 can operate at full load, but at voltage supported for tracking. The working voltage applicable
temperatures greater than 85°C, derating the output current to tracking is specified in most standards.
may be needed, as shown in Figure 3 and Figure 4. Testing and modeling show that the primary driver of long-term
EMI CONSIDERATIONS degradation is displacement current in the polyimide insulation
causing incremental damage. The stress on the insulation can be
The ADuM5020/ADuM5028 dc-to-dc converters must, of
grouped into broad categories, such as dc stress, which causes very
necessity, operate at a high frequency to allow efficient power
little wear out because there is no displacement current, and an
transfer through the small transformers. This high frequency
ac component time varying voltage stress, which causes wear out.
operation creates high frequency currents that can propagate in
circuit board ground and power planes, requiring proper power The ratings in certification documents are usually based on a
supply bypassing at the input and output supply pins 60 Hz sinusoidal waveform because this stress reflects isolation
(see Figure 25 and Figure 26). Using proper layout, bypassing from line voltage. However, many practical applications have
techniques, and surface-mount ferrite beads in series with the combinations of 60 Hz ac and dc across the barrier as shown in
VISO and GNDISO pins, the dc-to-dc converters are designed to Equation 1. Because only the ac portion of the stress causes
provide regulated, isolated power that is below CISPR22 Class B wear out, the equation can be rearranged to solve for the ac rms
limits at full load on a 2-layer PCB with ferrites. voltage, as shown in Equation 2. For insulation wear out with the
polyimide materials used in these products, the ac rms voltage
INSULATION LIFETIME determines the product lifetime.
All insulation structures eventually break down when subjected to
voltage stress over a sufficiently long period. The rate of insulation VRMS  VAC RMS2  VDC2 (1)
degradation is dependent on the characteristics of the voltage or
waveform applied across the insulation, as well as on the materials
VAC RMS  VRMS2  VDC2 (2)
and material interfaces.
The two types of insulation degradation of primary interest are where:
breakdown along surfaces exposed to the air and insulation wear VRMS is the total rms working voltage.
out. Surface breakdown is the phenomenon of surface tracking VAC RMS is the time varying portion of the working voltage.
and the primary determinant of surface creepage requirements VDC is the dc offset of the working voltage.
in system level standards. Insulation wear out is the phenomenon Calculation and Use of Parameters Example
where charge injection or displacement currents inside the
The following example frequently arises in power conversion
insulation material cause long-term insulation degradation.
applications. Assume that the line voltage on one side of the
Surface Tracking isolation is 240 V ac rms and a 400 V dc bus voltage is present
Surface tracking is addressed in electrical safety standards by on the other side of the isolation barrier. The isolator material is
setting a minimum surface creepage based on the working voltage, polyimide. To establish the critical voltages in determining the
the environmental conditions, and the properties of the insulation creepage, clearance, and lifetime of a device, see Figure 27 and
material. Safety agencies perform characterization testing on the the following equations.
To determine if the lifetime is adequate, obtain the time varying
portion of the working voltage. To obtain the ac rms voltage,
use Equation 2.
ISOLATION VOLTAGE
VAC RMS
V=
AC RMS VRMS 2 − VDC 2
= 4662 − 4002
VPEAK VRMS VDC
VAC RMS
VAC RMS = 240 V rms

In this case, the ac rms voltage is simply the line voltage of
16520-021
TIME
240 V rms. This calculation is more relevant when the waveform is
not sinusoidal. The value is compared to the limits for working
Figure 27. Critical Voltage Example
voltage in Table 16 for the expected lifetime, which is less than a
The working voltage across the barrier from Equation 1 is 60 Hz sine wave, and it is well within the limit for a 50-year
service life.
=
VRMS VAC RMS 2 + VDC 2
Note that the dc working voltage limit is set by the creepage of
VRMS = 240 2 + 400 2 the package as specified in IEC 60664-1. This value can differ
for specific system level standards.
VRMS = 466 V
This VRMS value is the working voltage used together with the
material group and pollution degree when looking up the creepage
required by a system standard.
OUTLINE DIMENSIONS
10.50 (0.4134)
10.10 (0.3976)
16 9
7.60 (0.2992)
7.40 (0.2913)
1 10.65 (0.4193)
8
10.00 (0.3937)
1.27 (0.0500) 0.75 (0.0295)

BSC 45°
2.65 (0.1043) 0.25 (0.0098)
0.30 (0.0118) 2.35 (0.0925)
8°
0.10 (0.0039) 0°
COPLANARITY
0.10 0.51 (0.0201) SEATING 1.27 (0.0500)
PLANE 0.33 (0.0130)
0.31 (0.0122) 0.20 (0.0079) 0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-013-AA
03-27-2007-B
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 28. 16-Lead Standard Small Outline Package [SOIC_W]

Wide Body (RW-16)
Dimensions shown in millimeters and (inches)
6.05
5.85
5.65
8 5
7.60
7.50
7.40
10.51
10.31
PIN 1 1 4 10.11
MARK
0.75
2.45
2.65 0.50 45°
2.35 1.04
2.50 0.25 8°
2.25 BSC
2.35 0°
0.30
0.20 SEATING 0.33
1.27 BSC 0.51
0.10 PLANE 0.27
0.41 0.75
COPLANARITY 0.20
0.58
09-17-2014-B
0.31
0.10
0.40
Figure 29. 8-Lead Standard Small Outline Package, with Increased Creepage [SOIC_IC]
Wide Body
(RI-8-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model1, 2, 3, 4 Typical VDDP Voltage (V) Temperature Range Package Description Package Option
ADuM5020-5BRWZ 5.0 −40°C to +125°C 16-Lead SOIC_W RW-16
ADuM5020-5BRWZ-RL 5.0 −40°C to +125°C 16-Lead SOIC_W RW-16
ADuM5020-3BRWZ 3.3 −40°C to +125°C 16-Lead SOIC_W RW-16
ADuM5020-3BRWZ-RL 3.3 −40°C to +125°C 16-Lead SOIC_W RW-16
ADuM5028-5BRIZ 5.0 −40°C to +125°C 8-Lead SOIC_IC RI-8-1
ADuM5028-5BRIZ-RL 5.0 −40°C to +125°C 8-Lead SOIC_IC RI-8-1
ADuM5028-3BRIZ 3.3 −40°C to +125°C 8-Lead SOIC_IC RI-8-1
ADuM5028-3BRIZ-RL 3.3 −40°C to +125°C 8-Lead SOIC_IC RI-8-1
EVAL-ADuM5020EBZ ADuM5020 Evaluation Board
EVAL-ADuM5028EBZ ADuM5028 Evaluation Board
1
Z = RoHS Compliant Part.
2
The EVAL-ADuM5020EBZ is packaged with the ADuM5020-5BRWZ installed and can be used for evaluating the ADuM6020.
3
The EVAL-ADuM5028EBZ is packaged with the ADuM5028-5BRIZ installed and can be used for evaluating the ADuM6028.
4
For 5 V input operations, use the ADuM5020-5BRWZ and ADuM5028-5BRIZ. For 3.3 V input to 3.3 V output operations, use the ADuM5020-3BRWZ and the ADuM5028-
3BRIZ.
©2018 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.
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Low Emission,

Isolated DC-to-DC Converters

8-lead SOIC_IC package with 8.3 mm minimum creepage GND1 6 11 GNDISO

High temperature operation: 125°C maximum NIC 7 10 NIC

Safety and regulatory approvals GND1 8 9 GNDISO

APPLICATIONS GND1 2 7 GNDISO

RS-485/RS-422/CAN transceiver power VDDP 3 OSC RECT REG 6 VISO

Isolated sensor interfaces

Regulatory Approvals................................................................... 6 Outline Dimensions ....................................................................... 20

Insulation and Safety Related Specifications ............................ 6 Ordering Guide .......................................................................... 21

Package Characteristics ............................................................... 7

6/2018—Revision 0: Initial Version

Table 1. ADuM5020-5BRIZ DC-to-DC Converter Static Specifications

Table 3. ADuM5020-5BRIZ DC-to-DC Converter Static Specifications

Table 4. ADuM5028-5BRIZ DC-to-DC Converter Static Specifications

Table 5. ADuM5020-3BRWZ DC-to-DC Converter Static Specifications

INSULATION AND SAFETY RELATED SPECIFICATIONS

Table 8. ADuM5020 Insulation and Safety

Table 9. ADuM5028 Insulation and Safety

Table 12. ADuM5020 VDE Characteristics

Parameter Symbol Min Typ Max Unit

0 50 100 150 200

Figure 4. ADuM5028 Thermal Derating Curve, Dependence of Safety Limiting

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 5. Pin Configuration

Table 17. ADuM5020 Pin Function Descriptions

Figure 6. ADuM5028 Pin Configuration

Table 18. ADuM5028 Pin Function Descriptions

Table 19. Truth Table (Positive Logic)

TYPICAL PERFORMANCE CHARACTERISTICS

5 3.3V IN/3.3V OUT 4.98

0 0.02 0.04 0.06 0.08 0.10 –50 –25 0 25 50 75 100 125

IDD1 (A) AND POWER DISSIPATION (W)

RATED LOAD (%)

reduce the emissions at the 180 MHz primary switching frequency

VDDP Table 20. Surface-Mount Ferrite Beads Example

Murata Electronics BLM15HD182SN1

Figure 22. ADuM5028 VDDP Bias and Bypass Components

CISO = 0.1µF FOR VDDP = 5V AND VISO = 5V,

CISO FERRITES 10µF

CISO = 0.1µF FOR VDDP = 5V AND VISO = 5V,

VAC RMS = 240 V rms

1.27 (0.0500) 0.75 (0.0295)

COMPLIANT TO JEDEC STANDARDS MS-013-AA

Figure 28. 16-Lead Standard Small Outline Package [SOIC_W]

©2018 Analog Devices, Inc. All rights reserved. Trademarks and

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