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    LA-K211P Yoga8-13ALC6

    Uploaded by

    Aleksandar Acimovic
    The document is a schematic diagram for a laptop motherboard containing an AMD Renoir processor with DDR4 memory. It details the various components connected to the processor including eDP panels, DDR4 RAM, PCIe and USB interfaces, audio and camera components, and sensors. The schematic contains confidential information belonging to Compal Electronics and is marked as such, with restrictions on distribution.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    LA-K211P Yoga8-13ALC6

    Uploaded by

    Aleksandar Acimovic
    208 views39 pages
    The document is a schematic diagram for a laptop motherboard containing an AMD Renoir processor with DDR4 memory. It details the various components connected to the processor including eDP panels, DDR4 RAM, PCIe and USB interfaces, audio and camera components, and sensors. The schematic contains confidential information belonging to Compal Electronics and is marked as such, with restrictions on distribution.

    Copyright

    © © All Rights Reserved

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    PDF, TXT or read online from Scribd

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    The document is a schematic diagram for a laptop motherboard containing an AMD Renoir processor with DDR4 memory. It details the various components connected to the processor including eDP panels, DDR4 RAM, PCIe and USB interfaces, audio and camera components, and sensors. The schematic contains confidential information belonging to Compal Electronics and is marked as such, with restrictions on distribution.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    208 views39 pages

    LA-K211P Yoga8-13ALC6

    Uploaded by

    Aleksandar Acimovic
    The document is a schematic diagram for a laptop motherboard containing an AMD Renoir processor with DDR4 memory. It details the various components connected to the processor including eDP panels, DDR4 RAM, PCIe and USB interfaces, audio and camera components, and sensors. The schematic contains confidential information belonging to Compal Electronics and is marked as such, with restrictions on distribution.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    You are on page 1of 39

    A B C D E

    1 1

    Compal Confidential
    C640-13 (GLC3A)
    2 2

    UMA M/B Schematic Document


    AMD Renoir Processor with DDR4 Memory Down

    3
    2020-07-23 3

    LA-K211P
    R E V ：1 . 0

    4 4

    Security Classification
    2020/02/25
    Compal Secret Data
    2021/02/25 Title
    Compal Electronics, Inc.
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Cover Page
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: W ednesday, July 22, 2020 Sheet 1 of 39
    A B C D E
    A B C D E

    eDP Panel eDP x2 DDR4 3200MHz CH-A on board RAM x4


    FHD LCD CH-B on board RAM x4

    PCIe x 4 USB2.0x1 USB Charger


    1 NGFF (Key M) 1

    PCIE SSD TI SN1702001 USB 3


    2242/2280 conn. Type A Port
    USB3.1 x1

    NGFF (Key E) PCIe x1


    WLAN/BT USB2.0 x1 USB2.0x1
    2230 conn.
    USB 3
    USB2.0x1 USB3.1 x1 Type A Port
    AMD Renoir
    USBC x 4
    Type-C Conn. 25W
    USB3.1 Gen1 USB2.0x1
    I2C FingerPrint
    SBU CC+PD 1140pin BGA
    Not Support PD sink Realtek RTS5457V AUX
    2
    CC/Vconn 2

    USB2.0x1
    Int. Camera

    USB2.0x1
    HP
    Combo Jack
    HDA Audio Codec
    USBC x 4 USB Re-Driver USBC x 4 SPK
    Realtek ALC3286 Int. Speaker
    Type-C Conn. TUSB1044RNQ
    USB3.1 Gen1
    DMIC
    Int. Array Mic *2

    SBU I2C
    CC+PD I2C
    3 Realtek RTS5457V AUX
    Touch Panel 3
    CC/Vconn

    SPI ROM SPI I2C


    16MB TouchPad

    LPC

    Int. KBD G Sensor * 2


    KBC
    Hall Sensor * 2 ENE KB9022

    4
    S/B Thermal Sensor 4

    Sensor B LED
    Hall Sensor x 1
    G Sensor x 1
    P Sensor Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date Deciphered Date Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Block Diagram
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 2 of 39
    A B C D E
    1 2 3 4 5

    Voltage Rails BOM Structure Table USB 2.0 Port Table GPP Port Table
    Port External USB Port Port Lane
    Item BOM Structure
    0 0
    Memory Down - SDP Package SDP@ 0 USB2/3 Port (Type-C)
    1 1
    power
    Memory Down - DDP Package DDP@ 1 USB2/3 Port (Type A-L) SSD1
    2 2
    plane APU_R5 APU_R5@ 2 Camera 3 3
    APU_R7 APU_R7@ 3
    +5VALW +1.2V +5VS
    4 4
    EMI pop EMI@ 4 USB2/3 Port (Type-C)
    +12.6VB +3VALW +2.5V +3VS
    5 5
    EMI un-pop @EMI@ 5 USB2/3 Port (Type A-R)
    +1.8VALW +1.8VS
    6 6
    A ESD pop ESD@ 6 Fingrt Print A

    +0.75VALW +0.75VS
    7 7 NGFF WLAN
    ESD un-pop @ESD@ 7 NGFF BT
    +0.6VS
    8 8
    RF pop RF@
    9 9
    State
    +APU_CORE RF un-pop @RF@ USB 3.0 Port Table 10 10
    +APU_CORE_SOC Debug HDT@
    Port 11 11
    Keyboard BackLight KBL@
    0 USB2/3 Port (Type-C)
    CAMERA POWER CIRCUIT CAM@
    1 USB2/3 Port (TYPE A)
    Touch Screen TS@
    4 USB2/3 Port (Type-C)
    Touch Screen resistor TS_R@
    5 USB2/3 Port (Type A)
    MS@
    S0 O O O O Modern standby
    NON_MS@
    SAMSUNG 8GB Memroy Down S8G@ DDI Port Table
    S3
    O O O X HYNIX 8GB Memroy Down H8G@ Port Lane
    S5 S4/AC MICRON 8GB Memroy Down M8G@ 0
    O O X X eDP
    1
    S5 S4/ Battery only
    SUMSUNG 16GB Memroy Down S16G@
    O X X X 2 TYPE C (PD + CC)
    HYNIX 16GB Memroy Down H16G@ 3 TYPE C (PD + CC)
    S5 S4/AC & Battery
    don't exist X X X X MICRON 16GB Memroy Down M16G@
    TUSB1044 RE@
    B B
    RTS5457V with SINK SINK@
    EC SM Bus1 address EC SM Bus2 address
    Device Device
    RTS5457V without SINK NONSINK@
    Address Address
    Smart Battery 0001 011x 16h Thermal Sensor (F75305M) 1001_101xb 9Ah
    Charger (BQ25710) 0001 001x 12h

    PCH SM Bus address


    Device Address Device Address
    DDR4 BOM Conf i g
    Touch pad
    Vendor Size GPIO_RESERVE2 OBRAM_ID2 OBRAM_ID1 OBRAM_ID0

    SMBUS Control Table RC123 RC122 RC121 UD1 S8G@ UD2 S8G@ UD3 S8G@ UD4 S8G@ UD5 S8G@ UD6 S8G@ UD7 S8G@ UD8 S8G@
    Samsung S8G@ S8G@ S8G@ SA0000CZ520 SA0000CZ520 SA0000CZ520 SA0000CZ520 SA0000CZ520 SA0000CZ520 SA0000CZ520 SA0000CZ520

    Thermal
    SOURCE APU BATT CHARGER KB9022 PD IC
    Sensor Hynix 8GB RC124
    H8G@
    RC119
    H8G@
    RC120
    H8G@
    UD1 H8G@
    SA0000CZ320
    UD2 H8G@
    SA0000CZ320
    UD3 H8G@
    SA0000CZ320
    UD4 H8G@
    SA0000CZ320
    UD5 H8G@
    SA0000CZ320
    UD6 H8G@
    SA0000CZ320
    UD7 H8G@
    SA0000CZ320
    UD8 H8G@
    SA0000CZ320

    EC_SMB_CK1
    EC_SMB_DA1
    KB9022 X V V V V X Micron RC124
    M8G@
    RC119
    M8G@
    RC121
    M8G@
    UD1 M8G@
    SA0000CMS10
    UD2 M8G@
    SA0000CMS10
    UD3 M8G@
    SA0000CMS10
    UD4 M8G@
    SA0000CMS10
    UD5 M8G@
    SA0000CMS10
    UD6 M8G@
    SA0000CMS10
    UD7 M8G@
    SA0000CMS10
    UD8 M8G@
    SA0000CMS10
    +3VL +3VALW +19V_VIN
    EC_SMB_CK2
    EC_SMB_DA2
    KB9022 V X X V X V Samsung RC123
    S16G@
    RC119
    S16G@
    RC120
    S16G@
    UD1 S16G@
    SA0000CZ220
    UD2 S16G@
    SA0000CZ220
    UD3 S16G@
    SA0000CZ220
    UD4 S16G@
    SA0000CZ220
    UD5 S16G@
    SA0000CZ220
    UD6 S16G@
    SA0000CZ220
    UD7 S16G@
    SA0000CZ220
    UD8 S16G@
    SA0000CZ220
    +3VS +3VS +3VS +3VS
    RC123 RC119 RC121 UD1 H16G@ UD2 H16G@ UD3 H16G@ UD4 H16G@ UD5 H16G@ UD6 H16G@ UD7 H16G@ UD8 H16G@
    Hynix 16GB H16G@ H16G@ H16G@ SA0000CZ120 SA0000CZ120 SA0000CZ120 SA0000CZ120 SA0000CZ120 SA0000CZ120 SA0000CZ120 SA0000CZ120
    SIGNAL
    STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
    RC123 RC122 RC120 UD1 M16G@ UD2 M16G@ UD3 M16G@ UD4 M16G@ UD5 M16G@ UD6 M16G@ UD7 M16G@ UD8 M16G@
    C
    Micron M16G@ M16G@ M16G@ SA0000D3U00 SA0000D3U00 SA0000D3U00 SA0000D3U00 SA0000D3U00 SA0000D3U00 SA0000D3U00 SA0000D3U00
    C

    Full ON HIGH HIGH HIGH HIGH ON ON ON ON

    S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW

    S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF

    S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF

    S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF

    Renoir APU PR ON BOARD RAM X76


    UC1 APU_R5@ ZZZ13 X76_S8G@ ZZZ15 X76_M8G@ ZZZ14 X76_H8G@

    S IC RYZEN5 100-000000084 2.375G BGA APU DRAM 8G SAMSUNG GLC3A DRAM 8G MICRON GLC3A DRAM 8G HYNIX GLC3A
    SA0000D4A60 X7688338L04 X7688338L05 X7688338L06

    UC1 APU_R7@ ZZZ16 X76_S16G@ ZZZ17 X76_H16G@ ZZZ18 X76_M16G@

    D D

    S IC RYZEN7 100-000000083 2G BGA1140 APU DRAM 16G SAMSUNG GLC3A DRAM 16G MICRON GLC3A DRAM 16G HYNIX GLC3A
    SA0000D4960 X7688338L01 X7688338L02 X7688338L03

    PCB PN
    X4E
    ZZZ ZZZ1
    Security Classification Compal Secret Data
    Title
    Compal Electronics, Inc.
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Notes List
    PCB 36T LA-K211P REV0 M/B 1 S SMT EMC FOR EE AK211 GLC3A AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DA8001NF000 X4EANL38L01 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 3 of 39
    1 2 3 4 5
    5 4 3 2 1

    Shut
    Power Sequence Boot Down

    VCIN1_AC_IN VCIN1_AC_IN
    EC Pin 110 Intput
    D D
    +3VLP +3VLP

    EC_ON EC_ON
    EC Pin 112 Output
    +5VALW +5VALW
    AC Plug
    +3VALW +3VALW

    3V/5VALW_PG 3V/5VALW_PG

    +1.8VALW +1.8VALW

    +0.8VALW +0.8VALW

    ON/OFF# ON/OFF#
    EC Pin 114 Intput T1_Min : 10ms

    EC_RSMRST# EC_RSMRST#
    EC Pin 100 Output T2 : 15ms~26ms

    RTC_CLK RTC_CLK

    PBTN_OUT# PBTN_OUT#
    EC Pin 122 Output
    PM_SLP_S5# PM_SLP_S5#
    C
    EC Pin 123 Intput T3 : 30us~64us
    C

    PM_SLP_S3# PM_SLP_S3#
    EC Pin 6 Intput
    SYSON SYSON
    EC Pin 95 Output
    +2.5V_MEM +2.5V_MEM

    +1.2V_DDR +1.2V_DDR

    SUSP# SUSP#
    EC Pin 116 Output
    0.75VS_PWR_EN 0.8VS_PWR_EN
    EC Pin 99 Output
    +5VS +5VS

    +3VS +3VS

    +1.8VS +1.8VS

    +0.75VS +0.8VS

    +0.6VS +0.6VS

    VR_ON VR_ON
    EC Pin 121 Output
    B B

    +APU_CORE +APU_CORE

    +APU_CORE_SOC +APU_CORE_SOC

    VGATE VGATE
    EC Pin 36 Intput T5_Min : 1ms

    PCH_PWROK PCH_PWROK
    EC Pin 32 Output
    APU_PWRGD APU_PWRGD

    EC Pin 13 Intput PLT_RST# PLT_RST#


    T8 : 15ms~17ms

    PCIRST# PCIRST#

    APU_RST# APU_RST#

    CLK_PCIE CLK_PCIE
    T9 : 12ms~14.6ms

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Power Sequence
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    C 0.2
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 4 of 39
    5 4 3 2 1
    5 4 3 2 1

    ME2301DC-G +3VS_TP
    QTP1

    SY8843QWC +1.8VALW ME2320D-G +1.8VS


    +19V_VIN BQ25710RSNR +19V_VB Panel backlight +LEDVDD eDP connector PU1801 Q213
    Type-C Adapter G524B2T11U +3VS_WLAN
    PUB1 R9 JeDP1
    UWL1

    ME2301DC-G +1.8V_AUDIO
    D +8.4V_BATT+ D
    SY8386BRHC +3VALW QA3 ME2301DC-G +3V_CMOS
    PU301 Q201
    +RTCBATT_R
    Battery
    JW7110DFNC +3VS
    +3VL
    U10 ME2301DC-G +3VS_SSD1
    Q208
    +5VS

    ME2301DC-G +3V_AUDIO
    SY8388CRHC +5VALW1
    ME2301DC-G +5V_AUDIO ME2301DC-G +5VS_KBL QA1
    PU2503
    QA2 QKBL1

    APL5934BKAI-TRG
    +VL1
    +2.5V
    DPS1155FEA +USBC1_VBUS PU2502
    UT4

    SY8286CRAC +5VALW
    DPS1155FEA +USBC0_VBUS
    PU501
    UT7 EM5203AJ-20 +LCDVDD_CONN
    U5
    C C

    +VL
    SN1702001RTER
    +5V_USBCHG
    U7
    Touch Screen +3V_TS
    R4027
    RT8207PGQW +1.2V
    PUM1

    Finger Print +3V_FP


    +0.6VS RFP1

    RT8207PGQW +0.75VALW EM5201V +0.75VS


    SY8386RHC U19

    B B

    AON6380
    PQZ1
    +APU_CORE

    AON6314_N
    PQZ2

    AON6380
    PQZ3
    +APU_CORE
    RT3662AMGQW
    PUZ1
    AON6314_N
    PQZ4

    AON6380
    PQG2
    +APU_CORE_SOC

    AON6314_N
    A
    PQG1 A

    Security Classification
    2020/02/25
    Compal Secret Data
    2021/02/25 Title
    Compal Electronics, Inc.
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Power Map
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    Custom 0.2
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 5 of 39
    5 4 3 2 1
    5 4 3 2 1

    Main Func = CPU

    @ UC1B
    PCIE
    D D

    G13 P_GFX_RXP0 P_GFX_TXP0 F4


    F13 P_GFX_RXN0 P_GFX_TXN0 F2

    J14 P_GFX_RXP1 P_GFX_TXP1 F3


    H14 P_GFX_RXN1 P_GFX_TXN1 E4

    G15 P_GFX_RXP2 P_GFX_TXP2 E1


    PCIE_ARX_DTX_P[0..3] F15 C1 PCIE_ATX_C_DRX_P[0..3]
    P_GFX_RXN2 P_GFX_TXN2 PCIE_ATX_C_DRX_P[0..3] <25>
    <25> PCIE_ARX_DTX_P[0..3]
    Main_SSD PCIE_ARX_DTX_N[0..3] PCIE_ATX_C_DRX_N[0..3]
    Main_SSD
    J15 P_GFX_RXP3 P_GFX_TXP3 D5 PCIE_ATX_C_DRX_N[0..3] <25>
    <25> PCIE_ARX_DTX_N[0..3]
    K15 P_GFX_RXN3 P_GFX_TXN3 E6

    H16 P_GFX_RXP4 P_GFX_TXP4 C6


    J16 P_GFX_RXN4 P_GFX_TXN4 D6

    F18 P_GFX_RXP5 P_GFX_TXP5 B6


    G18 P_GFX_RXN5 P_GFX_TXN5 C7

    J18 P_GFX_RXP6 P_GFX_TXP6 D8


    K18 P_GFX_RXN6 P_GFX_TXN6 B8

    H19 P_GFX_RXP7 P_GFX_TXP7 C8


    C G19 P_GFX_RXN7 P_GFX_TXN7 A8 C

    PCIE_ARX_DTX_P0 G11 P_GPP_RXP0 P_GPP_TXP0 L3 PCIE_ATX_DRX_P0 CC1 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P0


    PCIE_ARX_DTX_N0 F11 P_GPP_RXN0 P_GPP_TXN0 L1 PCIE_ATX_DRX_N0 CC2 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_N0

    PCIE_ARX_DTX_P1 J10 P_GPP_RXP1 P_GPP_TXP1 L4 PCIE_ATX_DRX_P1 CC3 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P1


    PCIE_ARX_DTX_N1 H10 P_GPP_RXN1 P_GPP_TXN1 L2 PCIE_ATX_DRX_N1 CC4 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_N1

    PCIE_ARX_DTX_P2 G8 P_GPP_RXP2/SATA0_RXP P_GPP_TXP2/SATA0_TXP M4


    PCIE_ATX_DRX_P2 CC5 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P2
    PCIE_ARX_DTX_N2 F8 P_GPP_RXN2/SATA0_RXN P_GPP_TXN2/SATA0_TXNM2
    PCIE_ATX_DRX_N2 CC6 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_N2

    PCIE_ARX_DTX_P3 G6 P_GPP_RXP3/SATA1_RXP P_GPP_TXP3/SATA1_TXP N3


    PCIE_ATX_DRX_P3 CC7 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P3
    PCIE_ARX_DTX_N3 F7 P_GPP_RXN3/SATA1_RXN P_GPP_TXN3/SATA1_TXNN1
    PCIE_ATX_DRX_N3 CC8 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_N3

    M9 P_GPP_RXP4 P_GPP_TXP4 T2
    M8 P_GPP_RXN4 P_GPP_TXN4 T4

    L7 P_GPP_RXP5 P_GPP_TXP5 R1
    L6 P_GPP_RXN5 P_GPP_TXN5 R3

    K7 P_GPP_RXP6 P_GPP_TXP6 P2
    B B
    K8 P_GPP_RXN6 P_GPP_TXN6 P4
    PCIE_ARX_DTX_P7 H6 P_GPP_RXP7 P_GPP_TXP7 N2 PCIE_ATX_DRX_P7 CC9 1 2 0.1U_0201_10V6K
    <20> PCIE_ARX_DTX_P7 PCIE_ARX_DTX_N7 PCIE_ATX_DRX_N7 PCIE_ATX_C_DRX_P7 <20> WLAN
    WLAN H7 P_GPP_RXN7 P_GPP_TXN7 N4 CC10 1 2 0.1U_0201_10V6K PCIE_ATX_C_DRX_N7 <20>
    <20> PCIE_ARX_DTX_N7

    L9 P_GPP_RXP8/SATA2_RXP P_GPP_TXP8/SATA2_TXP K2
    L10 P_GPP_RXN8/SATA2_RXN P_GPP_TXN8/SATA2_TXNK4

    K11 P_GPP_RXP9/SATA3_RXP P_GPP_TXP9/SATA3_TXP J4


    J11 P_GPP_RXN9/SATA3_RXN P_GPP_TXN9/SATA3_TXNJ2

    J12 P_GPP_RXP10 P_GPP_TXP10 H3


    H12 P_GPP_RXN10 P_GPP_TXN10 H1

    J13 P_GPP_RXP11 P_GPP_TXP11 H4


    K13 P_GPP_RXN11 P_GPP_TXN11 H2

    FP6 REV 0.92


    PART 2 OF 13
    FP6_BGA1140

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    FP6 PCIE/UMI
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
    Custom 0.2
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 6 of 39
    5 4 3 2 1
    A B C D E

    Main Func = CPU

    @ UC1A
    MEMORY A
    <14> DDR_A_MA[13..0]
    DDR_A_MA0 DDR_A_D[63..0] <14>
    AK26 MA_ADD0/RSVD
    DDR_A_MA1 AG24 MA_ADD1/RSVD MA_DATA0/MAA_DATA8 K27 DDR_A_D0
    DDR_A_MA2 AG23 MA_ADD2/MAB_CA0 MA_DATA1/MAA_DATA9 L26 DDR_A_D1
    1
    DDR_A_MA3 AG26 MA_ADD3/MAA_CA4 MA_DATA2/MAA_DATA13 N26 DDR_A_D2 1
    DDR_A_MA4 AG27 MA_ADD4/MAA_CA5 MA_DATA3/MAA_DATA12 N27 DDR_A_D3
    DDR_A_MA5 AF21 MA_ADD5/MAA_CA3 MA_DATA4/MAA_DATA11 G27 DDR_A_D4
    DDR_A_MA6 AF22 MA_ADD6/MAA_CA2 MA_DATA5/MAA_DATA10 H27 DDR_A_D5
    DDR_A_MA7 AF25 MA_ADD7/RSVD MA_DATA6/MAA_DATA15 M27 DDR_A_D6
    DDR_A_MA8 AF24 MA_ADD8/RSVD MA_DATA7/MAA_DATA14 N24 DDR_A_D7
    DDR_A_MA9 AE21 MA_ADD9/RSVD
    DDR_A_MA10 AL21 MA_ADD10/MAB_CS_L1 MA_DATA8/MAA_DATA0 L23 DDR_A_D8
    DDR_A_MA11 AF27 MA_ADD11/MAA_CKE1 MA_DATA9/MAA_DATA1 N21 DDR_A_D9
    DDR_A_MA12 AE23 MA_ADD12/MAA_CKE0 MA_DATA10/MAA_DATA5 T21 DDR_A_D10
    DDR_A_MA13 AM23 MA_ADD13_BANK2/RSVD MA_DATA11/MAA_DATA4 T22 DDR_A_D11
    AM21 MA_WE_L_ADD14/MAB_CKE1 MA_DATA12/MAA_DATA7 M22 DDR_A_D12
    <14> DDR_A_MA14_W E# DDR_A_D13
    AL27 MA_CAS_L_ADD15/RSVD MA_DATA13/MAA_DATA6 L24
    <14> DDR_A_MA15_CAS# DDR_A_D14
    AL24 MA_RAS_L_ADD16/MAB_CKE0 MA_DATA14/MAA_DATA2 R21
    <14> DDR_A_MA16_RAS# DDR_A_D15
    MA_DATA15/MAA_DATA3 R23

    AL22 MA_BANK0/MAB_CS_L0 MA_DATA16/MAA_DATA17 P24 DDR_A_D16


    <14> DDR_A_BA0 DDR_A_D17
    AK27 MA_BANK1/MAB_CA1 MA_DATA17/MAA_DATA16 R26
    <14> DDR_A_BA1 DDR_A_D18
    MA_DATA18/MAA_DATA21 T27
    DDR_A_BG0 AE27 MA_BG0/MAA_CS_L1 MA_DATA19/MAA_DATA20 V27 DDR_A_D19
    <14> DDR_A_BG0 DDR_A_BG1 DDR_A_D20
    AE26 MA_BG1/MAA_CS_L0 MA_DATA20/MAA_DATA19 P25
    <14> DDR_A_BG1 DDR_A_D21
    MA_DATA21/MAA_DATA18 P27
    DDR_A_ACT# AD22 MA_ACT_L/RSVD MA_DATA22/MAA_DATA23 V23 DDR_A_D22
    <14> DDR_A_ACT# DDR_A_D23
    MA_DATA23/MAA_DATA22 T25
    <14> DDR_A_DM[7..0] DDR_A_DM0 L27 MA_DM0/MAA_DM1
    DDR_A_DM1 N23 MA_DM1/MAA_DM0 MA_DATA24/MAA_DATA30 W22 DDR_A_D24
    DDR_A_DM2 R27 MA_DM2/MAA_DM2 MA_DATA25/MAA_DATA31 Y23 DDR_A_D25
    DDR_A_DM3 Y24 MA_DM3/MAA_DM3 MA_DATA26/MAA_DATA26 AC24 DDR_A_D26
    DDR_A_DM4 AP27 MA_DM4/MAB_DM2 MA_DATA27/MAA_DATA27 AC23 DDR_A_D27
    2 DDR_A_DM5 AW23 MA_DM5/MAB_DM3 MA_DATA28/MAA_DATA28 V21 DDR_A_D28 2
    DDR_A_DM6 AT21 MA_DM6/MAB_DM1 MA_DATA29/MAA_DATA29 W21 DDR_A_D29
    DDR_A_DM7 AV18 MA_DM7/MAB_DM0 MA_DATA30/MAA_DATA24 AA24 DDR_A_D30
    W24 RSVD_52 MA_DATA31/MAA_DATA25 AA22 DDR_A_D31

    M25 MA_DQS_H0/MAA_DQS_H1 MA_DATA32/MAB_DATA17 AP26 DDR_A_D32


    <14> DDR_A_DQS0
    M24 MA_DQS_L0/MAA_DQS_L1 MA_DATA33/MAB_DATA16 AN24 DDR_A_D33
    <14> DDR_A_DQS#0
    P22 MA_DQS_H1/MAA_DQS_H0 MA_DATA34/MAB_DATA21 AR25 DDR_A_D34
    <14> DDR_A_DQS1
    P21 MA_DQS_L1/MAA_DQS_L0 MA_DATA35/MAB_DATA20 AU26 DDR_A_D35
    <14> DDR_A_DQS#1
    T24 MA_DQS_H2/MAA_DQS_H2 MA_DATA36/MAB_DATA19 AN25 DDR_A_D36
    <14> DDR_A_DQS2
    R24 MA_DQS_L2/MAA_DQS_L2 MA_DATA37/MAB_DATA18 AN27 DDR_A_D37
    <14> DDR_A_DQS#2
    AA21 MA_DQS_H3/MAA_DQS_H3 MA_DATA38/MAB_DATA23 AR27 DDR_A_D38
    <14> DDR_A_DQS3
    Y21 MA_DQS_L3/MAA_DQS_L3 MA_DATA39/MAB_DATA22 AU27 DDR_A_D39
    <14> DDR_A_DQS#3
    AP23 MA_DQS_H4/MAB_DQS_H2
    <14> DDR_A_DQS4
    AP24 MA_DQS_L4/MAB_DQS_L2 MA_DATA40/MAB_DATA30 AV25 DDR_A_D40
    <14> DDR_A_DQS#4
    AW22 MA_DQS_H5/MAB_DQS_H3 MA_DATA41/MAB_DATA31 AW25DDR_A_D41
    <14> DDR_A_DQS5
    AV22 MA_DQS_L5/MAB_DQS_L3 MA_DATA42/MAB_DATA26 AV20 DDR_A_D42
    <14> DDR_A_DQS#5
    AT20 MA_DQS_H6/MAB_DQS_H1 MA_DATA43/MAB_DATA27 AW20DDR_A_D43
    <14> DDR_A_DQS6
    AR20 MA_DQS_L6/MAB_DQS_L1 MA_DATA44/MAB_DATA28 AV27 DDR_A_D44
    <14> DDR_A_DQS#6
    AR18 MA_DQS_H7/MAB_DQS_H0 MA_DATA45/MAB_DATA29 AW26DDR_A_D45
    <14> DDR_A_DQS7
    AT18 MA_DQS_L7/MAB_DQS_L0 MA_DATA46/MAB_DATA24 AU21 DDR_A_D46
    <14> DDR_A_DQS#7
    Y26 RSVD_58 MA_DATA47/MAB_DATA25 AW21DDR_A_D47
    Y27 RSVD_59

    MA_DATA48/MAB_DATA11 AT22 DDR_A_D48


    AJ25 MA_CLK_H0/MAA_CKT MA_DATA49/MAB_DATA10 AP21 DDR_A_D49
    <14> DDR_A_CLK0
    AJ24 MA_CLK_L0/MAA_CKC MA_DATA50/MAB_DATA14 AN19 DDR_A_D50
    <14> DDR_A_CLK#0
    AJ22 MA_CLK_H1/MAB_CKT MA_DATA51/MAB_DATA15 AN18 DDR_A_D51
    AJ21 MA_CLK_L1/MAB_CKC MA_DATA52/MAB_DATA12 AU23 DDR_A_D52
    MA_DATA53/MAB_DATA13 AR22 DDR_A_D53
    3
    MA_DATA54/MAB_DATA9 AN20 DDR_A_D54 3
    MA_DATA55/MAB_DATA8 AP19 DDR_A_D55

    MA_DATA56/MAB_DATA6 AT19 DDR_A_D56


    AL25 MA_CS_L0/MAB_CA2 MA_DATA57/MAB_DATA7 AW18DDR_A_D57
    <14> DDR_A_CS#0
    AM26 MA_CS_L1/MAB_CA5 MA_DATA58/MAB_DATA2 AU16 DDR_A_D58
    MA_DATA59/MAB_DATA3 AW16DDR_A_D59
    MA_DATA60/MAB_DATA4 AW19DDR_A_D60
    MA_DATA61/MAB_DATA5 AU19 DDR_A_D61
    MA_DATA62/MAB_DATA1 AP16 DDR_A_D62
    MA_DATA63/MAB_DATA0 AT16 DDR_A_D63
    AD24 MA_CKE0/MAA_CA1
    <14> DDR_A_CKE0
    AD25 MA_CKE1/MAA_CA0 RSVD_54 W27
    RSVD_53 W25
    RSVD_68 AC26
    RSVD_69 AC27
    AM24 MA_ODT0/MAB_CA3 RSVD_49 V26
    <14> DDR_A_ODT0
    AM27 MA_ODT1/MAB_CA4 RSVD_48 V24
    RSVD_63 AA27
    RSVD_62 AA25

    AE24
    EVENT# pull high <14> DDR_A_ALERT#
    MA_ALERT_L/TEST31A

    MA_PAROUT/RSVD AK24 DDR_A_PAR


    +1.2V DDR_A_EVENT# DDR_A_PAR <14> +1.2V
    AK23 MA_EVENT_L
    AD27 MA_RESET_L M_DDR4 AN21 RC32 1 @ 2 0_0201_5%
    <14> DDR_A_RST#
    FP6 REV 0.92 M_LPDDR4 AN22 RC33 1 @ 2 0_0201_5%
    PART 1 OF 13
    FP6_BGA1140
    RC1 1 2 1K_0201_5% DDR_A_EVENT#
    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    FP6(2/8)MEMORY A
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: W ednesday, July 22, 2020 Sheet 7 of 39
    A B C D E
    A B C D E

    Main Func = CPU

    @ UC1I

    MEMORY B
    <15> DDR_B_MA[13..0]
    DDR_B_MA0 DDR_B_D[63..0] <15>
    AM29 MB_ADD0/RSVD
    DDR_B_MA1 AH31 MB_ADD1/RSVD MB_DATA0/MBA_DATA8 C27 DDR_B_D0
    DDR_B_MA2 AJ30 MB_ADD2/MBB_CA0 MB_DATA1/MBA_DATA9 A28 DDR_B_D1
    1
    DDR_B_MA3 AH29 MB_ADD3/MBA_CA4 MB_DATA2/MBA_DATA13 F29 DDR_B_D2 1
    DDR_B_MA4 AG32 MB_ADD4/MBA_CA5 MB_DATA3/MBA_DATA12 F31 DDR_B_D3
    DDR_B_MA5 AG30 MB_ADD5/MBA_CA3 MB_DATA4/MBA_DATA11 B27 DDR_B_D4
    DDR_B_MA6 AG31 MB_ADD6/MBA_CA2 MB_DATA5/MBA_DATA10 D27 DDR_B_D5
    DDR_B_MA7 AF30 MB_ADD7/RSVD MB_DATA6/MBA_DATA15 E32 DDR_B_D6
    DDR_B_MA8 AG29 MB_ADD8/RSVD MB_DATA7/MBA_DATA14 F30 DDR_B_D7
    DDR_B_MA9 AF29 MB_ADD9/RSVD
    DDR_B_MA10 AM30 MB_ADD10/MBB_CS_L1 MB_DATA8/MBA_DATA0 H31 DDR_B_D8
    DDR_B_MA11 AF31 MB_ADD11/MBA_CKE1 MB_DATA9/MBA_DATA1 H30 DDR_B_D9
    DDR_B_MA12 AE32 MB_ADD12/MBA_CKE0 MB_DATA10/MBA_DATA5 K31 DDR_B_D10
    DDR_B_MA13 AP30 MB_ADD13_BANK2/RSVD MB_DATA11/MBA_DATA4 L30 DDR_B_D11
    AP31 MB_WE_L_ADD14/MBB_CKE1 MB_DATA12/MBA_DATA7 G30 DDR_B_D12
    <15> DDR_B_MA14_W E# DDR_B_D13
    AP29 MB_CAS_L_ADD15/RSVD MB_DATA13/MBA_DATA6 H29
    <15> DDR_B_MA15_CAS# DDR_B_D14
    AN29 MB_RAS_L_ADD16/MBB_CKE0 MB_DATA14/MBA_DATA2 K30
    <15> DDR_B_MA16_RAS# DDR_B_D15
    MB_DATA15/MBA_DATA3 K29

    AN31 MB_BANK0/MBB_CS_L0 MB_DATA16/MBA_DATA21 N32 DDR_B_D16


    <15> DDR_B_BA0 DDR_B_D17
    AM32 MB_BANK1/MBB_CA1 MB_DATA17/MBA_DATA22 N29
    <15> DDR_B_BA1 DDR_B_D18
    MB_DATA18/MBA_DATA20 P30
    DDR_B_BG0 AD29 MB_BG0/MBA_CS_L1 MB_DATA19/MBA_DATA19 L32 DDR_B_D19
    <15> DDR_B_BG0 DDR_B_BG1 DDR_B_D20
    AD31 MB_BG1/MBA_CS_L0 MB_DATA20/MBA_DATA17 L31
    <15> DDR_B_BG1 DDR_B_D21
    MB_DATA21/MBA_DATA16 M30
    DDR_B_ACT# AD30 MB_ACT_L/RSVD MB_DATA22/MBA_DATA18 L29 DDR_B_D22
    <15> DDR_B_ACT# DDR_B_D23
    MB_DATA23/MBA_DATA23 N31
    <15> DDR_B_DM[7..0] DDR_B_DM0 C30 MB_DM0/MBA_DM1
    DDR_B_DM1 H32 MB_DM1/MBA_DM0 MB_DATA24/MBA_DATA30 R30 DDR_B_D24
    DDR_B_DM2 M29 MB_DM2/MBA_DM2 MB_DATA25/MBA_DATA31 R32 DDR_B_D25
    DDR_B_DM3 T29 MB_DM3/MBA_DM3 MB_DATA26/MBA_DATA26 V30 DDR_B_D26
    DDR_B_DM4 AU30 MB_DM4/MBB_DM2 MB_DATA27/MBA_DATA27 V32 DDR_B_D27
    2 DDR_B_DM5 BD28 MB_DM5/MBB_DM3 MB_DATA28/MBA_DATA28 P29 DDR_B_D28 2
    DDR_B_DM6 BB23 MB_DM6/MBB_DM1 MB_DATA29/MBA_DATA29 P31 DDR_B_D29
    DDR_B_DM7 BD20 MB_DM7/MBB_DM0 MB_DATA30/MBA_DATA25 U31 DDR_B_D30
    W31 RSVD_57 MB_DATA31/MBA_DATA24 U29 DDR_B_D31

    E29 MB_DQS_H0/MBA_DQS_H1 MB_DATA32/MBB_DATA16 AT29 DDR_B_D32


    <15> DDR_B_DQS0
    D28 MB_DQS_L0/MBA_DQS_L1 MB_DATA33/MBB_DATA17 AU32 DDR_B_D33
    <15> DDR_B_DQS#0
    J31 MB_DQS_H1/MBA_DQS_H0 MB_DATA34/MBB_DATA21 AW31DDR_B_D34
    <15> DDR_B_DQS1
    J29 MB_DQS_L1/MBA_DQS_L0 MB_DATA35/MBB_DATA20 AW30DDR_B_D35
    <15> DDR_B_DQS#1
    N30 MB_DQS_H2/MBA_DQS_H2 MB_DATA36/MBB_DATA19 AR30 DDR_B_D36
    <15> DDR_B_DQS2
    M31 MB_DQS_L2/MBA_DQS_L2 MB_DATA37/MBB_DATA18 AT31 DDR_B_D37
    <15> DDR_B_DQS#2
    T30 MB_DQS_H3/MBA_DQS_H3 MB_DATA38/MBB_DATA23 AV30 DDR_B_D38
    <15> DDR_B_DQS3
    T31 MB_DQS_L3/MBA_DQS_L3 MB_DATA39/MBB_DATA22 AW29DDR_B_D39
    <15> DDR_B_DQS#3
    AU29 MB_DQS_H4/MBB_DQS_H2
    <15> DDR_B_DQS4
    AU31 MB_DQS_L4/MBB_DQS_L2 MB_DATA40/MBB_DATA29 AY29 DDR_B_D40
    <15> DDR_B_DQS#4
    BA27 MB_DQS_H5/MBB_DQS_H3 MB_DATA41/MBB_DATA28 AY32 DDR_B_D41
    <15> DDR_B_DQS5
    BB27 MB_DQS_L5/MBB_DQS_L3 MB_DATA42/MBB_DATA24 BC27 DDR_B_D42
    <15> DDR_B_DQS#5
    BC23 MB_DQS_H6/MBB_DQS_H1 MB_DATA43/MBB_DATA25 BB26 DDR_B_D43
    <15> DDR_B_DQS6
    BA23 MB_DQS_L6/MBB_DQS_L1 MB_DATA44/MBB_DATA27 BC25 DDR_B_D44
    <15> DDR_B_DQS#6
    BC20 MB_DQS_H7/MBB_DQS_H0 MB_DATA45/MBB_DATA26 BA25 DDR_B_D45
    <15> DDR_B_DQS7
    BA20 MB_DQS_L7/MBB_DQS_L0 MB_DATA46/MBB_DATA30 BB30 DDR_B_D46
    <15> DDR_B_DQS#7
    Y32 RSVD_61 MB_DATA47/MBB_DATA31 BA28 DDR_B_D47
    Y30 RSVD_60

    MB_DATA48/MBB_DATA11 BA24 DDR_B_D48


    AJ31 MB_CLK_H0/MBA_CKT MB_DATA49/MBB_DATA10 BC24 DDR_B_D49
    <15> DDR_B_CLK0
    AK30 MB_CLK_L0/MBA_CKC MB_DATA50/MBB_DATA14 BC22 DDR_B_D50
    <15> DDR_B_CLK#0
    AK32 MB_CLK_H1/MBB_CKT MB_DATA51/MBB_DATA15 BA22 DDR_B_D51
    AL31 MB_CLK_L1/MBB_CKC MB_DATA52/MBB_DATA12 BB25 DDR_B_D52
    MB_DATA53/MBB_DATA13 BD25 DDR_B_D53
    3
    MB_DATA54/MBB_DATA9 BB22 DDR_B_D54 3
    MB_DATA55/MBB_DATA8 BD22 DDR_B_D55

    MB_DATA56/MBB_DATA4 BA21 DDR_B_D56


    AN30 MB_CS_L0/MBB_CA2 MB_DATA57/MBB_DATA5 BC21 DDR_B_D57
    <15> DDR_B_CS#0
    AR31 MB_CS_L1/MBB_CA5 MB_DATA58/MBB_DATA2 BC18 DDR_B_D58
    MB_DATA59/MBB_DATA3 BB18 DDR_B_D59
    BB20 DDR_B_D60
    EVENT# pull high MB_DATA60/MBB_DATA6

    MB_DATA61/MBB_DATA7 BB21 DDR_B_D61


    MB_DATA62/MBB_DATA1 BB19 DDR_B_D62
    +1.2V MB_DATA63/MBB_DATA0 BA18 DDR_B_D63
    AC31 MB_CKE0/MBA_CA1
    <15> DDR_B_CKE0
    AC29 MB_CKE1/MBA_CA0 RSVD_56 W30
    RSVD_55 W29
    RC2 1 2 1K_0201_5% DDR_B_EVENT# RSVD_65 AA30
    RSVD_67 AB29
    AP32 MB_ODT0/MBB_CA3 RSVD_50 V29
    <15> DDR_B_ODT0
    AR29 MB_ODT1/MBB_CA4 RSVD_51 V31
    RSVD_64 AA29
    RSVD_66 AA31

    AE30 MB_ALERT_L/TEST31B
    <15> DDR_B_ALERT#
    MB_PAROUT/RSVD AM31 DDR_B_PAR
    DDR_B_EVENT# DDR_B_PAR <15>
    AL30 MB_EVENT_L
    AC32 MB_RESET_L
    <15> DDR_B_RST#
    FP6 REV 0.92
    PART 9 OF 13
    FP6_BGA1140
    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    FP6(3/8)MEMORY B
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: W ednesday, July 22, 2020 Sheet 8 of 39
    A B C D E
    A B C D E

    Main Func = CPU


    +1.8VS
    DP0: eDP
    DP1: Type-C
    DP2: Type-C 2
    QC1
    DP3: N/A Gate
    1 +3VS
    @ UC1C Drain ENBKL <16,22>
    ENBKL_R 3
    DISPLAY/SVI2/JTAG/TEST
    D11 A22 ENBKL_R Source
    <16> EDP_TXP0 DP0_TXP0 DP_BLON

    <16> EDP_TXN0 B11 DP0_TXN0 DP_DIGON D23 ENVDD +LCDVDD_CONN PWR switch enable pin VIH=1.2V BSS138W-7-F_SOT323-3
    ENVDD <16>
    DP_VARY_BL C23 INVTPWM_R SB000002X00 INVTPWM RC4 1 2 4.7K_0402_5%
    <16> EDP_TXP1
    C11 DP0_TXP1 ENBKL RC5 1 2 2.2K_0402_5%
    <16> EDP_TXN1
    A11 DP0_TXN1 DP0_AUXP D12 EDP_AUXP <16>
    eDP DP0_AUXN B12 eDP
    1 EDP_AUXN <16> +1.8VS 1
    D10 DP0_TXP2 DP0_HPD C12
    EDP_HPD <16>
    B10 DP0_TXN2
    DP1_AUXP J20

    5
    D9 K20 ENBKL_R RC6 1 2 100K_0402_5%
    DP0_TXP3 DP1_AUXN
    B9 L21 1 ENVDD RC8 1 2 100K_0402_5%

    P
    DP0_TXN3 DP1_HPD
    NC 4 INVTPWM_R RC9 1 2 100K_0402_5%
    INVTPWM_R Y INVTPWM <16> EDP_HPD
    G23 DP1_TXP0 DP2_AUXP L19 USBC0_AUXP <19>
    2 RC10 1 2 100K_0402_5%
    A

    G
    H23 DP1_TXN0 DP2_AUXN M19 TYPE-C PD(Right Port)
    USBC0_AUXN <19>
    DP2_HPD M20 USBC0_PD_HPD_R UC6

    3
    F22 DP1_TXP1 74AUP1G07GW_TSSOP5
    G22 DP1_TXN1 DP3_AUXP M14 USBC1_AUXP <17> SA00005U600
    DP3_AUXN L14 TYPE-C PD(Left Port)
    USBC1_AUXN <17>
    G21 DP1_TXP2 DP3_HPD L16 USBC1_PD_HPD_R
    H21 DP1_TXN2
    DP_STEREOSYNC B23 DP_STEREOSYNC
    F20 DP1_TXP3
    G20 DP1_TXN3

    +3VS

    TEST4 BB6 APU_TEST4


    T1

    5
    TEST5 BD5 APU_TEST5
    T2
    1

    P
    AG12 NC 4 APU_RST# +1.8VS
    TEST6
    2 Y
    <22> APU_RST#_EC A

    G
    TEST14 G25 APU_TEST14
    T4
    TEST15 K25 APU_TEST15 UC22 APU_TEST14 RC11 1 @ 2 10K_0402_5%
    T5

    3
    TEST16 F25 APU_TEST16 T6 74AUP1G07GW_SC70-5 APU_TEST15 RC12 1 @ 2 10K_0402_5%
    TEST17 F26 APU_TEST17 SA00005U600 APU_TEST16 RC13 1 @ 2 10K_0402_5%
    T7 APU_TEST17
    @ RC14 1 @ 2 10K_0402_5%
    TEST31 H26 APU_TEST31
    T8
    RC111 2 @ 1 0_0402_5% +1.8VS
    AK9 APU_TEST41
    2
    APU_TDI AP3 TDI
    TEST41

    ANALOGIO_0 AK21 APU_TEST470


    T9
    Reserve for Sequence Tuning APU_TEST31 RC15 1 @ 2 1K_0402_5%
    2

    APU_TDO T10
    AU1 TDO ANALOGIO_1 AG21 APU_TEST471 RC16 1 @ 2 1K_0402_5%
    APU_TCK T11
    AR2 TCK
    APU_TMS AU3 TMS
    APU_TRST# AR4 TRST_L
    APU_DBREQ# AT2 DBREQ_L
    +1.8VS

    RC603 1 @ 2 0_0402_5% APU_RST# AW3 P3 SMU_ZVDDP


    <17,19> APU_RST#_R RESET_L SMU_ZVDD
    APU_PWRGD AW4 T12 DP_STEREOSYNC RC17 1 2 1K_0402_5%
    <36> APU_PWRGD PWROK
    T13 RC18 1 2 1K_0402_5%
    T14 @
    B22 SIC Pull High for HDMI audio function / BIOS code notice
    <22,24> EC_SMB_CK2
    D22 SID T15
    <22,24> EC_SMB_DA2 APU_ALERT# C22
    ALERT_L VDDP_S5_SENSE AK7 APU_VDDP_S5_SEN_H <35>
    <22> EC_THERMTRIP# RC21 1 @ 2 0_0402_5% THERMTRIP# AN9 THERMTRIP_L VDDP_SENSE AK12
    H_PROCHOT# B25 T2414
    PROCHOT_L VDDCR_SOC_SENSE J23 T16
    <22> H_PROCHOT# APU_CORESOC_SEN_H <36>
    RC602 2 @ 1 0_0402_5% VDDCR_SENSE K22 T2412
    <17,19> VR_ALERT# APU_CORE_SEN_H <36> +0.75VS
    VDDIO_MEM_S3_SENSE J21 T2413
    VDDIO_MEM_S3_SENSE_H <34>
    <36> APU_SVC
    D25 SVC0

    <36> APU_SVD
    C25 SVD0 VSS_SENSE_A J22 VSS_SENSE_A
    <36> APU_SVT
    A25 SVT0 FP6 REV 0.92 VSS_SENSE_B AJ12 VSS_SENSE_B RC594 1 @ 2 0_0402_5% APU_VSS_SEN_L <36>
    SMU_ZVDDP RC22 1 2 196_0402_1%
    PART 3 OF 13
    RC595 1 @ 2 0_0402_5% VDDIO_MEM_S3_SENSE_L <34>
    FP6_BGA1140 RC597 1 @ 2 0_0402_5% APU_VDDP_S5_SEN_L <35>

    +3VS
    1

    3 RC634 RC635 3
    @ 4.7K_0402_5% @ 100K_0402_5%
    2

    USBC0_PD_HPD_R
    3

    D @
    USBC0_PD_HPD_3VEN5
    QC4B
    ESD VGS(th) : 1-2.5 V
    ID(max) : 0.115 A
    G

    S
    2N7002KDW_SOT363-6
    SB00000EO00
    4

    RDS(on) : 3-4ohm
    HDT+ (debug + HDT@)
    6

    D
    H_PROCHOT# @
    ESD@ CC17 1 2 100P_0402_50V8J 2
    <19> USBC0_PD_HPD G QC4A
    ESD@ CC18 1 2 100P_0402_50V8J APU_PWRGD 2N7002KDW_SOT363-6
    S SB00000EO00 +1.8VALW +1.8VALW
    1

    ESD@ CC19 1 2 100P_0402_50V8J APU_RST# RHDT10 2 @ 1 0_0402_5%

    JHDT1 U20
    1 2 APU_TCK APU_TRST# RHDT1 1 HDT@ 2 1K_0402_5%
    1 2 APU_TCK RHDT2 1 HDT@ 2 1K_0402_5% APU_RST# 1 6 APU_RST#_BUF
    3 4 APU_TMS APU_TMS RHDT3 1 HDT@ 2 1K_0402_5% A1 Y1
    USBC0_PD_HPD RC633 1 @ 2 0_0402_5% 3 4 APU_TDI RHDT4 1 HDT@ 2 1K_0402_5% +1.8VALW
    5 6 APU_TDI APU_DBREQ# RHDT5 1 HDT@ 2 1K_0402_5% 2 5
    5 6 GND VCC
    7 8 APU_TDO
    7 8 APU_PWRGD 3 4 APU_PWRGD_BUF
    APU_TRST# RHDT61 HDT@ 2 33_0402_5% APU_TRST#_R 9 10 APU_PWRGD_BUF A2 Y2
    9 10
    +3VS APU_RST#_BUF
    RHDT71 HDT@ 2 10K_0402_5% 11 12 @ NC7WV07P6X_SC70-6
    11 12 APU_TDI CHDT1 1 2 0.01U_0402_16V7K HDT@
    +1.8VALW RHDT81 HDT@ 2 10K_0402_5% 13 14
    13 14 HDT@ RHDT11 2 @ 1 0_0402_5%
    APU_DBREQ# APU_DBREQ#
    1

    APU_PWRGD
    1

    RC25 1 2 4.7K_0402_5% RHDT91 HDT@ 2 10K_0402_5% 15 16 CHDT2 1 2 0.01U_0402_16V7K


    APU_RST# RC62 RC63 15 16
    RC24 1 2 4.7K_0402_5%
    @ 4.7K_0402_5% @ 100K_0402_5% 17 18 HDT@
    17 18 APU_TRST# CHDT3 1 2 0.01U_0402_16V7K
    19 20
    2
    2

    USBC1_PD_HPD_R 19 20
    3

    4 +3VS D SAMTE_ASP-136446-07-B 4
    USBC1_PD_HPD_3VEN5 @
    QC2B SB00000EO00 ME@
    G
    APU_ALERT# 2N7002KDW_SOT363-6
    RC31 1 2 1K_0402_5%
    RC28 1 2 1K_0402_5% H_PROCHOT# S
    4
    6

    RC29 1 2 1K_0402_5% THERMTRIP# D


    @
    2 SB00000EO00
    <17,18> USBC1_PD_HPD G QC2A
    2N7002KDW_SOT363-6
    S
    1

    VGS(th) : 1-2.5 V
    RC30 1 @ 2 220_0402_5% APU_PWRGD ID(max) : 0.115 A
    RDS(on) : 3-4ohm
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title
    USBC1_PD_HPD RC628 1 @ 2 0_0402_5%
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    FP6 DISP/MISC/HDT
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    Custom 0.2
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 9 of 39
    A B C D E
    A B C D E

    Main Func = CPU


    C apacity T otal D escription G P IO R ESER VE2 O B R A M ID 2 O BR AM ID 1 O BR AM ID 0
    _ _ _ _ +3VALW +3VS
    S S D 4 K 4A A G 165W A -B C W E S D P 0 0 0 0
    16G b-3200 16G B H Y D 4 H 5A N A G 6N C M R -X N C D D P 0 0 0 1 I2C_0_SCL I2C_0_SCL
    RC624 1 @ 2 2.2K_0402_5% RC56 1 @ 2 2.2K_0402_5%
    M C D 4 M T 40A 1G 16K D -062E :E S D P 0 0 1 0 RC625 1 @ 2 2.2K_0402_5% I2C_0_SDA RC57 1 @ 2 2.2K_0402_5% I2C_0_SDA
    RC647 1 2 2.2K_0402_5% I2C_0_SCL_R
    S S D 4 K 4A 8G 165W C -B C W E S D P 0 0 1 1 RC648 1 2 2.2K_0402_5% I2C_0_SDA_R

    8G B H Y D 4 H 5A N 8G 6N C JR -X N C S D P 0 1 0 0
    M C D 4 M T 40A 512M 16T B -062E :J S D P 0 1 0 1
    8G b-3200
    S S D 4 K 4A 8G 165W C -B C W E S D P 0 1 1 0
    H Y D 4 H 5A N 8G 6N C JR -X N C S D P 0 1 1 1
    Touch Pad Level Shift
    4G B +3VS
    1
    M C D 4 M T 40A 512M 16T B -062E :J S D P 1 0 0 0 1

    2
    G
    @
    SB000002X00
    +3VS +3VS +3VS +3VS I2C_0_SCL Q210 3 1 LBSS139WT1G_SC70-3
    I2C_0_SCL_R <23>

    D
    VGS(th) : 0.5-1.5 V
    ID(max) : 0.2 A
    RDS(on) : 3.5 ohm

    1
    RC560 RC124 RC122 RC121 RC202 1 @ 2 0_0402_5%

    2
    G
    10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
    @ @ @ @ @ SB000002X00
    I2C_0_SDA Q211 3 1 LBSS139WT1G_SC70-3
    I2C_0_SDA_R <23>

    2
    GPIO_RESERVE2 OBRAM_ID2 OBRAM_ID1 OBRAM_ID0

    D
    VGS(th) : 0.5-1.5 V

    1
    ID(max) : 0.2 A
    RDS(on) : 3.5 ohm
    RC561 RC123 RC119 RC120
    10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% RC203 1 @ 2 0_0402_5%
    @ @ @

    2
    ON BOARD RAM ID
    +1.8VALW

    @ UC1D
    RC36 1 2 22K_0402_5%
    EC_RSMRST# <22>
    SFH_IPIO271 AM3
    SFH_IPIO272 AT4
    1 ACPI/AUDIO/I2C/GPIO/MISC SFH_IPIO273 AM1
    2 CC22 SFH_IPIO274 AJ8 2
    0.1U_0201_10V6K SFH_IPIO39 AW7
    SFH_IPIO41 AU2
    2 RC34 1 2 33_0402_5% APU_PCIE0_RST# AP6 PCIE_RST0_L/EGPIO26
    APU_PCIE_RST#_R RC35 1 @ 2 33_0402_5% APU_PCIE1_RST# AT13 B-I2C-OD AP14 I2C_0_SCL
    PCIE_RST1_L/EGPIO27 I2C0_SCL/EGPIO145
    EC_RSMRST# AR8 B-I2C-OD AN14 I2C_0_SDA
    RSMRST_L I2C0_SDA/EGPIO146
    Touch Pad
    2 PBTN_OUT# AT12 I-IO33S5-S B-I2C-OD AP2 I2C_1_SCL_R RC629 1 @ 2 0_0402_5% I2C_1_SCL
    <22> PBTN_OUT# APU_FCH_PWRGD_R AW2
    PWR_BTN_L/AGPIO0 I2C1_SCL/EGPIO147
    I2C_1_SDA_R I2C_1_SCL <16>
    CC20 PWR_GOOD I-IO33S5-S B-I2C-OD I2C1_SDA/EGPIO148 AN3 RC630 1 @ 2 0_0402_5% I2C_1_SDA I2C_1_SDA <16> Touch Screen follow FL035
    150P_0402_50V8J SYS_RESET# AL2 SYS_RESET_L/AGPIO1
    APU_PCIE_WAKE# AW12 B-I2C-OD AN12 I2C_2_SCL_R RC636 1 @ 2 0_0402_5% I2C_2_SCL
    1 WAKE_L/AGPIO2 I2C2_SCL/EGPIO113/SMBUS0_I2C_SCL
    I2C_2_SDA_R I2C_2_SCL <22>
    B-I2C-OD I2C2_SDA/EGPIO114/SMBUS0_I2C_SDA AP12 RC637 1 @ 2 0_0402_5% I2C_2_SDA I2C_2_SDA <22> Sensor Hub New
    PM_SLP_S3#_R AT11 SLP_S3_L
    @ESD@ <22,34> PM_SLP_S5# AV11 SLP_S5_L B-I2C_S5-OD S5_1.8V I2C3_SCL/AGPIO19/SMBUS1_I2C_SCL AM9 I2C_3_SCL <24>
    CC23 1 2 100P_0402_50V8J EC_RSMRST# B-I2C_S5-OD S5_1.8V AM10 New
    S0A3_GPIO AW13 B-IO33S5-S
    I2C3_SDA/AGPIO20/SMBUS1_I2C_SDA
    I2C_3_SDA <24> P Sensor
    S0A3_GPIO/AGPIO10
    ESD@ SFH1_SCL D24
    CC24 1 2 100P_0402_50V8J SYS_RESET# BA8 I-IO33S5-S B24
    <22> AC_PRESENT AC_PRES/AGPIO23 SFH1_SDA
    +3VS
    <22> EC_LOW_BATT# AV6 LLB_L/AGPIO12 B-IO33S5-S
    new
    S5_3.3V AGPIO3 BB7
    PCIE_DET1 SENSOR_EC_INT <22> TS_INT#
    AW8 S5_3.3V S5_3.3V AGPIO4/SATAE_IFDET BA6 RC641 1 2 10K_0402_5%
    ESD
    EGPIO42
    PCIE_DET1 <25>
    S5_3.3V AGPIO5/DEVSLP0 AK10
    B-IO33S5-OD AGPIO6/DEVSLP1 BC6 DEVSLP1 DEVSLP1 <25>
    S0_3.3V AW15 TS_INT#
    SATA_ACT_L/AGPIO130
    +3VALW TS_INT# <16> follow FL035
    DMIC_CLK0_APU AG6 S5_3.3V AGPIO9 AU4 +3VS
    ACP_WOV_CLK/ACP_IPIO28
    DMIC_DAT0_APU AUX_RESET# TP_INT# <22,23>
    RC621 2 @ 1 10K_0402_5% DEVSLP1 AG7 ACP_WOV_MIC0_MIC1_DATA/ACP_IPIO29 S5_3.3V AGPIO40 AP7 AUX_RESET# <25>
    RC45 1 2 10K_0402_5% PCIE_DET1 AJ6 S0_3.3V AGPIO69 AV13 GPIO_RESERVE2
    ACP_WOV_MIC2_MIC3_DATA/ACP_IPIO30 GPIO_RESERVE RC614 1 @ 2 10K_0402_5%
    RC47 1 2 10K_0402_5% PBTN_OUT# S0_3.3V AGPIO86/SPI_CLK2 BB12 GPIO_RESERVE
    RC48 1 @ 2 10K_0402_5% APU_PCIE_WAKE# HDA_BIT_CLK AN6 AZ_BITCLK/TDM_BCLK_MIC
    RC611 1 2 10K_0402_5% EC_LOW_BATT# HDA_SDIN0 AL6
    S0A3_GPIO <21> HDA_SDIN0 AZ_SDIN0/CODEC_GPI
    RC615 1 @ 2 10K_0402_5%
    RC610 1 2 2.2K_0402_5% AM7 AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK INTRUDER_ALERT AU7
    AJ9 AR11 HDA_SPKR new
    HDA_SPKR <21> G P IO R eserve
    AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK/ACP_WOV_MIC4_MIC5_DATA SPKR/AGPIO91
    HDA_RST# AM6 S5_3.3V AW11
    AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC BLINK/AGPIO11
    HDA_SYNC PS_INT#_CPU <24>
    AN8 AZ_SYNC/TDM_FRM_MIC
    HDA_SDOUT AK6 S0_3.3V AV15 follow FL035
    AZ_SDOUT/TDM_FRM_PLAYBACK GENINT1_L/AGPIO89
    RC50 1 2 1K_0402_5% HDA_RST# S0_3.3V AU14 OBRAM_ID2
    GENINT2_L/AGPIO90
    RC53 1 @ 2 10K_0402_5% HDA_SDIN0 AM4 SW_MCLK/TDM_BCLK_BT
    RC54 1 @ 2 10K_0402_5% HDA_BIT_CLK AL3 SW_DATA0/TDM_DOUT_BT
    RC601 1 2 10K_0402_5% AUX_RESET# AM2 S0_3.3V FANIN0/AGPIO84 AT10 OBRAM_ID0 +1.8VALW +3VALW
    <20> APU_BT_OFF# AGPIO7/FCH_ACP_I2S_SDIN_BT
    OBRAM_ID1
    3 AL4 AGPIO8/FCH_ACP_I2S_LRCLK_BT S0_3.3V FANOUT0/AGPIO85 AU10 3
    <20> APU_WL_OFF#
    FP6 REV 0.92
    PART 4 OF 13 new
    +3VS
    FP6_BGA1140

    2
    RC59 RC60
    DMIC Level Shift +3VALW +3VALW 10K_0402_5% 10K_0402_5%

    +1.8VALW

    1
    1
    I2C_1_SCL <11> APU_SPI_CLK_R
    RC631 1 2 2.2K_0402_5%
    RC632 1 2 2.2K_0402_5% I2C_1_SDA SYS_RESET#
    I2C_2_SCL RC55
    RC638 1 2 2.2K_0402_5%
    I2C_2_SDA 8.2K_0402_5%
    RC639 1 2 2.2K_0402_5% VGS(th) : 0.5-1.5 V

    5
    UC7

    1
    1
    ID(max) : 0.2 A

    2
    RDS(on) : 3.5 ohm 1
    2
    G

    P
    NC APU_FCH_PWRGD_R RC65 RC66
    4
    SB000002X00 SYS_PWRGD_EC Y 2K_0402_5% 2K_0402_5%
    DMIC_CLK0_APU <22> SYS_PWRGD_EC 2
    Q206 3 1 LBSS139WT1G_SC70-3 A @ @

    G
    +3VALW SOC_DMIC_CLK0 <16>
    S

    74AUP1G07GW_SC70-5

    2
    2
    3
    SA00005U600 +3VALW
    R4014 SOC_DMIC_CLK0
    1 2 523_0402_1% @

    SOC_DMIC_DAT0
    VGS(th) : 0.5-1.5 V R4024 1 @ 2 0_0402_5% STRAPS
    2

    ID(max) : 0.2 A
    G

    R4015 1 @ 2 10K_0402_5% +3VALW


    RDS(on) : 3.5 ohm
    SB000002X00
    DMIC_DAT0_APU RC64 1 @ 2 0_0402_5%
    +1.8VALW Q207 3 1 LBSS139WT1G_SC70-3 1
    SOC_DMIC_DAT0 <16>
    @
    S

    CC26 STRAPS
    RC606 1 @ 2 10K_0402_5% DMIC_CLK0_APU 0.1U_0201_10V6K DEFINITION
    RC607 1 2 1K_0402_5% DMIC_DAT0_APU 1 2
    @
    R4025 1 @ 2 0_0402_5% 1 : Use 48MHZ Crystal Clock and Generate both internal
    CC114
    0.1U_0201_10V6K and external clocks (Default)

    5
    2 APU_PCIE_RST#_R 2
    SPI_CLK

    P
    B
    Y
    4 APU_PCIE_RST# <20,25> 0 : Use 100MHZ PCIE clock as reference clock
    1
    5

    A and generate internal clocks only

    G
    1
    S0A3_GPIO UC8
    2
    P

    B MC74VHC1G08DFT2G SC70 5P
    4

    3
    PM_SLP_S3#_R Y PM_SLP_S3# <22> RC72 SA00000OH00
    1
    A 10K_0402_5% @ 1 : Normal reset mode (Default)
    G

    UC23
    MC74VHC1G08DFT2G SC70 5P 2 SYS_RST# 0 : short reset mode
    3

    4 SA00000OH00 4
    @
    RC73 1 @ 2 0_0402_5%

    RC598 2 @ 1 0_0402_5%
    RC67 1 EMI@ 2 33_0402_5% HDA_BIT_CLK
    <21> HDA_BIT_CLK_R HDA_SDOUT
    RC68 1 2 33_0402_5%
    <21> HDA_SDOUT_R HDA_SYNC
    RC69 1 2 33_0402_5%
    <21> HDA_SYNC_R

    RC70 1
    RC71 1
    2 1K_0402_5%
    2 1K_0402_5%
    EMI
    Security Classification Compal Secret Data Compal Electronics, Inc.
    2020/02/25 2021/02/25 Title
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    FP6 GPIO/AZ/MISC/STRAPS
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    Custom 0.2
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 10 of 39
    A B C D E
    A B C D E

    Main Func = CPU

    follow FL035

    48MHz CRYSTAL +3VS

    TS_EN# @
    @ UC1E RC644 2 1 10K_0402_5%
    CLK/LPC/EMMC/SD/SPI/eSPI/UART
    1 1

    48M_X2_R RC74 1 EMI@ 2 33_0402_5% 48M_X2 AR13 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92


    AP10 CLK_REQ1_L/AGPIO115 S0_3.3V
    2 1 48M_X1_R RC76 1 EMI@ 2 33_0402_5% 48M_X1 AR15 CLK_REQ2_L/AGPIO116
    RC75 1M_0402_5% AT14 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
    CLKREQ_SSD1# AN11
    Main_SSD <25> CLKREQ_SSD1# CLK_REQ4_L/OSCIN/EGPIO132
    AN13 CLK_REQ5_L/EGPIO120 follow FL035
    2
    2 1
    1
    EMI WLAN <20> CLKREQ_WLAN#
    CLKREQ_WLAN# AN15
    CLK_REQ6_L/EGPIO121

    S0_3.3V/1.8V AW14 TS_EN#_APU RC642 2 @ 1 0_0402_5% TS_EN#


    EGPIO70
    TS_EN# <16,22>
    LPC_PD_L/AGPIO21 BB13 LPCPD# Not Implemented Need Pull down by SW
    T17
    AF11 BA16 LPC_AD0_R RC77 2 1 10_0402_5%
    GPP_CLK0P LAD0/ESPI1_DATA0/EGPIO104
    LPC_AD1_R LPC_AD0 <22>
    YC1 AF12 GPP_CLK0N LAD1/ESPI1_DATA1/EGPIO105 BA15 RC78 2 1 10_0402_5% LPC_AD1 <22>
    48MHZ_8PF_7V48000010 BC13 LPC_AD2_R RC79 2 1 10_0402_5%
    LAD2/ESPI1_DATA2/EGPIO106
    LPC_AD3_R LPC_AD2 <22>
    SJ10000JP00 AG4 GPP_CLK1P LAD3/ESPI1_DATA3/EGPIO107 BB14 RC80 2 1 10_0402_5% LPC_AD3 <22>
    AG2 BB15 LPC_CLK0 RC81 2 1 22_0402_5% new, reserve
    GPP_CLK1N LPCCLK0/EGPIO74
    LPC_CLK0_EC <22>
    Vendor Tuning Value was 3.9pF, Lack Source LPC_CLKRUN_L/AGPIO88 BD13 CLKRUN# CLKRUN# <22>
    3 4 AG3 S0_3.3V/1.8V BA12 TS_DISABLE#_CPU RC645 2 @ 1 0_0402_5% TS_DISABLE#
    GPP_CLK2P LPCCLK1/EGPIO75
    3 4 TS_DISABLE# <16,22> +3VS
    1 1 AG1 GPP_CLK2N SERIRQ/AGPIO87 BC15 SERIRQ <22>
    LFRAME_L/EGPIO109 BA13 LPC_FRAME# <22>
    CC27 CC28 AF2 GPP_CLK3P
    2P_0402_50V 2P_0402_50V AF4 GPP_CLK3N LPC_RST_L/AGPIO32 BC12 LPC_RST# RC82 2 1 33_0402_5% LPC_RST#_R <22>
    new, reserve
    2 SE08220AC80 2 SE08220AC80 AGPIO68 AU12
    CLK_PCIE_SSD1 TS_DISABLE# @
    <25> CLK_PCIE_SSD1 AH2 GPP_CLK4P LPC_PME_L/AGPIO22 AP4 EC_SCI# <22> RC646 2 1 10K_0402_5%
    CLK_PCIE_SSD1# AH4
    Main_SSD <25> CLK_PCIE_SSD1# GPP_CLK4N

    AJ2 GPP_CLK5P
    AJ4 GPP_CLK5N SPI_ROM_REQ/EGPIO67 BA11
    SPI_ROM_GNT/EGPIO76 BB11
    CLK_PCIE_WLAN AF8
    <20> CLK_PCIE_WLAN CLK_PCIE_WLAN#
    GPP_CLK6P/WIFIBT_CLKP

    WLAN <20> CLK_PCIE_WLAN# AF9 GPP_CLK6N/WIFIBT_CLKN ESPI_RESET_L/KBRST_L/AGPIO129 AT15 KB_RST# <22>


    ESPI_ALERT_L/LDRQ0_L/EGPIO108 BC11 ESPI_ALERT#
    AK1
    32.768KHz CRYSTAL X48M_OSC

    SPI_CLK/ESPI_CLK BC10 APU_SPI_CLK


    BA10 APU_SPI_MISO
    RC84 2 EMI@ 1 10_0402_5% APU_SPI_CLK_R <10>
    LPC_RST#_R RC83 2 1 100K_0402_5%

    EMI
    SPI_DI/ESPI_DATA
    48M_X1 BB3 BB8 APU_SPI_MOSI CC29 2 1 150P_0402_50V8J
    X48M_X1 SPI_DO
    32K_X1 BA9 APU_SPI_WP#
    SPI_WP_L/ESPI_DAT2

    SPI_HOLD_L/ESPI_DAT3 BC8 APU_SPI_HOLD#


    2 1 32K_X2 BD11 APU_SPI_CS1#
    SPI_CS1_L
    RC86 20M_0402_5% 48M_X2 BA5 BC9
    X48M_X2 SPI_CS2_L/ESPI_CS_L/AGPIO30

    SPI_CS3_L/AGPIO31 BB10
    2 SPI_TPM_CS_L/AGPIO29 BD8 +3VS 2
    ESPI_ALERT# RC616 2 1 10K_0402_5%
    1 2
    YC2 AG10 KB_RST# RC85 2 @ 1 10K_0402_5%
    RSVD_71
    32.768KHZ_9PF_X1A000141000200 AG9 RSVD_70
    SJ10000PW00
    1 1 RTC_CLK AW10
    CC30 CC31 <20> RTC_CLK_R RC87 2 @ 1 22 +-5% 0402 RTCCLK
    8.2P_0402_50V 8.2P_0402_50V
    SE07182AD80 SE07182AD80
    2 2 32K_X1 AY1 BA17 UART_0_ARXD_DTXD
    X32K_X1 EGPIO141/UART0_RXD
    UART_0_ATXD_DRXD UART_0_ARXD_DTXD <20>
    EGPIO143/UART0_TXD BC16
    BD15 UART_0_ATXD_DRXD <20>
    EGPIO142/UART0_RTS_L/UART1_RXD

    EGPIO140/UART0_CTS_L/UART1_TXD BC17
    32K_X2 AY4 S0_3.3V BB16
    X32K_X2 AGPIO144/SHUTDOWN_L/UART0_INTR

    FP6 REV 0.92


    PART 5 OF 13

    +3VS FP6_BGA1140

    RC89 2 1 10K_0402_5% CLKREQ_SSD1#


    RC90 2 1 10K_0402_5% CLKREQ_WLAN#

    @ UC1J

    USB

    USB20_P0 AC6 AA1 USBC0_ATX_DRX_P1 C250 1 2 0.22U_0201_6.3V6M USBC0_ATX_C_DRX_P1


    <19> USB20_P0 USB20_N0
    USBC0_DP/USB0_DP USBC0_TX1P/USB0_TXP/DP2_TXP2
    USBC0_ATX_C_DRX_P1 <19>
    USB3.1 Type-C(Right) <19> USB20_N0 AC7 USBC0_DN/USB0_DN USBC0_TX1N/USB0_TXN/DP2_TXN2 AA3 USBC0_ATX_DRX_N1 C251 1 2 0.22U_0201_6.3V6M USBC0_ATX_C_DRX_N1 USBC0_ATX_C_DRX_N1 <19>
    USB20_P1 AA8 AA2 USBC0_ARX_DTX_P1 CT43 1 2 0.33U_0201_6.3V6M USBC0_ARX_C_DTX_P1
    <26> USB20_P1 USB20_N1
    USB1_DP USBC0_RX1P/USB0_RXP/DP2_TXP3 USBC0_ARX_C_DTX_P1 <19>
    USB3.1 Type-A Port 1 <26> USB20_N1 AA9 USB1_DN USBC0_RX1N/USB0_RXN/DP2_TXN3 AA4 USBC0_ARX_DTX_N1 CT44 1 2 0.33U_0201_6.3V6M USBC0_ARX_C_DTX_N1 USBC0_ARX_C_DTX_N1 <19>

    <16> USB20_P2
    USB20_P2 Y10 USB2_DP USBC0_TX2P/DP2_TXP1 AC2 USBC0_ATX_DRX_P2 C252 1 2 0.22U_0201_6.3V6M USBC0_ATX_C_DRX_P2 USBC0_ATX_C_DRX_P2 <19>
    TYPE-C(Right)
    USB20_N2 Y9 AC4 USBC0_ATX_DRX_N2 C253 1 2 0.22U_0201_6.3V6M USBC0_ATX_C_DRX_N2
    Camera <16> USB20_N2 USB2_DN USBC0_TX2N/DP2_TXN1
    USBC0_ATX_C_DRX_N2 <19>
    3 3
    Y7 USB3_DP USBC0_RX2P/DP2_TXP0 AC1 USBC0_ARX_DTX_P2 CT45 1 2 0.33U_0201_6.3V6M USBC0_ARX_C_DTX_P2 USBC0_ARX_C_DTX_P2 <19>
    Y6 USB3_DN USBC0_RX2N/DP2_TXN0 AC3 USBC0_ARX_DTX_N2 CT49 1 2 0.33U_0201_6.3V6M USBC0_ARX_C_DTX_N2 USBC0_ARX_C_DTX_N2 <19>

    USB1_TXP AE1 USB3_ATX_DRX_P1 USB3_ATX_DRX_P1 <26>


    USB1_TXN AE3 USB3_ATX_DRX_N1 USB3_ATX_DRX_N1 <26>
    USB20_P4 AC9
    <17> USB20_P4 USBC4_DP/USB4_DP Type-A left port1
    USB3.1 Type-C(Left) <17> USB20_N4
    USB20_N4 AC10 USBC4_DN/USB4_DN USB1_RXP AD8 USB3_ARX_DTX_P1 USB3_ARX_DTX_P1 <26>
    USB1_RXN AD9 USB3_ARX_DTX_N1 USB3_ARX_DTX_N1 <26>
    USB20_P5 AA11
    <26> USB20_P5 USB20_N5
    USB5_DP

    USB3.1 Type-A Port 2 <26> USB20_N5 AA12 USB5_DN

    USB20_P6 W8
    <24> USB20_P6 USB20_N6
    USB6_DP

    Finger Print <24> USB20_N6 W9 USB6_DN USBC4_TX1P/USB4_TXP/DP3_TXP2 V3 USBC4_ATX_DRX_P1 <18>


    USBC4_TX1N/USB4_TXN/DP3_TXN2 V1 USBC4_ATX_DRX_N1 <18>
    USB20_P7 W11
    <20> USB20_P7 USB20_N7
    USB7_DP

    NGFF_BT <20> USB20_N7 W12 USB7_DN USBC4_RX1P/USB4_RXP/DP3_TXP3 U4 USBC4_ARX_DTX_P1 <18>


    USBC4_RX1N/USB4_RXN/DP3_TXN3 U2 USBC4_ARX_DTX_N1 <18>
    TYPE-C(Left)
    USBC_I2C_SCL AL9 W2
    <17,18,19> USBC_I2C_SCL
    USBC_I2C_SDA AL8
    USBC_I2C_SCL USBC4_TX2P/DP3_TXP1

    USBC4_TX2N/DP3_TXN1 W4
    USBC4_ATX_DRX_P2
    USBC4_ATX_DRX_N2
    <18>
    <18> SPI ROM (Winbond)
    <17,18,19> USBC_I2C_SDA USBC_I2C_SDA

    USBC4_RX2P/DP3_TXP0 W1 USBC4_ARX_DTX_P2 <18>


    USBC4_RX2N/DP3_TXN0 W3 USBC4_ARX_DTX_N2 <18>
    USB_OC0# AE9
    <26> USB_OC0# USB_OC1#
    USB_OC0_L/AGPIO16
    USB3_ATX_DRX_P2 +1.8VALW
    <26> USB_OC1# AE10 USB_OC1_L/AGPIO17 USB5_TXP AD2 USB3_ATX_DRX_P2 <26> +1.8VALW
    RC617 1 @ 2 0_0402_5% PCIE_WAKE#_SOC AE6 S5_3.3V AD4 USB3_ATX_DRX_N2
    <20,22> EC_PCIE_WAKE# USB_OC2_L/AGPIO18 USB5_TXN
    USB3_ATX_DRX_N2 <26> UC2
    AE7 USB_OC3_L/AGPIO24 Type-A Right port2(AOU) APU_SPI_MOSI APU_SPI_CS1#
    RC92 2 @ 1 10K_0402_5% 1 8
    USB5_RXP AD12 USB3_ARX_DTX_P2 USB3_ARX_DTX_P2 <26> APU_SPI_MISO APU_SPI_MISO CS VCC APU_SPI_HOLD#
    RC93 2 1 10K_0402_5% 2 7
    USB5_RXN AD11 USB3_ARX_DTX_N2 USB3_ARX_DTX_N2 <26> APU_SPI_WP# APU_SPI_WP# DO(IO1) HOLD/RESET(IO3) APU_SPI_CLK_R
    RC94 2 1 10K_0402_5% 3 6 1
    RC96 2 1 10K_0402_5% APU_SPI_HOLD# 4 WP(IO2) CLK 5 APU_SPI_MOSI CC32
    RC95 2 1 10K_0402_5% APU_SPI_CS1# GND DI(IO0) 0.1U_0201_10V6K
    @
    FP6 REV 0.92
    W25Q128JWSIQ_SO8 2
    PART 10 OF 13
    +3VALW SA00009KY30
    FP6_BGA1140

    RC97 2 @EMI@ 1 10_0402_5% APU_SPI_CLK


    RC98 1 2 100K_0402_5% USB_OC0#
    RC99 1 2 100K_0402_5% USB_OC1#
    USBC_I2C_SCL 1
    RC608 1 @ 2 4.7K_0402_5% CC33
    4 USBC_I2C_SDA 10P_0402_50V8J 4
    RC609 1 @ 2 4.7K_0402_5%
    @EMI@
    2

    +1.8VALW
    EMI
    RC618 1 2 2.2K_0402_5% USBC_I2C_SCL

    RC619 1 2 2.2K_0402_5% USBC_I2C_SDA

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2020/02/25 2021/02/25 Title
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    FP6 SATA/CLK/USB/SPI
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    Custom 0.2
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 11 of 39
    A B C D E
    A B C D E

    Main Func = CPU

    +1.2V

    +APU_CORE

    +APU_CORE_SOC UC1F
    @
    1
    All BU(on bottom side under SOC) Across VDDIO & VSS split. TDC :13A POWER TDC: 44A
    1

    EDC: 17A N16 VDDCR_SOC_1 VDDCR_1 G7 EDC: 70A


    N18 VDDCR_SOC_2 VDDCR_2 G10
    1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 N20 VDDCR_SOC_3 VDDCR_3 G12
    22U_0603_6.3V6M
    CC119

    22U_0603_6.3V6M
    CC118

    22U_0603_6.3V6M
    CC117

    22U_0603_6.3V6M
    CC36

    22U_0603_6.3V6M
    CC37

    22U_0603_6.3V6M
    CC40

    1U_0201_6.3V6M
    CC44

    .22U 6.3V K X5R 0402


    CC49

    .22U 6.3V K X5R 0402


    CC50
    22U_0603_6.3V6M
    CC116

    22U_0603_6.3V6M
    CC35

    22U_0603_6.3V6M
    CC38

    22U_0603_6.3V6M
    CC52

    22U_0603_6.3V6M
    CC39

    1U_0201_6.3V6M
    CC43

    470P_0402_50V8J
    CC45

    CC46

    CC47

    .22U 6.3V K X5R 0402


    CC48

    .22U 6.3V K X5R 0402


    CC51
    P17 VDDCR_SOC_4 VDDCR_4 G14

    470P_0402_50V8J

    470P_0402_50V8J
    @ @ @ @ @ P19 VDDCR_SOC_5 VDDCR_5 H8
    @ R18 VDDCR_SOC_6 VDDCR_6 H11
    2 2 2 2 2 2 @ 2 2 2 2 @ 2 @ 2 2 2 2 2 2 2 2 2 R20 VDDCR_SOC_7 VDDCR_7 H15
    T19 VDDCR_SOC_8 VDDCR_8 K6
    U18 VDDCR_SOC_9 VDDCR_9 K12
    U20 VDDCR_SOC_10 VDDCR_10 K14
    V19 VDDCR_SOC_11 VDDCR_11 L8
    W18 VDDCR_SOC_12 VDDCR_12 M7
    W20 VDDCR_SOC_13 VDDCR_13 M10
    Y19 VDDCR_SOC_14 VDDCR_14 N14
    VDDCR_15 P7
    +1.2V VDDCR_16 P10
    VDDCR_17 P13
    VDDCR_18 P15
    TDC :6A AC20 VDDIO_MEM_S3_1 VDDCR_19 R8
    AC28 VDDIO_MEM_S3_2 VDDCR_20 R14
    +0.75VS +0.75VALW AD23 VDDIO_MEM_S3_3 VDDCR_21 R16
    AD26 VDDIO_MEM_S3_4 VDDCR_22 T7
    +VDDP_ALW AD28
    AD32
    VDDIO_MEM_S3_5

    VDDIO_MEM_S3_6
    VDDCR_23

    VDDCR_24
    T10
    T13
    AE20 VDDIO_MEM_S3_7 VDDCR_25 T15
    AE22 VDDIO_MEM_S3_8 VDDCR_26 T17
    AE25 VDDIO_MEM_S3_9 VDDCR_27 U14
    AE28 VDDIO_MEM_S3_10 VDDCR_28 U16
    1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 AF23 VDDIO_MEM_S3_11 VDDCR_29 V13
    22U_0603_6.3V6M
    CC115

    22U_0603_6.3V6M
    CC53

    22U_0603_6.3V6M
    CC54

    1U_0201_6.3V6M
    CC58

    1U_0201_6.3V6M
    CC59

    CC63
    1U_0201_6.3V6M
    CC55

    1U_0201_6.3V6M
    CC56

    1U_0201_6.3V6M
    CC60
    1U_0201_6.3V6M
    CC57

    1U_0201_6.3V6M
    CC61

    1U_0201_6.3V6M
    CC62

    1U_0201_6.3V6M
    CC66

    1U_0201_6.3V6M
    CC67
    22U_0603_6.3V6M
    CC64

    1U_0201_6.3V6M
    CC65
    AF26 VDDIO_MEM_S3_12 VDDCR_30 V15

    470P_0402_50V8J
    AF28 VDDIO_MEM_S3_13 VDDCR_31 V17
    AF32 VDDIO_MEM_S3_14 VDDCR_32 W7
    2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 AG20 VDDIO_MEM_S3_15 VDDCR_33 W10

    @
    2 2

    @
    @ @ @ AG22 W14
    Placed close UC1.AP9 AG25
    VDDIO_MEM_S3_16

    VDDIO_MEM_S3_17
    VDDCR_34

    VDDCR_35 W16
    AG28 VDDIO_MEM_S3_18 VDDCR_36 Y8
    AJ20 VDDIO_MEM_S3_19 VDDCR_37 Y13
    +1.8VALW AJ23 VDDIO_MEM_S3_20 VDDCR_38 Y15
    AJ26 VDDIO_MEM_S3_21 VDDCR_39 Y17
    AJ28 VDDIO_MEM_S3_22 VDDCR_40 AA7
    BO BU AJ32 VDDIO_MEM_S3_23 VDDCR_41 AA10
    BO BU AK22
    AK25
    VDDIO_MEM_S3_24

    VDDIO_MEM_S3_25
    VDDCR_42

    VDDCR_43
    AA14
    AA16

    22U_0603_6.3V6M

    1U_0201_6.3V6M
    AK28 VDDIO_MEM_S3_26 VDDCR_44 AA18
    1 1 AL23 VDDIO_MEM_S3_27 VDDCR_45 AB13
    AL26 VDDIO_MEM_S3_28 VDDCR_46 AB15
    +1.8VALW +1.8VS @ AL28 VDDIO_MEM_S3_29 VDDCR_47 AB17
    +3VALW

    CC68

    CC69
    AL32 VDDIO_MEM_S3_30 VDDCR_48 AB19
    +3VS 2 2 AM22 VDDIO_MEM_S3_31 VDDCR_49 AC14
    AM25 VDDIO_MEM_S3_32 VDDCR_50 AC16
    AM28 VDDIO_MEM_S3_33 VDDCR_51 AC18
    AN28 VDDIO_MEM_S3_34 VDDCR_52 AD7
    AN32 VDDIO_MEM_S3_35 VDDCR_53 AD10
    +1.8VALW AP28 VDDIO_MEM_S3_36 VDDCR_54 AD13
    1 1 1 1 1 1 AR32 VDDIO_MEM_S3_37 VDDCR_55 AD15
    1U_0201_6.3V6M
    CC71

    22U_0603_6.3V6M
    CC73
    22U_0603_6.3V6M
    CC70

    1U_0201_6.3V6M
    CC72

    1U_0201_6.3V6M
    C1

    1U_0201_6.3V6M
    CC74

    1 1 1 1 1 1 VDDCR_56 AD17

    1U_0201_6.3V6M
    CC79

    1U_0201_6.3V6M
    CC80
    10U_0402_6.3V6M
    CC78
    1U_0201_6.3V6M
    CC76
    22U_0603_6.3V6M
    CC75

    1U_0201_6.3V6M
    CC77

    @ @ AC21 VDDIO_VPH_1 VDDCR_57 AD19


    AD21 VDDIO_VPH_2 VDDCR_58 AE8
    2 2 2 2 2 2
    @

    VDDCR_59 AE14
    2 2 2 2 2 2 +3VS
    @ TDC :0.2A AP9 VDDIO_AUDIO VDDCR_60 AE16

    @
    @

    VDDCR_61 AE18
    TDC :0.25A AL18 VDD_33_1 VDDCR_62 AF7
    AM17 VDD_33_2 VDDCR_63 AF10
    +1.8VS VDDCR_64 AF13
    TDC :2.A AL20 VDD_18_1 VDDCR_65 AF15
    +1.8VALW AM19 VDD_18_2 VDDCR_66 AF17
    AF19
    3
    BO BU BO BU TDC :1A AL19 VDD_18_S5_1
    VDDCR_67

    VDDCR_68 AG14 3
    +3VALW AM18 VDD_18_S5_2 VDDCR_69 AG16
    VDDCR_70 AG18
    +0.75VALW TDC :0.25A AL17 VDD_33_S5_1 VDDCR_71 AH13
    AM16 VDD_33_S5_2 VDDCR_72 AH15
    VDDCR_73 AH17
    TDC :2A AL11 VDDP_S5_1 VDDCR_74 AH19
    AL12 AJ7
    Note : Cap placemet need to close APU +0.75VS AM12
    VDDP_S5_2

    VDDP_S5_3
    VDDCR_75

    VDDCR_76 AJ10
    AJ14
    VDDCR_77

    TDC :2A M15 VDDP_1 VDDCR_78 AJ16


    M16 VDDP_2 VDDCR_79 AJ18
    M18 VDDP_3 VDDCR_80 AK13
    VDDCR_81 AK15
    +RTC_APU VDDCR_82 AK17
    VDDCR_83 AK19
    +RTCBATT TDC :4.5uA AJ11 VDDBT_RTC_G
    +RTC_APU
    FP6 REV 0.92
    PART 6 OF 13

    +RTCBATT_APU FP6_BGA1140
    <22> EC_CLEAR_CMOS# RC106 1 @ 2 0_0402_5% RC107 1 2 1K_0402_5% RC626 1 @ 2 0_0402_5%
    1

    1 1 CC82
    1

    CC105 CLRP1 CC81 1U_0201_6.3V6M


    0.22U_0402_6.3V6K SHORT PADS 0.22U_0402_6.3V6K
    2

    @ @
    2

    2 2

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title
    FP6 PWR
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    Custom 0.2
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 12 of 39
    A B C D E
    5 4 3 2 1

    Main Func = CPU

    UC1L
    UC1G UC1H UC1K @
    D @ @ @ D
    WiFi
    GND GND GND/RSVD
    AM20 VSS VSS K28 V5 VSS VSS AE13 AR14 VSS_246 VSS_305 BD19
    N7 AGPIO256/WIFIBT_BT_DATA EGPIO267/RFIC_SPI_CLK P8
    A3 VSS VSS K32 V8 VSS VSS AE15 AR16 VSS_247 VSS_306 BD21
    R7 AGPIO257/WIFIBT_BT_VALID EGPIO268/RFIC_SPI_SS R9
    A5 VSS VSS L5 V11 VSS VSS AE17 AR19 VSS_248 VSS_307 BD23
    N6 AGPIO258/WIFIBT_BT_SYNC AGPIO269/RFIC_SPI_DATA R6
    A7 VSS VSS L13 V14 VSS VSS AE19 AR21 VSS_249 VSS_308 BD26
    T6 AGPIO259/WIFIBT_BT_CLK
    A10 VSS VSS L15 V16 VSS VSS AF1 AR26 VSS_250 VSS_309 BD30
    A12 VSS VSS L18 V18 VSS VSS AF3 AR28 VSS_251
    A14 VSS VSS L20 V20 VSS VSS AF5 AT23 VSS_252
    A16 VSS VSS L25 V22 VSS VSS AF14 AU5 VSS_253
    R10 AGPIO260/WIFIBT_QSPI_DATA0 AGPIO270/WIFIBT_RFIC_WAKEUP P9
    A19 VSS VSS L28 V25 VSS VSS AF16 AU8 VSS_254
    T12 AGPIO261/WIFIBT_QSPI_DATA1 EGPIO271/WIFIBT_BUCKEN T9
    A21 VSS VSS M1 V28 VSS VSS AF18 AU11 VSS_255
    P12 AGPIO262/WIFIBT_QSPI_DATA2 EGPIO266/WIFIBT_FLOW T8
    A23 VSS VSS M3 W5 VSS VSS AF20 AU13 VSS_256
    P11 AGPIO263/WIFIBT_QSPI_DATA3
    A26 VSS VSS M5 W13 VSS VSS AG5 AU15 VSS_257
    T11 AGPIO264/WIFIBT_QSPI_CLK
    A30 VSS VSS M21 W15 VSS VSS AG8 AU18 VSS_258 RSVD_46 AV8
    P6 AGPIO265/WIFIBT_QSPI_SS
    C3 VSS VSS M23 W17 VSS VSS AG11 AU20 VSS_259 RSVD_47 BD18
    WIFIBT_DATA_RXP V7
    C10 VSS VSS M26 W19 VSS VSS AG13 AU22 VSS_260 RSVD_45 AV3
    WIFIBT_DATA_RXN V6
    C32 VSS VSS M28 W23 VSS VSS AG15 AU25 VSS_261 RSVD_44 AU6
    E7 VSS VSS M32 W26 VSS VSS AG17 AU28 VSS_262 RSVD_43 AR6
    WIFIBT_DATA_TXP V9
    E8 VSS VSS N5 W28 VSS VSS AG19 AV1 VSS_263 RSVD_42 AR3
    WIFIBT_DATA_TXN V10
    E10 VSS VSS N8 W32 VSS VSS AH14 AV5 VSS_264 RSVD_41 AP1
    E11 VSS VSS N11 Y1 VSS VSS AH16 AV7 VSS_265 RSVD_40 AN16
    E12 VSS VSS N13 Y3 VSS VSS AH18 AV10 VSS_266 RSVD_39 AN4
    FP6 REV 0.92
    E13 VSS VSS N15 Y5 VSS VSS AH20 AV12 VSS_267 RSVD_38 AN2
    PART 12 OF 13
    E14 VSS VSS N17 Y11 VSS VSS AJ1 AV14 VSS_268 RSVD_37 AM14
    C C
    E15 VSS VSS N22 Y14 VSS VSS AJ3 AV16 VSS_269 RSVD_36 AM13
    E16 VSS VSS N25 Y16 VSS VSS AJ5 AV19 VSS_270 RSVD_35 AL29 FP6_BGA1140
    E18 VSS VSS N28 Y18 VSS VSS AJ13 AV21 VSS_271 RSVD_34 AL15 UC1M
    E19 VSS VSS P1 Y20 VSS VSS AJ15 AV23 VSS_272 RSVD_33 AL14
    E20 VSS VSS P5 Y22 VSS VSS AJ17 AV26 VSS_273 RSVD_32 AL13 @
    E21 VSS VSS P14 Y25 VSS VSS AJ19 AV28 VSS_274 RSVD_31 AK3 CAMERAS
    E22 VSS VSS P16 Y28 VSS VSS AK5 AV32 VSS_275 RSVD_30 AJ29
    E23 VSS VSS P18 AA5 VSS VSS AK8 AW5 VSS_276 RSVD_29 AJ27 D21 CAM0_CSI2_CLOCKP CAM0_CLK A18
    E25 VSS VSS P20 AA13 VSS VSS AK11 AW28 VSS_277 RSVD_28 AF6 A20 CAM0_CSI2_CLOCKN
    E26 VSS VSS P23 AA15 VSS VSS AK14 AY6 VSS_278 RSVD_27 AE12 CAM0_I2C_SCL C18
    E27 VSS VSS P26 AA17 VSS VSS AK16 AY7 VSS_279 RSVD_26 AD6 D18 CAM0_CSI2_DATAP0 CAM0_I2C_SDA B17
    F5 VSS VSS P28 AA19 VSS VSS AK18 AY8 VSS_280 RSVD_25 AD3 B18 CAM0_CSI2_DATAN0
    F19 VSS VSS P32 AA23 VSS VSS AK20 AY10 VSS_281 RSVD_24 AC30 CAM0_SHUTDOWN D17
    F21 VSS VSS R5 AA26 VSS VSS AL1 AY11 VSS_282 RSVD_23 AC12 C19 CAM0_CSI2_DATAP1
    F23 VSS VSS R11 AA28 VSS VSS AL5 AY12 VSS_283 RSVD_22 AB31 D20 CAM0_CSI2_DATAN1
    F28 VSS VSS R13 AA32 VSS VSS AL7 AY13 VSS_284 RSVD_21 AA20
    G1 VSS VSS R15 AB2 VSS VSS AL10 AY14 VSS_285 RSVD_20 AA6 C21 CAM0_CSI2_DATAP2
    G3 VSS VSS R17 AB4 VSS VSS AL16 AY15 VSS_286 RSVD_19 Y12 B21 CAM0_CSI2_DATAN2
    G5 VSS VSS R19 AB14 VSS VSS AM5 AY16 VSS_287 RSVD_18 W6
    G16 VSS VSS R22 AB16 VSS VSS AM8 AY18 VSS_288 RSVD_17 V12 C20 CAM0_CSI2_DATAP3
    G26 VSS VSS R25 AB18 VSS VSS AM11 AY19 VSS_289 RSVD_16 R12 B20 CAM0_CSI2_DATAN3
    G28 VSS VSS R28 AB20 VSS VSS AM15 AY20 VSS_290 RSVD_15 N19
    G32 VSS VSS T1 AC5 VSS VSS AN1 AY21 VSS_291 RSVD_14 N12 C15 CAM1_CSI2_CLOCKP CAM1_CLK A13
    H5 VSS VSS T3 AC8 VSS VSS AN5 AY22 VSS_292 RSVD_13 N10 A15 CAM1_CSI2_CLOCKN

    B H13 VSS VSS T5 AC11 VSS VSS AN7 AY23 VSS_293 RSVD_12 N9 CAM1_I2C_SCL B13 B
    H18 VSS VSS T14 AC13 VSS VSS AN10 AY25 VSS_294 RSVD_11 M13 D16 CAM1_CSI2_DATAP0 CAM1_I2C_SDA D13
    H20 VSS VSS T16 AC15 VSS VSS AN23 AY26 VSS_295 RSVD_10 M12 B16 CAM1_CSI2_DATAN0
    H22 VSS VSS T18 AC17 VSS VSS AN26 AY27 VSS_296 RSVD_9 M11 CAM1_SHUTDOWN C14
    H25 VSS VSS T20 AC19 VSS VSS AP5 BB1 VSS_297 RSVD_8 M6 D15 CAM1_CSI2_DATAP1
    H28 VSS VSS T23 AC22 VSS VSS AP8 BB32 VSS_298 RSVD_7 L12 B15 CAM1_CSI2_DATAN1 CAM_PRIV_LED C16
    J19 VSS VSS T26 AC25 VSS VSS AP13 BD3 VSS_299 RSVD_6 K19 CAM_IR_ILLU C13
    K1 VSS VSS T28 AD1 VSS VSS AP15 BD7 VSS_300 RSVD_5 F16 FP6 REV 0.92
    K3 VSS VSS T32 AD5 VSS VSS AP18 BD10 VSS_301 RSVD_4 F14 PART 13 OF 13
    K5 VSS VSS U13 AD14 VSS VSS AP20 BD12 VSS_302 RSVD_3 F12
    K16 VSS VSS U15 AD16 VSS VSS AP25 BD14 VSS_303 RSVD_2 F10 FP6_BGA1140
    K21 VSS VSS U17 AD18 VSS VSS AR1 BD16 VSS_304 RSVD_1 C26
    K26 VSS VSS U19 AD20 VSS VSS AR5
    VSS V2 AE5 VSS VSS AR7
    VSS V4 AE11 VSS VSS AR12
    FP6 REV 0.92 FP6 REV 0.92 FP6 REV 0.92
    PART 7 OF 13 PART 8 OF 13 PART 11 OF 13

    FP6_BGA1140 FP6_BGA1140
    FP6_BGA1140

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    FP6 GND
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
    Custom 0.2
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 13 of 39
    5 4 3 2 1
    A B C D E

    +DDRA_VREF_DQ
    +DDRA_VREF_DQ +DDRA_VREF_DQ
    +DDRA_VREF_DQ

    UD6 UD5 UD7


    UD8
    M1 G2 DDR_A_D6 M1 G2 DDR_A_D30 M1 G2 DDR_A_D54

    .047U_0402_16V7K

    .047U_0402_16V7K
    .047U_0402_16V7K
    VREFCA DQL0 F7 DDR_A_D5 VREFCA DQL0 F7 DDR_A_D24 VREFCA DQL0 F7 DDR_A_D48 M1 G2 DDR_A_D59

    .047U_0402_16V7K
    DQL1 H3 DDR_A_D2 DQL1 H3 DDR_A_D31 DQL1 H3 DDR_A_D50 VREFCA DQL0 F7 DDR_A_D61
    DDR_A_MA0 P3 DQL2 H7 DDR_A_D0 DDR_A_MA0 P3 DQL2 H7 DDR_A_D25 DDR_A_MA0 P3 DQL2 H7 DDR_A_D53 DQL1 H3 DDR_A_D58
    1 DDR_A_MA1 A0 DQL3 DDR_A_D3 1 DDR_A_MA1 A0 DQL3 DDR_A_D26 1 DDR_A_MA1 A0 DQL3 DDR_A_D55 DDR_A_MA0 DQL2 DDR_A_D60
    P7 H2 P7 H2 P7 H2 P3 H7

    CD130

    CD131
    CD129
    DDR_A_MA2 A1 DQL4 DDR_A_D4 DDR_A_MA2 A1 DQL4 DDR_A_D28 DDR_A_MA2 A1 DQL4 DDR_A_D49 1 DDR_A_MA1 A0 DQL3 DDR_A_D63
    R3 H8 R3 H8 R3 H8 P7 H2

    CD128
    DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D7 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D27 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D51 DDR_A_MA2 R3 A1 DQL4 H8 DDR_A_D56
    2 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D1 2 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D29 2 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D52 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D62
    DDR_A_MA5 P8 A4 DQL7 DDR_A_MA5 P8 A4 DQL7 DDR_A_MA5 P8 A4 DQL7 2 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D57
    DDR_A_MA6 P2 A5 DDR_A_MA6 P2 A5 DDR_A_MA6 P2 A5 DDR_A_MA5 P8 A4 DQL7
    DDR_A_MA7 R8 A6 A3 DDR_A_D8 DDR_A_MA7 R8 A6 A3 DDR_A_D23 DDR_A_MA7 R8 A6 A3 DDR_A_D34 DDR_A_MA6 P2 A5
    DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_D11 DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_D20 DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_D37 DDR_A_MA7 R8 A6 A3 DDR_A_D42
    1 DDR_A_MA9 A8 DQU1 DDR_A_D9 DDR_A_MA9 A8 DQU1 DDR_A_D18 DDR_A_MA9 A8 DQU1 DDR_A_D38 DDR_A_MA8 A7 DQU0 DDR_A_D40 1
    R7 C3 R7 C3 R7 C3 R2 B8
    DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D14 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D17 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D32 DDR_A_MA9 R7 A8 DQU1 C3 DDR_A_D47
    DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D13 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D19 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D39 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D44
    DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D10 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D16 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D33 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D43
    DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D12 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D22 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D35 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D45
    L2 A13 DQU6 D7 DDR_A_D15 DDR_A_MA14_WE# L2 A13 DQU6 D7 DDR_A_D21 DDR_A_MA14_WE# L2 A13 DQU6 D7 DDR_A_D36 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D46
    <7> DDR_A_MA14_WE# A14/WE DQU7 A14/WE DQU7 A14/WE DQU7 DDR_A_MA14_WE# A13 DQU6 DDR_A_D41
    L2 D7
    N2 DDR_A_BA0 N2 DDR_A_BA0 N2 A14/WE DQU7
    <7> DDR_A_BA0 BA0 DDR_A_BA1 BA0 DDR_A_BA1 BA0 DDR_A_BA0
    N8 B3 +1.2V N8 B3 +1.2V N8 B3 +1.2V N2
    <7> DDR_A_BA1 BA1 VDD1 BA1 VDD1 BA1 VDD1 DDR_A_BA1 BA0
    B9 B9 B9 N8 B3 +1.2V
    E2 VDD2 D1 E2 VDD2 D1 E2 VDD2 D1 BA1 VDD1 B9
    <7> DDR_A_DM1 DMU/DBIU VDD3 <7> DDR_A_DM2 DMU/DBIU VDD3 <7> DDR_A_DM4 DMU/DBIU VDD3 VDD2
    E7 G7 E7 G7 E7 G7 E2 D1
    <7> DDR_A_DM0 DML/DBIL VDD4 <7> DDR_A_DM3 DML/DBIL VDD4 <7> DDR_A_DM6 DML/DBIL VDD4 <7> DDR_A_DM5 DMU/DBIU VDD3
    J1 J1 J1 E7 G7
    VDD5 VDD5 VDD5 <7> DDR_A_DM7 DML/DBIL VDD4
    J9 J9 J9 J1
    VDD6 L1 VDD6 L1 VDD6 L1 VDD5 J9
    K7 VDD7 L9 DDR_A_CLK0 K7 VDD7 L9 DDR_A_CLK0 K7 VDD7 L9 VDD6 L1
    <7> DDR_A_CLK0 CK_t VDD8 DDR_A_CLK#0 CK_t VDD8 DDR_A_CLK#0 CK_t VDD8 DDR_A_CLK0 VDD7
    K8 R1 K8 R1 K8 R1 K7 L9
    <7> DDR_A_CLK#0 CK_c VDD9 DDR_A_CKE0 CK_c VDD9 DDR_A_CKE0 CK_c VDD9 DDR_A_CLK#0 CK_t VDD8
    K2 T9 K2 T9 K2 T9 K8 R1
    <7> DDR_A_CKE0 CKE VDD10 CKE VDD10 CKE VDD10 DDR_A_CKE0 CK_c VDD9
    K2 T9
    CKE VDD10
    A1 A1 A1
    VDDQ1 A9 VDDQ1 A9 VDDQ1 A9 A1
    VDDQ2 C1 VDDQ2 C1 VDDQ2 C1 VDDQ1 A9
    VDDQ3 D9 VDDQ3 D9 VDDQ3 D9 VDDQ2 C1
    VDDQ4 F2 VDDQ4 F2 VDDQ4 F2 VDDQ3 D9
    VDDQ5 F8 VDDQ5 F8 VDDQ5 F8 VDDQ4 F2
    DDR_A_ODT0 K3 VDDQ6 G1 DDR_A_ODT0 K3 VDDQ6 G1 DDR_A_ODT0 K3 VDDQ6 G1 VDDQ5 F8
    <7> DDR_A_ODT0 ODT VDDQ7 DDR_A_CS#0 ODT VDDQ7 DDR_A_CS#0 ODT VDDQ7 DDR_A_ODT0 VDDQ6
    L7 G9 L7 G9 L7 G9 K3 G1
    <7> DDR_A_CS#0 CS VDDQ8 DDR_A_MA16_RAS# CS VDDQ8 DDR_A_MA16_RAS# CS VDDQ8 DDR_A_CS#0 ODT VDDQ7
    L8 J2 L8 J2 L8 J2 L7 G9
    <7> DDR_A_MA16_RAS# A16/RAS VDDQ9 DDR_A_MA15_CAS# A16/RAS VDDQ9 DDR_A_MA15_CAS# A16/RAS VDDQ9 DDR_A_MA16_RAS# CS VDDQ8
    M8 J8 M8 J8 M8 J8 L8 J2
    <7> DDR_A_MA15_CAS# A15/CAS VDDQ10 A15/CAS VDDQ10 A15/CAS VDDQ10 DDR_A_MA15_CAS# A16/RAS VDDQ9
    M8 J8
    B2 B2 B2 A15/CAS VDDQ10
    VSS1 E1 DDP@ VSS1 E1 DDP@ VSS1 E1 DDP@ B2
    VSS2 E9 RD200 1 2 240_0201_1% VSS2 E9 RD201 1 2 240_0402_1% VSS2 E9 RD202 1 2 240_0402_1% VSS1 E1
    VSS3 G8 VSS3 G8 VSS3 G8 VSS2 E9
    DDR_A_DQS#1 A7 VSS4 K1 DDR_A_DQS#2 A7 VSS4 K1 DDR_A_DQS#4 A7 VSS4 K1 VSS3 G8
    DDR_A_DQS1 B7 DQSU_c VSS5 K9 DDR_A_DQS2 B7 DQSU_c VSS5 K9 DDR_A_DQS4 B7 DQSU_c VSS5 K9 DDR_A_DQS#5 A7 VSS4 K1
    DDR_A_DQS#0 F3 DQSU_t VSS6 M9 DDR_A_BG1_R DDR_A_DQS#3 F3 DQSU_t VSS6 M9 DDR_A_BG1_R DDR_A_DQS#6 F3 DQSU_t VSS6 M9 DDR_A_BG1_R DDR_A_DQS5 B7 DQSU_c VSS5 K9
    DDR_A_DQS0 DQSL_c VSS7 DDR_A_DQS3 DQSL_c VSS7 DDR_A_DQS6 DQSL_c VSS7 DDR_A_DQS#7 DQSU_t VSS6 DDR_A_BG1_R

    1
    G3 N1 G3 N1 G3 N1 F3 M9
    DQSL_t VSS8 T1 DQSL_t VSS8 T1 DQSL_t VSS8 T1 DDR_A_DQS7 G3 DQSL_c VSS7 N1 RD203
    DDR_A_RST# P1 VSS9 DDR_A_RST# P1 VSS9 DDR_A_RST# P1 VSS9 DQSL_t VSS8 T1 240_0402_1%
    RESET RESET RESET DDR_A_RST# P1 VSS9 DDP@
    1 2 RD164 F9 1 2 RD165 F9 1 2 RD170 F9 RESET

    2
    240_0402_1% ZQ 240_0402_1% ZQ 240_0402_1% ZQ 1 2 RD168 F9
    240_0402_1% ZQ
    2 DDR_A_ACT# DDR_A_ACT# DDR_A_ACT# 2
    <7> DDR_A_ACT# L3 A2 L3 A2 L3 A2
    DDR_A_BG0 M2 ACT VSSQ1 A8 DDR_A_BG0 M2 ACT VSSQ1 A8 DDR_A_BG0 M2 ACT VSSQ1 A8 DDR_A_ACT# L3 A2
    <7> DDR_A_BG0 BG0 VSSQ2 BG0 VSSQ2 BG0 VSSQ2 DDR_A_BG0 ACT VSSQ1
    N9 C9 N9 C9 N9 C9 M2 A8
    DDR_A_ALERT# P9 TEN VSSQ3 D2 DDR_A_ALERT# P9 TEN VSSQ3 D2 DDR_A_ALERT# P9 TEN VSSQ3 D2 N9 BG0 VSSQ2 C9
    <7> DDR_A_ALERT# DDR_A_PAR ALERT VSSQ4 DDR_A_PAR ALERT VSSQ4 DDR_A_PAR ALERT VSSQ4 DDR_A_ALERT# TEN VSSQ3
    <7> DDR_A_PAR T3 D8 T3 D8 T3 D8 P9 D2
    PAR VSSQ5 E3 PAR VSSQ5 E3 PAR VSSQ5 E3 DDR_A_PAR T3 ALERT VSSQ4 D8
    T7 VSSQ6 E8 T7 VSSQ6 E8 T7 VSSQ6 E8 PAR VSSQ5 E3
    B1 NC VSSQ7 F1 B1 NC VSSQ7 F1 B1 NC VSSQ7 F1 T7 VSSQ6 E8
    +2.5V VPP1 VSSQ8 +2.5V VPP1 VSSQ8 +2.5V VPP1 VSSQ8 NC VSSQ7
    R9 H1 R9 H1 R9 H1 +2.5V B1 F1
    VPP2 VSSQ9 H9 VPP2 VSSQ9 H9 VPP2 VSSQ9 H9 R9 VPP1 VSSQ8 H1
    VSSQ10 VSSQ10 96-BALL VSSQ10 VPP2 VSSQ9
    Close to UD8 96-BALL 96-BALL
    VSSQ10
    H9
    SDRAM DDR4 SDRAM DDR4 SDRAM DDR4 96-BALL
    K4AAG165WA-BCWE_FBGA96 K4AAG165WA-BCWE_FBGA96 K4AAG165WA-BCWE_FBGA96 SDRAM DDR4
    <7> DDR_A_MA[0..13]
    SA0000CZ200 SA0000CZ200 SA0000CZ200 K4AAG165WA-BCWE_FBGA96
    +1.2V @ @ @ SA0000CZ200
    <7> DDR_A_DQS#[0..7]
    @
    <7> DDR_A_DQS[0..7]
    CD59
    CD58

    CD60

    <7> DDR_A_D[63..0]
    1 1 1

    +1.2V
    2 2 2
    0.22U_0201_6.3V
    0.22U_0201_6.3V

    0.22U_0201_6.3V

    +0.6VS
    RD1 1 2 1K_0402_5% DDR_A_ALERT# SDP@
    RD200
    SD041000080
    +0.6VS 0_0201_1%

    SDP@
    RD2 1 2 39_0402_5% DDR_A_PAR RD243 1 DDP@ 2 39_0201_1% DDR_A_BG1_R RD204 1 DDP@ 2 0_0201_5% RD201
    DDR_A_BG1 <7>
    SD028000080
    +1.2V 0_0402_1%

    SDP@
    RD205 1 SDP@ 2 0_0201_5% RD202
    SD028000080
    CD3 1 2 0.1U_0201_10V6K RD28 1 2 39_0402_5% DDR_A_CLK0 0_0402_1%

    SDP@
    RD203
    CD4 1 2 0.1U_0201_10V6K RD29 1 2 39_0402_5% DDR_A_CLK#0 SD028000080

    3
    @
    Co-lay for SDP / DDP memory die 0_0402_1%
    3

    DRAM DOWN DECOUPLING


    +1.2V +0.6VS DDR_A_RST#
    <7> DDR_A_RST#
    +0.6VS
    DDR_A_MA0 1
    Data mapping
    CD14

    CD18

    CD21

    CD22

    CD26

    CD27

    CD30

    CD31
    CD64

    CD12

    CD13

    CD17

    CD25

    CD32
    CD23

    CD29
    CD19
    CD10

    CD11

    CD15

    CD24
    CD16

    CD20

    CD28

    RD3 1 2 39_0402_5%
    RD4 1 2 39_0402_5% DDR_A_MA1 CD36
    DDR_A_MA2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
    RD5 1 2 39_0402_5% @ 100P_0201_25V8J U6 DQ U5 DQ U7 DQ U8 DQ
    RD6 1 2 39_0402_5% DDR_A_MA3 2 @ESD@
    DDR_A_MA4
    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K
    0.22U_0402_6.3V6K
    0.22U_0402_6.3V6K

    RD7 1 2 39_0402_5% DQL0 D14 DQL0 D23 DQL0 D51 DQL0 D47
    DDR_A_MA5 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0201_6.3V

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K
    0.22U_0201_6.3V

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K
    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K
    0.22U_0402_6.3V6K
    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    RD8 1 2 39_0402_5%
    RD9 1 2 39_0402_5% DDR_A_MA6
    DDR_A_MA7 DQL1 D10 DQL1 D19 DQL1 D55 DQL1 D45
    RD10 1 2 39_0402_5%
    RD11 1 2 39_0402_5% DDR_A_MA8
    DDR_A_MA9 +1.2V
    DQL2 D15 DQL2 D18 DQL2 D50 DQL2 D42
    RD12 1 2 39_0402_5%
    RD13 1 2 39_0402_5% DDR_A_MA10
    DDR_A_MA11 DQL3 D11 DQL3 D22 DQL3 D54 DQL3 D44
    RD14 1 2 39_0402_5%
    RD15 1 2 39_0402_5% DDR_A_MA12
    DDR_A_MA13 DQL4 D12 DQL4 D21 DQL4 D49 DQL4 D43
    RD16 1 2 39_0402_5%
    DQL5 D8 DQL5 D16 DQL5 D52 DQL5 D41
    DDR_A_MA14_WE# Memory Side
    0.1U_0201_10V6K

    RD17 1 2 39_0402_5% DQL6 D13 DQL6 D17 DQL6 D48 DQL6 D46
    DDR_A_MA15_CAS#
    2

    RD18 1 2 39_0402_5% +1.2V +0.6VS 2


    DDR_A_MA16_RAS# +DDRA_VREF_DQ +1.2V @ RD32
    RD19 1 2 39_0402_5% DQL7 D9 DQL7 D20 DQL7 D53 DQL7 D40
    CD5 1K_0402_1%
    CD33 1 2 0.22U_0402_6.3V6K +DDRA_VREF_DQ
    DDR_A_ODT0 1 DQU0 D7 DQU0 D27 DQU0 D34 DQU0 D63
    RD20 1 2 39_0402_5% CD34 1 2 0.1U_0201_10V6K
    1

    RD21 1 2 39_0402_5% DDR_A_CS#0 CD35 1 2 0.22U_0402_6.3V6K


    DDR_A_CKE0 DQU1 D5 DQU1 D31 DQU1 D33 DQU1 D57
    RD22 1 2 39_0402_5% CD139 1 2 0.1U_0201_10V6K
    CD37 1 2 0.22U_0402_6.3V6K DQU2 D3 DQU2 D29 DQU2 D38 DQU2 D59
    RD23 1 2 39_0402_5% DDR_A_ACT# CD38 1 2 0.1U_0201_10V6K
    RD24 1 2 39_0402_5% DDR_A_BA0 CD39 1 2 0.22U_0402_6.3V6K
    DDR_A_BA1 DQU3 D4 DQU3 D28 DQU3 D39 DQU3 D56
    0.1U_0201_10V6K

    RD25 1 2 39_0402_5% CD40 1 2 0.1U_0201_10V6K 2 2


    DDR_A_BG0
    2

    RD26 1 2 39_0402_5% CD41 1 2 0.22U_0402_6.3V6K CD7 DQU4 D2 DQU4 D30 DQU4 D37 DQU4 D62
    CD6 RD37 0.1U_0201_10V6K
    1K_0402_1% DQU5 D1 DQU5 D25 DQU5 D35 DQU5 D60
    1 1
    DQU6 D6 DQU6 D26 DQU6 D36 DQU6 D58
    1

    4
    +2.5V +2.5V +2.5V +2.5V
    DQU7 D0 DQU7 D24 DQU7 D32 DQU7 D61 4

    change from 1K to 1.5K ohm for ES sample only at DB


    PV:11/19 change from 1.5K to 1K ohm for PR sample to MP
    1U_0201_6.3V6M
    CD43

    10U 6.3V M X5R 0402


    CD44

    1U_0201_6.3V6M
    CD46

    10U 6.3V M X5R 0402


    CD50
    1U_0201_6.3V6M
    CD48

    1U_0201_6.3V6M
    CD51

    1U_0201_6.3V6M
    CD52
    1U_0201_6.3V6M
    CD42

    1U_0201_6.3V6M
    CD45

    10U 6.3V M X5R 0402


    CD47

    1U_0201_6.3V6M
    CD49

    10U 6.3V M X5R 0402


    CD53

    1 1 1 1 1 1 1 1 1 1 1 1
    VREF traces should be at least 20mils wide
    2 2 2 2 2 2 2 2 2
    @
    2 2 2
    @ 20mils spacing to other signals

    Closed to UD5 Closed to UD6 Closed to UD7


    Security Classification
    2020/02/25
    Compal Secret Data
    2021/02/25 Title
    Compal Electronics, Inc.
    Closed to UD8 Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DDR4 Memory Down
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 14 of 39

    A B C D E
    A B C D E

    +DDRB_VREF_DQ
    +DDRB_VREF_DQ +DDRB_VREF_DQ
    +DDRB_VREF_DQ

    UD2 UD1 UD3


    UD4
    M1 G2 DDR_B_D14 M1 G2 DDR_B_D31 M1 G2 DDR_B_D43

    .047U_0402_16V7K

    .047U_0402_16V7K

    .047U_0402_16V7K
    VREFCA DQL0 F7 DDR_B_D13 VREFCA DQL0 F7 DDR_B_D25 VREFCA DQL0 F7 DDR_B_D47 M1 G2 DDR_B_D62

    .047U_0402_16V7K
    DQL1 H3 DDR_B_D15 DQL1 H3 DDR_B_D30 DQL1 H3 DDR_B_D44 VREFCA DQL0 F7 DDR_B_D61
    DDR_B_MA0 P3 DQL2 H7 DDR_B_D8 DDR_B_MA0 P3 DQL2 H7 DDR_B_D24 DDR_B_MA0 P3 DQL2 H7 DDR_B_D40 DQL1 H3 DDR_B_D63
    1 DDR_B_MA1 A0 DQL3 DDR_B_D11 1 DDR_B_MA1 A0 DQL3 DDR_B_D26 1 DDR_B_MA1 A0 DQL3 DDR_B_D42 DDR_B_MA0 DQL2 DDR_B_D57
    P7 H2 P7 H2 P7 H2 P3 H7

    CD133

    CD134

    CD135
    DDR_B_MA2 A1 DQL4 DDR_B_D12 DDR_B_MA2 A1 DQL4 DDR_B_D28 DDR_B_MA2 A1 DQL4 DDR_B_D41 1 DDR_B_MA1 A0 DQL3 DDR_B_D59
    R3 H8 R3 H8 R3 H8 P7 H2

    CD132
    DDR_B_MA3 N7 A2 DQL5 J3 DDR_B_D10 DDR_B_MA3 N7 A2 DQL5 J3 DDR_B_D27 DDR_B_MA3 N7 A2 DQL5 J3 DDR_B_D45 DDR_B_MA2 R3 A1 DQL4 H8 DDR_B_D60
    2 DDR_B_MA4 N3 A3 DQL6 J7 DDR_B_D9 2 DDR_B_MA4 N3 A3 DQL6 J7 DDR_B_D29 2 DDR_B_MA4 N3 A3 DQL6 J7 DDR_B_D46 DDR_B_MA3 N7 A2 DQL5 J3 DDR_B_D58
    DDR_B_MA5 P8 A4 DQL7 DDR_B_MA5 P8 A4 DQL7 DDR_B_MA5 P8 A4 DQL7 2 DDR_B_MA4 N3 A3 DQL6 J7 DDR_B_D56
    DDR_B_MA6 P2 A5 DDR_B_MA6 P2 A5 DDR_B_MA6 P2 A5 DDR_B_MA5 P8 A4 DQL7
    DDR_B_MA7 R8 A6 A3 DDR_B_D3 DDR_B_MA7 R8 A6 A3 DDR_B_D23 DDR_B_MA7 R8 A6 A3 DDR_B_D39 DDR_B_MA6 P2 A5
    DDR_B_MA8 R2 A7 DQU0 B8 DDR_B_D4 DDR_B_MA8 R2 A7 DQU0 B8 DDR_B_D20 DDR_B_MA8 R2 A7 DQU0 B8 DDR_B_D32 DDR_B_MA7 R8 A6 A3 DDR_B_D54
    1 DDR_B_MA9 A8 DQU1 DDR_B_D7 DDR_B_MA9 A8 DQU1 DDR_B_D17 DDR_B_MA9 A8 DQU1 DDR_B_D38 DDR_B_MA8 A7 DQU0 DDR_B_D49 1
    R7 C3 R7 C3 R7 C3 R2 B8
    DDR_B_MA10 M3 A9 DQU2 C7 DDR_B_D1 DDR_B_MA10 M3 A9 DQU2 C7 DDR_B_D22 DDR_B_MA10 M3 A9 DQU2 C7 DDR_B_D37 DDR_B_MA9 R7 A8 DQU1 C3 DDR_B_D50
    DDR_B_MA11 T2 A10/AP DQU3 C2 DDR_B_D2 DDR_B_MA11 T2 A10/AP DQU3 C2 DDR_B_D18 DDR_B_MA11 T2 A10/AP DQU3 C2 DDR_B_D35 DDR_B_MA10 M3 A9 DQU2 C7 DDR_B_D48
    DDR_B_MA12 M7 A11 DQU4 C8 DDR_B_D5 DDR_B_MA12 M7 A11 DQU4 C8 DDR_B_D21 DDR_B_MA12 M7 A11 DQU4 C8 DDR_B_D36 DDR_B_MA11 T2 A10/AP DQU3 C2 DDR_B_D51
    DDR_B_MA13 T8 A12/BC DQU5 D3 DDR_B_D6 DDR_B_MA13 T8 A12/BC DQU5 D3 DDR_B_D16 DDR_B_MA13 T8 A12/BC DQU5 D3 DDR_B_D34 DDR_B_MA12 M7 A11 DQU4 C8 DDR_B_D53
    L2 A13 DQU6 D7 DDR_B_D0 DDR_B_MA14_WE# L2 A13 DQU6 D7 DDR_B_D19 DDR_B_MA14_WE# L2 A13 DQU6 D7 DDR_B_D33 DDR_B_MA13 T8 A12/BC DQU5 D3 DDR_B_D55
    <8> DDR_B_MA14_WE# A14/WE DQU7 A14/WE DQU7 A14/WE DQU7 DDR_B_MA14_WE# A13 DQU6 DDR_B_D52
    L2 D7
    N2 DDR_B_BA0 N2 DDR_B_BA0 N2 A14/WE DQU7
    <8> DDR_B_BA0 BA0 DDR_B_BA1 BA0 DDR_B_BA1 BA0 DDR_B_BA0
    N8 B3 +1.2V N8 B3 +1.2V N8 B3 +1.2V N2
    <8> DDR_B_BA1 BA1 VDD1 BA1 VDD1 BA1 VDD1 DDR_B_BA1 BA0
    B9 B9 B9 N8 B3 +1.2V
    E2 VDD2 D1 E2 VDD2 D1 E2 VDD2 D1 BA1 VDD1 B9
    <8> DDR_B_DM0 DMU/DBIU VDD3 <8> DDR_B_DM2 DMU/DBIU VDD3 <8> DDR_B_DM4 DMU/DBIU VDD3 VDD2
    E7 G7 E7 G7 E7 G7 E2 D1
    <8> DDR_B_DM1 DML/DBIL VDD4 <8> DDR_B_DM3 DML/DBIL VDD4 <8> DDR_B_DM5 DML/DBIL VDD4 <8> DDR_B_DM6 DMU/DBIU VDD3
    J1 J1 J1 E7 G7
    VDD5 VDD5 VDD5 <8> DDR_B_DM7 DML/DBIL VDD4
    J9 J9 J9 J1
    VDD6 L1 VDD6 L1 VDD6 L1 VDD5 J9
    K7 VDD7 L9 DDR_B_CLK0 K7 VDD7 L9 DDR_B_CLK0 K7 VDD7 L9 VDD6 L1
    <8> DDR_B_CLK0 CK_t VDD8 DDR_B_CLK#0 CK_t VDD8 DDR_B_CLK#0 CK_t VDD8 DDR_B_CLK0 VDD7
    K8 R1 K8 R1 K8 R1 K7 L9
    <8> DDR_B_CLK#0 CK_c VDD9 DDR_B_CKE0 CK_c VDD9 DDR_B_CKE0 CK_c VDD9 DDR_B_CLK#0 CK_t VDD8
    K2 T9 K2 T9 K2 T9 K8 R1
    <8> DDR_B_CKE0 CKE VDD10 CKE VDD10 CKE VDD10 DDR_B_CKE0 CK_c VDD9
    K2 T9
    CKE VDD10
    A1 A1 A1
    VDDQ1 A9 VDDQ1 A9 VDDQ1 A9 A1
    VDDQ2 C1 VDDQ2 C1 VDDQ2 C1 VDDQ1 A9
    VDDQ3 D9 VDDQ3 D9 VDDQ3 D9 VDDQ2 C1
    VDDQ4 F2 VDDQ4 F2 VDDQ4 F2 VDDQ3 D9
    VDDQ5 F8 VDDQ5 F8 VDDQ5 F8 VDDQ4 F2
    DDR_B_ODT0 K3 VDDQ6 G1 DDR_B_ODT0 K3 VDDQ6 G1 DDR_B_ODT0 K3 VDDQ6 G1 VDDQ5 F8
    <8> DDR_B_ODT0 ODT VDDQ7 DDR_B_CS#0 ODT VDDQ7 DDR_B_CS#0 ODT VDDQ7 DDR_B_ODT0 VDDQ6
    L7 G9 L7 G9 L7 G9 K3 G1
    <8> DDR_B_CS#0 CS VDDQ8 DDR_B_MA16_RAS# CS VDDQ8 DDR_B_MA16_RAS# CS VDDQ8 DDR_B_CS#0 ODT VDDQ7
    L8 J2 L8 J2 L8 J2 L7 G9
    <8> DDR_B_MA16_RAS# A16/RAS VDDQ9 DDR_B_MA15_CAS# A16/RAS VDDQ9 DDR_B_MA15_CAS# A16/RAS VDDQ9 DDR_B_MA16_RAS# CS VDDQ8
    M8 J8 M8 J8 M8 J8 L8 J2
    <8> DDR_B_MA15_CAS# A15/CAS VDDQ10 A15/CAS VDDQ10 A15/CAS VDDQ10 DDR_B_MA15_CAS# A16/RAS VDDQ9
    M8 J8
    B2 B2 B2 A15/CAS VDDQ10
    VSS1 E1 DDP@ VSS1 E1 DDP@ VSS1 E1 DDP@ B2
    VSS2 E9 RD206 1 2 240_0201_1% VSS2 E9 RD207 1 2 240_0402_1% VSS2 E9 RD208 1 2 240_0402_1% VSS1 E1
    VSS3 G8 VSS3 G8 VSS3 G8 VSS2 E9
    DDR_B_DQS#0 A7 VSS4 K1 DDR_B_DQS#2 A7 VSS4 K1 DDR_B_DQS#4 A7 VSS4 K1 VSS3 G8
    DDR_B_DQS0 B7 DQSU_c VSS5 K9 DDR_B_DQS2 B7 DQSU_c VSS5 K9 DDR_B_DQS4 B7 DQSU_c VSS5 K9 DDR_B_DQS#6 A7 VSS4 K1
    DDR_B_DQS#1 F3 DQSU_t VSS6 M9 DDR_B_BG1_R DDR_B_DQS#3 F3 DQSU_t VSS6 M9 DDR_B_BG1_R DDR_B_DQS#5 F3 DQSU_t VSS6 M9 DDR_B_BG1_R DDR_B_DQS6 B7 DQSU_c VSS5 K9
    DDR_B_DQS1 DQSL_c VSS7 DDR_B_DQS3 DQSL_c VSS7 DDR_B_DQS5 DQSL_c VSS7 DDR_B_DQS#7 DQSU_t VSS6 DDR_B_BG1_R

    1
    G3 N1 G3 N1 G3 N1 F3 M9
    DQSL_t VSS8 T1 DQSL_t VSS8 T1 DQSL_t VSS8 T1 DDR_B_DQS7 G3 DQSL_c VSS7 N1 RD209
    DDR_B_RST# P1 VSS9 DDR_B_RST# P1 VSS9 DDR_B_RST# P1 VSS9 DQSL_t VSS8 T1 240_0402_1%
    RESET RESET RESET DDR_B_RST# P1 VSS9 DDP@
    1 2 RD166 F9 1 2 RD167 F9 1 2 RD174 F9 RESET

    2
    240_0402_1% ZQ 240_0402_1% ZQ 240_0402_1% ZQ 1 2 RD172 F9
    240_0402_1% ZQ
    2 DDR_B_ACT# DDR_B_ACT# DDR_B_ACT# 2
    <8> DDR_B_ACT# L3 A2 L3 A2 L3 A2
    DDR_B_BG0 M2 ACT VSSQ1 A8 DDR_B_BG0 M2 ACT VSSQ1 A8 DDR_B_BG0 M2 ACT VSSQ1 A8 DDR_B_ACT# L3 A2
    <8> DDR_B_BG0 BG0 VSSQ2 BG0 VSSQ2 BG0 VSSQ2 DDR_B_BG0 ACT VSSQ1
    N9 C9 N9 C9 N9 C9 M2 A8
    DDR_B_ALERT# P9 TEN VSSQ3 D2 DDR_B_ALERT# P9 TEN VSSQ3 D2 DDR_B_ALERT# P9 TEN VSSQ3 D2 N9 BG0 VSSQ2 C9
    <8> DDR_B_ALERT# DDR_B_PAR ALERT VSSQ4 DDR_B_PAR ALERT VSSQ4 DDR_B_PAR ALERT VSSQ4 DDR_B_ALERT# TEN VSSQ3
    <8> DDR_B_PAR T3 D8 T3 D8 T3 D8 P9 D2
    PAR VSSQ5 E3 PAR VSSQ5 E3 PAR VSSQ5 E3 DDR_B_PAR T3 ALERT VSSQ4 D8
    T7 VSSQ6 E8 T7 VSSQ6 E8 T7 VSSQ6 E8 PAR VSSQ5 E3
    B1 NC VSSQ7 F1 B1 NC VSSQ7 F1 B1 NC VSSQ7 F1 T7 VSSQ6 E8
    +2.5V VPP1 VSSQ8 +2.5V VPP1 VSSQ8 +2.5V VPP1 VSSQ8 NC VSSQ7
    R9 H1 R9 H1 R9 H1 +2.5V B1 F1
    VPP2 VSSQ9 H9 VPP2 VSSQ9 H9 VPP2 VSSQ9 H9 R9 VPP1 VSSQ8 H1
    96-BALL VSSQ10 96-BALL VSSQ10 96-BALL VSSQ10 VPP2 VSSQ9 H9
    SDRAM DDR4 VSSQ10
    Close to UD4 SDRAM DDR4 SDRAM DDR4 96-BALL
    K4AAG165WA-BCWE_FBGA96 K4AAG165WA-BCWE_FBGA96 K4AAG165WA-BCWE_FBGA96 SDRAM DDR4
    SA0000CZ200 SA0000CZ200 SA0000CZ200 K4AAG165WA-BCWE_FBGA96
    @ @ @ SA0000CZ200
    +1.2V @
    CD62
    CD61

    CD63

    1 1 1
    +1.2V

    2 2 2 DDR_B_ALERT# +0.6VS
    0.22U_0201_6.3V
    0.22U_0201_6.3V

    0.22U_0201_6.3V

    RD239 1 2 1K_0402_5%
    SDP@
    RD206
    +0.6VS SD041000080
    0_0201_1%

    RD241 1 2 39_0402_5% DDR_B_PAR SDP@


    RD246 1 DDP@ 2 39_0201_1% DDR_B_BG1_R RD244 1 DDP@ 2 0_0201_5% DDR_B_BG1 <8> RD207
    +1.2V SD028000080
    0_0402_1%

    SDP@
    RD245 1 SDP@ 2 0_0201_5% RD208
    CD188 1 2 0.1U_0201_10V6K RD242 1 2 39_0402_5% DDR_B_CLK0 SD028000080
    0_0402_1%

    SDP@
    CD187 1 2 0.1U_0201_10V6K RD240 1 2 39_0402_5% DDR_B_CLK#0 RD209
    @ SD028000080
    0_0402_1%
    3
    Co-lay for SDP / DDP memory die 3

    DRAM DOWN DECOUPLING


    +1.2V +0.6VS
    <8> DDR_B_RST#

    +0.6VS
    CD180

    CD181
    CD177
    CD153

    CD168
    CD167

    CD173

    CD183

    CD186
    CD172

    CD178

    CD182
    CD171
    CD165

    CD166

    CD170

    CD175

    CD179
    CD164

    CD185
    CD169

    CD174

    CD176

    1
    DDR_B_MA0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
    RD218 1 2 39_0402_5% @ CD136
    RD216 1 2 39_0402_5% DDR_B_MA1
    DDR_B_MA2 2
    100P_0201_25V8J Data mapping
    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K
    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    RD215 1 2 39_0402_5% @ESD@


    DDR_B_MA3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
    0.22U_0402_6.3V6K
    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K
    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K
    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K
    0.22U_0402_6.3V6K
    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K
    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    0.22U_0402_6.3V6K

    RD220 1 2 39_0402_5% U2 DQ U1 DQ U3 DQ U4 DQ
    RD217 1 2 39_0402_5% DDR_B_MA4
    RD219 1 2 39_0402_5% DDR_B_MA5
    DDR_B_MA6 DQL0 D15 DQL0 D22 DQL0 D45 DQL0 D54
    RD223 1 2 39_0402_5%
    RD221 1 2 39_0402_5% DDR_B_MA7
    DDR_B_MA8 +1.2V
    DQL1 D12 DQL1 D21 DQL1 D47 DQL1 D48
    RD225 1 2 39_0402_5%
    RD227 1 2 39_0402_5% DDR_B_MA9
    DDR_B_MA10 <8> DDR_B_MA[0..13] DQL2 D14 DQL2 D23 DQL2 D44 DQL2 D50
    RD222 1 2 39_0402_5%
    RD224 1 2 39_0402_5% DDR_B_MA11
    DDR_B_MA12 <8> DDR_B_DQS#[0..7] DQL3 D13 DQL3 D20 DQL3 D46 DQL3 D49
    RD228 1 2 39_0402_5%
    RD226 1 2 39_0402_5% DDR_B_MA13
    <8> DDR_B_DQS[0..7] DQL4 D11 DQL4 D19 DQL4 D43 DQL4 D51
    +1.2V +0.6VS Memory Side
    0.1U_0201_10V6K

    DDR_B_MA14_WE# <8> DDR_B_D[0..63] DQL5 D9 DQL5 D17 DQL5 D41 DQL5 D53
    2

    RD230 1 2 39_0402_5% +DDRB_VREF_DQ +1.2V


    DDR_B_MA15_CAS# 2
    RD232 1 2 39_0402_5% @ RD213 DQL6 D10 DQL6 D18 DQL6 D42 DQL6 D55
    RD229 1 2 39_0402_5% DDR_B_MA16_RAS# CD144 1 2 0.22U_0402_6.3V6K CD141 1K_0402_1%
    CD156 1 2 0.1U_0201_10V6K +DDRB_VREF_DQ
    1 DQL7 D8 DQL7 D16 DQL7 D40 DQL7 D52
    CD143 1 2 0.22U_0402_6.3V6K
    1

    RD231 1 2 39_0402_5% DDR_B_ODT0 CD159 1 2 0.1U_0201_10V6K


    DDR_B_CS#0 DQU0 D7 DQU0 D35 DQU0 D31 DQU0 D62
    RD233 1 2 39_0402_5% CD145 1 2 0.22U_0402_6.3V6K
    RD234 1 2 39_0402_5% DDR_B_CKE0 CD158 1 2 0.1U_0201_10V6K DQU1 D0 DQU1 D37 DQU1 D26 DQU1 D57
    CD146 1 2 0.22U_0402_6.3V6K
    RD236 1 2 39_0402_5% DDR_B_ACT# CD160 1 2 0.1U_0201_10V6K
    DDR_B_BA0 DQU2 D6 DQU2 D38 DQU2 D30 DQU2 D59
    0.1U_0201_10V6K

    RD238 1 2 39_0402_5% CD148 1 2 0.22U_0402_6.3V6K 2 2


    DDR_B_BA1
    2

    RD235 1 2 39_0402_5% CD142 DQU3 D5 DQU3 D32 DQU3 D27 DQU3 D56
    RD237 1 2 39_0402_5% DDR_B_BG0 CD140 RD214 0.1U_0201_10V6K
    1
    1K_0402_1%
    1
    DQU4 D2 DQU4 D34 DQU4 D25 DQU4 D58
    DQU5 D1 DQU5 D33 DQU5 D29 DQU5 D60
    1

    DQU6 D3 DQU6 D39 DQU6 D24 DQU6 D63


    4 4
    +2.5V +2.5V +2.5V +2.5V
    DQU7 D4 DQU7 D36 DQU7 D28 DQU7 D61
    change from 1K to 1.5K ohm for ES sample only at DB
    PV:11/19 change from 1.5K to 1K ohm for PR sample to MP
    1U_0201_6.3V6M
    CD184

    1U_0201_6.3V6M
    CD162
    1U_0201_6.3V6M
    CD149

    1U_0201_6.3V6M
    CD154

    1U_0201_6.3V6M
    CD161
    10U 6.3V M X5R 0402
    CD152

    10U 6.3V M X5R 0402


    CD163
    1U_0201_6.3V6M
    CD151
    1U_0201_6.3V6M
    CD147

    10U 6.3V M X5R 0402


    CD150

    1U_0201_6.3V6M
    CD155

    10U 6.3V M X5R 0402


    CD157

    1 1 1 1 1 1 1 1 1 1 1 1 VREF traces should be at least 20mils wide


    20mils spacing to other signals
    @
    2 2 2 2 2 2 2 2 2 2 2 2 @

    Closed to UD1 Closed to UD2 Closed to UD3


    Security Classification
    2020/02/25
    Compal Secret Data
    2021/02/25 Title
    Compal Electronics, Inc.
    Closed to UD4 Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DDR4 Memory Down
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 15 of 39

    A B C D E
    5 4 3 2 1

    LCD POWER SWITCH HOT PLUG DETECT

    R6 1 @ 2 0_0402_5% EDP_HPD_R
    +3VS +LCDVDD_CONN <9> EDP_HPD
    W=60mils

    1
    U5
    W=60mils R8
    5 1 +LCDVDD R2 1 @ 2 0_0805_5% 100K_0402_5%
    IN OUT
    2 1

    2
    D GND D
    1

    C4 4 3 C3
    <9> ENVDD EN OC 4.7U_0402_6.3V6M
    1U_0201_6.3V6M
    EM5203AJ-20 SOT23 5P 2
    2

    CAMERA POWER CIRCUIT


    SA00008R900

    +3VALW +3V_CMOS

    +3VALW
    CAM_NMS@
    R337 1 2 0_0603_5%
    +3VS W=40mils

    DISPLAY OFF U2
    U74AHC1G08G-AL5-R_SOT353-5
    SA00000OH00
    +3VALW

    W=40mils
    Q201
    S TR LP2301BLT1G 1P SOT-23-3
    SB00001FT00

    3 1
    W=40mils

    D
    5
    @

    1
    2 @ CAM@ 1 1@

    P
    Through PCH <9,22> ENBKL B C230 C231
    4 DISPOFF# R4007 VSG(th) : 0.4-1 V
    Y 0.1U_0201_10V6K

    G
    1 10U_0402_6.3V6M

    2
    <22> BKOFF# 100K_0402_5% ID(max) : 2 A
    Through EC

    G
    A RDS(on) : 90-150 mΩ 2 2

    2
    3
    2

    R7 CAM@ 2 150K_0402_5% CAM_EN#_R


    <22> CAM_EN# R201 1
    R4006 100K_0402_5%
    100K_0402_5%
    @ 1
    C204

    1
    0.1U_0201_10V6K
    1

    R5 1 @ 2 0_0402_5% CAM@
    C 2 C

    eDP CONNECTOR
    Touch Screen POWER CIRCUIT +5VALW1 +3V_TS

    +3V_TS U1 @
    +3VS 1 5
    1 W=20mils VCC VOUT
    1

    1U_0201_6.3V6M
    C335
    C7 @ 2
    +19VB +LEDVDD @ GND
    4.7U_0805_25V6-K 1
    2 +3VS ENVDD_R

    1U_0201_6.3V6M
    C336
    W=60mils 3 4
    JEDP1 2 NC EN
    R9 1 @ 2 0_0805_5% 1 R4027 1 TS_R@ 2 0_0402_5%
    2 1 RT9069-33GB_SOT23-5 2 @
    3 2 Q209
    3 SA00008AU00
    4 +3VALW ME2301DC-G_SOT23-3
    5 4 SB00001FT00
    6 5
    1 2 0.1U_0201_10V6K EDP_TXN1_C 7 6 W=20mils 3 1
    W=20mils

    D
    C12
    <9> EDP_TXN1 7

    1
    C13 1 2 0.1U_0201_10V6K EDP_TXP1_C 8
    <9> EDP_TXP1 8 TS@ TS@ 1@ +3VALW
    9 C324
    EDP_TXN0_C 9 R4029
    C11 1 2 0.1U_0201_10V6K 10

    G
    <9> EDP_TXN0 10U_0402_6.3V6M

    2
    C10 1 2 0.1U_0201_10V6K EDP_TXP0_C 11 10 100K_0402_5% VSG(th) : 0.5-0.9 V
    <9> EDP_TXP0 11

    1
    12 ID(max) : 1.75 A 2
    @

    2
    C9 1 2 0.1U_0201_10V6K EDP_AUXP_C 13 12 RDS(on) : 0.11-0.2 ohm
    eDP <9> EDP_AUXP
    C8 1 2 0.1U_0201_10V6K EDP_AUXN_C 14 13 R4028 1 TS@ 2 150K_0402_5% TS_EN#_R R4045
    <9> EDP_AUXN 14 <11,22> TS_EN# 100K_0402_5%
    15
    16 15
    W=60mils 1

    2
    17 16 C325 TS_EN#
    +LCDVDD_CONN 17
    B 18 0.1U_0201_10V6K B
    EDP_HPD_R 19 18 @
    19

    1
    DISPOFF# 20 2 D
    @
    21 20 ENVDD R4056 1 @ 2 150K_0402_5% ENVDD_R 2 Q212 SB000009Q80
    <9> INVTPWM 21
    22 1 G L2N7002WT1G_SC-70-3
    23 22
    <10> I2C_1_SCL S

    3
    24 23 @ C346 VGS(th) : 1-2.5 V
    <10> I2C_1_SDA 24 ID(max) : 0.25 A
    25 0.1U_0201_10V6K
    26 25 31 2 RDS(on) : 2-4 ohm
    Touch screen <10> TS_INT#
    27 26 G1 32
    <11,22> TS_DISABLE# 27 G2
    +3V_TS
    28 33
    29 28 G3 34
    30 29 G4 35
    30 G5

    Camera CONNECTOR
    CVILU_CVS3302M1RE-NH W=40mils JS1 ME@
    SP01002FP00 +3V_CMOS
    1
    2 1
    ME@ 2
    3
    4 3
    Camera

    C
    l
    o
    s
    e
    c
    o
    n
    n
    USB20_P2_L 5 4
    copy from ELZ02 USB20_N2_L 6 5
    7 6
    SOC_DMIC_DAT0 8 7
    <10> SOC_DMIC_DAT0 SOC_DMIC_CLK0_R 8
    9
    R358 1 EMI@ 2 SOC_DMIC_CLK0_R 10 9
    <10> SOC_DMIC_CLK0 DMIC 11 10
    HCB1005KF-221T15 R359 1 @ 2 0_0402_5% +3V_DMIC 12 11
    1 +3VALW 12
    SM01000Q500 C249 +3VL
    13
    27P_0201_25V8 14 13
    +3VS 14
    @EMI@ 15
    2 <22> TAB_SW# 15
    16
    17 16
    <24> GS_DATA 17
    18
    <24> GS_CLK 18
    19
    20 19
    20
    21
    D6 @ESD@ 22 GND
    3 6 SOC_DMIC_DAT0 GND
    I/O2 I/O4

    A R300 1 @ 2 0_0201_5% USB20_P2_L A


    <11> USB20_P2
    2 5 SP01002UU00
    GND VDD SDAN_606044-020041-X
    R301 1 @ 2 0_0201_5% USB20_N2_L
    <11> USB20_N2
    SOC_DMIC_CLK0 1 4
    I/O1 I/O3
    AZC399-04S.R7G SOT23-6
    SC300005Y00

    Security Classification
    2020/02/25
    Compal Secret Data
    2021/02/25 Title
    Compal Electronics, Inc.
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    eDP / Camera / Touch
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 16 of 39
    5 4 3 2 1
    5 4 3 2 1

    Slave Adderss setting +LDO_3V3_5457V +5V_IN_PWR


    Local PWR Voltage Monitor Close JUSBC2 +5VALW1 +5V_IN_PWR

    1
    DT3 RT35 1 @ 2 0_0402_5%
    @ RT37
    RT22 200K_0402_1% USBC4_ARX_T_DTX_P1 1 10 USBC4_ARX_T_DTX_P1
    Slave Addr Ra 5% Rb 5% 10K_0402_5% 9 USBC4_ARX_T_DTX_N1 QT3
    USBC4_ARX_T_DTX_N1 2 7 USBC4_ATX_T_DRX_N2 S TR LP2301BLT1G 1P SOT-23-3
    addr0:0xCC NC 10K <0.2V

    2
    ADDR_CFG LOC_PWR_MON 6 USBC4_ATX_T_DRX_P2
    3 1

    D
    addr1:0xCE 75K 10K >=0.2V&&<0.6V

    1
    addr2:0xD0 33K 10K >=0.6V&&<1.0V USBC4_ATX_T_DRX_N2
    RT23 RT38 4 8 1 SB00001FT00
    addr3:0xD2 10K 10K >=1.0V 10K_0402_1% 10K_0402_1% 3 +5VALW1 CT72

    G
    2
    USBC4_ATX_T_DRX_P2 5 1U_0201_6.3V6M VSG(th) : 0.4-1 V
    ID(max) : 2 A
    It's is used for SMBUS slave addr0/1/2/3

    2
    2 RDS(on) : 90-150 mΩ
    setting during power on initialization. RT70 1 2 100K_0402_5%
    AZ124S-04F.R7G

    1
    ESD@ SC300006T00
    RT291
    D +USBC1_VBUS_F +USBC1_VBUS DT4 D
    VBUS Voltage/current Monitor 10K_0402_5%
    VBUS Discharge USBC4_ATX_T_DRX_P1 1 10 USBC4_ATX_T_DRX_P1

    2
    1
    1
    9 USBC4_ATX_T_DRX_N1
    RT40 RT69 USBC4_ATX_T_DRX_N1 2 7 USBC4_ARX_T_DTX_N2

    1
    200K_0402_1% 6 USBC4_ARX_T_DTX_P2 D
    75_0805_5%
    <22> PD_PWR_EN
    2 QT4 SB000009Q80
    G L2N7002WT1G_SC-70-3

    1 2
    2
    VMON USBC4_ARX_T_DTX_N2 4 8 S

    3
    1
    D 3 VGS(th) : 1-2.5 V
    1

    1
    VBUS_DSCHG 2 QT1 SB000009Q80 USBC4_ARX_T_DTX_P2 5 RT71 @ CT73 ID(max) : 115 mA
    RDS(on) : 3-4 ohm
    RT42 G L2N7002WT1G_SC-70-3 47K_0402_5% 0.01U_0402_16V7K
    10K_0402_1% S

    3
    VGS(th) : 1-2.5 V AZ124S-04F.R7G 2

    2
    ID(max) : 115 mA
    ESD@
    2

    RDS(on) : 3-4 ohm


    SC300006T00

    UT1 SA0000CY670
    RTS5457V-GR_QFN40_5X5 RT24 UN-POP: Enable Dead battery function
    RT24 POP: Disable Dead battery function
    USBC1_C_AUXP ADDR_CFG 26 9 RT24 1 @ 2 0_0402_5%
    <18> USBC1_C_AUXP USBC1_C_AUXN ADDR_CFG/MGPIO17 DB_CFG
    To TUSB1044 <18> USBC1_C_AUXN LOC_PWR_MON 28 17 VBCAP RT27 1 2 2.2_0805_1% CT34 1 2 0.1U_0402_25V6
    LOC_PWR_MON/MGPIO16 VBCAP
    VMON 29 10 USBC1_CC1 RT28 1 @ 2 200K_0402_1%
    VMON/MGPIO14 PD CU CC1 12 USBC1_CC2
    USBC1_FLT# 27 CC2
    100K_0402_5% IMON/MGPIO15
    2 1 RT25

    CT35 1 2 0.1U_0201_10V6K USBC1_C_AUXP 14 16 USBC1_SBU1


    <9> USBC1_AUXP AUX_P/MGPIO8 SBU1/MGPIO10
    CT36 1 2 0.1U_0201_10V6K USBC1_C_AUXN 13 15 USBC1_SBU2
    <9> USBC1_AUXN AUX_N/MGPIO9 AUX MUX SBU2/MGPIO11
    +LDO_3V3_5457V 2 1 RT26 2
    100K_0402_5% HPD/GPIO3

    RT1 1 2 100K_0402_5%
    <9,18> USBC1_PD_HPD
    23
    C_DP_A/MGPIO0 22
    C C_DM_A/MGPIO1 C
    18
    19 H_DP/MGPIO4 USB2.0 SWITCH
    H_DM/MGPIO5 21
    USBC1_CC1 C_DP_B/MGPIO2 VR_ALERT# <9,19>
    CT37 1 2 220P_0201_25V7K 20
    C_DM_B/MGPIO3

    USBC1_CC2 CT01 1 2 220P_0201_25V7K

    25
    Billboard 34 APU_RST#_R
    BB_DP GPIO21 USBC1_PWR_SW_EN APU_RST#_R <9,19>
    24 35
    BB_DM GPIO20
    38 USBC_I2C_SCL
    SCL4/GPIO13 USBC_I2C_SDA USBC_I2C_SCL <11,18,19>
    3 37
    <19,22,30,31> EC_SMB_CK1 SCL1/GPIO4 SDA4/GPIO14 USBC_I2C_SDA <11,18,19>
    4 36
    <19,22,30,31> EC_SMB_DA1 SDA1/GPIO5 INT4/GPIO15
    5
    <22> EC_PD2_INT INT1/GPIO6 GPIOs 1
    CTL0 <18> <18> USBC4_ATX_T_DRX_P1
    6 SCL3/GPIO10 40
    <29> USBC1_CHG_EN USBC1_FO SCL2/GPIO7 SDA3/GPIO11 FLIP <18> <18> USBC4_ATX_T_DRX_N1
    7 39
    VBUS_DSCHG SDA2/GPIO8 INT3/GPIO12 CTL1 <18>
    8
    INT2/GPIO9 <18> USBC4_ARX_T_DTX_P1
    <18> USBC4_ARX_T_DTX_N1
    1

    RT63
    Power From Re-Driver <18> USBC4_ATX_T_DRX_P2
    1

    100K_0402_5% 30 <18> USBC4_ATX_T_DRX_N2


    RT30 REXT
    6.2K_0402_1% DT16 ESD@
    VCONN_IN

    <18> USBC4_ARX_T_DTX_P2
    2

    41 USBC1_SBU2 3 6 USBC1_CC1
    3V3_OUT
    VBUS_IN

    EPAD <18> USBC4_ARX_T_DTX_N2 I/O2 I/O4


    2

    5V_IN

    2 5
    GND VDD
    11

    32

    31

    33

    +5V_IN_PWR +LDO_3V3_5457V

    USBC1_CC2 1 4 USBC1_SBU1
    I/O1 I/O3

    USB2.0
    1

    1 1 1 CEST236LC5VU
    CT46 CT47 CT48 RT294 SC300005Y00
    10U_0402_6.3V6M 0.1U_0201_10V6K 4.7U_0402_6.3V6M 47K_0402_5%
    DT1 ESD@
    +5V_IN_PWR 2 2 2 USB20_N4_R 3 6
    2

    I/O2 I/O4
    B LT2 EMI@ B
    1 2 USB20_N4_R
    1 1 +USBC1_VBUS_F <11> USB20_N4 1 2
    CT50 CT51 2 5
    R4021 1 2 4.7_1206_5% GND VDD
    10U_0402_6.3V6M 0.1U_0201_10V6K
    1 1 4 3 USB20_P4_R
    2 2 <11> USB20_P4 4 3
    CT52 CT53 USB20_P4_R
    4.7U_0603_25V6K DLM0NSN900HY2D_4P 1 4
    0.1U_0402_25V7K I/O1 I/O3
    2 2 SM070005U00
    CEST236LC5VU
    SC300005Y00

    +USBC1_VBUS +USBC1_VBUS

    JUSBC2 ME@
    A1 B12
    GND GND
    USBC4_ATX_T_DRX_P1 A2 B11 USBC4_ARX_T_DTX_P1
    USBC4_ATX_T_DRX_N1 A3 SSTXP1 SSRXP1 B10 USBC4_ARX_T_DTX_N1
    SSTXN1 SSRXN1
    5V Power Switch CT54 1 2 1U_0402_25V6K A4 B9 CT55 1 2 1U_0402_25V6K
    VBUS VBUS
    USBC1_CC1 A5 B8 USBC1_SBU2
    CC1 SBU2
    SCS0000AJ00 USB20_P4_R A6 B7 USB20_N4_R
    DT2 @ NSR20F30NXT5G_DSN2-2 USB20_N4_R A7 DP1 DN2 B6 USB20_P4_R
    2 1 DN1 DP2
    USBC1_SBU1 A8 B5 USBC1_CC2
    VBUS Current Setting +5VALW1 +USBC1_VBUS_F SBU1 CC2
    UT4 CT56 1 2 1U_0402_25V6K A9 B4 CT57 1 2 1U_0402_25V6K
    VBUS VBUS
    16K_0402_1% 2 1 RT67 PWR_SW_ILIM A1 C2 USBC4_ARX_T_DTX_N2 A10 B3 USBC4_ATX_T_DRX_N2
    PWR_SW_ILIM_R

    A2 VIN VBUS D1 USBC4_ARX_T_DTX_P2 A11 SSRXN2 SSTXN2 B2 USBC4_ATX_T_DRX_P2


    +LDO_3V3_5457V VIN VBUS D2 +LDO_3V3_5457V SSRXP2 SSTXP2
    10U_0402_6.3V6M

    1
    B1
    VBUS A12
    GND GND
    B1 ESD
    VCP PWR_SW_ILIM

    2
    B2 A3
    CT68

    VCP ILIM
    1

    2 C1 1 2 DT6
    VCP 1 GND GND
    A RT85 3 4 CEST23NC24VU 3P C/A SOT23 A
    10U_0603_25V6M

    @ D4 5 GND GND 6 SCA00004500


    1000P_0201_50V7K

    10K_0402_1% USBC1_FLT# A4 CAP GND GND


    CT69
    75K_0402_1%

    1 ESD@
    2

    FLT 2 USBC1_FLT# 100K_0402_5% 2 1 RT286


    2

    1
    1

    D USBC1_FO
    RT66

    CT71

    C4 B3
    2 FO GND C3 DRAPH_UB11249-0500W-1H
    TYPEC_PWR_ILIM# <19,22> USBC1_PWR_SW_EN
    G B4 GND D3 2 100K_0402_5% 2 1 RT60 USBC1_PWR_SW_EN
    EN GND
    1

    100K_0402_5% 1 2 RT59 VBUS_DSCHG


    S QT2
    3

    SB000009Q80 NX5P3290UK_WLCSP16
    100K_0402_5% 1 2 RT58 USBC1_FO
    2N7002KW_SOT323-3
    VGS(th) : 1-2.5 V
    ID(max) : 115 mA
    RDS(on) : 3-4 ohm
    Security Classification
    2020/02/25
    Compal Secret Data
    2021/02/25 Title
    Compal Electronics, Inc.
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PD IC RTS5457V
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 17 of 39
    5 4 3 2 1
    5 4 3 2 1

    +3V_MUX +3V_MUX +3V_MUX +3V_MUX +3V_MUX +3V_MUX +3V_MUX +3V_MUX +3V_MUX

    +3V_MUX

    1
    RT267 RT245 RT246 RT249 RT250 RT247 RT248 RT243 RT244
    1K_0201_5% @ 1K_0201_5% RE@ 1K_0201_5% @ 1K_0201_5% @ 1K_0201_5% @ 1K_0201_5% @ 1K_0201_5% RE@ 1K_0201_5% @ 1K_0201_5% @

    +3VALW +3VS +3V_MUX


    2

    2
    I2C_EN SLP_S0# VIO_SEL CFG0 CFG1 UEQ1_A1 UEQ0_A0 DEQ1 DEQ0

    CT113

    CT114
    1U_0201_6.3V6M

    1U_0201_6.3V6M

    10U_0402_6.3V6M
    1 1 1 1 1 1 2

    0.1U_0201_10V6K

    0.1U_0201_10V6K

    0.1U_0201_10V6K

    0.1U_0201_10V6K
    RE@ CT115

    RE@ CT116

    RE@ CT117

    RE@ CT118

    RE@ CT119
    1

    RE@

    RE@
    RT277 RT253 RT254 RT257 RT258 RT255 RT256 RT251 RT252 2 2 2 2 2 2 1
    1K_0201_5% RE@ 1K_0201_5% @ 1K_0201_5% RE@ 20K_0201_5% RE@ 20K_0201_5% RE@ 1K_0201_5% RE@ 1K_0201_5% @ 1K_0201_5% RE@ 1K_0201_5% @ R4037 1 @ 2 0_0603_5%

    D
    R4038 1 @ 2 0_0603_5% D
    2

    2
    For GPIO/I2C Control (GPIO Default)
    RT268 1 @ 2 0_0201_5% FLIP_R
    <11,17,19> USBC_I2C_SCL CTL0_R
    RT269 1 @ 2 0_0201_5%
    <11,17,19> USBC_I2C_SDA
    RT278 1 @ 2 0_0201_5% FLIP_R
    <17> FLIP CTL0_R
    RT279 1 @ 2 0_0201_5%
    <17> CTL0

    +3V_MUX

    20
    28
    1
    6
    U21

    VCC_1
    VCC_2
    VCC_3
    VCC_4
    CT80 1 RE@2 0.33U_0201_6.3V6M USBC4_ARX_C_DTX_P2 9 40 USBC4_ARX_D_DTX_P2 CT121 1 RE@2 0.33U_0201_25V6K
    C <11> USBC4_ARX_DTX_P2 USBC4_ARX_C_DTX_N2 URX2p DRX2p USBC4_ARX_D_DTX_N2 USBC4_ARX_T_DTX_P2 <17> C
    CT79 1 RE@2 0.33U_0201_6.3V6M 10 39 CT122 1 RE@2 0.33U_0201_25V6K
    <11> USBC4_ARX_DTX_N2 URX2n DRX2n USBC4_ARX_T_DTX_N2 <17>
    CT81 1 RE@2 0.33U_0201_6.3V6M USBC4_ARX_C_DTX_P1 19 30 USBC4_ARX_D_DTX_P1 CT124 1 RE@2 0.33U_0201_25V6K
    <11> USBC4_ARX_DTX_P1 USBC4_ARX_C_DTX_N1 URX1p DRX1p USBC4_ARX_D_DTX_N1 USBC4_ARX_T_DTX_P1 <17>
    CT82 1 RE@2 0.33U_0201_6.3V6M 18 31 CT125 1 RE@2 0.33U_0201_25V6K
    <11> USBC4_ARX_DTX_N1 URX1n DRX1n USBC4_ARX_T_DTX_N1 <17>
    C321 1 RE@2 0.22U_0201_6.3V6M USBC4_ATX_C_DRX_P2 12 37 USBC4_ATX_D_DRX_P2 CT130 1 RE@2 0.22U_0201_25V6K
    <11> USBC4_ATX_DRX_P2 USBC4_ATX_C_DRX_N2 UTX2p DTX2p USBC4_ATX_D_DRX_N2 USBC4_ATX_T_DRX_P2 <17>
    <11> USBC4_ATX_DRX_N2 C322 1 RE@2 0.22U_0201_6.3V6M 13 36 CT131 1 RE@2 0.22U_0201_25V6K USBC4_ATX_T_DRX_N2 <17>
    UTX2n DTX2n
    C320 1 RE@2 0.22U_0201_6.3V6M USBC4_ATX_C_DRX_P1 16 33 USBC4_ATX_D_DRX_P1 CT133 1 RE@2 0.22U_0201_25V6K
    <11> USBC4_ATX_DRX_P1 USBC4_ATX_C_DRX_N1 UTX1p DTX1p USBC4_ATX_D_DRX_N1 USBC4_ATX_T_DRX_P1 <17>
    <11> USBC4_ATX_DRX_N1 C319 1 RE@2 0.22U_0201_6.3V6M 15 34 CT135 1 RE@2 0.22U_0201_25V6K USBC4_ATX_T_DRX_N1 <17>
    UTX1n DTX1n
    UEQ1_A1 2 29 DEQ1
    UEQ1/A1 DEQ1

    1
    1

    1
    UEQ0_A0 35 38 DEQ0
    UEQ0/A0 DEQ0

    RT259

    RT265
    RT260

    RT261

    RT264

    RT266
    RT262

    RT263
    221K_0201_1%

    221K_0201_1%
    221K_0201_1%

    221K_0201_1%

    221K_0201_1%

    221K_0201_1%
    221K_0201_1%

    221K_0201_1%
    <9,17> USBC1_PD_HPD 32 5 SWAP @ @ @ @
    HPDIN SWAP
    I2C_EN 17 11 DIR1

    RE@2

    RE@2

    RE@2

    2
    RE@2

    2
    I2C_EN DIR1 8 DIR0
    FLIP_R 21 DIR0
    CTL0_R 22 FLIP/SCL 7 SLP_S0#
    CTL1 23 CTL0/SDA SLP_S0#
    <17> CTL1 CTL1 VIO_SEL
    CFG1 4 14
    CFG0 3 CFG1 VIO_SEL
    CFG0
    24 27
    <17> USBC1_C_AUXP AUXp SBU1
    +3V_MUX 25 26
    <17> USBC1_C_AUXN AUXn SBU2
    41
    TGND
    RE@TUSB1044RNQ_QFN40P_4X6

    FLIP_R 10K_0201_5% 1 @ 2 RT283


    CTL0_R 10K_0201_5% 1 @ 2 RT284
    CTL1 10K_0201_5% 1 @ 2 RT285
    B B

    SWAP 1K_0201_5% 1 RE@ 2 RT274


    DIR1 1K_0201_5% 1 RE@ 2 RT275
    DIR0 1K_0201_5% 1 RE@ 2 RT276
    FLIP_R 100K_0201_5% 1 RE@ 2 RT280
    CTL0_R 100K_0201_5% 1 RE@ 2 RT281
    CTL1 100K_0201_5% 1 RE@ 2 RT282

    A A

    Security Classification Compal Secret Data


    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    TUSB1044
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 18 of 39
    5 4 3 2 1
    5 4 3 2 1

    Slave Adderss setting +LDO_3V3_5457V_B +5V_IN_PW R_B


    Local PWR Voltage Monitor Close JUSBC1 +5VALW +5V_IN_PW R_B

    1
    DT17
    RT216 RT223 1 @ 2 0_0402_5%
    RT215 200K_0402_1% USBC0_ATX_C_DRX_P2 1 10 USBC0_ATX_C_DRX_P2
    Slave Addr Ra 5% Rb 5% 75K_0402_5% 9 USBC0_ATX_C_DRX_N2
    USBC0_ATX_C_DRX_N2 2 7 USBC0_ARX_C_DTX_N1 QT6
    addr0:0xCC NC 10K <0.2V

    2
    ADDR_CFG_B LOC_PW R_MON_B 6 USBC0_ARX_C_DTX_P1 S TR LP2301BLT1G 1P SOT-23-3
    addr1:0xCE 75K 10K >=0.2V&&<0.6V

    1
    3 1

    D
    addr2:0xD0 33K 10K >=0.6V&&<1.0V USBC0_ARX_C_DTX_N1
    RT217 RT218 4 8
    addr3:0xD2 10K 10K >=1.0V 10K_0402_1% 10K_0402_1% 3 1
    USBC0_ARX_C_DTX_P1 5 CT94 SB00001FT00

    G
    2
    +5VALW 1U_0201_6.3V6M
    It's is used for SMBUS slave addr0/1/2/3

    2
    setting during power on initialization. VSG(th) : 0.4-1 V
    AZ124S-04F.R7G RT228 1 2 100K_0402_5% 2 ID(max) : 2 A
    RDS(on) : 90-150 mΩ
    ESD@ SC300006T00

    1
    D +USBC0_VBUS +USBC0_VBUS DT18 RT292 D
    VBUS Voltage/current Monitor
    VBUS Discharge USBC0_ATX_C_DRX_P1 1 10 USBC0_ATX_C_DRX_P1
    10K_0402_5%

    1
    9 USBC0_ATX_C_DRX_N1

    2
    RT219 RT220 USBC0_ATX_C_DRX_N1 2 7 USBC0_ARX_C_DTX_N2
    200K_0402_1% 6 USBC0_ARX_C_DTX_P2
    75_0805_5%

    1
    D

    <22> USBC0_PW R_EN


    2 QT7

    1 2
    VMON_B USBC0_ARX_C_DTX_N2 4 8 G
    D L2N7002W T1G_SC-70-3
    3 S

    3
    1
    1
    VBUS_DSCHG_B 2 QT5 USBC0_ARX_C_DTX_P2 5 SB000009Q80
    1
    RT222 G L2N7002W T1G_SC-70-3 RT295 @ CT95
    10K_0402_1% S 47K_0402_5% 0.01U_0402_16V7K VGS(th) : 1-2.5 V

    3
    VGS(th) : 1-2.5 V SB000009Q80 AZ124S-04F.R7G ID(max) : 115 mA
    ID(max) : 115 mA 2 RDS(on) : 3-4 ohm
    ESD@

    2
    2

    RDS(on) : 3-4 ohm


    SC300006T00

    UT6 SA0000CY680
    RTS5457V-GR_QFN40_5X5 RT24 UN-POP: Enable Dead battery function
    RT24 POP: Disable Dead battery function
    ADDR_CFG_B 26 9 RT224 1 @ 2 0_0402_5%
    ADDR_CFG/MGPIO17 DB_CFG
    LOC_PW R_MON_B 28 17 VBCAP_B RT225 1 2 2.2_0805_1% CT91 1 2 0.1U_0402_25V6
    LOC_PWR_MON/MGPIO16 VBCAP
    VMON_B 29 10 USBC0_CC1 RT226 1 @ 2 200K_0402_1%
    VMON/MGPIO14 PD CU CC1 12 USBC0_CC2
    USBC0_FLT# 27 CC2
    100K_0402_5% IMON/MGPIO15
    2 1 RT227

    CT92 1 2 0.1U_0201_10V6K USBC0_C_AUXP 14 16 USBC0_SBU1


    <9> USBC0_AUXP AUX_P/MGPIO8 SBU1/MGPIO10
    CT93 1 2 0.1U_0201_10V6K USBC0_C_AUXN 13 15 USBC0_SBU2
    <9> USBC0_AUXN AUX_N/MGPIO9 AUX MUX SBU2/MGPIO11
    +LDO_3V3_5457V_B 2 1 RT229 2
    100K_0402_5% HPD/GPIO3

    RT230 1 2 100K_0402_5%
    <9> USBC0_PD_HPD
    23
    C_DP_A/MGPIO0 22
    C C_DM_A/MGPIO1 C
    18
    19 H_DP/MGPIO4 USB2.0 SWITCH
    H_DM/MGPIO5 21
    USBC0_CC1 CT96 1 2 220P_0201_25V7K C_DP_B/MGPIO2 20
    C_DM_B/MGPIO3

    USBC0_CC2 CT97 1 2 220P_0201_25V7K

    25
    Billboard 34 APU_RST#_R
    BB_DP GPIO21 USBC0_PW R_SW _EN APU_RST#_R <9,17>
    24 35
    BB_DM GPIO20
    38 USBC_I2C_SCL
    SCL4/GPIO13 USBC_I2C_SDA USBC_I2C_SCL <11,17,18>
    3 37
    <17,22,30,31> EC_SMB_CK1 SCL1/GPIO4 SDA4/GPIO14 PD_B_GPIO15 USBC_I2C_SDA <11,17,18>

    USB2.0
    4 36
    <17,22,30,31> EC_SMB_DA1 SDA1/GPIO5 INT4/GPIO15
    5
    <22> EC_PD_INT INT1/GPIO6 GPIOs 1 PD_B_GPIO10
    USBC0_CHG_EN 6 SCL3/GPIO10 40 PD_B_GPIO11
    USBC0_FO 7 SCL2/GPIO7 SDA3/GPIO11 39 VR_ALERT#
    VBUS_DSCHG_B SDA2/GPIO8 INT3/GPIO12 VR_ALERT# <9,17>
    8
    INT2/GPIO9 LT3 EMI@
    1

    1 2 USB20_N0_R
    <11> USB20_N0 1 2
    RT231
    Power
    1

    100K_0402_5% 30
    RT232 REXT 4 3 USB20_P0_R
    <11> USB20_P0 4 3
    6.2K_0402_1%
    VCONN_IN
    2

    41 DLM0NSN900HY2D_4P DT19 ESD@


    3V3_OUT
    VBUS_IN

    EPAD USBC0_SBU1 3 6 USBC0_CC2


    SM070005U00
    2

    I/O2 I/O4
    5V_IN

    2 5
    11

    32

    31

    33

    +5V_IN_PW R_B +LDO_3V3_5457V_B GND VDD


    +LDO_3V3_5457V_B

    PD_B_GPIO10 RT233 1 @ 2 10K_0402_1% USBC0_CC1 1 4 USBC0_SBU2


    1

    I/O1 I/O3
    PD_B_GPIO11 1 1 1
    RT234 1 @ 2 10K_0402_1% CT98 CT99 CT100 RT293 <11> USBC0_ATX_C_DRX_P1 CEST236LC5VU
    10U_0402_6.3V6M 0.1U_0201_10V6K 4.7U_0402_6.3V6M 47K_0402_5% <11> USBC0_ATX_C_DRX_N1 SC300005Y00
    PD_B_GPIO15 RT235 1 @ 2 10K_0402_1%
    +5V_IN_PW R_B 2 2 2 DT20 ESD@
    <11> USBC0_ARX_C_DTX_P1
    2

    USB20_P0_R 3 6
    <11> USBC0_ARX_C_DTX_N1 I/O2 I/O4
    B B
    1
    CT101
    1
    CT102
    R4030 1
    SINK@
    +USBC0_VBUS
    2 4.7_1206_5%
    From CPU <11>
    <11>
    USBC0_ATX_C_DRX_P2
    USBC0_ATX_C_DRX_N2
    10U_0402_6.3V6M 0.1U_0201_10V6K 2 5
    SINK@ 1 1 GND VDD
    2 2 <11> USBC0_ARX_C_DTX_P2
    CT103 CT104 <11> USBC0_ARX_C_DTX_N2
    0.1U_0402_25V7K 4.7U_0603_25V6K USB20_N0_R
    2 2 1 4
    SINK@ I/O1 I/O3
    CEST236LC5VU
    SC300005Y00

    +USBC0_VBUS +USBC0_VBUS

    JUSBC1 ME@ SP062002180


    USBC Power Switch A1 B12
    GND GND
    USBC0_ATX_C_DRX_P1 A2 B11 USBC0_ARX_C_DTX_P1
    USBC0_ATX_C_DRX_N1 A3 SSTXP1 SSRXP1 B10 USBC0_ARX_C_DTX_N1
    SSTXN1 SSRXN1
    SCS0000AJ00 CT105 1 2 1U_0402_25V6K A4 B9 CT106 1 2 1U_0402_25V6K
    DT21 @ NSR20F30NXT5G_DSN2-2 VBUS VBUS
    2 1 USBC0_CC1 A5 B8 USBC0_SBU2
    CC1 SBU2
    +5VALW +USBC0_VBUS USB20_P0_R A6 B7 USB20_N0_R
    VBUS Current Setting UT7 USB20_N0_R A7 DP1 DN2 B6 USB20_P0_R
    DN1 DP2
    A1 C2 USBC0_SBU1 A8 B5 USBC0_CC2
    PWR_SW_ILIM_R_B

    16K_0402_1% 2 1 RT237 PW R_SW _ILIM_B A2 VIN VBUS D1 SBU1 CC2


    VIN VBUS D2 CT107 1 2 1U_0402_25V6K A9 B4 CT108 1 2 1U_0402_25V6K
    10U_0402_6.3V6M

    1 VBUS VBUS VBUS


    +LDO_3V3_5457V_B
    B1 USBC0_ARX_C_DTX_N2 A10 B3 USBC0_ATX_C_DRX_N2
    B2 VCP A3 PW R_SW _ILIM_B USBC0_ARX_C_DTX_P2 A11 SSRXN2 SSTXN2 B2 USBC0_ATX_C_DRX_P2
    CT109

    2 C1 VCP ILIM SSRXP2 SSTXP2


    1
    ESD
    1

    VCP A12 B1
    10U_0603_25V6M

    RT241 D4 GND GND


    1000P_0201_50V7K

    2
    USBC0_FLT# A4 CAP
    CT110

    @ 10K_0402_1% 1
    FLT 2 +LDO_3V3_5457V_B 1 4
    75K_0402_1%

    DT22
    RT236 2

    USBC0_FO C4 B3 2 GND GND 5


    CT112

    A CEST23NC24VU 3P C/A SOT23 A


    2
    1

    D FO GND C3 3 GND GND 6 SCA00004500


    2 USBC0_PW R_SW _EN B4 GND D3 2 GND GND ESD@
    G TYPEC_PW R_ILIM# <17,22> EN GND

    1
    1

    NX5P3290UK_W LCSP16 USBC0_FLT# 100K_0402_5% 2 1 RT290 HIGHS_UB11249-0500B-1H


    S QT8
    3

    SB000009Q80
    2N7002KW _SOT323-3
    VGS(th) : 1-2.5 V USBC0_PW R_SW _EN RT238 1 2 100K_0402_5%
    ID(max) : 115 mA
    RDS(on) : 3-4 ohm VBUS_DSCHG_B RT239 2 1 100K_0402_5%
    USBC0_FO RT240 2 1 100K_0402_5% Security Classification
    2020/02/25
    Compal Secret Data
    2021/02/25 Title
    Compal Electronics, Inc.
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PD IC RTS5457V
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: W ednesday, July 22, 2020 Sheet 19 of 39
    5 4 3 2 1
    A B C D E

    WLAN POWER CIRCUIT


    +3VS_WLAN
    +3VALW +3VS_WLAN

    Imax : 2.0 A Imax : 2.0 A

    1
    CWL61
    1U_0201_6.3V6M

    10U 6.3V M X5R 0402

    CWL3 RF@

    CWL4 RF@
    MS@ 1 1 1 1

    0.1U_0201_10V K X5R
    CWL2

    0.01U_0402_16V7K
    UWL1
    5 1 +3VS_WLAN_R RWL19 1 @ 2 0_0805_5% CWL1
    1 IN OUT 4.7U_0402_6.3V6M 1
    2 2 @ 2 2 2
    GND
    RWL15 1 @ 2 0_0402_5% S0I3_WLAN_EN# 4 3
    <21,22,23,24> S0I3_EC# EN(EN#) OC#
    G524B2T11U_SOT23-5
    1 SA00007BW00 +3VS_WLAN
    CWL9 MS@
    1U_0201_6.3V6M
    MS@
    2 UWL22
    MC74VHC1G08EDFT2G SC70 5P
    SA0000BIP00

    5
    1

    P
    <22> WL_AUX_RST# IN1 WL_RST# WL_RST#_R
    4 RWL9 1 @ 2 0_0402_5%
    O

    NGFF - WLAN / BT CONNECTOR (KEY-E)


    <10,25> APU_PCIE_RST# 2
    IN2

    G
    MS_WLAN@

    1
    3
    @
    RWL17
    100K_0402_5%
    +3VS_WLAN

    2
    2 RWL18 2 1 0_0402_5% 2
    JWLAN1
    1 2
    3 GND_1 3.3VAUX_2 4 NON_MS@
    <11> USB20_P7 USB_D+ 3.3VAUX_4
    BT <11> USB20_N7
    5
    USB_D- LED1#
    6
    7 8
    9 GND_7 PCM_CLK 10
    11 SDIO_CLK PCM_SYNC 12
    13 SDIO_CMD PCM_OUT 14
    15 SDIO_DAT0 PCM_IN 16
    17 SDIO_DAT1 LED2# 18
    19 SDIO_DAT2 GND_18 20
    21 SDIO_DAT3 UART_WAKE 22 UART_0_ARXD_R_DTXD RWL4 1 @ 2 0_0402_5%
    23 SDIO_WAKE UART_TX UART_0_ARXD_DTXD <11>
    SDIO_RST
    32 UART_0_ATXD_R_DRXD RWL5 1 @ 2 0_0402_5%
    UART_RX UART_0_ATXD_DRXD <11>
    33 34
    35 GND_33 UART_RTS 36
    <6> PCIE_ATX_C_DRX_P7 37 PET_RX_P0 UART_CTS 38 EC_TX_R RWL6 1 2 0_0402_5%
    @
    <6> PCIE_ATX_C_DRX_N7 39 PET_RX_N0 CLink_RST 40 EC_RX_R RWL7 1 2 0_0402_5% EC_TX <22>
    @
    41 GND_39 CLink_DATA 42 EC_RX <22>
    <6> PCIE_ARX_DTX_P7 43 PER_TX_P0 CLink_CLK 44
    <6> PCIE_ARX_DTX_N7 PER_TX_N0 COEX3
    WLAN 45 46
    47 GND_45 COEX2 48
    <11> CLK_PCIE_WLAN REFCLK_P0 COEX1 SUSCLK_R
    3 49 50 RWL8 1 @ 2 0_0402_5% 3
    <11> CLK_PCIE_WLAN# REFCLK_N0 SUSCLK(32KHz) WL_RST#_R RTC_CLK_R <11>
    51 52
    RWL2 1 @ 2 0_0402_5% CLKREQ_WLAN#_R 53 GND_51 PERST0# 54
    <11> CLKREQ_WLAN# CLKREQ0# W_DISABLE2# APU_BT_OFF# <10>
    <11,22> EC_PCIE_WAKE# RWL14 2 @ 10_0402_5% PCIE_WAKE#_WL 55 56
    57 PEWAKE0# W_DISABLE1# 58 APU_WL_OFF# <10>
    59 GND_57 I2C_DAT 60
    61 RSVD/PCIE_RX_P1 I2C_CLK 62
    63 RSVD/PCIE_RX_N1 I2C_IRQ 64
    Note: The real behavior of BT_DISABLE are
    65 GND_63 RSVD_64 66 BT_DISABLE=LOW, BT=OFF
    RSVD/PCIE_TX_P1 RSVD_66

    2
    67 68 BT_DISABLE=HIGH, BT=ON
    69 RSVD/PCIE_TX_N1 RSVD_68 70 RWL12
    71 GND_69 RSVD_70 72 100K_0402_5%
    73 RSVD_71 3.3VAUX_72 74
    75 RSVD_73 3.3VAUX_74 +3VS_WLAN

    1
    GND_75 76
    77 GND1
    GND2 APU_BT_OFF# 10K_0402_5%2 @ 1 RWL21
    LOTES_APCI0147-P007A
    APU_WL_OFF# 10K_0402_5%2 @ 1 RWL20
    ME@
    SP07001GF00

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    WLAN/BT
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    0.2
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 20 of 39
    A B C D E
    A B C D E

    ALC3286 Speaker
    UA1
    PC_BEEP
    EMI
    34
    6 PCBEEP
    I2C_DATA 30 EXT_MIC_RING2 SPEAK 4 ohm : 40MIL
    7 MIC2-L/RING2 SPEAK 8 ohm : 20MIL
    I2C_CLK 31 EXT_MIC_SLEEVE JSPK1
    HDA_SYNC_R 15 MIC2-R/SLEEVE SPK_L1- RA5 1 @ 2 0_0603_5% SPK_L1-_CONN 1
    <10> HDA_SYNC_R SYNC SPK_L2+ SPK_L2+_CONN 1
    36 RA6 1 @ 2 0_0603_5% 2
    HDA_BIT_CLK_R 14 LINE2-L SPK_R2+ RA1 1 @ 2 0_0603_5% SPK_R2+_CONN 3 2
    <10> HDA_BIT_CLK_R BCLK SPK_R1- SPK_R1-_CONN 3
    35 RA3 1 @ 2 0_0603_5% 4
    HDA_SDOUT_R 17 LINE2-R 4
    <10> HDA_SDOUT_R SDATA-OUT SPK_L2+

    1000P_0402_50V7K

    1000P_0402_50V7K

    1000P_0402_50V7K
    1000P_0402_50V7K
    42 5
    SPK-OUT-L+ GND1

    CA2 EMI@

    CA4 EMI@

    CA5 EMI@
    CA3 EMI@
    13 6
    RA2 DC_DET/EAPD 43 SPK_L1- GND2
    HDA_SDIN0 1 1 1 1
    1 1 2 HDA_SDIN0_R 16 SPK-OUT-L- HEFENG AWB03-S04C1A-HF 1
    <10> HDA_SDIN0
    33_0402_5% SDATA-IN 44 SPK_R1- Speaker SP02001NN00
    11 SPK-OUT-R- ME@
    I2S-MCLK/GPO3 45 SPK_R2+ 2 2 2 2
    10 SPK-OUT-R+
    EMI I2S-BCLK/DSD-SCLK
    HPOUT-L
    27 HP_OUTL Speaker Connector PN
    SP02000RR00
    CA1 @EMI@ RA4 @EMI@ 9 26 HP_OUTR Headphone
    2 1 HDA_BIT_CLK_R I2S-OUT/DSD-R HPOUT-R
    12 +5V_AUDIO
    22P_0402_50V8J 33_0402_5% I2S-LRCK/DSD-L
    8 DA2 @ESD@
    I2S-IN SPK_R2+_CONN 6 3 SPK_L2+_CONN
    1 I/O4 I/O2
    I2S-EN/SPDIF-OUT/GPIO2/DMIC-DATA34/DMIC-CLK-IN
    4
    GPIO0/DMIC-DATA12 5 2
    5 VDD GND
    GPIO1/DMIC-CLK
    <22> EC_MUTE# RA8 1 @ 2 0_0402_5% PDB 2
    PDB SPK_R1-_CONN 4 1 SPK_L1-_CONN
    PLUG_IN_R 48 I/O3 I/O1
    JD1 AZC099-04S.R7G_SOT23-6
    47 SC300001G00
    JD2

    +5VDDA_CODEC
    ESD
    GNDA

    CA7 1 2 2.2U_0402_6.3V6M VREF 38


    VREF
    GNDA

    CA8 1 2 2.2U_0402_6.3V6M LDO1-CAP 39


    LDO1-CAP
    GNDA

    CA9 1 2 2.2U_0402_6.3V6M MIC2-CAP 32 33 RA9 1 2 10K_0402_5%


    MIC2-CAP AUX_MODE
    40
    EMI
    EXT_MIC_SLEEVE RA10 1 2 2.2K_0402_5% MIC2-VREFO-R 29 AVDD1 SM010009U00
    MIC2-VREFO-R 20 SM010009U00
    EXT_MIC_RING2 AVDD2 +1.8VDD_CODEC EXT_MIC_SLEEVE
    RA11 1 2 2.2K_0402_5% MIC2-VREFO-L 28 W=40mils EMI@ RA14 2 1 BLM15BD121SN1D_2P HGNDB
    MIC2-VREFO-L 3 EXT_MIC_RING2 EMI@ RA13 2 1 BLM15BD121SN1D_2P HGNDA
    DVDD +3VDD_CODEC +5V_AUDIO W=40mils HP_OUTL RA15 1 EMI@ 2 47_0402_5% HPOUT_L
    wide 40MIL DVDD-IO
    18 +IOVDD_CODEC
    HP_OUTR RA16 1 EMI@ 2 47_0402_5% HPOUT_R

    +5VS_PVDD
    GNDA

    CA10 1 2 1U_0402_6.3V6K 25 41 RA12 1 @ 2 0_0805_5%


    CPVEE PVDD1

    1000P_0402_50V7K
    CA16 EMI@

    220P_0402_50V7K
    CA19 EMI@
    1000P_0402_50V7K
    CA17 EMI@

    220P_0402_50V7K
    CA18 EMI@
    10K_0402_5%

    10K_0402_5%
    24 46
    CBN PVDD2

    2
    0.1U_0201_10V6K
    4.7U_0402_6.3V6M

    RA17 @

    RA18 @
    1 1 1 1

    2
    CA11 1 2 1U_0402_6.3V6K 23 49 CA12 CA13
    CBP Thermal_Pad
    GNDA

    2
    CA14 1 2 2.2U_0402_6.3V6M LDO2 21 37 2

    1
    LDO2-CAP AVSS1 2 2 2 2

    1
    CA15 1 2 2.2U_0402_6.3V6M LDO3 19 22
    LDO3-CAP AVSS2
    GNDA GNDA GNDA GNDA GNDA GNDA

    ALC3286-VA2-CG_MQFN48_6X6
    Follow LAH101P un-stuff CA16, stuff CA35
    GNDA Close Audio codec

    +3V_AUDIO

    +3VALW +3V_AUDIO +3VDD_CODEC


    +3VALW --> +3VDD_CODEC

    1
    RA58 2 @ 1 0_0402_5% +3V_AUDIO RA21 1 @ 2 0_0402_5%
    RT75 Combo Jack
    @ 100K_0402_1%
    (Normal Open)
    QA1 PLUG_IN_R PLUG_IN

    2
    RA33 1 @ 2 0_0402_5%
    S TR LP2301BLT1G 1P SOT-23-3
    HGNDA / HGNDB , W=60mils JHP1
    SB00001FT00 7
    HGNDB 4 GND
    3 1
    S

    HPOUT_R RA23 1 @ 2 0_0402_5% HPOUT_R1 2 #4M/G


    Imax : 0.5 A Imax : 0.5 A PLUG_IN 6 #2R
    #6
    G

    VSG(th) : 0.4-1 V
    2

    ID(max) : 2 A 5
    RDS(on) : 90-150 mΩ #5
    0.1U_0201_10V6K

    S0I3_EC#_3VDD 1
    RA51 1 2 150K_0402_5%
    <20,22,23,24> S0I3_EC#
    CA22 HPOUT_L HPOUT_L1
    RA22 1 @ 2 0_0402_5% 1
    1 HGNDA 3 #1L
    CA50 2 #3G/M
    0.1U_0201_10V6K
    SINGA_2SJ3108-064111F
    2 DC232001202

    2
    3

    SCA00004300

    AZ5125-02S.R7G_SOT23-3
    DA4 @ESD@
    SCA00004300

    CEST23LC5VB
    DA3 ESD@
    ME@
    Place near Pin3

    1
    RA24
    2 33K_0402_5%
    CA35 @ESD@
    2200P_0402_50V7K

    2
    +5VALW --> +5VDDA_CODEC +5VALW1 +5V_AUDIO +5VDDA_CODEC
    1
    ESD@
    RA31 1 @ 2 0_0402_5%

    1
    1
    RA59 1 @ 2 0_0603_5% +5V_AUDIO RA19 1 @ 2 0_0603_5%
    RA26 1 @ 2 0_0402_5%
    3 3
    GNDA GNDA
    QA2 RA28 1 @ 2 0_0402_5%

    +5VALW1
    S TR LP2301BLT1G 1P SOT-23-3
    SB00001FT00 ESD RA32 1 @ 2 0_0402_5%
    3
    S

    1
    Imax : 0.5 A Imax : 0.5 A
    2

    RA54 RA61 PC Beep GND GNDA


    G

    VSG(th) : 0.4-1 V
    2

    47K_0402_5% 47K_0402_5% ID(max) : 2 A


    RDS(on) : 90-150 mΩ
    1

    S0I3_EC#_5VDDA 1 2 S0I3_EC#_5VDDA_R
    RA55 150K_0402_5% <22> BEEP# RA27 1 2 4.7K_0402_5% CA25 1 2 0.1U_0201_10V6K PC_BEEP
    1
    CA51
    3

    QA4B D <10> HDA_SPKR RA29 1 2 4.7K_0402_5%


    S0I3_EC#_5VEN2 5 0.1U_0201_10V6K

    1
    Place near Pin34
    0.1U_0201_10V6K

    G SB00000EO00 1
    2
    VGS(th) : 1-2.5 V 2N7002KDW_SOT363-6 RA30
    ID(max) : 0.115 A S CA20
    0_0402_5%
    RDS(on) : 3-4ohm
    4
    6

    QA4A D 2 @

    2
    S0I3_EC# 2
    G SB00000EO00
    2N7002KDW_SOT363-6
    S
    1

    Place near Pin40

    GNDA
    +1.8VALW --> +IOVDD_CODEC
    +1.8VALW
    +IOVDD_CODEC

    RA34 1 @ 2 0_0603_5%

    +1.8VALW --> +1.8VDD_CODEC +1.8VALW +1.8V_AUDIO +1.8VDD_CODEC

    RA60 2 @ 1 0_0402_5% +1.8V_AUDIO RA25 1 @ 2 0_0402_5%


    2.2U_0402_6.3V6M
    0.1U_0201_10V6K

    1 1
    4 CA21 CA28 4
    QA3
    S TR LP2301BLT1G 1P SOT-23-3 2 2
    SB00001FT00

    3
    S

    1
    Imax : 0.5 A Imax : 0.5 A
    Place near Pin18
    G

    VSG(th) : 0.4-1 V
    2

    ID(max) : 2 A
    0.1U_0201_10V6K

    2.2U_0402_6.3V6M

    RDS(on) : 90-150 mΩ 1 1
    S0I3_EC# RA57 1 47K_0402_5% S0I3_EC#_1V8VDD CA24 CA6
    2
    2 2
    1
    CA52
    0.1U_0201_10V6K Security Classification
    2020/02/25
    Compal Secret Data
    2021/02/25 Title
    Compal Electronics, Inc.
    2 Issued Date Deciphered Date

    Place near Pin20 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Audio Codec_Realtek ALC3287
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    0.2
    GNDA
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 21 of 39
    A B C D E
    Embedded Controller USB_EN# R54 1 2 10K_0402_5%
    +5VALW

    +3VL +3VL +3VALW


    +3VALW_EC
    R4000 1 @ 2 0_0603_5% +3VALW_EC L1
    BLM15AX601SN1D_0402_2P
    1 2 TAB_SW# R101 1 @ 2 100K_0402_5%
    1 +EC_VCCA
    C234 @ SM01000KL00 1
    1 1 1 1 100P_0402_50V8J C67 +3VALW

    0.1U_0201_10V6K
    C235

    1000P_0402_50V7K
    C68
    4.7U_0402_6.3V6M

    C84

    0.1U_0201_10V6K
    C233
    0.1U_0201_10V6K
    2
    1 2 2
    2 2 2 @ 2 L2 LID_SW# R55 1 @ 2 100K_0402_5%
    +EC_VCCA BLM15AX601SN1D_0402_2P EC_MUTE# R56 1 @ 2 10K_0402_5%
    SM01000KL00 EC_PCIE_WAKE# R57 1 2 10K_0402_5%
    S0I3_EC# R4010 1 @ 2 10K_0402_5%

    111
    125
    Close to UEC1 pin 9 ECAGND

    22
    33
    96

    67
    9
    Close to UEC1 pin 96 UEC1 SSD1_PWR_EN# R4011 1 @ 2 10K_0402_5%

    VCC_LPC
    VCC
    VCC

    VCC0
    VCC

    VCC

    AVCC
    WL_AUX_RST# R4020 1 2 10K_0402_5%
    TYPEC_PWR_ILIM# R4022 1 @ 2 10K_0402_5%
    not ready, check with TATA4
    new KB_MUTLI_KEY 1 21
    <23> KB_MUTLI_KEY GATEA20/GPIO00 EC_VCCST_PG/GPIO0F BATT_FW# <31> 1
    2 23
    EMI <11>
    <11>
    <11>
    KB_RST#
    SERIRQ
    LPC_FRAME#
    3
    4
    5
    KBRST#/GPIO01
    SERIRQ
    LPC_FRAME# PWM Output
    BEEP#/GPIO10
    EC_FAN_PWM/GPIO12
    AC_OFF/GPIO13
    26
    27 MB_ID
    BEEP# <21>
    EC_FAN_PWM1 <27>
    2
    C339 @ESD@
    0.1U_0201_10V6K
    <11> LPC_AD3 7 LPC_AD3
    @EMI@ @EMI@
    <11> LPC_AD2 LPC_AD2 VCIN1_BATT_TEMP
    C268 2 1 22P_0402_50V8J R58 2 1 10_0402_5% 8 63
    <11> LPC_AD1 LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 VCIN1_BATT_TEMP <30>new
    10 64 @
    <11> LPC_AD0 LPC_AD0LPC & MISC VCIN1_BATT_DROP/AD1/GPIO39 65 VCIN1_BATT_DROP <32> VCIN1_BATT_DROP C344 1 2 0.1U_0201_10V6K
    ADP_I/AD2/GPIO3A ADP_I <31>
    12 AD Input 66
    <11> LPC_CLK0_EC 13 CLK_PCI_EC AD_BID/AD3/GPIO3B 75 TS_DISABLE#_EC PD_PWR_EN <17>
    <11> LPC_RST#_R EC_RST# PCIRST#/GPIO05 AD4/GPIO42 EC_PD_INT
    +3VALW_EC R60 2 @ 1 47K_0402_5% 37 76
    EC_RST# AD5/GPIO43 EC_PD_INT <19>
    20
    <11> EC_SCI# EC_SCI#/GPIO0E VCIN1_BATT_TEMP
    2 38 C257 1 2 100P_0201_50V8J
    <11> CLKRUN# CLKRUN#/GPIO1D
    C70 68 NOVO# VCIN1_AC_IN C255 1 2 100P_0201_50V8J
    DA0/GPIO3C NOVO# <27>
    0.1U_0201_10V6K DA Output 70
    1 EN_DFAN1/DA1/GPIO3D TP_DISABLE# <23>
    KSI0 55 71 R59 1 @ 2 4.7K_0402_5%
    56 KSI0/GPIO30 DA2/GPIO3E 72 CAM_EN# <16>
    KSI1
    KSI1/GPIO31 DA3/GPIO3F USB_EN# <26>
    KSI2 57
    +3VL +3VALW KSI3 58 KSI2/GPIO32 83
    KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A I2C_2_SCL <10> follow C340-15 (EL5C3)
    KSI4 59 84
    KB_MUTLI_KEY KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B EC_SMB_CK4 I2C_2_SDA <10>
    R4040 1 @ 2 100K_0402_5% KSI5 60 85
    61 KSI5/GPIO35 PSCLK2/GPIO4C 86 EC_SMB_DA4 EC_SMB_CK4 <24>
    KSI6 PS2 Interface
    KSI6/GPIO36 PSDAT2/GPIO4D TAB_SW# EC_SMB_DA4 <24> C340-15(EL5C3) is pin88
    R4055 1 2 100K_0402_5% KSI7 62 87
    39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TAB_SW# <16>
    KSO0
    KSO[0..15] KSO0/GPIO20 TP_DATA/GPIO4F TP_INT# <10,23> +3VL
    KSO1 40
    <23> KSO[0..15] KSO1/GPIO21
    KSO2 41
    KSI[0..7] KSO3 42 KSO2/GPIO22 97
    <23> KSI[0..7] KSO3/GPIO23 ENKBL/GPXIOA00 0.75VS_PWR_EN ENBKL <9,16> MB_ID
    KSO4 43 98 R4053 1 2 100K_0402_5%
    44 KSO4/GPIO24 WOL_EN/GPXIOA01 1.8VS_PWR_EN# 0.75VS_PWR_EN <28>
    KSO5 99
    KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109
    1.8VS_PWR_EN# <28>
    R4054 1 @ 2 100K_0402_5%
    KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 VCIN0_PH1 <30>
    +3VL KSO8 47 KSO7/GPIO27
    KSO8/GPIO28 SPI Device Interface S0I3_EC#
    KSO9 48 119 new
    49 KSO9/GPIO29 MISO/GPIO5B SSD1_PWR_EN# S0I3_EC# <20,21,23,24>
    KSO10 120
    EC_SMB_DA1 KSO10/GPIO2A MOSI/GPIO5C TS_EN#_EC SSD1_PWR_EN# <25>
    R62 1 2 2.2K_0402_5% KSO11 50 SPI Flash ROM SPICLK/GPIO58 126
    R63 1 2 2.2K_0402_5% EC_SMB_CK1 KSO12 51 KSO11/GPIO2B 128
    EC_PD_INT KSO12/GPIO2C SPICS#/GPIO5A EC_LOW_BATT# <10> TS_DISABLE#_EC
    R4023 2 1 10K_0402_5% KSO13 52 R106 2 @ 1 0_0402_5%
    EC_PD2_INT KSO13/GPIO2D TS_DISABLE# <11,16>
    R4041 2 1 10K_0402_5% KSO14 53
    S550-14 AMD (FLMA0) is pin64 KSO15 54 KSO14/GPIO2E 73 TS_EN#_EC R100 2 @ 1 0_0402_5%
    KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 USBC0_PWR_EN <19> TS_EN# <11,16>
    81 74
    +3VS new <32> EN_5VALW
    82 KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 89
    SENSOR_EC_INT <10> follow C340-15 (EL5C3)
    <24> PS_INT#_EC KSO17/GPIO49 GPIO50 EC_MUTE# <21>
    90
    BATT_CHG_LED#/GPIO52 BATT_CHG_LED# <23>
    91
    EC_SMB_CK1 CAPS_LED#/GPIO53 CAPS_LED# <23>
    77 GPIO 92
    EC_FAN_SPEED1 <17,19,30,31> EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CLK1/GPIO44 PWR_LED#/GPIO54 PWR_LED# <23>
    R64 2 1 10K_0402_5% 78 93
    EC_SMB_CK2 <17,19,30,31> EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_LOW_LED# <23>
    R273 1 2 2.2K_0402_5% 79 95 SYSON
    1 2 EC_SMB_DA2 <9,24> EC_SMB_CK2 EC_SMB_DA2 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 SYSON <34>
    R274 2.2K_0402_5% 80 121
    EC_SMB_CK4 <9,24> EC_SMB_DA2 EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 VR_ON <35,36>
    R102 1 2 2.2K_0402_5% 127
    1 2 EC_SMB_DA4 DPWROK_EC/GPIO59 APU_RST#_EC <9>
    R103 2.2K_0402_5% SM Bus
    <10> PM_SLP_S3#
    6
    14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03
    100
    101
    EC_RSMRST# <10>
    ESD
    <26> USB_CHG_CTL1 GPIO07 GPXIOA04 3V/5VALW_PG <28,32,33,35>
    15 102 @ESD@
    <12> EC_CLEAR_CMOS# GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 VCOUT1_PROCHOT# KB_RST#
    16 103 C337 1 2 0.1U_0201_10V6K
    +3VL <26> USB_CHG_CTL3 GPIO0A VCOUT1_PROCHOT#/GPXIOA06
    17 104
    <26> USB_CHG_EN GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 VCOUT0_MAIN_PWR_ON <32>
    18 105 ESD@
    <10> AC_PRESENT GPIO0C BKOFF#/GPXIOA08 TYPEC_PWR_ILIM# BKOFF# <16> LPC_RST#_R
    19 GPIO GPO 106 C259 1 2 100P_0402_50V8J
    <26> USB_CHG_STATUS# AC_PRESENT/GPIO0D GPXIOA09 TYPEC_PWR_ILIM# <17,19>
    R65 1 2 100K_0402_5% NOVO# 25 107
    1 2 100K_0402_5% <23> KB_BL_PWM EC_FAN_SPEED1 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 EC_PCIE_WAKE# EN_PTM <31>
    R66 ON/OFF# 28 108 @ESD@
    <27> EC_FAN_SPEED1 WL_AUX_RST# FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11 EC_PCIE_WAKE# <11,20> SYS_PWRGD_EC
    29 C260 1 2 100P_0402_50V8J
    <20> WL_AUX_RST# FANFB1/GPIO15
    R68 1 2 100K_0402_5% SUSP# 30
    1 2 100K_0402_5% <20> EC_TX EC_TX/GPIO16 VCIN1_AC_IN
    R69 SYSON 31 110 @ESD@
    R70 1 @ 2 100K_0402_5% 0.75VS_PWR_EN new <20> EC_RX
    32 EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 112
    VCIN1_AC_IN <31> EC_RSMRST# C261 1 2 100P_0402_50V8J
    <10> SYS_PWRGD_EC PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON <32,35>
    34 114 ON/OFF#
    <17> EC_PD2_INT SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 LID_SW# ON/OFF# <27>
    36 GPI 115 @ESD@
    <9> EC_THERMTRIP# NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# <23>
    116 SUSP# SYSON C338 1 2 0.1U_0201_10V6K
    SUSP#/GPXIOD05 SUSP# <28,34>
    117 SELF HEALING
    GPXIOD06 T24
    118 @ESD@
    122 PECI/GPXIOD07 LID_SW# C267 2 1 100P_0402_50V8J
    <10> PBTN_OUT# PBTN_OUT#/GPIO5D +VCC_IO2
    123 124 R3999 1 @ 2 0_0402_5% +3VALW_EC
    +3VALW <10,34> PM_SLP_S5# PM_SLP_S4#/GPIO5E V18R/VCC_IO2 @ESD@
    3V/5VALW_PG
    AGND

    1 C340 1 2 0.1U_0201_10V6K
    GND
    GND
    GND
    GND
    GND

    1.8VS_PWR_EN#

    1000P_0402_50V7K
    C69
    R67 1 @ 2 100K_0402_5%
    @ESD@
    KB9022QD_LQFP128_14X14 @ CAPS_LED# C345 1 2 0.1U_0201_10V6K
    11
    24
    35
    94

    69
    113

    SA000075S30 2
    20mil Close to UEC1 pin 124

    ECAGND

    VCOUT1_PROCHOT# R4002 1 @ 2 0_0402_5%


    <31> VCOUT1_PROCHOT# H_PROCHOT# <9>
    R4036 1 @ 2 0_0402_5%
    <36> VR_HOT#

    1
    C232
    100P_0402_50V8J
    @
    2

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    EC_ENE_KB9022
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    C 0.2
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 22 of 39
    1 2 3 4 5 6 7 8

    Touch Pad Keyboard


    +3VS
    +3VALW +3VALW +3VS_TP

    RTP8 2 TP@ 1 0_0402_5% RTP7 2 @ 1 0_0402_5%

    1
    3 1

    D
    RTP5
    10K_0402_5%
    QTP1
    @
    S TR LP2301BLT1G 1P SOT-23-3

    G
    +5VS

    2
    RTP6 SB00001FT00 VSG(th) : 0.4-1 V
    RTP16 1 @ 2 0_0402_5% S0I3_TP_EN# 1 2 MS_TP@ ID(max) : 2 A
    <20,21,22,24> S0I3_EC#
    A 30K_0402_1% RDS(on) : 90-150 mΩ A
    MS_TP@

    2
    1
    CTP4 RTP4
    0.01U_0402_16V7K 0_0402_5%
    MS_TP@ @
    2 JKB1 ME@

    1
    +5VS_KB 32
    R265 2 1 866_0402_1% CAPS_LED#_R 31 32
    <22> CAPS_LED# 31
    KSO15 30
    KSO10 29 30
    KSO11 28 29 34
    KSO14 27 28 GND 33
    +3VS_TP 1 27 GND
    C229 KSO13 26
    0.1U_0201_10V6K KSO12 25 26
    ESD@ KSO3 24 25
    +3VS_TP 24
    2 KSO6 23
    KSI[0..7] KSO8 22 23
    KSI[0..7] <22> 22
    KSO7 21
    1
    KSO[0..15] KSO4 20 21
    RTP2 KSO[0..15] <22> 20
    CTP1 KSO2 19
    4.7K_0402_5% 0.1U_0201_10V6K KSI0 18 19
    @
    ESD KSO1
    KSO5
    17
    16
    18
    17
    2

    JTP1 16
    PU at APU side KSI3 15
    8 15
    8 KSI2 14
    7 10 14
    <10> I2C_0_SCL_R 7 G2 KSO0 13
    6 9 13
    <10> I2C_0_SDA_R 6 G1 KSI5 12
    5 12
    5 KSI4 11
    4 11
    4 KSO9 10
    3 10
    3 KSI6 9
    2 9
    <10,22> TP_INT# TP_DISABLE#_R 2 KSI7 8
    RTP3 1 @ 2 0_0402_5% 1 8
    <22> TP_DISABLE# 1 KSI1 7
    6 7
    0.1U_0201_10V K X5R
    0.1U_0201_10V K X5R

    ACES_51522-00801-001 6
    5
    SP01001AE00 5
    4
    100P_0402_50V8J

    100P_0402_50V8J

    1 1 ME@ 4
    CTP5 ESD@
    CTP7 ESD@

    3
    CTP2 @ESD@

    CTP3 @ESD@

    2 3
    <22> KB_MUTLI_KEY 2
    1
    2 2 1
    JXT_FP257H-032S10M
    3

    SP01002FA00
    B B

    DTP1 @ESD@
    L03ESDL5V0CC3-2_SOT23-3

    ESD SCA00004300
    1

    ESD

    Keyboard Backlight BATT LED


    +5VALW +5VS +5VS_KBL LED1
    Charger LED (LED_B) (White+Amber)
    White
    1

    VSG(th) : 0.4-1 V RS11 1 2 1K_0402_1% BATT_CHG_LED#_R 2


    ID(max) : 2 A <22> BATT_CHG_LED#
    3 1 RDS(on) : 90-150 mΩ 1
    S

    RKBL1 +VL1
    10K_0402_5% RS12 1 2 523_0402_1% BATT_LOW _LED#_R 3
    <22> BATT_LOW _LED#
    10U_0402_6.3V6M

    0.1U_0201_10V6K

    KBL@ QKBL1 KBL@


    2

    CKBL1 @

    CKBL2 KBL@

    SB00001FT00
    G

    1 2
    2

    C RKBL2 S TR LP2301BLT1G 1P SOT-23-3 Amber C


    <22> KB_BL_PW M
    1 2 SC50000FV10
    30K_0402_1% HT-210UD5-BP5_AMBER-W HITE
    KBL@ 2 1
    1
    CKBL3
    0.01U_0402_16V7K
    KBL@
    2

    JKBL1 ME@
    Status LED

    3
    1 LED2
    2 1
    +5VS_KBL 2 RS2 1 2 412_0402_1% PW R_LED#_R 1 2
    3 5 <22> PW R_LED# +VL
    4 3 GND 6
    4 GND
    CVILU_CF31041D0R4-10-NH LTW -S110DC2-C W HITE
    SP01001RB00 SC50000I100

    +3VL +3VALW +3V_LID

    LID RHS1 2 @ 1 0_0402_5%


    D +3V_LID D
    RHS2 2 @ 1 0_0402_5%
    UHS1

    2 3
    GND

    VDD VOUT LID_SW # <22>

    YB8251PST23 PSOT23
    1

    2 SA0000AO500 1
    CHS1
    0.1U_0201_10V6K CHS2
    10P_0201_50V8J
    1 2
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    KB / LED / TP / LID
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: W ednesday, July 22, 2020 Sheet 23 of 39
    1 2 3 4 5 6 7 8
    5 4 3 2 1

    G-Sensor <22> EC_SMB_DA4


    RGS10
    RGS11
    1
    1
    @
    @
    2 0_0201_5%
    2 0_0201_5%
    Thermal Sensor
    <22> EC_SMB_CK4
    EC_SMB_DA2 RGS13 1 @ 2 0_0201_5%
    EC_SMB_CK2 GS_DATA <16>
    RGS12 1 @ 2 0_0201_5%
    GS_CLK <16>

    +3VS +3VS
    +3VS
    +3VS_GS
    UGS1

    1
    1 2 +3VS_GS 7 3
    RGS1 0_0402_5% 10 VDD VDDIO 11 Close to +5VALW (PL502) RTS7
    CSB PS UTS1 10K_0402_5%
    D 2 5 4 @ D
    CGS1 6 INT1 NC

    2
    0.1U_0201_10V K X5R INT2 1 1 10 EC_SMB_CK2
    GS_DATA SDO VCC SCL EC_SMB_CK2 <9,22>
    2 9
    1 GS_CLK 12 SDx GND 8 REMOTE1+ 2 9 EC_SMB_DA2
    SCx GNDIO DP1 SDA EC_SMB_DA2 <9,22>
    1
    BMA253_LGA12 CTS5 REMOTE- 3 8
    SA000096W00 0.1U_0201_10V6K DN ALERT#
    REMOTE2+ 4 7
    2 DP2 THERM#
    REMOTE3+ 5 6 REMOTE3-
    Address: 0x18 DN3 GND/DN3

    1
    F75305M_MSOP10
    RTS8
    0_0402_5%
    Address 1001_101xb @

    2
    Finger Printer +3VS +3V_FP

    +3VALW

    RFP1 1 @ 2 0_0402_5%

    +3VALW RFP4 1 @ 2 0_0402_5%


    Close to UTS1 Close to BATT Charger (JBAT1)
    QFP1
    1

    S
    3

    D
    1 ME2301DC-G_SOT23-3 REMOTE1+ REMOTE1+
    RFP2 SB00001FT00 1

    1
    1
    100K_0402_5% @ C
    @ CTS3 CTS1 2 QTS1
    G
    2

    VSG(th) : 0.4-1 V 2200P_0402_50V7K 2200P_0402_25V7K B MMST3904-7-F_SOT323-3


    2

    2
    ID(max) : 2 A 2 @ E
    SB000013V00

    3
    C RDS(on) : 90-150 mΩ REMOTE- REMOTE- C
    RFP3 1 @ 2 150K_0402_5% FP_EN#_R
    <20,21,22,23> S0I3_EC#

    1
    CFP2 Close to SSD
    0.1U_0201_10V6K
    @ REMOTE2+ REMOTE2+
    2
    1

    1
    C
    CTS4 CTS2 2 QTS2
    2200P_0402_50V7K 2200P_0402_25V7K B MMST3904-7-F_SOT323-3

    2
    2 REMOTE- @ E
    SB000013V00

    3
    REMOTE-
    JFP1
    1
    2 1
    3 2 Close to APU CORE (PLZ3)
    4 3 REMOTE3+
    5 4 REMOTE3+
    5 1
    6 9
    <11> USB20_P6 6 G1

    1
    1
    7 10 CTS6 C
    <11> USB20_N6 7 G2 2200P_0402_50V7K
    +3V_FP 8 CTS7 2 QTS3
    8 2 REMOTE3- 2200P_0402_25V7K B MMST3904-7-F_SOT323-3

    2
    ACES_51522-00801-001 @ E
    SB000013V00

    3
    SP01001AE00 REMOTE3-
    ME@
    3

    CFP1 DFP1
    0.1U_0201_10V6K CEST23LC5VB
    SCA00004300 REMOTE1,2,3 (+/-) :
    ESD@ Trace width/space:10/10 mil
    1

    Trace length:<8"
    B
    ESD B

    +3VS +3VS

    Close to WLAN 1
    CTH2 Close to +5VALW1 (PL503) 1
    CTH1
    0.1U_0201_10V6K 0.1U_0201_10V6K
    @ @
    2 2
    +3VS +3VS

    1
    1
    UTH2 @ UTH1 @
    RTH2 RTH1
    2 1 2 1
    P Sensor +1.8VS +1.8VALW
    +3VALW
    3
    D+ VCC
    6
    10K_0402_5%
    @ 3
    D+ VCC
    6
    10K_0402_5%
    @

    2
    2
    D- ALERT# D- ALERT#
    PS_SCL R4042 1 @ 2 10K_0402_5% EC_SMB_CK2 8 4 EC_SMB_CK2 8 4
    PS_SDA R4043 1 @ 2 10K_0402_5% SCL THERM# SCL THERM#
    PS_INT# R4044 1 @ 2 10K_0402_5% EC_SMB_DA2 7 5 EC_SMB_DA2 7 5
    SDA GND SDA GND
    R4050 1 @ 2 0_0201_5% +3VS
    F75397M_MSOP8 F75397M_MSOP8
    R4051 1 @ 2 0_0201_5% SVDD_1V8 SA00007WP00 SA00007WP00
    PS_INT# R4052 1 2 10K_0402_5%

    Address 1001_100xb Address 1001_100xb


    EC_SMB_CK4 R200 1 @ 2 0_0201_5% PS_SCL
    EC_SMB_DA4 R206 1 @ 2 0_0201_5% PS_SDA JPS1
    R202 1 @ 2 0_0201_5% PS_INT# 1
    to EC <22> PS_INT#_EC PS_SCL 2 1 REMOTE4(+/-) : REMOTE4(+/-) :
    PS_SDA 2
    A
    R203 1 @ 2 0_0201_5% PS_SCL PS_INT#
    3
    4 3 Trace width/space:10/10 mil Trace width/space:10/10 mil A
    <10> I2C_3_SCL
    <10> I2C_3_SDA R204 1 @ 2 0_0201_5% PS_SDA SVDD_1V8 5 4
    5
    Trace length:<8" Trace length:<8"
    R205 1 @ 2 0_0201_5% PS_INT# VDD_3V3 6
    to CPU <10> PS_INT#_CPU 6
    7
    8 GND
    +3VS +3VALW GND

    HIGHS_FC5AF061-2931H-A
    Security Classification
    2020/02/25
    Compal Secret Data
    2021/02/25 Title
    Compal Electronics, Inc.
    SP01002K900
    Issued Date Deciphered Date
    R4048 1 @ 2 0_0201_5%
    Address : 0x28 ME@
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Thermal / Finger Printer
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    R4049 1 @ 2 0_0201_5% VDD_3V3 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 24 of 39
    5 4 3 2 1
    5 4 3 2 1

    SSD_2280 (TYPE M) +3VS +3VS_SSD1

    +3VS_SSD1
    RSD1 1 @ 2 0_0805_5%
    D D
    +3VALW Q208
    +3VALW ME2301DC-G_SOT23-3

    0.01U_0402_16V7K

    0.1U_0201_10V6K

    10U_0402_6.3V6M

    10U_0402_6.3V6M
    SB00001FT00 1 1 1 1

    CSD1

    CSD2

    CSD3

    CSD4 @
    Imax : 2.0 A Imax : 2.0 A
    1

    D
    3 1
    @
    RS4030 @ 2 2 2 2
    100K_0402_5% VSG(th) : 0.4-1 V

    G
    2
    ID(max) : 2 A
    RDS(on) : 90-150 mΩ
    2

    +3VS_SSD1
    RSD12 1 @ 2 150K_0402_5% SSD1_PWR_EN#_R
    <22> SSD1_PWR_EN#

    1 USD1
    CSD10
    MC74VHC1G08EDFT2G SC70 5P
    0.1U_0201_10V6K
    SA0000BIP00
    @

    5
    2
    1

    P
    <10> AUX_RESET# IN1 PLT_RST_SSD1#
    4
    2 O
    <10,20> APU_PCIE_RST# IN2

    1
    MS_SSD@

    3
    C
    +3VS_SSD1 @ C
    RSD3
    JSSD1
    1 2 100K_0402_5%
    3 GND 3.3VAUX 4

    2
    PCIE_ARX_DTX_N0 5 GND 3.3VAUX 6
    <6> PCIE_ARX_DTX_N0 PCIE_ARX_DTX_P0 PERn3 N/C RSD8 2 1 0_0402_5%
    7 8
    <6> PCIE_ARX_DTX_P0 PERp3 N/C
    9 10 NON_MS@
    PCIE_ATX_C_DRX_N0 11 GND DAS/DSS# 12
    <6> PCIE_ATX_C_DRX_N0 PCIE_ATX_C_DRX_P0 13 PETn3 3.3VAUX 14
    <6> PCIE_ATX_C_DRX_P0 PETp3 3.3VAUX
    15 16
    PCIE_ARX_DTX_N1 17 GND 3.3VAUX 18
    <6> PCIE_ARX_DTX_N1 PCIE_ARX_DTX_P1 PERn2 3.3VAUX
    19 20
    <6> PCIE_ARX_DTX_P1 21 PERp2 N/C 22
    PCIE_ATX_C_DRX_N1 23 GND N/C 24
    <6> PCIE_ATX_C_DRX_N1 PCIE_ATX_C_DRX_P1 PETn2 N/C
    25 26
    <6> PCIE_ATX_C_DRX_P1 27 PETp2 N/C 28
    PCIE_ARX_DTX_N2 29 GND N/C 30
    <6> PCIE_ARX_DTX_N2 PCIE_ARX_DTX_P2 PERn1 N/C
    31 32
    <6> PCIE_ARX_DTX_P2 PERp1 N/C
    33 34
    PCIE_ATX_C_DRX_N2 35 GND N/C 36
    <6> PCIE_ATX_C_DRX_N2 PCIE_ATX_C_DRX_P2 PETn1 N/C
    37 38 DEVSLP1
    <6> PCIE_ATX_C_DRX_P2 PETp1 DEVSLP DEVSLP1 <10>
    39 40
    PCIE_ARX_DTX_P3 41 GND N/C 42
    <6> PCIE_ARX_DTX_P3 PCIE_ARX_DTX_N3 43 PERn0/SATA B+ N/C 44
    B <6> PCIE_ARX_DTX_N3 B
    45 PERp0/SATA B- N/C 46
    PCIE_ATX_C_DRX_N3 47 GND N/C 48
    <6> PCIE_ATX_C_DRX_N3 PETn0/SATA A- N/C
    PCIE_ATX_C_DRX_P3 49 50 PLT_RST_SSD1#
    <6> PCIE_ATX_C_DRX_P3 PETp0/SATA A+ PERST#
    51 52
    53 GND CLKREQ# 54 CLKREQ_SSD1# <11>
    <11> CLK_PCIE_SSD1# REFCLKn PEWake#
    55 56
    <11> CLK_PCIE_SSD1 57 REFCLKp N/C 58
    GND N/C

    67 68
    PCIE_DET1 69 N/C SUSCLK 70
    <10> PCIE_DET1 PEDET 3.3VAUX
    71 72
    73 GND 3.3VAUX 74
    75 GND 3.3VAUX
    GND
    77 76
    MTG77 MTG76

    ME@
    SP07001GE00
    LOTES_APCI0146-P008A
    A A

    Security Classification
    2020/02/25
    Compal Secret Data
    2021/02/25 Title
    Compal Electronics, Inc.
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    NGFF SSD
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 25 of 39
    5 4 3 2 1
    1 2 3 4 5 6 7 8

    USB3.0_Port (AOU_Port)
    W=100mils
    +5VALW +5V_USBCHG JUSB1 ME@
    1
    +3VL CHR_USB20_N5_L 2 VBUS
    +5V_USBCHG CHR_USB20_P5_L 3 D-
    4 D+
    USB3_ARX_L_DTX_N2 5 GND
    USB3_ARX_L_DTX_P2 6 STDA_SSRX- 10
    STDA_SSRX+GND

    1
    10K_0402_5%
    7 11
    80mil 80mil

    1
    USB3_ATX_L_DRX_N2 GND GND

    RUS1

    10K_0402_5%
    8 12
    USB3_ATX_L_DRX_P2 STDA_SSTX- GND

    RUS2
    9 13
    STDA_SSTX+GND
    U7 ACON_TCRAL-9U1391

    2
    A 1 12 A

    2
    9 IN OUT 10 CHR_USB20_P5
    <22> USB_CHG_STATUS# USB_OC0#_R STATUS# DP_IN CHR_USB20_N5 1
    RUS3 2 @ 1 0_0402_5% 13 11
    <11> USB_OC0# USB_CHG_ILIM_SEL FAULT# DM_IN +
    4 2 CU32
    ILIM_SEL DM_OUT USB20_N5 <11> 150U_B2_6.3VM_R35M
    <22> USB_CHG_EN
    5 3
    EN DP_OUT USB20_P5 <11>
    <22> USB_CHG_CTL1 6 15 RUS6 1 2 2.7M_0402_1%
    RUS4 1 2 10K_0402_5% USB_CHG_CTL2 7 CTL1 ILIM_LO 16 RUS7 1 2 24.9K_0402_1% 2
    +3VL CTL2 ILIM_HI
    <22> USB_CHG_CTL3
    8 14
    CTL3 GND 17
    T-PAD
    SN1702001RTER_QFN16_3X3
    SA0000B0V00
    1
    10K_0402_5%

    10U_0402_6.3V6M

    10U_0402_6.3V6M

    10U_0402_6.3V6M
    1 1 1
    RUS8

    CUS1

    CUS2

    CUS3
    2 2 2

    RF
    2

    SM070007100
    EMI
    RFA11T2SA0AR_6P
    6 5
    L41 EMI@
    CT142 1 2 0.33U_0201_6.3V6M USB3_ARX_C_DTX_N2 4 3 USB3_ARX_L_DTX_N2 CHR_USB20_N5 1 2 CHR_USB20_N5_L
    <11> USB3_ARX_DTX_N2 1 2

    CT143 1 2 0.33U_0201_6.3V6M USB3_ARX_C_DTX_P2 1 2 USB3_ARX_L_DTX_P2 CHR_USB20_P5 4 3 CHR_USB20_P5_L


    <11> USB3_ARX_DTX_P2 4 3
    L45 RF@ DLM0NSN900HY2D_4P
    SM070005U00

    SM070007100
    RFA11T2SA0AR_6P
    6 5

    C333 1 2 0.22U_0201_6.3V6M USB3_ATX_C_DRX_N2 4 3 USB3_ATX_L_DRX_N2


    <11> USB3_ATX_DRX_N2

    C334 1 2 0.22U_0201_6.3V6M USB3_ATX_C_DRX_P2 1 2 USB3_ATX_L_DRX_P2


    ESD
    B <11> USB3_ATX_DRX_P2 B
    L46 RF@ D9 ESD@ D10 ESD@
    USB3_ARX_L_DTX_N2 9 10 1 USB3_ARX_L_DTX_N2 CHR_USB20_N5_L 3 6
    1
    I/O2 I/O4
    USB3_ARX_L_DTX_P2 8 2 USB3_ARX_L_DTX_P2
    9 2
    USB3_ATX_L_DRX_N2 7 4 USB3_ATX_L_DRX_N2 2 5
    7 4 +5V_USBCHG
    GND VDD
    USB3_ATX_L_DRX_P2 6 5 USB3_ATX_L_DRX_P2
    6 5

    3 1 4 CHR_USB20_P5_L
    3
    I/O1 I/O3
    8 AZC399-04S.R7G SOT23-6L
    SC300005Y00
    AZ124S-04F.R7G DFN2510P10E
    SC300006T00

    ESD protection needs to be placed near connector side

    USB3.0_Port (Non-AOU_Port) W=100mils


    +USB3_VCCA JUSB2 ME@
    1
    USB20_N1_L 2 VBUS

    RF USB20_P1_L

    USB3_ARX_L_DTX_N1
    3
    4
    D-
    D+
    GND
    5
    SM070007100 USB3_ARX_L_DTX_P1 STDA_SSRX-
    6 10
    RFA11T2SA0AR_6P 7 STDA_SSRX+GND 11
    6 5 USB3_ATX_L_DRX_N1 8 GND GND 12
    USB3_ATX_L_DRX_P1 9 STDA_SSTX- GND 13
    CT138 1 2 0.33U_0201_6.3V6M USB3_ARX_C_DTX_N1 4 3 USB3_ARX_L_DTX_N1 STDA_SSTX+GND
    <11> USB3_ARX_DTX_N1
    ACON_TCRAL-9U1391

    CT139 1 2 0.33U_0201_6.3V6M USB3_ARX_C_DTX_P1 1 2 USB3_ARX_L_DTX_P1 60 mil 60 mil 1


    <11> USB3_ARX_DTX_P1
    C C
    L47 RF@ +5VALW 1 +USB3_VCCA + CU33
    150U_B2_6.3VM_R35M
    U9
    1 2
    5 OUT
    SM070007100 IN 2
    RFA11T2SA0AR_6P 4 GND
    <22> USB_EN# EN
    6 5 3 RUS13 2 @ 1 0_0402_5%
    OCB USB_OC1# <11>
    C330 1 2 0.22U_0201_6.3V6M USB3_ATX_C_DRX_N1 4 3 USB3_ATX_L_DRX_N1 G524B2T11U_SOT23-5
    <11> USB3_ATX_DRX_N1
    1 SA00007BW 00
    CUS4
    C329 1 2 0.22U_0201_6.3V6M USB3_ATX_C_DRX_P1 1 2 USB3_ATX_L_DRX_P1 0.1U_0201_10V6K
    <11> USB3_ATX_DRX_P1
    L48 RF@ 2
    2A/Active Low

    ESD
    D7 ESD@ D8 ESD@
    USB3_ARX_L_DTX_N1 9 10 1 USB3_ARX_L_DTX_N1 USB20_N1_L 3 6
    1
    I/O2 I/O4

    EMI USB3_ARX_L_DTX_P1

    USB3_ATX_L_DRX_N1
    8

    7
    9 2 2

    4
    USB3_ARX_L_DTX_P1

    USB3_ATX_L_DRX_N1 2 5
    7 4 +USB3_VCCA
    GND VDD
    USB3_ATX_L_DRX_P1 6 5 USB3_ATX_L_DRX_P1
    6 5
    L40 EMI@
    D 1 2 USB20_N1_L 3 1 4 USB20_P1_L D
    <11> USB20_N1 3
    1 2 I/O1 I/O3
    8 AZC399-04S.R7G SOT23-6L
    4 3 USB20_P1_L SC300005Y00
    <11> USB20_P1 4 3 AZ124S-04F.R7G DFN2510P10E
    DLM0NSN900HY2D_4P SC300006T00
    SM070005U00
    ESD protection needs to be placed near connector side

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    USB3 / IO board Conn.
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: W ednesday, July 22, 2020 Sheet 26 of 39
    1 2 3 4 5 6 7 8
    A B C D E

    ON/OFF# SHORT PAD SCREW


    @
    LASER BARCODE
    JP1 2 1 ON/OFF# CPU SSD WLAN FAN
    SHORT PADS CODE1 @ CODE2 @
    1 TOP side H1 H2 H3 H4 H5 H6 H7
    SN Version 1

    HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA


    FD1 FD2

    @ BARCODE_6X6 BARCODE_12X4

    1
    JP2 2 1 ON/OFF#

    1
    SHORT PADS CODE3 @ MAC CODE4 @
    BOTT side H_3P3 H_3P3 H_3P3 H_4P2 H_4P2 H_3P4 H_1P4X2P0N
    FD3 FD4

    H8 H9 H11 H13 H14 H15 H16 H18 H20

    1
    HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA BARCODE_20X4 BARCODE_8X8

    1
    H_2P0 H_2P3 H_3P4 H_2P3 H_2P3 H_3P4 H_3P4 H_2P3X2P0 H_3P2

    Smaller
    CLIP1 CLIP2 CLIP3 CLIP4 CLIP5 CLIP6 CLIP7 CLIP8

    2
    +5V FAN HOLEA

    @
    HOLEA

    @
    HOLEA

    @
    HOLEA

    @
    HOLEA

    @
    HOLEA

    @
    HOLEA

    @
    HOLEA

    @ 2

    1
    1

    1
    1
    +5VS
    JFAN1
    RF2 2 @ 1 0_0603_5% +5VS_FAN 1
    EC_FAN_SPEED1 2 1
    <22> EC_FAN_SPEED1 EC_FAN_PW M1 2
    3
    2 <22> EC_FAN_PW M1
    4 3
    PWR BUTTON
    CF1
    10U_0402_6.3V6M
    5
    6
    4

    GND1
    NOVO BUTTON
    1 GND2
    ME@ Pull up at EC side
    HEFEN_AW B05-S04FCA-HF SW 2
    SP02001NP00 TJG-533-V-T/R_6P SW 1
    NOVO# 3 1
    <22> NOVO#
    1 2
    <22> ON/OFF#
    4 2

    3 4

    5
    6
    SN100000W 00

    TCHC2QR_2P
    SN10000BW 00

    3 3

    ON/OFF# NOVO#
    ESD

    2
    D11 D3
    ESD@ ESD@
    CEST23LC5VB CEST23LC5VB
    SCA00004300 SCA00004300

    1
    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PCB PN / SCREW / FAN
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: W ednesday, July 22, 2020 Sheet 27 of 39
    A B C D E
    A B C D E

    +3VALW to +3VS / +5VALW to +5VS


    +3VALW +3VS
    J1 @
    2 1
    +VL1 2 1

    0.1U_0201_10V6K

    10U_0402_6.3V6M
    JUMP_43X79

    10U_0402_6.3V6M

    0.1U_0201_10V6K
    1 1 ID(max) : 6A 1 1
    RDS(on) : 0.017-0.021 ohm

    C71

    C72

    C73

    C74
    1
    2 2
    @
    +3VALW to +3VS 2
    @
    2
    @
    1
    U10
    1 14 +3VALW_3VS
    2 VIN1 VOUT1 13
    VIN1 VOUT1
    3 12 C75 1 2 1000P_0201_50V7K
    ON1 CT1
    4 11
    <22,34> SUSP# VBIAS GND +5VS
    5 10 C76 1 2 2200P_0402_50V7K
    +5VALW1 ON2 CT2 J2 @
    6 9 +5VALW_5VS 2 1
    7 VIN2 VOUT2 8 2 1
    VIN2 VOUT2

    10U_0402_6.3V6M

    0.1U_0201_10V6K
    JUMP_43X79 1 1
    0.1U_0201_10V6K

    10U_0402_6.3V6M

    C79

    C80
    1 1 15
    GPAD
    C77

    C78

    S IC JW7110DFNC#TRPBF DFN14 DUAL LOAD SW @


    @ SA0000BEL00 2@ 2
    2 2
    +5VALW to +5VS

    +0.75VALW to +0.75VS

    2 +0.75VALW +5VALW 2
    +0.75VS

    J6 @
    U19 2 1
    2 1
    10U_0402_6.3V6M
    C236
    0.1U_0201_10V K X5R
    C237

    1 1 1
    VIN1

    0.1U_0201_10V K X5R
    C243
    10U_0402_6.3V6M
    C242
    2 JUMP_43X79 1 1
    VIN2
    @ 7 6 +0.75VALW_0.75VS
    2 2 VIN thermal VOUT @
    3 2 2
    VBIAS
    4 5
    ON GND

    EM5201V_DFN8_3X3
    0.75VS_PWR_EN SA00008R600
    <22> 0.75VS_PWR_EN
    ID(max) : 10A
    RDS(on) : 0.0035-0.0055 ohm

    3
    +1.8VALW to +1.8VS 3

    Q213 +1.8VS
    +1.8VALW ME2320D-G 1N SOT-23-3
    J4 @
    1 3 +1.8VS_R 2 1
    D

    2 1
    10U_0402_6.3V6M
    C342

    10U_0402_6.3V6M
    C62

    0.1U_0201_10V K X5R
    C63
    0.1U_0201_10V K X5R
    C341

    1 1 SB00000NN00 JUMP_43X79 1 1

    DISCHARGE CIRCUIT
    G
    2

    VGS(th) : 0.4-1 V
    +5VALW @ ID(max) : 6.4 A @
    2 2 RDS(on) : 0.025 2 2

    +5VALW +1.8VALW
    2

    R4047
    47K_0402_5%

    1
    1
    R75
    1

    R74 22_0603_1%
    R4046 100K_0402_1% @
    1.8VS_PWR_EN_GATE 1.8VS_PWR_EN_R_GATE
    @

    6 2
    2
    10K_0402_5% D
    1.8VALW_PWR_EN# 2 Q202A
    G 2N7002KDW_SOT363-6
    1

    D
    0.1U_0201_10V K X5R
    C343

    1.8VS_PWR_EN# Q214 1 SB00000EO00


    2

    3
    <22> 1.8VS_PWR_EN# 2N7002KW_SOT323-3 D S @

    1
    G
    SB000009Q80 5 Q202B
    <22,32,33,35> 3V/5VALW_PG G VGS(th) : 1-2.5 V
    2N7002KDW_SOT363-6
    S VGS(th) : 1-2.5 V 2 SB00000EO00 ID(max) : 0.115 A
    3

    ID(max) : 0.25 A S @ RDS(on) : 3-4ohm

    4
    RDS(on) : 2-4 ohm
    4 4

    +1.8VALW Discharge Circuit (Reserved)

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DC to DC
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 28 of 39
    A B C D E
    5 4 3 2 1

    +USBC1_VBUS

    +USBC1_VBUS_F PQS1 PQS2


    AONR21357_P_DFN33-8-5 AONR21357_P_DFN33-8-5 +19V_VIN
    1 1
    PFS1 2 2
    1 2 3 5 5 3

    2200P_0402_50V7K

    1
    499K_0402_1%
    PQS3

    1
    7A_24V_F1206HI7000V024TM

    1
    D
    WPM5001-3-TR_SOT23-3 PDS1

    4
    PCS1

    PRS1
    D 2 D
    BZT52-B5V1S_SOD323-2
    G

    2
    S ideal_1

    3
    USBC1_Gate_R

    470K_0402_1%
    PRS3
    PRS2
    49.9K_0402_1% PQS4A PQS4B
    METR3906KW-G_SOT363-6 METR3906KW-G_SOT363-6

    4
    2

    2
    2 5
    USBC1_Gate

    3
    1
    D
    2 PQS5
    <17> USBC1_CHG_EN G 2N7002KW_SOT323-3

    1
    S

    3
    PRS4 PRS6
    47K_0402_1% PRS5 47K_0402_1%
    470K_0402_1%

    2
    C C

    B B

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/07/27 Deciphered Date 2016/07/27 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR- DCIN / Vin Detector
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    Custom 0.1
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SKL
    Date: Wednesday, July 22, 2020 Sheet 29 of 40
    5 4 3 2 1
    5 4 3 2 1

    EMI@
    JBAT1 VMB2 +8.4V_VMB
    @CONN@ PL1 5A_Z80_0805_2P
    1 PF1 1 2
    1 2 F1206HB12V024TM 12A 24V UL FAST
    2 3 1 2
    3 4 EMI@ +8.4V_BATT+
    4 5 EC_SMCA PL2 5A_Z80_0805_2P
    5 6 EC_SMDA 1 2
    6 7
    7 8
    8 9

    1
    9 10

    1
    100_0402_1%

    100_0402_1%
    10 11 PC1 EMI@ PC2 EMI@
    D 11 12 1000P_0201_50V7K 0.01U_0402_50V7K D

    2
    12

    PR1

    PR2
    2

    2
    13
    GND1 14
    GND2 15
    GND3 16
    GND4

    EC_SMB_CK1 <17,19,22,31>
    OCTEK_WTB-12GCBWAB-U
    EC_SMB_DA1 <17,19,22,31>
    1 2
    +3VLP
    PR3
    1 2 200K_0402_1% +3VALW
    PR4
    @ 200K_0402_1%
    1 2
    +EC_VCCA
    VCIN1_BATT_TEMP <22>
    PR5

    16.5K_0402_1%
    10K_0402_5%

    1
    +RTCBATT_R

    PR6
    2
    <22> VCIN0_PH1

    1
    PH1
    PR7 100K +-1% 0402 B25/50 4250K
    1K_0603_5%
    C 1 2 C
    +RTCBATT_R

    2
    3
    1
    +RTCBATT 2 +CHGRTC
    @ PR9
    LRB715FT1G_SOT323-3
    PD1 1 2 ECAGND
    +3VL
    0_0603_5%
    1

    @ PR8
    45.3K_0603_1%

    PH201 under CPU botten side :


    2

    CPU thermal protection at 93 +-3 degree C


    Recovery at 56 +-3 degree C

    B B

    A A

    Title
    <Title>

    Size Document Number R ev


    CustomLA-K211P 0.1

    Date: Wednesday, July 22, 2020 Sheet 30 of 40


    5 4 3 2 1
    5 4 3 2 1

    D D

    +19V_VIN
    Max Current = 3.25(A)
    Should be placed near ACP, ACN

    Keep these two signals as a pair routing


    These MLCCs must be placed
    DCIN_CURRENT_P_R
    symmetrically on Top and Bottom.

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M
    PRB1

    1
    0.01_1206_1%

    PCB1

    PCB2

    PCB3

    PCB4
    2

    2
    3

    4
    DCIN_CURRENT_N_R

    DH_CHGBK +19VB
    DH_CHGBT

    SDV_EC033_DCDC low noise MLCC


    1

    PRB2 PRB3
    4.99_0402_1% 4.99_0402_1%
    SDV_EC032_DCDC VINT20
    PQB1
    10X10X2.4

    2
    AONY36352_DFN5X6D-8-7 These MLCCs must be placed
    2

    SDV_EC033_DCDC PQB2 10.24A Max symmetrically on Top and Bottom.

    D1

    G1

    G1

    D1
    PLB1 AONY36352_DFN5X6D-8-7
    @
    PCB5 7 1 2 7
    D2/S1 D2/S1

    10U_0603_25V6M

    10U_0603_25V6M
    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M
    33U_D1_25VM_R6M
    0.033U_0402_25V7K
    0.033U_0402_25V7K

    1 2 1.5UH_MMD-10BDE1R5M-R1L_24A_20%

    S2-1

    S2-2

    S2-3

    S2-3

    S2-2

    S2-1

    1
    1

    1
    2.2_1206_5%
    G2

    G2
    1

    2
    1
    2

    PCB7
    PCB6

    PCB11

    PCB12
    PCB9

    PCB10

    PCB13

    PCB14
    0.1U_0402_25V6

    EMI@
    2
    2
    2.2_1206_5%

    PRB5

    PCB32
    +

    2
    2

    2
    EMI@ PRB4
    C PCB8 PCB15 C
    2
    1

    0.047U_0402_25V7K 0.047U_0402_25V7K

    1
    1
    2

    1
    330P_0402_50V8J
    1

    330P_0402_50V8J
    PCB16

    2
    2

    PCB17
    2

    2
    PQB3

    EMI@
    SDV_EC019_DCDC

    1
    EMI@
    @PRB6 @ PRB7 AONR21357_P_DFN33-8-5 PRB8

    1
    0_0402_5% 0_0402_5% 1 0.01_1206_1% +8.4V_BATT+
    2 Max Current = 7.521(A)
    3 5 1 4

    1
    BST_CHGBK PUB1 BST_CHGBT 2 3
    EMI EMI

    4
    30 25 PCB18
    BTST1 BTST2 1 2
    REGN VDDA LX_CHGBK LX_CHGBT

    10U_0603_25V6M
    32 23
    SW1 SW2

    0.1U_0402_25V6
    PCB19 0.1U_0402_25V6

    1
    DL_CHGBK DL_CHGBT

    0.1U_0402_25V6
    29 26 1U_0402_25V6K
    VDDA

    1
    LODRV1 LODRV2

    PCB33
    10_0603_1%
    PCB20
    DH_CHGBK DH_CHGBT

    2
    10_0603_1%
    PRB9

    PCB21
    31 24

    2
    HIDRV1 HIDRV2

    PRB12
    1
    2

    EN_PTM 2 1 1 22

    1
    PRB10 PRB11 1_0805_5% VBUS VSYS

    1
    1

    10_0402_1% ACN 2 21 2 1
    +3VLP

    1
    ACN /BATDRV
    2

    PRB15 PRB13 0_0402_5%


    @ PRB14 165K_0402_1% ACP 3 20 SRP
    1

    PCB22 ACP SRP


    0_0402_5%
    1 2 VDDA 7 19 SRN
    2

    VDDA SRN
    REGN SDV_EC029_DCDC VDDA
    1

    1U_0402_10V6K
    100K_0402_5%
    100K_0402_5%

    6
    ILIM_HIZ 28 2 1
    REGN
    1

    2 1

    2
    1 2 PCB23 2.2U_0402_10V6M
    16 2 1 2 1
    PRB16

    PCB24 2200P_0402_50V7K PRB17 40.2K_0402_1%


    PRB19

    COMP1 PRB20
    1 2 17 PRB18 6.8K_0402_1% PCB25 680P_0402_50V7K
    COMP2 150K_0402_1%
    2

    PQB4A PCB26 33P_0201_50V8J 1 2


    2N7002KDW_SOT363-6 2 1 11 PCB27 15P_0201_50V8J PRB33
    2

    /PROCHOT
    2

    B <22> VCOUT1_PROCHOT# B

    1
    @ PRB21 0_0402_5% 1 2
    BATT_FW# <22>
    6

    D PRB23 1 2
    2 100K_0402_1% 18 PRB24 107K_0402_1%
    G <17,19,22,30> EC_SMB_CK1 2 1 EC_SMB_CK1_1 13 CELL_BATPRES 1K_0402_1%
    2 1
    REGN SCL

    2
    @ PRB25 0_0402_5% PCB28 100P_0201_50V8J
    1

    S <17,19,22,30> EC_SMB_DA1 2 1 EC_SMB_DA1_1 12 8 ADP_I <22> PRB26


    1

    @ PRB27 0_0402_5% SDA IADPT


    100K_0402_1%

    4 9 2 1
    CHRG_OK IBAT
    2

    <22> EN_PTM PCB29 100P_0201_50V8J 100K_0402_1%

    1
    3

    PRB28

    D 1 2 5 10
    5 PCB30 VDDA PRB29 10K_0402_5%
    ENZ_OTG PSYS
    2

    G 0.1U 10V +-10% X7R 0402 @ 15 27


    CMPOUT PGND
    1

    S 14 33
    1
    4

    <22> VCIN1_AC_IN PRB30 CMPIN PAD


    PQB4B 10K_0402_5%
    2N7002KDW_SOT363-6 2
    PCB31
    SDV_EC020_DCDC
    1

    BQ25710RSNR QFN 32P


    1
    100K_0402_1%

    0.68U_0805_50V
    2
    PRB32
    1

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2016/06.23 Deciphered Date 2017/06/23 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    BATTERY CHARGER(BQ25700)
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 31 of 40
    5 4 3 2 1
    A B C D E

    Module model information


    SY8286B_V3_single.mdd
    SY8286B_V3_dual.mdd

    EMI@ PL301 PR301 PC302


    +19VB 5A_Z80_0805_2P 0_0402_5% 0.1U_0402_25V6
    1 2 +19VB_3V BST_3V 1 2 BST_3V_R 1 2
    1 1

    2200P_0402_50V7K

    10U_0603_25V6M
    @EMI@ PC303

    EMI@ PC304

    10U_0603_25V6M
    0.1U_0402_25V6
    1

    1
    keep short pad,

    PC305

    PC306
    snubber is for EMI only. Use 7x7x3 size when the layout space is enough.

    IN3

    IN2

    IN1

    BS
    2

    2
    LX_3V 5 17 PL302
    LX EP 1.5UH_6A_20%_5X5X3_M
    PU301
    SY8386BRHC_QFN16_2P5X2P5 16 LX_3V 1 4
    6 LX2 +3VALWP
    +3VL GND 2 3

    22U_0603_6.3V6M
    4.7_1206_5%

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    15
    Check pull up resistor of SPOK at HW side LX1

    1
    1

    1
    EMI@
    PR302

    PC309
    PC307

    PC308

    PC301
    7
    PG

    1
    14

    2
    2

    2
    GND1
    PR303

    3V_SN2
    100K_0402_5% 8 13
    EN2 LDO +3VLP

    4.7U_0402_6.3V6M
    2

    680P_0402_50V7K
    TEST
    OUT
    EN1

    1
    1
    <22,28,33,35> 3V/5VALW_PG

    PC310
    FF

    1
    @ PC311
    4.7U_0402_6.3V6M Vout is 3.234V~3.366V

    2
    9

    10

    11

    12

    2
    ENLDO_3V5V

    PC312
    EMI@

    2
    Iocp=10A
    3.3V LDO 150mA~300mA
    TDC=6A
    2 5V_3V_EN 2
    PC313 PR304 @ PJ301
    Fsw : 600K Hz 1000P_0402_50V7K 1K_0402_1% 1 2
    EN1 and EN2 dont't be floating. @ PR305 3V_FB 1 2 3V_FB_1 1 2 +3VALWP 1 2 +3VALW
    EN :H>0.8V ; L<0.4V 0_0402_5% JUMP_43X118
    1 2
    <35> 1.8VALW_PG2
    @ PJP301
    +19VB_5V +19VB_5V-2 JUMP_43X39
    1 2
    +19VB
    EMI@ PL501
    +19VB_5V @ PR501 0_0402_5% PC502 +3VLP 1 2 +3VL
    0.1U_0402_25V6
    1 2 +19VB_5V BST_5V1 2 BST_5V_R 1 2
    52.3K_0402_1%

    52.3K_0402_1%

    PU501
    1

    1
    5A_Z80_0805_2P SY8286CRAC_QFN20_3X3
    PR537

    PR539

    BS
    IN

    IN

    IN

    IN
    PL502
    LX_5V 6
    10U_0603_25V6M
    10U_0603_25V6M

    10U_0603_25V6M

    2200P_0402_50V7K
    10U_0603_25V6M

    0.1U_0402_25V6

    20 1.5UH_MMD-05AHN1R5M-M1L_6.2A_20%
    2

    LX LX
    2

    @ VCIN1_BATT_DROP <22> 7 19 LX_5V 2 1


    GND LX +5VALWP
    1

    1
    1

    1
    1

    PC503

    @EMI@ PC506
    PC535

    PC504

    EMI@ PC505
    PC536

    8 18 @
    GND GND PC507

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    2

    2
    2

    2
    2

    1
    1

    1
    VCC_5V 1
    10K_0402_1%

    @ 9 17 2
    1SPOK_5V

    PG VCC
    1

    PC508

    PC509

    PC511
    PC501

    PC510
    PR502

    PC512
    4.7_1206_5%
    0.1U_0402_25V6

    @
    1

    EMI@
    PR538

    10 16
    Trigger = 6.2V

    2
    2

    2
    NC NC 2.2U_0402_6.3V6M
    PC539

    OUT

    LDO
    EN2

    EN1
    21

    FF
    2

    @ GND
    2

    2
    PR503
    11

    12

    13

    14

    15
    +3VL 0_0402_5%

    1 5V_SN
    3 3
    1

    ENLDO_3V5V

    680P_0402_50V7K
    1 2 @ PR505
    +5VLP

    PC513
    @ PR504 0_0402_5% 100K_0402_1%

    EMI@
    3V/5VALW_PG

    4.7U_0402_6.3V6M
    5V LDO 150mA~300mA
    2

    2
    1

    PC514

    PR520
    Vout is 4.998V~5.202V
    @ 0_0402_5%
    Module model information
    2

    5V_EN 1 2
    TDC=8A Iocp=10A
    1

    SY8286C_V3_single.mdd @ PC515 @ PR506 PR521


    1

    SY8286C_V3_dual.mdd 4.7U_0402_6.3V6M 100K_0402_1%


    5V_3V_EN
    @ 0_0402_5%
    1 2 PC516 PR507
    EN1 and EN2 dont't be floating. 1000P_0402_50V8-J 1K_0402_1%
    2

    5V_FB 1 2 5V_FB_1 1 2
    EN :H>0.8V ; L<0.4V
    PR508
    499K_0402_1% +3VL
    1 2 ENLDO_3V5V EN1 and EN2 dont't be floating.
    +19VB ENLDO_3V5V <33> Iocp>12A
    1

    EN :H>0.8V ; L<0.4V
    1

    PR509
    1

    PR510 100K_0402_5%
    150K_0402_1% PC517
    1U_0201_6.3V6M @ PR511
    2

    1 2 5V_EN
    <22> EN_5VALW 5V_EN <33>
    2

    @
    4.7U_0402_6.3V6M

    0_0402_5% PJ501
    1

    1 2
    +5VALWP 1 2 +5VALW
    1
    PC518

    PR513 PR512 @
    2.2K_0402_5% @ 100K_0402_5% JUMP_43X118
    <22,35> EC_ON 1 2
    2

    4 @ PJP501 4
    @ PR514
    2

    JUMP_43X39
    > VCOUT0_MAIN_PWR_ON 1 2 1 2
    +5VLP 1 2 +VL
    0_0402_5% 5V_3V_EN
    1M_0402_1%

    4.7U_0402_6.3V6M

    Security Classification Compal Secret Data Compal Electronics, Inc.


    1

    EN1 and EN2 dont't be floating.


    1

    PC519
    PR515

    EN :H>0.8V ; L<0.4V Issued Date 2019/12/19 Deciphered Date 2020/12/31 Title


    PWR- 3VALW/5VALW1
    2

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    2

    Fsw : 600K Hz DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Wednesday, July 22, 2020 Sheet 32 of 40
    A B C D E
    5 4 3 2 1

    D D

    2 Cell battery : Cin=10uF*2pcs


    3 Cell ~ 4 Cell battery : Cin=10uF*1pcs
    +19VB +19VB_5V-2
    @ PR542 0_0402_5% PC540
    EMI@ PL1802
    0.1U_0402_25V6
    1 2 +19VB_5V-2 BST_5V-2 1 2 BST_5V_R-2 1 2

    5A_Z80_0805_2P

    1
    IN3

    IN2

    IN1

    BS
    2200P_0402_50V7K
    10U_0603_25V6M

    10U_0603_25V6M

    0.1U_0402_25V6
    LX_5V-2 5 17 PL503
    LX EP

    1
    PU2503
    PC545

    PC546

    EMI@ PC543

    @EMI@ PC547
    1.5UH_MMD-05AHN1R5M-M1L_6.2A_20%
    SY8386CRHC_QFN16_2P5X2P5 LX_5V-2
    16 2 1 +5VALWP1
    2

    2
    6 LX2
    GND

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    C 15 C
    LX1

    1
    1
    1 SPOK_5V-2

    4.7_1206_5%
    PR541
    7

    PC548

    PC549

    PC542

    PC550

    PC551

    PC552
    PG

    EMI@
    14 @ PJ502
    GND1

    2
    1 2
    PC541
    @ +5VALWP1 1 2 +5VALW1
    8 13 VCC_5V-2
    1 2 JUMP_43X118

    2
    EN2 VCC
    @

    15V_SN-2
    @ PR540 PJP502

    OUT

    LDO
    EN1
    2.2U_0402_6.3V6M
    JUMP_43X39

    FF
    0_0402_5%
    1 2
    +5VLP1 +VL1

    680P_0402_50V7K
    1 2

    10

    11

    12
    2
    <22,28,32,35> 3V/5VALW_PG

    EMI@ PC553
    +5VLP1

    2
    4.7U_0402_6.3V6M
    <32> ENLDO_3V5V
    5V LDO 150mA~300mA
    Vout is 4.998V~5.202V

    PC544
    TDC=6A Iocp=10A

    2
    <32> 5V_EN

    EN1 and EN2 dont't be floating.


    EN :H>0.8V ; L<0.4V PC554 PR543
    470P_0402_50V7K 1K_0402_1%
    5V_FB-2 1 2 5V_FB_1-2 1 2

    B B

    The current limit is set to 6A, 9A or 12A when this pin


    is pull low, floating or pull high.

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2011/06/13 2012/06/13 Title
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    APL5930
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Wednesday, July 22, 2020 Sheet 33 of 40
    5 4 3 2 1
    5 4 3 2 1

    EMI@ PLM2
    +19VB 5A_Z80_0805_2P
    +12.6VB_DDR
    1 2 PRM2
    2.2_0603_5%
    BST_DDR_R BST_DDR

    2200P_0402_50V7K

    10U_0603_25V6M

    10U_0603_25V6M
    0.1U_0402_25V6
    1 2
    +1.2VP

    1
    @ PRM15 0_0603_5%

    @EMI@ PCM2

    EMI@ PCM1

    PCM3

    PCM4
    UG_DDR_R 1 2 UG_DDR +0.6VSP

    2
    D D
    LX_DDR

    PCM6
    22U_0603_6.3V6M
    1

    1
    PCM5

    5
    0.1U_0402_25V6

    16

    17

    18

    19

    20
    2
    PUM1

    2
    PQM2

    BOOT

    VTT
    PHASE

    UGATE

    VLDOIN
    21
    AON7408L_DFN8-5 PAD
    4 LG_DDR 15 1
    LGATE VTTGND
    PLM1
    14 2
    PRM3 PGND VTTSNS
    1UH_MMD-05AHN1R0M-X2L_8A_20%

    1
    2
    3
    18.2K_0402_1%
    2 1 1 2 CS_DDR 13 3
    +1.2VP PCM7 CS RT8207PGQW_WQFN20_3X3 GND

    1
    1U_0201_6.3V6K

    5
    VTTREF_DDR
    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    22U_0603_6.3V6M

    22U_0603_6.3V6M

    1 2 12 4
    RF@ PRM4 RB751V-40_SOD323-2 PDM1 VDDP VTTREF
    1
    1

    1
    1

    1
    PCM8
    PCM11

    PCM12

    PCM9

    PCM13

    PCM10

    4.7_1206_5% PRM5 2 1
    5.1_0603_5% 11 5
    +1.2VP

    1 2
    VDD VDDQ

    1
    1 2 VDD_DDR

    PGOOD
    2
    2

    2
    2

    4 +5VALW +5VALW PRM6 PCM14

    TON
    1
    RF@ PCM16 0.033U_0402_16V7K

    FB
    S5

    S3

    2
    680P_0402_50V7K PCM15 1 2

    2
    PQM1 1U_0201_6.3V6K 2.2_0603_5%

    10

    6
    2
    AON7506_DFN3X3-8-5

    1
    2
    3

    EN_0.675VSP
    EN_DDR

    FB_DDR
    TON_DDR
    PRM7
    C 1 2 +1.2VP C
    PRM8 470K_0402_1%
    +12.6VB_DDR 1 2 @ PRM13
    6.04K_0402_1% 0_0402_5%

    1
    1 2
    @ PRM1 0_0402_5% VDDIO_MEM_S3_SENSE_H <9>
    1 2 PRM9
    <22> SYSON
    10K_0402_1%

    2
    1
    Mode Level +0.675VSP VTTREF_1.35V @ PCM17 @ PRM14
    0.1U_0402_10V7K 0_0402_5%
    S5 L off off 1 2
    VDDIO_MEM_S3_SENSE_L <9>

    2
    S3 L off on
    S0 H on on
    @ PRM10
    Note: S3 - sleep ; S5 - power off 1 2
    <22,28> SUSP#
    @ PJM2
    0_0402_5% 1 2
    +1.2VP 1 2 +1.2V
    JUMP_43X118

    1
    @ PCM18
    0.1U_0402_10V7K

    2
    PJM1 @
    1 2
    +0.6VSP 1 2 +0.6VS
    +3VALW +5VALW JUMP_43X39
    B B
    1

    2
    1

    PC2507
    JUMP_43X79
    2.2U_0201_6.3V6M
    1

    @ PJ2503
    2

    Vout=0.8V* (1+Rup/Rdown)
    2

    PU2502
    IC APL5934BKAI-TRG SOP 8P LDO
    10U_0402_6.3V6M
    1

    4 5
    VPP NC 6
    PC2509

    3
    @ PR2505 2 VIN VO 7 +2.5VP
    GND
    2

    VEN ADJ 8
    1

    3.4K_0402_1%

    0.01U_0402_16V7K

    1
    POK GND
    1

    1 2
    <10,22> PM_SLP_S5#

    22U_0603_6.3V6M
    PR2506

    PC2510
    9
    47K_0402_5%

    Rup
    2

    0_0402_5%
    1
    1

    1
    0.1U_0402_16V7K

    2
    PC2511
    PR2507

    SYSON 1 2 PC2512
    @ PJ2504
    2

    @ PR2509
    0_0402_5% 1 2
    +2.5VP +2.5V
    2

    1 2
    1

    1.6K_0402_1%

    JUMP_43X79
    PR2508

    Rdown
    2

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date Deciphered Date 2020/05/15 Title
    2019/05/15
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    RT8207P
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Wednesday, July 22, 2020 Sheet 34 of 40
    5 4 3 2 1
    5 4 3 2 1

    keep short pad,


    snubber is for EMI only.

    PCF2
    @ PRF3
    @ PJF2 0.1U_0402_25V6
    1 2 +12.6VB_VDDP BST_VDDP 1 2 BST_VDDP_R1 2
    +19VB 1 2
    +0.75VALWP 1
    @ PJF1
    2
    1 2 +0.75VALW

    2200P_0402_50V7K

    10U_0603_25V6M

    10U_0603_25V6M
    0.1U_0402_25V6

    0.1U_0402_25V6
    JUMP_43X79 0_0603_5%

    1
    EMI@ PCF3

    @EMI@ PCF5
    JUMP_43X118

    EMI@ PCF4
    D D

    2
    PCF6

    PCF7

    1
    RF@ PRF4 RF@ PCF1

    IN3

    IN2

    IN1

    BS
    4.7_1206_5% 680P_0402_50V7K
    1 2 SNUB_0.75V 1 2
    +3VL LX_VDDP 5 17
    LX EP

    1
    PU701
    16
    @ PRF15 6 S IC SY8386RHC QFN 16P PWM LX2
    100K_0402_5% GND
    LX_VDDP
    15 1 4
    +0.75VALWP

    2
    LX1
    0V75VALW_PG 7 2 3

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    PG

    1
    @ PRF14 14 PCF8
    GND1

    1
    1

    1
    0_0402_5% PLF1 470P_0402_50V7K
    1.8VALW_PG 1 2

    PCF9

    PCF13
    PCF10

    PCF11

    PCF12

    PCF14
    2
    8 13 LDO_VDDP 1UH_6.6A_20%_5X5X3_M PRF6

    2
    2

    2
    TEST VCC
    10_0402_1%

    1
    ILMT
    PRF5

    BYP
    PRF7

    EN

    FB
    1K_0402_1%

    2
    2
    <22,32> EC_ON 1 2 1K_0402_1%
    PC711 @ PRF10

    10

    11

    12
    4.7U_0402_6.3V6M PRF9

    2
    1
    10K_0402_1% 1 2
    +3VALW VR_ON <22,36>
    1

    1 2
    0.1U_0402_16V7K

    PRF8 0_0402_5%
    1

    2
    1M_0402_1%
    +3VALW (R1)

    1
    PCF16

    FB = 0.6V
    PCF17 @ PRF11
    2
    2

    2.2U_0402_6.3V6M

    2
    ILMT_VDDP 1 2 1 3
    1

    APU_VDDP_S5_SEN_H <9>

    1
    PRF2
    PRF12 0_0402_5% PQF1
    10K_0402_5%
    FB_VDDP (R2) 35.7K_0402_1% LSK3541G1ET2L_VMT3
    C EN :H>0.8V ; L<0.4V C
    2

    2
    EN pin don't floating
    1

    If have pull down resistor at HW side, @ PRF1


    @ PRF13
    please delete PR601. 0_0402_5%
    1 2
    APU_VDDP_S5_SEN_L <9>
    2

    0_0402_5%

    The current limit is set to 6A, 9A or 12A when this pin VFB=0.6V
    is pull low, floating or pull high.
    Vout=0.6V*(1+R1/R2)=0.75V

    B B
    @ PL1801
    PJ1801
    JUMP_43X39 PU1801 SY8843QWC_QFN7_1P5X1P5 1UH_MHCD252012A-1R0M-A8S_3A_20%
    1 2 5 6 LX_1.8V 1 2
    +5VALW 1 2 IN LX +1.8VALWP
    3 2
    FG OUT @ PJ1802
    1 2
    4 1
    EMI@ PR1804

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    EN GND FB 1 2
    1

    1
    1

    1
    4.7_0603_5%
    Rup +1.8VALWP 1 2 +1.8VALW

    PC1801

    PC1804
    PC1802 PR1802
    7

    22U_0603_6.3V6M 100K_0402_5% PR1803 JUMP_43X79


    2

    2
    1.8VALW_PG 20K_0402_1% FB=0.6V

    2
    2

    FB_1.8V
    Note:Iload(max)=3A
    @ PR1810
    0_0402_5% @ PR1811
    0V75VALW_PG 1 2 0_0402_5%
    1 2
    Vout=[0.6V*(Rup+Rdown)/Rdown]
    <32> 1.8VALW_PG2
    @ PR1807 1 =1.8
    0_0402_5%
    680P_0402_50V7K

    @ PR1812
    1 2
    EMI@ PC1806

    100K_0402_5%
    <22,28,32,33> 3V/5VALW_PG
    1

    +3VL
    1 2 PR1801 Rdown
    PR1805 10K_0402_1%
    66.5K_0402_1%
    2

    EC_ON 1 2 +1.8VSP_ON
    0.1U_0402_16V7K
    1

    PR1806
    PC1805

    1M_0402_1%
    2
    2

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2018/12/18 Deciphered Date 2019/12/18 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    0.75VALWP
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Wednesday, July 22, 2020 Sheet 35 of 40
    5 4 3 2 1
    5 4 3 2 1

    Close IC
    <9> APU_CORE_SEN_H +APU_CORE <9> APU_VSS_SEN_L PR1002 and PR1003 are for debug only.
    APU_VDD_RUN_FB_L APU_VDDCR_SEN need other resistor at HW side.
    @ PCZ1 +19VB
    0.1U_0402_25V6
    1 2 EMI@ PLZ1
    Module model information NA_2P
    +19VB_APU_CORE 1 2
    RT3662A_V2A.mdd for IC portion

    1
    10_0402_5%
    @ PRM17 EMI@ PLZ2

    33U_D1_25VM_R6M

    33U_D1_25VM_R6M
    1
    RT3662A_V2B.mdd for SW portion

    PRZ3
    @ PRZ1 @ PRZ4 NA_2P

    PRZ2

    @EMI@ PCZ4

    EMI@ PCZ5
    1 1

    10U_0603_25V6M

    10U_0603_25V6M

    2200P_0402_50V7K
    0.1U_0402_25V6
    UG2_APU UG2_APU_R

    10_0402_5%
    0_0402_5% 0_0402_5% 1 2 1 2

    1
    1
    + +

    PCZ2

    PCZ3

    PCZ6

    PCZ7
    2

    5
    0_0603_5%

    2
    2

    2
    2
    PQZ1 2 2

    AON6380_DFN5X6-8-5
    PCZ8 0.22U_0402_25V6K
    BST2_APU 1 2 BST2_APU_R1 2 4
    D D
    PRZ5 2.2_0603_5%

    @ PCZ9

    3
    2
    1
    PLZ3
    0.1U_0402_25V6
    1 2 LX2_APU 1 4
    LL(Rdroop)=0.7m +APU_CORE
    ISEN2P_APU_R 2 3

    PRZ8
    4.7_1206_5%
    5

    1
    PRZ6 PRZ7 PQZ2
    61.9K_0402_1% 10K_0402_1% 0.15UH_MMD06BDER15MEM_27A_20%
    1 2 1 2 1 2 ISEN2P_APU_R1
    1 2 1 2

    EMI@
    AON6314_N_DFN56-8-5
    LG2_APU PRZ9 PRZ10
    4 PCZ10

    0.1U_0402_25V6
    0.1U_0402_25V6
    2.26K_0603_1%

    1 2
    VREF_APU SNB_APU2 2.26K_0603_1%
    0.1U_0402_25V6

    1
    1
    PCZ11

    PCZ14
    PCZ13

    EMI@ PCZ15
    680P_0402_50V7K
    1 2 1 2

    2
    2

    3
    2
    1

    2
    68P_0402_50V8J PCZ12
    270P_0402_50V7K @ @

    APU_CORE_SEN_H_R
    @ PRZ11
    1.1K_0402_1%
    ISEN2P_APU 1 2
    RGND_APU
    1

    1
    34K_0402_1%

    0_0402_5%
    PRZ12

    PCZ16
    PRZ14
    PRZ13

    0_0402_5%

    0.1U_0402_25V6 PRZ15
    1_0402_1%
    1 2 ISEN1N_APU 1 2 ISEN2N_APU_R
    @ @ +3VS
    2

    TSEN_NB_R_1 2

    1 2
    PRZ16 100K_0402_5%
    TSEN_APU_R_1
    SET1_APU_R_1

    PRZ17
    4.42K_0402_1%
    ISEN1P_APU
    1 2

    ISEN1N_APU

    ISEN1P_APU

    ISEN2P_APU

    COMP_APU

    BST2_APU

    UG2_APU
    FB_APU
    +19VB_APU_CORE
    1

    1
    1

    261K_0402_1%
    66.5K_0402_1%
    3.92K_0402_1%

    +1.8VS
    PRZ19

    PRZ20
    PRZ18

    @ PRZ21

    1
    PUZ1
    4.7K_0402_1%

    10
    RT3662AMGQW WQFN 40P

    1
    2

    2
    2

    C SET1_APU C

    BOOT2

    UGATE2
    ISEN1N

    VSEN

    RGND

    PGOOD
    ISEN1P

    ISEN2P

    FB

    COMP

    0.1U_0402_25V6

    EMI@ PCZ19
    @EMI@ PCZ17

    10U_0603_25V6M

    10U_0603_25V6M
    2200P_0402_50V7K
    2
    TSEN_APU_R TSEN_APU

    1
    1

    1
    1 2 41

    PCZ18

    PCZ20
    11 GND
    PRZ23 VRHOT_L LX2_APU @ PRM16
    <22> VR_HOT#

    5
    40
    60.4K_0402_1% Near +APU_VDDCORE MOS TSEN_APU PHASE2

    2
    UG1_APU UG1_APU_R

    2
    12 1 2 PQZ3
    TSEN 39 LG2_APU
    1 2 SET1_APU LGATE2
    1 2VREF_APU_R1 2 13
    SET1 BST1_APU
    0_0603_5% AON6380_DFN5X6-8-5
    PHZ1 38
    IMON_APU 14 BOOT1
    100K_0402_1%_B25/50 4250K PCZ21 PRZ22 IMON UG1_APU PRZ25 PCZ22 4
    0.47U_0402_6.3V6K 3.9_0402_1% 37 2.2_0603_5% 0.22U_0402_25V6K
    TSEN_NB_R TSEN_NB 15 UGATE1 BST1_APU BST1_APU_R
    1 2 Near +APU_VDDSOC MOS LX1_APU 1 2 1 2
    VREF_APU VREF_PINSET 36
    PRZ24 IMON_NB PHASE1
    60.4K_0402_1% 16
    IMON_NB LG1_APU PRZ30 PLZ4

    3
    2
    1
    1

    1
    6.65K_0402_1%

    35
    VCC_APU LGATE1 @
    24K_0402_1%
    33.2K_0402_1%

    17 0_0603_5% LX1_APU
    PRZ26

    PRZ27

    PRZ28

    1 2 1 2 PVCC_APU 1 4
    +5VALW VCC 34 +APU_CORE
    PRZ29 1 2 +5VALW
    18 PVCC ISEN1P_APU_R
    PHZ2 4.7_0402_5% 2 3

    4.7_1206_5%
    PWROK LG1_NB

    5
    100K_0402_1%_B25/50 4250K 1 2 @ PRZ31 33
    LGATE_NB
    SET1_APU_R_2 2

    TSEN_APU_R_2 2

    SVC_APU_R 19
    TSEN_NB_R_2 2

    1
    <9> APU_PWRGD 1 2 PQZ4
    <9> APU_SVC SVC LX1_NB 0.15UH_MMD06BDER15MEM_27A_20%
    32 1 2

    EMI@
    PCZ23

    PRZ32
    PHASE_NB
    2ISEN1P_APU_R1 1
    1

    2.2U_0402_16V6K @ PCZ26 0_0402_5% 20 AON6314_N_DFN56-8-5 1 2 1 2


    UG1_NB

    ISENN_NB

    ISENP_NB
    SVD

    COMP_NB

    BOOT_NB
    SVD_APU_R
    31

    TSEN_NB
    UGATE_NB PCZ24
    1 2 LG1_APU 4
    @ PRZ33 2.2U_0603_10V6K PRZ34 PRZ35 PCZ25

    VDDIO

    FB_NB
    SNB_APU1

    1 2
    4.7K_0402_1% 2.26K_0603_1% 2.26K_0603_1% 0.1U_0402_25V6 +APU_VDDCORE

    SVT
    @ PRZ36

    VIN

    EN
    10P_0402_50V8J

    EMI@ PCZ27
    680P_0402_50V7K
    2

    1 2 TDC 35A(1H1L)
    0_0402_5%

    0_0402_5%

    <9> APU_SVD
    0_0402_5%
    1

    APU_SVD and APU_SVC RC filter put CPU side. Peak current 45A

    21

    22

    23

    24

    25

    26

    27

    28

    29

    30

    3
    2
    1

    2
    PRZ37

    @ PCZ28
    PRZ38

    PRZ39

    0_0402_5%
    APU_SVT RC filter put controller side. +1.8VS OCP current > 55A
    1 2

    ISENA1N_NB

    ISENA1P_NB
    @

    VDDIO_APU

    TSEN_NB

    BST1_NB
    @ @

    COMP_NB
    2

    FB_NB
    10P_0402_50V8J @ PRZ41 FSW=400kHz

    VIN_APU
    @ PRZ40
    1.1K_0402_1%
    <9> APU_SVT 1 2
    SVT_APU_R ISEN1P_APU 1 2 DCR 1.19mohm +/-5%
    @ PRZ43
    @ PCZ29
    IMON_APU_R 0_0402_5% EN_APU 1 2
    VREF_APU 1 2 Near +APU_VDDCORE CHOKE 10P_0402_50V8J PRZ45
    PRZ42 1 2 VR_ON <22,35> 1_0402_1%
    1 2 ISEN1N_APU ISEN1N_APU_R
    11.8K_0402_1% 1 2
    1 2 PRZ44 +19VB 0_0402_5%

    0.1U_0402_25V6
    IMON_APU_R_PH 1 2 IMON_APU
    1 2 1 2 4.7_0603_5%

    1
    PRZ46 PRZ47 PCZ30 PRZ48

    PCZ31
    B 14.7K_0402_1% PHZ3 3.24K_0402_1% 1U_0201_6.3V6M 4.42K_0402_1% B

    0.1U_0402_25V6
    ISEN2P_APU
    1
    2.2_0402_5%

    100K_0402_1%_B25/50 4250K 1 2

    2
    1
    @

    PCZ32
    PRZ49

    IMON_NB_R
    EMI@ PLZ5 +19VB

    2
    1 2 NA_2P
    +19VB_APU_CORE_SOC
    2

    PRZ50 Near +APU_VDDSOC CHOKE 1 2


    15K_0402_1%

    1 2 IMON_NB_R_PH 1 2 1 2 IMON_NB
    +1.8VS

    10U_0603_25V6M

    10U_0603_25V6M
    PRZ51 PRZ52
    @ PRM18

    1
    5

    1
    11.5K_0402_1% PHZ4 9.31K_0402_1%

    PCG2

    PCG3
    UG1_NB 1 2 UG1_NB_R
    100K_0402_1%_B25/50 4250K PQG2
    LL_NB(Rdroop)=2.1m 1 2 1 2

    2
    0_0603_5% AON6380_DFN5X6-8-5
    PRZ53 PRZ54
    @ PCZ33 10K_0402_1% 60.4K_0402_1% PRG2 PCG4 4
    330P_0402_50V7K 2.2_0603_5% 0.22U_0402_25V6K
    1 2 BST1_NB BST1_NB1_R
    1 2
    1 2 1 2 1 2
    APU_CORESOC_SEN_H_R

    PCZ34 PCZ35 PLG1 0.22U_MMD06BDR22MEV1L_21A_20%

    3
    2
    1
    270P_0402_50V7K 68P_0402_50V8J
    LX1_NB
    1 4
    +APU_CORE_SOC
    ISENA1P_NB_R
    RGND_APU

    2 3

    1
    5
    PRG1

    PRG4
    4.7_1206_5%
    PQG1 1.47K_0603_1%
    1 2ISENA1P_NB_R1 1 2 1 2
    +APU_VDDSOC

    EMI@
    @ PCZ36
    TDC 19A(1H1L)

    AON6314_N_DFN56-8-5
    0.1U_0402_25V6 PRG3 PCG5
    LG1_NB

    2
    1 2 4 1.54K_0603_1% 0.1U_0402_25V6
    SNB_APU_NB Peak current 13A

    680P_0402_50V7K
    1
    OCP current > 16A

    PCG1
    3
    2
    1

    2
    1
    1

    FSW=400kHz
    10_0402_5%

    PR1050 is for debug only.


    1

    @
    PRZ56

    EMI@
    PRZ55 @ APU_VDDSOC_SEN needs other resistor at HW side. DCR 1.19mohm +/-5%
    0_0402_5% PRZ57 PRG5
    0_0402_5% 1.43K_0402_1%
    2

    ISENA1P_NB
    2

    1 2
    2

    @ PCZ37
    0.1U_0402_25V6
    1 2
    A A
    ISENA1N_NB
    APU_CORESOC_SEN_H

    <9>
    +APU_CORE_SOC

    0.1U_0402_25V6
    1

    PCG6
    2
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2017/03/11 Deciphered Date 2019/03/11 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR_APU_CORE/APU_CORE_NB
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Wednesday, July 22, 2020 Sheet 36 of 40

    5 4 3 2 1
    A
    B
    C
    D
    2 1

    PCZ81
    180P_0402_50V8J PCZ38 PCZ49 PCZ39
    22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
    PCZ73 2 1 2 1 2 1 2 1
    22U_0603_6.3V6M
    2 1 PCZ65 PCZ59 PCZ50 PCZ40
    0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
    PCZ74 2 1 2 1 2 1 2 1
    22U_0603_6.3V6M

    5
    5

    +APU_CORE

    2 1 PCZ66 PCZ60 PCZ51 PCZ41


    0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
    PCZ75 2 1 2 1 2 1 2 1
    22U_0603_6.3V6M
    2 1 PCZ67 PCZ61 PCZ52 PCZ42

    1
    +
    0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

    2@
    PCZ82 PCZ76 2 1 2 1 2 1 2 1
    330U_D2_2V_Y 22U_0603_6.3V6M
    2 1 PCZ68 PCZ62 PCZ53 PCZ43

    2
    1
    +
    0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
    PCZ83 PCZ77 2 1 2 1 2 1 2 1

    SIV_EC003_DCDC
    SIV_EC002_DCDC
    330U_D2_2V_Y 22U_0603_6.3V6M
    2 1 PCZ69 PCZ63 PCZ54 PCZ44

    2
    1
    +
    0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
    Under CPU PCZ84 PCZ78 2 1 2 1 2 1 2 1

    +APU_CORE
    220U_D7_2VM_R4.5M 22U_0603_6.3V6M
    2 1 PCZ70 PCZ64 PCZ55 PCZ45

    1
    +
    0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

    2 @
    Bot PCZ85 PCZ79 2 1 2 1 2 1 2 1
    470U_D2_2V_Y 22U_0603_6.3V6M
    2 1 PCZ71 PCZ56 PCZ46

    1
    +
    0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M

    2@
    PCZ86 PCZ80 2 1 2 1 2 1
    +APU_CORE

    470U_D2_2V_Y 22U_0603_6.3V6M
    2 1 PCZ72 PCZ57 PCZ47

    1
    +
    0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M

    2@
    PCZ87 2 1 2 1
    330U_D2_2V_Y
    PCZ58 PCZ48
    22U_0603_6.3V6M 22U_0603_6.3V6M

    2
    1
    +
    2 1 2 1
    PCZ88

    4
    4

    220U_D7_2VM_R4.5M

    2
    1
    +
    Under CPU
    PCZ89
    220U_D7_2VM_R4.5M

    2
    1
    +
    PCZ90
    220U_D7_2VM_R4.5M

    Issued Date
    330uF*1

    180pF*1
    22uF*35
    0.22uF*8
    220uF *4

    Security Classification
    2020/05/21
    APU_CORE

    3
    3

    2018/12/18
    2
    1
    +

    330u is common part SGA00009S00


    PCG34 PCG17 PCG8
    330U_D2_2V_Y 22U_0603_6.3V6M 22U_0603_6.3V6M
    2 1 2 1
    2
    1
    +

    2 1 2 1
    PCG35 PCG18 PCG9
    near CPU

    330U_D2_2V_Y PCG33 PCG25 22U_0603_6.3V6M 22U_0603_6.3V6M


    180P_0402_50V8J 0.22U_0402_16V7K 2 1 2 1
    2
    1
    +

    2 1
    PCG36 PCG19 PCG10
    220U_D7_2VM_R4.5M PCG26 22U_0603_6.3V6M 22U_0603_6.3V6M
    0.22U_0402_16V7K 2 1 2 1
    2 1
    PCG20 PCG11

    Compal Secret Data


    +APU_CORE_SOC

    PCG27 22U_0603_6.3V6M 22U_0603_6.3V6M

    Deciphered Date
    0.22U_0402_16V7K 2 1 2 1
    2 1
    PCG21 PCG12
    PCG28 22U_0603_6.3V6M 22U_0603_6.3V6M
    0.22U_0402_16V7K 2 1 2 1
    180pF*1
    22uF*18
    220uF*1
    330uF*2

    2 1
    0.22uF*8

    PCG22 PCG13
    2020/05/21

    PCG29 22U_0603_6.3V6M 22U_0603_6.3V6M


    0.22U_0402_16V7K 2 1 2 1

    2
    2

    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    2 1
    PCG23 PCG14
    2019/12/18

    PCG30 22U_0603_6.3V6M 22U_0603_6.3V6M


    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

    0.22U_0402_16V7K 2 1 2 1
    APU_CORE_SOC

    2 1
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

    PCG24 PCG15
    PCG31 22U_0603_6.3V6M 22U_0603_6.3V6M
    2 1
    330u is common part SGA00009S00

    0.22U_0402_16V7K 2 1
    2 1
    PCG16
    PCG32 22U_0603_6.3V6M
    0.22U_0402_16V7K 2 1

    PCG7
    Title

    Date:
    +APU_CORE_SOC

    22U_0603_6.3V6M
    2 1
    Custom
    Size Document Number
    LA-K211P
    W ednesday, July 22, 2020
    1
    1

    Sheet
    37
    +APU_CORE Cap
    Compal Electronics, Inc.

    of
    40
    Rev
    0.1
    A
    B
    C
    D
    5 4 3 2 1

    Version change list (P.I.R. List) Page 1 of 1 for


    HW
    Item Reason for change PG# Modify List Date Phase

    D
    2 D

    C
    8 C

    10

    11

    12

    13

    14

    B 15 B

    16

    17

    18

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    HW- PIR
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 38 of 39
    5 4 3 2 1
    5 4 3 2 1

    Version change list Page 1 of 1 for


    (P.I.R. List) PWR
    Item Reason for change PG# Modify List Date Phase

    1. PR826, PR841 change to 2k


    2. PR816 change to 9.31K
    3. PR821 change to 11.5K
    Change Choke from 4mm to 3mm. 4. PR825 change to 15k
    D
    1 Tuning APU controller value. 34 5. PR809 change to 2.43K 2019/8/8 EVT D

    6. PR818 change to 13.7K


    7. PR822 change to 9.53K
    8. PR823 change to 16.9k

    2 Net- name correction 32 Chagne from +19VB to +12.6VB 2019/8/8 EVT

    1.PC251 change from 1U_0603_10V6K to 2.2U_0402_10V6M


    2.PC256 change from 10U_0603_6.3V6M to 10U_0402_6.3V6M
    3 Footprint change for down size 31 3.Add PC257 10U_0402_6.3V6M 2019/8/14 EVT
    4.PCM18 change from 22U_0603_6.3V6M to 10U_0402_6.3V6M
    5.Add PCM19 10U_0402_6.3V6M

    1.PC818, PC819 change from 10U_0805_25V6K to 10U_0603_25V6M


    2.PC839, PC840 change from 10U_0805_25V6K to 10U_0603_25V6M
    Footprint change for down size 34 3.PC847, PC848 change from 10U_0805_25V6K to 10U_0603_25V6M 2019/8/14 EVT
    4 4.PC803, PC804 change from 10U_0805_25V6K to 10U_0603_25V6M
    5. PL803 footprint change
    C C

    1.PC615 change from 1U_0402_10V6K to 2.2U_0402_6.3V6M


    5 Material tuning
    33
    2.PL1802 change from 1UH_MLV-FY12N1R0M-C1L_4.9A_20% to EVT
    1.5UH_TMPC0412HP-1R5M-Z02_3A_20% 2019/8/14

    1.PC612 change from 2.2U_0402_6.3V to 4.7U_0402_6.3V


    6 Material tuning 33 2. Add add PR611 1k_0402_5% resistor connect with PC613 2019/8/20 EVT

    7 Material tuning 32 1.PC726 change from 4.7U_0402_6.3V to 2.2U_0402_6.3V 2019/8/29 EVT

    1. PR818 change from 13.7K to 8.25K


    8 Material tuning_NB_CORE OCP from 24A to 32A 2. PR822 change from 9.53K to 11.8K
    34 3. PR823 change from 16.9K to 14.3K 2019/8/29 EVT
    4. PR831 change from 76.8K to 56.2K

    9 RF request 1.Mount PR855 & PC849


    36 2. Change PU801 from RT3663BH oto RT3663BM 2019/9/03 EVT
    B B

    1 EMI request 27 PCD1 from 1000P_0402_50V7K to 2200P_0402_50V7K 2019/10/01 SIV

    35 1.Add PC9117 220U_D7


    2 CPU output cap 2. PC9097, PC9098 change from 330u to 470u 2019/10/01 SIV

    3 CPU output cap 35 Add PC9118, PC9095 to un-mount 2019/10/04 SIV

    1. PR806 change from 53.6K to 63.4K


    2. PC807 change from 330pF to 470pF
    4 CPU controller tuning 34 3. PR806 change from 52.6K to 59K 2019/10/08 SIV
    4. PC830 change from 330pF to 390pF

    5 Change material 34 PQ801 from AON6962 to AON6994 2019/10/08


    SIV

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2020/02/25 Deciphered Date 2021/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR- PIR
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K211P
    Date: Wednesday, July 22, 2020 Sheet 39 of 39
    5 4 3 2 1

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