High-Frequency-Fed Unity Power-Factor AC-DC Power Converter With One Switching Per Cycle

This article has been accepted for publication in a future issue of this journal, but has not been
fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2014.2330631, IEEE Transactions on Power Electronics
High-Frequency-Fed Unity Power-Factor AC-DC

Power Converter with One Switching Per Cycle
Chi-Kwan Lee Senior, Member, IEEE, Sitthisak Kiratipongvoot,
and Siew-Chong Tan, Senior Member, IEEE
 transfer capability of a poor PF system are relatively low

Abstract—This paper presents a power converter and its because of the high conduction loss in the power converters
control circuit for high-frequency-fed AC to DC conversion. and transmission wires. Additionally, the distorted current has
Based on the resonant technique, the input current is shaped to a rich high-order harmonic content which may cause the
be sinusoidal and is forced to follow the high-frequency
sinusoidal input voltage so as to achieve unity power factor. With
emission of electromagnetic interference (EMI) that affects the
the proper selection of the characteristic impedance of the operation of neighbor electronic equipment.
resonant tank, the converter is able to perform the function of a
buck, boost or buck-boost converter. The initial condition of the
resonant tank is used to control the output voltage gain of the
converter. Since all the switches are operated at the fundamental
frequency of the input AC source, the switching loss of the
converter is small. A control scheme is also proposed for the
converter. A proof-of-concept prototype operating at 400 kHz is (a) (b)
constructed and its performance is experimentally measured. Figure 1. (a) A diode rectifier with a capacitor connected at the DC output
Results show that the proposed converter operates as side. (b) Input voltage and current waveforms.
theoretically anticipated.
A power electronic converter such as a boost converter can
Index Terms— AC to DC conversion, High frequency rectifier, be used to shape the input AC current drawn by the rectifier to
Power factor correction, resonant technique, Wireless power be sinusoidal and in phase with the AC voltage [11]. Figure
transfer 2(a) shows a classical boost converter connected after a diode
bridge rectifier to form a power factor correction (PFC)
I. INTRODUCTION circuit. The output DC voltage is sensed and fed to an error
E merging technologies such as wireless power transfer

(WPT) often adopt a high operating frequency in the
range from a few hundred of kHz to over 10 MHz [1-4].
amplifier. The difference between the actual and reference
voltage is derived and applied to a compensator circuit such as
a proportional-integral (PI) compensator. The output of the
Recently, much research effort has been devoted to improving compensator is multiplied with the signal proportional to the
the performance of WPT systems in terms of transfer distance AC voltage waveform vS to produce the reference current
and system's energy efficiency [5-9]. There is a lack of signal iL,ref. Afterwards, a current-mode controller is used to
research targeting the optimal design of the power converter at generate the on and off signal to the switch shaping the current
the receiver side. Traditionally, the simplest approach is to use waveform of the inductor. Therefore, the average waveshape
a diode rectifier circuit with an output storage capacitor, as of the AC current is forced to follow the waveform of the AC
shown in Figure 1(a) [10]. However, this capacitor is charged voltage. Figure 2(b) depicts the input AC current waveform of
to a value close to the peak of the AC input voltage (see the converter. It can be observed that the switching frequency
Figure 1(b)). As a result, pulsating input current of large of the PFC converter must be several times higher than the
magnitude occurs near the peak of the AC input voltage. frequency of the AC system. Using a 400 kHz AC
Discontinuous current implies that wireless power does not transmission system as an example, applying this current-
flow continuously from the primary side of the WPT system to shaping technology implies that the power switch has to
the output of the system. Such diode rectifiers draw highly operate in the tens of MHz. As a result, the switching loss
distorted current from the ac power source and result in a poor becomes significant and the efficiency of the converter sharply
input power factor (PF). The energy efficiency and power reduces.
Furthermore, MHz switching converter is also exposed to a
number of problems arising from the passive and active
This paragraph of the first footnote will contain the date on which you components. For instance, the loss associated with the
submitted your paper for review. This work was supported by the Hong Kong
Innovation and Technology Fund under Project ITS/286/12.
charging and discharging of the parasitic capacitance of power
C.K. Lee, S. Kiratipongvoot and S. C. Tan are with the Department of MOSFETs becomes significant [12-13]. The high-frequency
Electrical and Electronic Engineering, The University of Hong Kong, Hong behavior of the devices is very different from that of the low-
Kong (e-mail: cklee@eee.hku.hk; ksitthis@eee.hku.hk; sctan@eee.hku.hk).
frequency behavior [14-15]. In terms of using passive
This work is licensed under a Creative Commons Attribution 3.0 License. For more information, see http://creativecommons.org/licenses/by/3.0/.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
components in design, it is important to enhance their principles are explained [21]. The advantageous features of
temperature stability and to minimize the unwanted stray and this converter include near-unity input power factor and only
parasitic elements [15]. For the design of printed circuit board, one switching action per cycle for all the power switches.
it is crucial to eliminate undesired coupling between
A. LC Series Resonant Circuit
neighboring components and the rest of the circuit [16].
Without addressing these issues, the converter cannot be The power factor conditioning property is performed using
operated at a high frequency and achieved a high efficiency the LC series resonant circuit at the input stage. The operation
[17]. In [18-19], device-level packaging and circuit of the positive half cycle is used to describe how the LC
interconnection technologies are proposed to substantially resonant circuit can perform PF control in the high-frequency
reduce the structural parasitics and to improve the thermal ac-dc power converter. A simplified circuit diagram is shown
management. However, the thermal performance and EMI are in Figure 4(a).
still big challenges which are difficult to solve individually as Assume that the source frequency is the same as the
they are closely related to the circuit layout and packaging resonant frequency of the LC circuit ω = ωr =1/[2π(LrCr)1/2]
[20]. and the initial current of the resonant inductor is zero. There
The paper is organized as follows. In Section II, the concept of are two parameters that will affect the amplitude and
using inductor-capacitor (LC) series resonant circuit to waveform of the inductor current. The first parameter is the
perform PF correction will be introduced. The operating equivalent impedance of the LC circuit which is designed by
principle of the proposed high-frequency-fed ac-dc power the resonant inductor and capacitor such that ZLC=(Lr/Cr)1/2,
converter will be explicitly described using the corresponding and the second parameter is the initial voltage of the resonant
timing diagrams and equivalent circuit diagrams. Then, the capacitor.
voltage conversion ratio and efficiency of the converter will be
analytically investigated and presented in Section III.
Afterwards, the construction of a proof-of-concept prototype
and its experimental measurement results will be discussed.
Section IV gives the conclusions of the paper.
(a) (b) (c)

Figure 4. (a) The LC series resonant circuit diagram, and the input voltage,
input current and resonant capacitor voltage waveforms: (b) with different
equivalent impedance (ZLC); ZLC1 < ZLC2 < ZLC3, and (c) with different initial
voltage of resonant capacitor VCr,init1 < (VCr,init2=0) < VCr,init3.
Figure 4(b) shows the current and voltage waveforms of the

(a) LC resonant circuit with different equivalent impedances in
the positive half cycle of the input voltage. The initial voltage
of the resonant capacitor and the current of the resonant
inductor are zero (VCr,init = 0 and ILr,init = 0). It can be
observed that the source current is affected by the equivalent
impedance of the LC circuit while the voltage waveform of
the resonant capacitor remains the same. The total energy
(b)
Figure 2. (a) A power factor correction circuit. (b) Input voltage and current stored in the resonant capacitor over the positive half cycle is
waveforms. proportional to the size of the capacitance.
Figure 4(c) shows the positive half cycle of the input
II. TOPOLOGY AND OPERATING PRINCIPLE voltage, the current of the resonant inductor, and the voltage
of the resonant capacitor of the same circuit but with different
initial conditions. It can be seen that the initial voltage value
of the resonant capacitor can affect the magnitude of the
resonant current of the inductor, of which the lower the initial
resonant capacitor voltage, the higher the resonant inductor
current becomes, and the lower the initial resonant capacitor
voltage, the higher the capacitor voltage becomes at the end of
Figure 3. The proposed high-frequency-fed ac-dc power converter. the half cycle.
In this section, a high-frequency-fed ac-dc power converter B. Proposed Topology
is presented as given in Figure 3 and its operating and control The proposed two-stage circuit topology is shown in Figure
3. The first stage (PFC stage) consists of two switches, four Mode 1 (0 < t < t1): Prior to turning the switches S1 and S4
diodes, two resonant inductors, and two resonant capacitors. on, the capacitor Cr1 and Cr2 are assumed to be charged to
The second stage (regulation stage) consists of two switches, VCr,min and VCr,max, respectively. The positive half-cycle begins
three diodes, one inductor, and one capacitor. In the PFC at t=0. In the PFC stage, switch S1 is turned on and switch S2 is
stage, the capacitor Cr1 and Cr2 are alternately charged by the turned off. Diodes D1 and D4 are in the conducting state but
input AC voltage source through the alternate switching diodes D2 and D3 are not conducting (see in Figure 5(b)). Lr1
actions of power switches S1 and S2. Cr1 is charged in the and Cr1 are connected in series forming a series resonant
positive half cycle and Cr2 is charged in the negative half circuit. The first half of the resonance takes place and the
cycle. In the regulation stage, the capacitors Cr1 and Cr2, which inductor current starts from an initial value (zero), follows the
first half of a sinusoidal waveform and then decreases to zero
have been charged by the first-stage converter, is commutated
as D1 and D4 block the reverse current flow. Meanwhile, the
alternately as energy sources for the second-stage converter.
voltage of capacitor Cr1 is charged from its initial value VCr,min
Note that the second stage can be implemented by several
to a certain level at t = t1.
types of power converters. In this paper, the buck-boost In the regulation stage, switch S4 is turned on and diode D6
converter was selected for illustrating the proposed idea. The is in its conducting state. Switch S3 is turned off and diodes D5
proposed topology can achieve high power factor by using the and D7 are reverse biased. The inductor L is sufficiently large
property of the series resonant circuit as discussed in Section such that the current iL can be assumed to be a constant
II-A. magnitude. Capacitor Cr2 and inductor L form a closed circuit.
C. Timing Diagram and Operating Modes Cr2 is discharged in one direction due to the polarity of diode
D6 until the voltage of capacitor Cr2 is equal to the minimum
The timing diagrams of the proposed high-frequency-fed ac- voltage of capacitor Cr2 (VCr,min). The minimum voltage of
dc power converter are shown in Figure 5(a). It can be seen capacitor Cr2 is either a positive voltage (VCr,min > 0), zero
that there are four operating modes as shown in Figure 5(b) to voltage (VCr,min = 0) or negative voltage (VCr,min < 0) depending
Figure 5(e). In the PFC stage, switches S1 and S2 are used to on the output power. Energy is transferred from the PFC stage
select the resonant tanks Lr1-Cr1 and Lr2-Cr2 for the positive to the regulation stage and is stored in the inductor L. In this
and negative half-cycles, respectively. In the regulation stage, time period, the output capacitor CO delivers energy to the
S4 and S3 are the switches for controlling the buck-boost output load resistor RL.
converter for the positive and negative half-cycles,
respectively. Here, it is assumed that Cr1 = Cr2 and Lr1 = Lr2. S1 Lr1 S3 D5 D7
+
ILr1 IO
VO
_
D1 D2 VCr1 Cr1 L CO RL
+ _
Vin +
IDis2
D3 D4 VCr2 Cr2
_
S2 Lr2 S4 D6
(b)
S1 Lr1 S3 D5 D7
+
ILr1 IO
L IL VO
_
D1 D2 VCr1 Cr1 RL
+ CO _
Vin +
D3 D4 VCr2 Cr2
_
S2 Lr2 S4 D6
(c)
S1 Lr1 S3 D5 D7
+
IO
VO
_
+ IDis2 _
Vin +
D3 D4 ILr2 VCr2 Cr2
_
S2 Lr2 S4 D6
(d)
S1 Lr1 S3 D5 D7
+
IL IO
VO
_
+ _
Vin +
D3 D4 ILr2 VCr2 Cr2
_
S2 Lr2 S4 D6
(e)
(a)
Figure 5. (a) Timing diagrams of the converter. Equivalent circuit diagrams in each operating mode: (b) Mode 1, (c) Mode 2, (d) Mode 3 and (e) Mode 4.
(b)
(c)
(a)
Figure 6. (a) Overall control block diagram, (b) control circuit of the PFC stage, and (c) control circuit of the regulation stage.
Mode 2 (t1 < t ≤ t2): In the PFC stage, the functions of the D. Control Methodology
switches (S1 and S2) and diodes (D1, D2, D3 and D4) are the Figure 6 shows the control block diagram of the proposed
same as that in Mode 1. Thus, the capacitor Cr1 is kept high-frequency-fed ac-dc power converter. In the PFC stage,
charging by the power source to the level VCr,max at t = t2, at the AC source voltage Vin is sensed and fed to a phase detector
which the positive cycle ends. Now, ILr1 becomes zero and the circuit as shown in Figure 6(b). The outputs of the phase
switch S1 is commutated off naturally. The diodes D1 and D4 detector circuit are connected to the driver circuit to control
become non conducting. In the regulation stage, S3 and D5 the on/off time of switches S1 and S2 following the AC source
remain in the off state. S4 is turned off at t = t1 and D6 is frequency. The signals Crt_S1 and Crt_S2 are the control
reverse biased when the voltage of Cr2 is equal to VCr,min. Now, signals of switches S1 and S2, respectively.
capacitor Cr2 is not connected to the PFC or the regulation The outputs of the phase detector are also applied to the
stage. The current of inductor L cannot be changed pulse-width-modulation (PWM) generator to derive the
instantaneously, resulting in the forward-biased conduction of control signals Crt_S3 and Crt_S4 for switches S3 and S4,
diode D7. Therefore, the energy stored in inductor L is respectively. The instantaneous output voltage VO is sensed
delivered to the output capacitor CO and the load resistor RL. and subtracted from the reference output voltage VRef, of which
Mode 3 (t2 < t ≤ t3): In the negative half-cycle of vin , the the error is applied to a compensator to generate the threshold
negative part of the waveforms are similar to that of the voltage VCr,min for the resonant capacitors Cr1 and Cr2. Figure
positive half-cycle. In the PFC stage, switch S2 is turned on 6(c) shows the control circuit of the regulation stage where the
and switch S1 is turned off. Diodes D2 and D3 are in the instantaneous voltage of the resonant capacitors VCr1 and VCr2
conducting state while diodes D2 and D3 are reverse biased are being sensed and compared with VCr,min to generate the
(see in Figure 5(d)). Resonant tank Lr2-Cr2 is connected in pulse width of the switches S3 and S4. It is important to note
series with the input source Vin. The input current iin is shaped that the proposed control circuit can be realized using simple
as a sinusoidal waveform. The voltage on capacitor Cr2 is operational amplifiers and digital logic gates. Consequently,
charged from the initial value VCr,min to VCr,max. Energy is they can be easily fabricated as an integrated circuit (IC) for
transferred from the input source Vin to capacitor Cr2. In the mass production.
regulation stage, switch S4 and diode D6 remain in the off
state. Switch S3 is turned on. Diode D5 is in the conducting III. CIRCUIT ANALYSIS
state while D7 is reverse biased. The energy stored in resonant A. Voltage Conversion Ratio
capacitor Cr1 is transferred to inductor L. Cr1 is discharged to L
until the voltage of capacitor Cr1 is equal to VCr,min. Similarly The derivation of the voltage conversion ratio of the
to Mode 1, the load resistor RL is supplied by the output proposed converter is presented in this section. For simplicity,
capacitor CO. all diodes and switches are considered ideal. In the PFC stage,
Mode 4 (t3 < t ≤ tS): In the PFC stage, the switching state of an LC series resonant circuit is connected in series with the
the switches (S1 and S2) and diodes (D1, D2, D3 and D4) are the high-frequency AC source. The instantaneous current and
same as that in Mode 3. In the regulation stage, switch S3 is voltage of the resonant inductor Lr and capacitor Cr in the half-
turned off at t = t3 when the voltage of Cr1 is equal to VCr,min. cycle of the ac source can be described by equations (1) and
Energy stored in inductor L is transferred to output capacitor (2). The detailed derivation of equations (1) and (2) are
CO and load resistor RL through diode D7. Its equivalent circuit presented in Appendix A.
diagram is shown in Figure 5(e). Switch S2 is commutated off
naturally when input source Vin becomes positive at t = tS.
Afterwards, switches S1 and S4 are turned on and the positive
part of the operation is repeated.
 VO

2
RL VCr, 
max  VCr,min .
2
 (8)

 ˆ
Vin 2Z LCVinˆ 2
 0 for t  t

The voltage conversion ratio against the normalized

threshold voltage VCr,min/VO is plotted in Figure 7(a). It can be
iLr s    ; (1)
observed that the output voltage of the converter is dependent
ˆ
 Vin sin( )  2VCr, min  sin(  t   ) on the characteristic impedance ZLC (input impedance) of the
 2 Z LC  
  for t  t  converter and the output load resistance RL. With the proper
 Vˆ   selection of the characteristic impedance of the resonant tank,
  in t sin(  t ) the converter is able to perform the function of a buck and
 2 Z LC
boost conversion. Figure 7(b) shows the relationship of the
 output load variation against the normalized threshold voltage
 VCr, min for t  t
 VCr,min/VO of the converter. It can be observed that the output
 power can be controlled using VCr,min of which VCr,min is the
vCr s    ;
ˆ ˆ initial voltage value of the resonant capacitor controlling the
Vin cos( ) sin(t   )  Vin (t   ) cos(t ) 
 2 2 for t  t  amount of input energy to the converter. As a result, the output
 V 
 Cr, min cos(t   )) voltage can be regulated.
(2)
V 
  arcsin  Cr , min .
 (3)
ˆ
Vîn
VO
 Vin 
Output voltage gain,

In equations (1) and (2), Vîn and ω are respectively the peak
voltage and angular frequency of the AC source. VCr,min is the
minimum voltage or the initial voltage of the resonant
capacitor. ZLC is the characteristic impedance of the LC
resonant circuit. α is the delay angle when the diode becomes
forward-biased (i.e. vin > VCr,min), which can be determined
using equation (3). Thus, the corresponding delay time tα is

equal to α/ω. Substituting t  into equations (1) and (2), the VCr,min VO

current of the resonant inductor and the voltage of the resonant (a)
capacitor at the end of the half cycle of the AC source can be
obtained. The current of the resonant inductor is zero and the
maximum voltage of the resonant capacitor, i.e. Vcr,max is
Vîn
VCr,max  sin(2 )  2(   )  VCr,min cos( ) . (4)
4
Thus, the input energy ECr stored in the resonant capacitor can
be obtained as
E  Cr V 2  V 2 ,
1 (5)
Cr Cr, max Cr, min
2
where Cr is the capacitance of the resonant capacitor.
In the regulation stage, the output energy EO delivered to the
resistive load in the half cycle of the AC source can be
expressed as
(b)
V2 
EO  O  , (6) Figure 7. Plots of a) output voltage gain and b) output load variation versus
RL  normalized threshold voltage VCr,min/VCr. where k= RL/ZLC.
where Vo is the average output voltage of the converter.
Neglecting the power losses associated with all the circuit B. Efficiency of the Converter
elements, the input energy ECr is equal to the output energy The estimation of the individual efficiency of the PFC and
V 2
EO, such that EO  ECr and Cr VCr,2 max  VCr,2 min   O .
1 the regulation stage is presented in this section on the
2 R L assumption that the converter operates ideally with unity
1 power factor. From first principle, the energy consumption of
Substituting   into equation, and solving for VO gives
Lr C r the converter is found by integrating the instantaneous input
power and it can be expressed as
RL VCr,
2
max  VCr, min  ,
2
(7) T 2
VO 
2Z LC Ein   v
0
in (t )  iin (t )dt . (9)
and the voltage conversion ratio of the converter is equal to
Since vin (t )  Vîn sin t  and iin (t )  iLr t  , equation (9) can be delivered to the load over the same half cycle. The size of the
rewritten as resonant capacitor can be determined using equations (5)
  Vˆ sin( )  2VCr,min   and (6). As shown in equation (7), the size of the resonant
Vîn sin(t ) in  sin( (t  t ))  inductor is calculated according to the requirement of the
   . (10)
T 2
  2 Z 
E in  
LC
 dt
output voltage of the converter. The switching devices used
t  ˆ
Vin   in the prototype are CoolMOS transistors, which have a lower
 t sin( (t  t )   ) 
 2 Z LC  switching and conduction losses than traditional power
Substituting equation (4) into equation (5), the energy stored MOSFET in the high-frequency range. Silicon-carbide
in the resonant capacitors can be derived as equation (11). Schottky (Sic) diodes are selected because of their very-low
junction capacitance, resulting in a low reverse recovery
1  Vîn 
2

ECr  Cr  sin( 2 )  2 (   )  VCr,min cos( )   VCr,2 min  .(11) current and power loss. The inductors and capacitors are
2  4   commercial off-the-shelf products. The detailed specifications
 
Thus, the efficiency of the PFC stage and the regulation of the components are summarized in Table 1. Note that the
stage can be obtained from equations (12) and (13), specifications and test conditions of the converter are arbitrary
respectively. The total efficiency of the converter can be selected to examine the operation of the converter. The test of
expressed as the converter is carried out at three different output power
ECr levels at 11 W, 18 W and 30 W. The converter operating
 PFC   100 % ; (12)
waveforms are captured to verify the theoretical circuit
Ein
analysis. The associated input current harmonics and
E
 Reg  O  100% ; (13) efficiency of the converter are measured.
ECr
 Total   PFC   Reg . (14) TABLE 1 COMPONENTS SPECIFICATIONS OF THE CONVERTER
Components Symbols Specifications
Resonant inductors Lr1 and Lr2 Coiltronics, UP3B-330-R
33uH, 3Ω@400kHz
Resonant capacitors Cr1 and Cr2 5nF 500V, ESR=0.15Ω@400kHz
Boost inductor L TDK-SLF12575T-221M1R3-PF,
220uH, 0.3Ω@DC,
Output Capacitor CO 15Ω@400kHx 8
220nF 630V,
Transistors M1, M2, M3 and M4 N-Ch CoolMos, IPD60R950C6,

650V, 4.4A, RDS(ON)=0.95Ω
Diodes D1, D2, D3, D4, D5, SiC Diode, C3D04060A,

D6 and D7 600V, 7A, VF=1.5V
B. Experimental Results and Discussion

Figure 9 shows the captured waveforms of the input
voltage, input current and resonant capacitors' voltages of the
converter at different output power levels. The output power
of the converter is increased from 11 W to 30 W when the
threshold voltage is reduced from 25 V to −50 V. The
converter is connected to a constant resistive load. Therefore,
Figure 8. Schematic of the proposed high-frequency-fed ac-dc power
converter. the output voltage changed from 29 V to 54 V accordingly.
The experimental waveforms are in good agreement with the
theoretical analysis given in Section II. In Figure 9 (a), it can
IV. EXPERIMENTAL RESULTS be observed that the input current is distorted when the output
power of the converter is low. In the other words, the delay
A. Voltage Conversion Ratio angle α is not zero. The diodes in the PFC stage become
A proof-of-concept prototype of the proposed high- reverse biased when the input voltage is lower than the initial
frequency-fed ac-dc power converter is constructed. The voltage of the resonant capacitors. Nevertheless, a zero or
control scheme is implemented using discrete components and negative initial voltage on the resonant capacitors causes the
the circuit is shown in Figure 8. The converter is designed to diodes to conduct at the beginning of each half cycle. As a
convert a 400 kHz AC voltage source into a DC source. The result, the quality of the input current improves substantially
input voltage and the expected output power of the converter as shown in Figure 9(b) and (c). Figure 10 shows the captured
are 50 Vrms and 30 W, respectively. The output load resistance input current waveforms and their harmonic spectra using fast
of the converter is 100 Ω. Given the input AC voltage and the Fourier transform (FFT).
threshold voltage VCr,min, the potential difference across the
resonant capacitor can be calculated following equation (4).
Neglecting the power loss of the circuit elements, the input
energy over half an AC cycle is equal to the output energy
(a) Pout = 11 W (a) Pout = 11 W
(b) Pout = 18 W (b) Pout = 18 W

THD = 14.38%
(1A/Div)
Iin
0.851 Arms @ 400 kHz

0.0439 Arms @ 800 kHz
(250 mA/Div)
0.094 Arms @ 1200 kHz

FFT
0.023 Arms @ 1600 kHz
1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
(c) Pout = 30 W (c) Pout = 30 W
Figure 9. The waveforms of the input voltage, input current, and voltage of the Figure 10. The waveform of the input current and its FFT at different output
resonant capacitors at different output power levels; (a) VCr,min = 25 V, Pout = power levels; (a) VCr,min = 25 V, Pout = 11 W (b) VCr,min = 0 V, Pout = 18 W and
11 W (b) VCr,min = 0 V, Pout = 18 W and (c) VCr,min = −50 V, Pout = 30 W. (c) VCr,min = −50 V, Pout = 30W.
The total harmonic distortion (THD) of the input current at and active components' selection together with the
11 W, 18 W and 30 W output power are found to be 22.66%, optimization of the voltage conversion ratio and efficiency for
19.88 and 14.38%, respectively. Figure 11 shows the captured practical high frequency AC-DC applications are left for
output voltage waveform and its harmonic spectrum using further work.
FFT. Since all the switches are operated in a synchronized
TABLE 2. PERFORMANCE OF THE CONVERTER AT DIFFERENT OUTPUT POWER
manner with the input AC source, the output voltage contains LEVELS.
a double-line frequency ripple. Parameters Symbols Conditions
The AC input voltage and current are recorded by a digital I II III
oscilloscope. Thus, the AC input power of the converter can Output power PO 11.63 W 17.99 W 30.39
be obtained by integrating the product of the instantaneous Output VO 34.11 V 42.41 V 55.31
input voltage and current. The DC output power is measured Output voltage Vrip 0.56V 0.71 V 0.74 V
by a digital multi-meter. Thus, the power factor and overall
efficiency of the converter are calculated. Major key Input power Pin 14.70 W 23.36 W 42.76
performance indices of the converter at different output power Input power PF 0.95 0.94 0.93
levels are summarized in Table 2. It can be observed that the Input current Iin 0.308 A 0.496 A 0.918
power factor of the converter at all the output power levels can Input current THD-Iin 22.66 % 19.88 % 14.38
be maintained above 0.9. The efficiency of the PFC and
Threshold VCr,min 25 V 0V −50V
regulation stages are estimated using equations (9) to (14) as
shown in Table 2. They are all within reasonable range from
80% to 90%. The drop of efficiency in the PFC stage is Efficiency
resulted from the high conduction loss of diodes and AC PFC stage ηPFC 92.68 % 91.05 % 86.64%
resistance of resonant inductors. The efficiency of the Regulation ηReg 85.37 % 84.56 % 82.03%
Overall η 79.13 % 76.99 % 71.08
converter can be further improved by proper selection of
components according to the desired applications. The
detailed studies on the converter design procedure, the passive
The substitution of Lr  Z LC  into equation (A5), where

Z LC  Lr C r and    S  1 ( Lr C r ) , gives the solution of
inductor current I Lr ( s ) as
s 2Vîn sin( ) sVîn 2 cos( )    VCr, min .
I Lr ( s )   
Z LC ( s 2   2 ) 2 Z LC ( s 2   2 ) 2  ( s 2   2 )  Z LC (A6)
On the other hand, the Laplace transform equation of the
capacitor voltage is
I Lr ( s ) VCr,min . (A7)
Figure 11. The waveforms of the output voltage, output voltage ripple and its VCr ( s)  
sCr s
FFT at VCr,min = −50 V, Pout = 30 W
Substituting equation (A6) into equation (A7), it can be
V. CONCLUSION rewritten as
 s 2 sin( )  s 2 cos( )  ˆ
A 400 kHz high-frequency-fed AC-DC PFC converter with VCr ( s)   Vin
 sC r Z LC ( s   )
2 2 2
 . (A8)
one switching action per cycle is demonstrated. With a single
converter topology, the converter is able to perform the    VCr,min
 V
2  Cr,min

function of a buck and boost conversion depending on the  sC r Z LC ( s   ) 
2
s
characteristic impedance of the resonant tank. The voltage
Substitution for C r  1 ( Z LC ) , the solution of the capacitor
conversion ratio of the converter can be further controlled by
the initial voltage of the resonant capacitors. Experimental voltage can be found by equation (A9).
results prove that the converter is able to achieve a high power  s 2 sin( )  s 3 cos( )  ˆ  s  (A9)
VCr ( s)   Vin   s 2   2 VCr,min
factor (PF > 0.9) and a low input current distortion (THD <  (s 2   2 )2   
20%). A control scheme is also proposed for the converter. It We can get the time domain equations of the inductor
can be realized by simple operational amplifiers and digital current and capacitor voltage by taking inversed Laplace
logic gates, and thereby can be easily fabricated as an transform of equations (A6) and (A9), respectively. The
integrated circuit (IC) for mass production. The distinctive solutions are expressed as
features of this converter are favorable for future high-  Vˆ sin( )  2VCr, min  ˆ
frequency AC power transfer system operating in the range iLr (t )   in  sin(  t   )  Vin  t sin(  t ) (A10)
 2 Z LC  2 Z LC
from a few hundred kHz to the MHz range.  
and
APPENDIX Vîn Vˆ
vCr (t )  cos( ) sin(t   )  in (t   ) cos(t )  VCr,min cos(t   )) .
2 2
(A11)
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received the B.Eng. (Hons.) and M.Eng.
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2002, respectively, and the Ph.D. degree
D Integrated Gallium-Nitride-Based Point of Load Module Design", in electronic and information engineering
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[21] C.K.Lee and K. Sitthisak, “Electronic Apparatus and Control Method for
High Frequency AC to DC Conversion”, US patent application, US
From January to October 2011, he was Senior Scientist in
14/160,830, 22 Jan 2014.J. K. Author, “Title of chapter in the book,” in Agency for Science, Technology and Research (A*Star),
Title of His Published Book, xth ed. City of Publisher, Country if not Singapore. He is currently an Associate Professor in
Department of Electrical and Electronic Engineering, The
Chi-Kwan Lee (M’08-SM’14) received University of Hong Kong, Hong Kong. Dr. Tan was a Visiting
the B.Eng. and Ph.D. degrees in Scholar at Grainger Center for Electric Machinery and
electronic engineering from the City Electromechanics, University of Illinois at Urbana-
University of Hong Kong, Kowloon, Champaign, Champaign, from September to October 2009,
Hong Kong, in 1999 and 2004, and an Invited Academic Visitor of Huazhong University of
respectively. Science and Technology, Wuhan, China, in December 2011.
He was a Postdoctoral Research Fellow His research interests are focused in the areas of power
in the Power and Energy Research Centre electronics and control, LED lightings, smart grids, and clean
at the National University of Ireland, energy technologies. Dr. Tan serves extensively as a
Galway, from 2004 to 2005. In 2006, he joined the Centre of reviewer for various IEEE/IET transactions and journals on
Power Electronics in City University of Hong Kong as a power, electronics, circuits, and control engineering. He is a
Research Fellow. From 2008–2011 he was a Lecturer of coauthor of the book Sliding Mode Control of Switching
Electrical Engineering at the Hong Kong Polytechnic Power Converters: Techniques and Implementation (Boca
University. He was a Visiting Academic at Imperial College Raton: CRC, 2011).
London from 2010–2013. Since January 2012, he has been an
Assistant Professor at the Department of Electrical &
Electronic Engineering, The University of Hong Kong. His
current research interests include applications of power
electronics to power systems, advanced inverters for
renewable energy and smart grid applications, reactive power
control for load management in renewable energy systems,
wireless power transfer, energy harvesting, and planar
electromagnetics for high frequency power converters.

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This article has been accepted for publication in a future issue of this journal, but has not been

High-Frequency-Fed Unity Power-Factor AC-DC

 transfer capability of a poor PF system are relatively low

E merging technologies such as wireless power transfer

(a) (b) (c)

Figure 4(b) shows the current and voltage waveforms of the

Output voltage gain,

and the voltage conversion ratio of the converter is equal to

Transistors M1, M2, M3 and M4 N-Ch CoolMos, IPD60R950C6,

Diodes D1, D2, D3, D4, D5, SiC Diode, C3D04060A,

B. Experimental Results and Discussion

(a) Pout = 11 W (a) Pout = 11 W

(b) Pout = 18 W (b) Pout = 18 W

0.851 Arms @ 400 kHz

0.094 Arms @ 1200 kHz

0.023 Arms @ 1600 kHz

The substitution of Lr  Z LC  into equation (A5), where

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