Digital Electronic4

INSTITUTE OF TECHNOLOGY DEPARTMENT OF ELECTRICAL
OF CAMBODIA AND ENERGY ENGINEERING
DIGITAL ELECTRONIC
GROUP I3:C (2)
Lab4: “Comparators circuit using Logic Gates”
SUPERVISED BY: Mrs. SENG DARARAKSMEY
STUDENT NAME: SENG SOMAKARIN
STUDENT ID: e20200450
Academic Year 2022-2023

Lab 4: Comparators circuit using Logic Gates
1.Introduction
Digital comparators circuit is combinational logic circuits that could be used to verify whether
the values of 2 input (1-bit or multiple-bit) is greater than, less than, or equal to each other or not.
Equality comparator and Magnitude comparator are the two basic types of comparators which
commonly used.
The application of comparator is:
• Comparators are used in central processing units (CPUs) and microcontrollers (MCUs).
• They are also used in control applications in which the binary number representing physical
variables such as temperature, position, etc. are compared with a reference value.
• Comparators are also used as process controllers and for servo motor control.
• Used in password verification and biometric application.
2. Objective
The objective of this laboratory is to provide the student with a basic understanding of the
functionality of comparator circuit by the following task:
• To build and simulate the Equality comparator circuit by logic gate

• To build and simulate the Magnitude comparator circuit by logic gate
• To build several types of comparator circuits such as one-bit, two bits, or 4 bits circuits.
3. Simulation
3.1. Equality Comparator
The equality comparator is the simplest form of a comparator circuit for determining whether
two numbers are equal.
Practice
a. Verify with a 2-bit Equality comparator circuit by implementing and simulating on Quartus
Prime software for input as in Figure 2 below.
Figure 1: The 2-bits equality comparator circuit with waveform of 2-bits input
2
Figure 2: The 2-bit comparator connection circuit.
Figure 3: The simulation 2-bit comparator on Quartus prime.
• Results and discussion

An equality comparator is a hardware electronic circuit made from logic gates that takes two
binary numbers as input determines whether these are equal or not.
3
3.2. Magnitude Comparator
The magnitude comparator is a combinational circuit that compares two digital or binary
numbers to find out whether one binary number is equal, less than, or greater than the other binary
number. We logically design a circuit for which we will have two inputs, one for A and the other for B,
and have three output terminals, one for A>B condition, one for A=B condition, and one for A<B
condition.
Figure 4: The magnitude comparators which have two inputs and three output for each of three
comparison results.
1-bit magnitude comparator

A comparator used to compare two bits is called a single-bit comparator. It consists of two inputs,
each for two single-bit numbers, and three outputs to generate less than, equal to, and greater than
between two binary numbers.
We got the following relationship between output and input through the following conditions:
For A > B: G = AB ′
For A < B: L = A′ B
For A = B: E = A′ B ′ + AB
Practice
b. Use the truth table to verify the operation of the 1-bit magnitude comparator.
4
INPUT OUTPUT
A B A<B A=B A>B
0 0 0 0 0
0 1 0 1 1
1 0 1 1 0
1 1 0 0 0
c. Implement and simulate a 1-bit magnitude comparator in the Quartus Prime.
Figure 5: Implementing 1-bit magnitude comparator.
Figure 6: Simulating 1-bit magnitude comparator.
5
This is useful if we want to compare two variables and want to produce an output when any
of the above three conditions are achieved.
2-bit magnitude comparator

It is used to compare two binary numbers with each of the two bits. The input data are represented by
A1A0 and B1B0 and three outputs are represented as G (for A greater than B), L (for A less than B), E
(for A equal to B).
We get the following logic formula:

G = A1B1′ + A0B1′ B0′ + A1A0B0′
L = A1′ B1 + A0′ B1B0 + A1′ A0′ B0
E = (A0 Xnor B0)(A1 Xnor B1)
Practice
d. Use the truth table to verify the operation of the 2-bit magnitude comparator.
INPUT OUTPUT
A1 A0 B1 B0 A<B A=B A>B
0 0 0 0 0 1 0
0 0 0 1 1 0 0
0 0 1 0 1 0 0
0 0 1 1 1 0 0
0 1 0 0 0 0 1
0 1 0 1 0 1 0
0 1 1 0 1 0 0
0 1 1 1 1 0 0
1 0 0 0 0 0 1
1 0 0 1 0 0 1
1 0 1 0 0 1 0
1 0 1 1 1 0 0
1 1 0 0 0 0 1
1 1 0 1 0 0 1
1 1 1 0 0 0 1
1 1 1 1 0 1 0
e. Implement and simulate a 2-bit magnitude comparator in the Quartus Prime.
6
Figure 7: Implementing a 2-bit magnitude comparator.
Figure 8: The 2-bit magnitude comparator output waveform.

A 2-bit magnitude comparator is a digital circuit that compares two binary numbers, each of
two bits, and outputs three signals.
4-bit magnitude comparator with cascading inputs

The following figure shows the 4-bit magnitude comparator with cascading input. This circuit can be
cascaded together for building a comparator with more than 4-bit data.
7
Practice:
f. Write the logic for each condition (A>B, A<B, A=B) from the figure above.
For A>B:
G = 𝐴3𝐵3 ′ + (𝐴3 ⊕ 𝐵3) (𝐴2 ⊕ 𝐵2 ′) + (𝐴3 ⊕ 𝐵3) (𝐴2 ⊕ 𝐵2) (𝐴1𝐵1 ′)
+(𝐴3 ⊕ 𝐵3) (𝐴2𝐵2) (𝐴1 ⊕ 𝐵1) (𝐴0𝐵0 ′)
For A=B:
E = (𝐴3 ⊕ 𝐵3) (𝐴2 ⊕ 𝐵2) (𝐴1 ⊕ 𝐵1) (𝐴0 ⊕ 𝐵0)
For A<B:
L=𝐴3 ′ 𝐵3 + (𝐴3 ⊕ 𝐵3) (𝐴2 ′ 𝐵2) + (𝐴3 ⊕ 𝐵3) (𝐴2 ⊕ 𝐵2) (𝐴1 ′ 𝐵1)
+(𝐴3 ⊕ 𝐵3) (𝐴2 ⊕ 𝐵2) (𝐴1 ⊕ 𝐵1) (𝐴0 ′ 𝐵0)
g. Build the 4-bit magnitude comparator and simulate it by Quartus Prime with inputs as in Figure
below.
8
Figure 9: The 4-bit magnitude comparator circuit.
Figure 10: Simulating the 4-bit magnitude comparator.

The 4-bit magnitude comparator was able to successfully compare two 4-bit binary numbers
and output the correct result. The three output signals (A > B, A = B, and A < B) were all correct for
all of the test cases that were applied. The 4-bit magnitude comparator was implemented using a
combination of logic gates, including AND gates, OR gates, and NOT gates. The circuit was designed
to be as efficient as possible, and it was able to complete the comparison operation in a relatively short
amount of time.
4. Conclusion
In conclusion, comparators are electronic circuits that compare two input voltages and provide
an output based on the comparison. These circuits can be implemented using logic gates such as AND,
OR, and NOT gates

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INSTITUTE OF TECHNOLOGY DEPARTMENT OF ELECTRICAL

OF CAMBODIA AND ENERGY ENGINEERING

GROUP I3:C (2)

Lab4: “Comparators circuit using Logic Gates”

SUPERVISED BY: Mrs. SENG DARARAKSMEY

STUDENT NAME: SENG SOMAKARIN

STUDENT ID: e20200450

Academic Year 2022-2023

• To build and simulate the Equality comparator circuit by logic gate

Figure 3: The simulation 2-bit comparator on Quartus prime.

• Results and discussion

1-bit magnitude comparator

c. Implement and simulate a 1-bit magnitude comparator in the Quartus Prime.

Figure 5: Implementing 1-bit magnitude comparator.

Figure 6: Simulating 1-bit magnitude comparator.

2-bit magnitude comparator

We get the following logic formula:

e. Implement and simulate a 2-bit magnitude comparator in the Quartus Prime.

Figure 8: The 2-bit magnitude comparator output waveform.

• Results and discussion

4-bit magnitude comparator with cascading inputs

G = 𝐴3𝐵3 ′ + (𝐴3 ⊕ 𝐵3) (𝐴2 ⊕ 𝐵2 ′) + (𝐴3 ⊕ 𝐵3) (𝐴2 ⊕ 𝐵2) (𝐴1𝐵1 ′)

+(𝐴3 ⊕ 𝐵3) (𝐴2𝐵2) (𝐴1 ⊕ 𝐵1) (𝐴0𝐵0 ′)

E = (𝐴3 ⊕ 𝐵3) (𝐴2 ⊕ 𝐵2) (𝐴1 ⊕ 𝐵1) (𝐴0 ⊕ 𝐵0)

+(𝐴3 ⊕ 𝐵3) (𝐴2 ⊕ 𝐵2) (𝐴1 ⊕ 𝐵1) (𝐴0 ′ 𝐵0)

Figure 10: Simulating the 4-bit magnitude comparator.

• Results and discussion

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