Adum 7510

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5-Channel, 1 kV

Unidirectional Digital Isolator


Data Sheet ADuM7510
FEATURES FUNCTIONAL BLOCK DIAGRAM
RoHS-compliant, 16-lead, QSOP package VDD1 1 16 VDD2
ADuM7510
Low power operation: 5 V
GND1 2 15 GND2
1.2 mA per channel maximum @ 0 Mbps to 2 Mbps VIA 3 ENCODE DECODE 14 VOA
2.8 mA per channel maximum @ 10 Mbps
VIB 4 ENCODE DECODE 13 VOB
High temperature operation: 105°C
VIC 5 ENCODE DECODE 12 VOC
Up to 10 Mbps data rate (NRZ)
Low default output state VID 6 ENCODE DECODE 11 VOD

1000 V rms isolation rating VIE 7 ENCODE DECODE 10 VOE

07632-001
Safety and regulatory approvals (pending) GND1 8 9 GND2

UL recognition Figure 1.
1000 V rms for 1 minute per UL 1577

APPLICATIONS
General-purpose, unidirectional, multichannel isolation

GENERAL DESCRIPTION
The ADuM75101 is a unidirectional 5-channel isolator based on interfaces and stable performance characteristics. The need for
the Analog Devices, Inc., iCoupler® technology. In contrast to external drivers and other discrete components is eliminated with
the ADuM1510, the ADuM7510 has a lower isolation rating, these iCoupler products. Furthermore, iCoupler devices run at
offering a reduced cost option for applications that can accept one-tenth to one-sixth the power consumption of optocouplers
a 1 kV ac isolation. Combining high speed CMOS and monolithic at comparable signal data rates.
air core transformer technology, these isolation components The ADuM7510 isolator provides five independent isolation
provide outstanding performance characteristics superior to channels supporting data rates up to 10 Mbps. Each side operates
alternatives such as optocoupler devices. with the supply voltage of 4.5 V to 5.5 V. Unlike other optocoupler
By avoiding the use of LEDs and photodiodes, iCoupler devices alternatives, the ADuM7510 isolator has a patented refresh
eliminate the design difficulties commonly associated with opto- feature that ensures dc correctness in the absence of input logic
couplers. The typical optocoupler concerns regarding uncertain transitions and during power-up/power-down conditions.
current transfer ratios, nonlinear transfer functions, and temperature
and lifetime effects are eliminated with the simple iCoupler digital

1
Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329.

Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com
Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2010–2012 Analog Devices, Inc. All rights reserved.
ADuM7510 Data Sheet

TABLE OF CONTENTS
Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................5

Applications ....................................................................................... 1 ESD Caution...................................................................................5

Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions..............................6

General Description ......................................................................... 1 Typical Performance Characteristics ..............................................7

Revision History ............................................................................... 2 Applications Information .................................................................8

Specifications..................................................................................... 3 Printed Circuit Board (PCB) Layout ..........................................8

Electrical Characteristics—5 V Operation................................ 3 Propagation Delay-Related Parameters......................................8

Package Characteristics ............................................................... 4 DC Correctness and Magnetic Field Immunity..............................8

Insulation and Safety-Related Specifications ............................ 4 Power Consumption .....................................................................9

Recommended Operating Conditions ...................................... 4 Power-Up/Power-Down Considerations ...................................9

Regulatory Information ............................................................... 4 Outline Dimensions ....................................................................... 10


Ordering Guide .......................................................................... 10

REVISION HISTORY
2/12—Rev. A to Rev. B
Created Hyperlink for Safety and Regulatory Approvals
Entry in Features Section................................................................. 1
Change to Printed Circuit Board (PCB) Layout Section ............ 8

1/10—Revision A: Initial Version

Rev. B | Page 2 of 12
Data Sheet ADuM7510

SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
All voltages are relative to their respective ground. 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V; all minimum/maximum specifications apply
over the entire recommended operation range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V.

Table 1.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Input Quiescent Supply Current per Channel IDDI (Q) 0.4 0.7 mA
Output Quiescent Supply Current per Channel IDDO (Q) 0.3 0.5 mA
Total Supply Current, Five Channels 1
VDD1 Supply Current, Quiescent IDD1 (Q) 2.0 3.5 mA VIA = VIB = VIC = VID = VIE = 0 V
VDD2 Supply Current, Quiescent IDD2 (Q) 1.5 2.5 mA VIA = VIB = VIC = VID = VIE = 0 V
VDD1 Supply Current, 10 Mbps Data Rate IDD1 (10) 7.7 10 mA 5 MHz logic signal frequency
VDD2 Supply Current, 10 Mbps Data Rate IDD2 (10) 3.3 4.0 mA 5 MHz logic signal frequency
Input Currents IIA, IIB, IIC, IID, IIE −10 +1 +10 µA VIA, VIB, VIC, VID, VIE ≥ 0 V
Logic High Input Threshold VIH 2.0 V
Logic Low Input Threshold VIL 0.8 V
Logic High Output Voltages VOAH, VOBH, VDD2 − 0.4 4.8 V IOx = −4 mA, VIx = VIH
VOCH, VODH,
VOEH
Logic Low Output Voltages VOAL, VOBL, 0.2 0.4 V IOx = +4 mA, VIx = VIL
VOCL, VODL, VOEL
SWITCHING SPECIFICATIONS
Minimum Pulse Width 2 PW 100 ns CL = 15 pF, CMOS signal levels
Maximum Data Rate 3 10 Mbps CL = 15 pF, CMOS signal levels
Propagation Delay 4 tPHL, tPLH 20 27 40 ns CL = 15 pF, CMOS signal levels
Pulse-Width Distortion, |tPLH − tPHL|4 PWD 5 ns CL = 15 pF, CMOS signal levels
Change vs. Temperature 5 ps/°C CL = 15 pF, CMOS signal levels
Propagation Delay Skew 5 tPSK 30 ns CL = 15 pF, CMOS signal levels
Channel-to-Channel Matching 6 tPSKCD 5 ns CL = 15 pF, CMOS signal levels
Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns CL = 15 pF, CMOS signal levels
Common-Mode Transient Immunity at |CMH| 10 15 kV/µs VIx = VDD1/VDD2, VCM = 1000 V,
Logic High Output 7 transient magnitude = 800 V
Common-Mode Transient Immunity at |CML| 10 15 kV/µs VIx = 0 V, VCM = 1000 V,
Logic Low Output7 transient magnitude = 800 V
Refresh Rate fr 1.2 Mbps
Input Dynamic Supply Current per Channel 8 IDDI (D) 0.14 mA/Mbps
Output Dynamic Supply Current per Channel8 IDDO (D) 0.045 mA/Mbps
1
Supply current values are for all five channels combined, running at identical data rates. Output supply current values are specified with no output load present. The
supply current associated with an individual channel, operating at a given data rate, can be calculated as described in the Power Consumption section. See Figure 4
through Figure 6 for information on the per-channel supply current as a function of the data rate for unloaded and loaded conditions. See Figure 7 and Figure 8 for
total IDD1 and IDD2 supply currents as a function of the data rate for the ADuM7510.
2
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. Operation below the minimum pulse width is not
recommended.
3
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4
tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5
tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6
Channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels within the same component.
7
CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 V × VDD2. CML is the maximum common-mode voltage slew
rate that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The
transient magnitude is the range over which the common mode is slewed.
8
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 4 through Figure 6 for infor-
mation on the per-channel supply current as a function of the data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating the per-channel supply current for a given data rate.

Rev. B | Page 3 of 12
ADuM7510 Data Sheet
PACKAGE CHARACTERISTICS
Table 2.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Resistance (Input-to-Output) 1 RI-O 1012 Ω
Capacitance (Input-to-Output)2 CI-O 2.2 pF f = 1 MHz
Input Capacitance 2 CI 4.0 pF
IC Junction-to-Ambient Thermal Resistance, QSOP θJA 76 °C/W Thermocouple located at center of
package underside
1
The device is considered a 2-terminal device. Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
2
Input capacitance is from any input data pin to ground.

INSULATION AND SAFETY-RELATED SPECIFICATIONS


Table 3.
Parameter Symbol Value Unit Test Conditions/Comments
Rated Dielectric Insulation Voltage 1000 V rms 1 minute duration
Minimum External Air Gap QSOP Package (Clearance) L(I01) 3.8 min mm Measured from input terminals to output terminals,
shortest distance through air
Minimum External Tracking QSOP Package (Creepage) L(I02) 3.8 min mm Measured from input terminals to output terminals,
shortest distance path along body
Tracking Resistance (Comparative Tracking Index) CTI >400 V DIN IEC 112/VDE 0303 Part 1
Isolation Group II Material Group (DIN VDE 0110, 1/89, Table 1)
Maximum Working Voltage Compatible with 50 Years VIORM 354 V peak Continuous peak voltage across the isolation barrier
Service Life

RECOMMENDED OPERATING CONDITIONS


All voltages are relative to their respective ground. See the DC Correctness and Magnetic Field Immunity section for information on
immunity to external magnetic fields.

Table 4.
Parameter Symbol Min Max Unit
Operating Temperature TA −40 +105 °C
Supply Voltages VDD1, VDD2 4.5 5.5 V
Input Signal Rise and Fall Times 1.0 ms

REGULATORY INFORMATION
The ADuM7510 is approved by the organization listed in Table 5.

Table 5.
UL (Pending)
Recognized under UL 1577 component recognition program 1
Single/basic insulation, 1000 V rms isolation voltage
File E214100
1
In accordance with UL 1577, each ADuM7510 is proof tested by applying an insulation test voltage of 1200 V rms for 1 sec (current leakage detection limit = 5 µA).

Rev. B | Page 4 of 12
Data Sheet ADuM7510

ABSOLUTE MAXIMUM RATINGS


Ambient temperature TA = 25°C, unless otherwise noted. Stresses above those listed under Absolute Maximum Ratings
Table 6. may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
Parameter Rating
other conditions above those indicated in the operational
Storage Temperature (TST) Range −65°C to +150°C
section of this specification is not implied. Exposure to absolute
Ambient Operating Temperature (TA) −40°C to +105°C
Range maximum rating conditions for extended periods may affect
Supply Voltages1 (VDD1, VDD2) −0.5 V to +7.0 V device reliability.
Input Voltages1 −0.5 V to VDDI + 0.5 V
(VIA, VIB, VIC, VID, VIE)
Output Voltages1 −0.5 V to VDDO + 0.5 V
ESD CAUTION
(VOA, VOB, VOC, VOD, VOE)
Average Output Current per Pin2
Side 1 (IO1) −10 mA to +10 mA
Side 2 (IO2) −10 mA to +10 mA
Common-Mode Transients3 −100 kV/μs to +100 kV/μs
1
All voltages are relative to their respective ground.
2
See Figure 3 for maximum rated current values for various temperatures.
3
Refers to common-mode transients across the insulation barrier. Common-
mode transients exceeding the absolute maximum ratings may cause latch-
up or permanent damage.

Rev. B | Page 5 of 12
ADuM7510 Data Sheet

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS


VDD1 1 16 VDD2

GND1* 2 15 GND2*

VIA 3 14 VOA
ADuM7510
VIB 4 TOP VIEW 13 VOB

VIC 5 (Not to Scale) 12 VOC

VID 6 11 VOD

VIE 7 10 VOE

GND1* 8 9 GND2*

*PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED. CONNECTING BOTH

07632-002
TO GND1 IS RECOMMENDED. PIN 9 AND PIN 15 ARE INTERNALLY
CONNECTED. CONNECTING BOTH TO GND2 IS RECOMMENDED.

Figure 2. Pin Configuration

Table 7. Pin Function Descriptions


Pin No. Mnemonic Description
1 VDD1 Supply Voltage for Isolator Side 1 (4.5 V to 5.5 V).
2 GND1 Ground 1. Ground reference for Isolator Side 1. Pin 2 and Pin 8 are internally connected, and connecting both
to GND1 is recommended.
3 VIA Logic Input A.
4 VIB Logic Input B.
5 VIC Logic Input C.
6 VID Logic Input D.
7 VIE Logic Input E.
8 GND1 Ground 1. Ground reference for Isolator Side 1. Pin 2 and Pin 8 are internally connected, and connecting both
to GND1 is recommended.
9 GND2 Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected, and connecting both
to GND2 is recommended.
10 VOE Logic Output E.
11 VOD Logic Output D.
12 VOC Logic Output C.
13 VOB Logic Output B.
14 VOA Logic Output A.
15 GND2 Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected, and connecting both
to GND2 is recommended.
16 VDD2 Supply Voltage for Isolator Side 2 (4.5 V to 5.5 V).

Table 8. Truth Table (Positive Logic)


VIx VDD1 VDD2 VOx
Input 1, 2 State State Output1 Description
High Powered Powered High Normal operation, data is high.
Low Powered Powered Low Normal operation, data is low.
X Unpowered Powered Low Input unpowered. Outputs return to input state within 1 µs of VDD1 power restoration.
See the Power-Up/Power-Down Considerations section for more details.
X Powered Unpowered High-Z Output unpowered. Output pins are in high impedance state. Outputs return to input
state within 1 µs of VDD2 power restoration.
1
VIX and VOX refer to the input and output signals of a given channel (A, B, C, D, or E).
2
X = don’t care.

Rev. B | Page 6 of 12
Data Sheet ADuM7510

TYPICAL PERFORMANCE CHARACTERISTICS


350 1.6

IDD2 CURRENT/CHANNEL 15pF LOAD (mA)


300 1.4

1.2
MAXIMUM CURRENT (mA)

250

1.0
200
0.8
150
0.6

100
0.4

50
0.2

0 0

07632-006
07632-003
0 25 50 75 100 125 150 175 0 2 4 6 8 10
AMBIENT TEMPERATURE (°C) DATA RATE (Mbps)

Figure 3. Thermal Derating Curve, Dependence of Safety-Limiting Values Figure 6. Typical IDD2 Supply Current per Channel vs. Data Rate
with Case Temperature per DIN V VDE V 0884-10 (15 pF Output Load)

1.6 8

1.4 7
IDD1 CURRENT/CHANNEL (mA)

1.2 6
IDD1 CURRENT (mA)

1.0 5

0.8 4

0.6 3

0.4 2

0.2 1

0 0
07632-004

07632-007
0 2 4 6 8 10 0 2 4 6 8 10
DATA RATE (Mbps) DATA RATE (Mbps)

Figure 4. Typical IDD1 Supply Current per Channel vs. Data Rate Figure 7. Typical Total IDD1 Supply Current vs. Data Rate

1.6 8

1.4 7
IDD2 CURRENT 15pF LOAD (mA)
IDD2 CURRENT/CHANNEL (mA)

1.2 6

1.0 5

0.8 4

0.6 3

0.4 2

0.2 1

0 0
07632-008
07632-005

0 2 4 6 8 10 0 2 4 6 8 10
DATA RATE (Mbps) DATA RATE (Mbps)

Figure 5. Typical IDD2 Supply Current per Channel vs. Data Rate Figure 8. Typical Total IDD2 Supply Current vs. Data Rate
(No Output Load) (15 pF Output Load)

Rev. B | Page 7 of 12
ADuM7510 Data Sheet

APPLICATIONS INFORMATION
PRINTED CIRCUIT BOARD (PCB) LAYOUT If the decoder receives no pulses for more than about 5 μs, the
The ADuM7510 digital isolator requires no external interface input side is assumed to be unpowered or nonfunctional, in which
circuitry for the logic interfaces. Power supply bypassing is strongly case, the isolator output is forced to a default low state by the
recommended at the input and output supply pins (see Figure 9). watchdog timer circuit (see Table 8).
Bypass capacitors are most conveniently connected between Pin 1 The limitation on the magnetic field immunity of the device is
and Pin 2 for VDD1 and between Pin 15 and Pin 16 for VDD2. The set by the condition in which induced voltage in the transformer
capacitor value should be between 0.01 μF and 0.1 μF. The total receiving coil is sufficiently large to either falsely set or reset the
lead length between both ends of the capacitor and the input decoder. The following analysis defines such conditions. The
power supply pin should not exceed 10 mm. Bypassing between ADuM7510 is examined in a 4.5 V operating condition because it
Pin 1 and Pin 8 and between Pin 9 and Pin 16 should also be represents the most susceptible mode of operation of this product.
considered unless the ground pair on each package side is The pulses at the transformer output have an amplitude greater
connected close to the package. than 1.5 V. The decoder has a sensing threshold of about 1.0 V,
VDD1 VDD2 thereby establishing a 0.5 V margin in which induced voltages
GND1 GND2
VIA VOA can be tolerated. The voltage induced across the receiving coil is
VIB
ADuM7510 VOB given by
VIC VOC
VID VOD V = (−dβ/dt)∑∏rn2; n = 1, 2, …, N
07632-009

VIE VOE
GND1 GND2 where:
Figure 9. Recommended PCB Layout β is the magnetic flux density.
rn is the radius of the nth turn in the receiving coil.
See the AN-1109 Application Note for board layout guidelines.
N is the number of turns in the receiving coil.
PROPAGATION DELAY-RELATED PARAMETERS
Given the geometry of the receiving coil in the ADuM7510 and
Propagation delay is a parameter that describes the length of an imposed requirement that the induced voltage be, at most,
time it takes for a logic signal to propagate through a component. 50% of the 0.5 V margin at the decoder, a maximum allowable
The propagation delay to a logic low output can differ from the magnetic field is calculated, as shown in Figure 11.
propagation delay to a logic high output. 1000
MAXIMUM ALLOWABLE MAGNETIC FLUX

INPUT (VIx) 50%


100
tPLH tPHL
07632-010

OUTPUT (VOx) 50% 10


(kgauss)

Figure 10. Propagation Delay Parameters 1

Pulse width distortion is the maximum difference between


these two propagation delay values and is an indication of how 0.1

accurately the input signal timing is preserved.


0.01
Channel-to-channel matching refers to the maximum amount
the propagation delay differs between channels within a single
0.001
07632-011

ADuM7510 component. 1k 10k 100k 1M 10M 100M


MAGNETIC FIELD FREQUENCY (Hz)
Propagation delay skew refers to the maximum amount the
Figure 11. Maximum Allowable External Magnetic Flux Density
propagation delay differs among multiple ADuM7510 com-
ponents operated under the same conditions. For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.5 kgauss induces
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
a voltage of 0.25 V at the receiving coil. This is about 50% of the
Positive and negative logic transitions at the isolator input sensing threshold and does not cause a faulty output transition.
cause narrow (~1 ns) pulses to be sent via the transformer to If such an event occurs with the worst-case polarity during a
the decoder. The decoder is bistable and is, therefore, either set transmitted pulse, it reduces the received pulse from >1.0 V to
or reset by the pulses indicating input logic transitions. In the 0.75 V, still well above the 0.5 V sensing threshold of the
absence of logic transitions at the input for more than ~1 μs, decoder.
a periodic set of refresh pulses indicative of the correct input
state are sent to ensure dc correctness at the output.

Rev. B | Page 8 of 12
Data Sheet ADuM7510
The preceding magnetic flux density values correspond to specific For each output channel, the supply current is given by
current magnitudes at given distances away from the ADuM7510 IDDO = IDDO (Q) f ≤ 0.5fr
transformers. Figure 12 expresses these allowable current magni-
tudes as a function of frequency for selected distances. The IDDO = (IDDO (D) + (0.5 × 10−3) × CL × VDDO) × (2f − fr) + IDDO (Q)
ADuM7510 is very insensitive to external fields. Only extremely f ≤ 0.5fr
large, high frequency currents, very close to the component can where:
potentially be a concern. For the 1 MHz example noted, a 1.2 kA IDDI (D), IDDO (D) are the input and output dynamic supply currents
current must be placed 5 mm away from the ADuM7510 to affect per channel (mA/Mbps).
component operation. CL is the output load capacitance (pF).
1000
VDDO is the output supply voltage (V).
f is the input logic signal frequency (MHz, half of the input data
MAXIMUM ALLOWABLE CURRENT (kA)

100 rate, NRZ signaling).


fr is the input stage refresh rate (Mbps).
IDDI (Q), IDDO (Q) are the specified input and output quiescent
10
supply currents (mA).
To calculate the total IDD1 and IDD2 supply current, the supply
1
currents for each input and output channel corresponding to
DISTANCE = 5mm IDD1 and IDD2 are calculated and totaled. Figure 4 and Figure 5
DISTANCE = 100mm
0.1
DISTANCE = 1m
provide per-channel supply currents as a function of the data
rate for an unloaded output condition. Figure 6 provides per-
0.01 channel supply current as a function of the data rate for a 15 pF
07632-012

1k 10k 100k 1M 10M 100M output condition. Figure 7 and Figure 8 provide total IDD1 and
MAGNETIC FIELD FREQUENCY (Hz)
IDD2 supply current as a function of the data rate for ADuM7510
Figure 12. Maximum Allowable Current for
Various Current to ADuM7510 Spacings products.

Note that at combinations of strong magnetic field and high POWER-UP/POWER-DOWN CONSIDERATIONS
frequency, any loops formed by PCB traces can induce The ADuM7510 behaves as specified in Table 8 during power-
sufficiently large error voltages to trigger the thresholds of up and power-down operations. However, the part can transfer
succeeding circuitry. Take care to avoid PCB structures that incorrect data when the power supplies are below the minimum
form loops. operating voltage but the internal circuits are not completely off.
POWER CONSUMPTION Power-up/power-down errors can occur at VDDx voltage near
The supply current at a given channel of the ADuM7510 the operating threshold of 1.9 V. The encoder generates data
isolator is a function of the supply voltage, the channel pulses at low amplitude. The detector can miss data pulses that
data rate, and the channel output load. are near the detection threshold. If the transferring state is a
logic high, the encoder generates a pair of pulses; the decoder
For each input channel, the supply current is given by can reject one of the pulses for low amplitude. A single pulse is
IDDI = IDDI (Q) f ≤ 0.5fr interpreted as a logic low, and the output can be placed in the
IDDI = IDDI (D) × (2f − fr) + IDDI (Q) f > 0.5fr wrong logic state for that refresh cycle.
Glitch-free operation is possible by following these
recommendations.
 Slew the power on or off as quickly as possible.
 Use the default low operating mode by holding the inputs
low until power is stable.

Rev. B | Page 9 of 12
ADuM7510 Data Sheet

OUTLINE DIMENSIONS
0.197 (5.00)
0.193 (4.90)
0.189 (4.80)

16 9
0.158 (4.01)
0.154 (3.91)
0.150 (3.81) 0.244 (6.20)
1 0.236 (5.99)
8
0.228 (5.79)

0.010 (0.25)
0.020 (0.51)
0.065 (1.65) 0.069 (1.75) 0.006 (0.15)
0.010 (0.25)
0.049 (1.25) 0.053 (1.35)

0.010 (0.25)
SEATING 0.041 (1.04)
0.004 (0.10) 8° REF
0.025 (0.64) PLANE 0.050 (1.27)
COPLANARITY 0°
BSC 0.012 (0.30)
0.004 (0.10) 0.016 (0.41)
0.008 (0.20)

COMPLIANT TO JEDEC STANDARDS MO-137-AB

01-28-2008-A
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

Figure 13. 16-Lead Shrink Small Outline Package [QSOP]


(RQ-16)
Dimensions shown in inches and (millimeters)

ORDERING GUIDE
Number Number Maximum Maximum
of Inputs, of Inputs, Maximum Propagation Pulse Width Temperature Package Package
1, 2
Model VDD1 Side VDD2 Side Data Rate Delay, 5 V Distortion Range Description Option
ADuM7510BRQZ 5 0 10 Mbps 40 ns 5 ns −40°C to +105°C 16-Lead QSOP RQ-16
ADuM7510BRQZ-RL7 5 0 10 Mbps 40 ns 5 ns −40°C to +105°C 16-Lead QSOP RQ-16
1
Z = RoHS Compliant Part.
2
RL7 = 7” tape and reel option.

Rev. B | Page 10 of 12
Data Sheet ADuM7510

NOTES

Rev. B | Page 11 of 12
ADuM7510 Data Sheet

NOTES

©2010–2012 Analog Devices, Inc. All rights reserved. Trademarks and


registered trademarks are the property of their respective owners.
D07632-0-2/12(B)

Rev. B | Page 12 of 12

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