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7 2 4 1 C20-EC–303
7241
BOARD DIPLOMA EXAMINATION, (C-20)
JUNE/JULY— 2022
DIGITAL ELECTRONICS
Time : 3 hours ] [ Total Marks : 80
PART—A 3×10=30
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PART—B 8×5=40
11. (a) Explain with circuit diagram the working of open collector TTL
NAND gate.
(OR)
(b) Explain with circuit diagram the working of CMOS NAND gate.
12. (a) Explain the working of 4×1 multiplier with circuit diagram.
(OR)
13. (a) Explain the working of 4-bit shift left register with a circuit
diagram.
(OR)
14. (a) Explain the NAND and NOR latches with truth tables.
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(OR)
15. (a) Explain the working of basic dynamic MOS RAM cell with circuit
diagram.
(OR)
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PART—C 10×1=10
★★★
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