CPU310
CPU310
CPU310
IC695CPU310-ER
GFK-2329T Central Processing Unit
December 18, 2007
The RX3i CPU can be used to perform real time control of CPU OK
machines, processes, and material handling systems. The RUN
CPU communicates with the programmer and HMI OUTPUTS DISABLED
devices via a serial port using SNP Slave protocol. It I/O FORCE
communicates with I/O and Intelligent Option modules BATTERY
over a dual backplane bus that provides: SYSTEM FAULT CPU310
■ High-speed, PCI backplane for fast throughput of new RESET
RUN I/O
advanced I/O. STOP ENABLE
Features
■ Contains 10 Mbytes of battery-backed user memory
and 10 Mbytes of non-volatile flash user memory. COM1 ACTIVE
■ Provides access to bulk memory using reference
COM2 ACTIVE
table %W.
■ Configurable data and program memory.
■ Programming in Ladder Diagram, Structured Text,
Function Block Diagram, and C.
COM 2
■ Supports auto-located Symbolic Variables that can
use any amount of user memory.
■ Reference table sizes include 32Kbits for discrete %I BATT
and %Q and up to 32Kwords each for analog %AI
and %AQ.
■ Supports most Series 90-30 modules and expansion
racks. For a list of supported I/O, Communications,
Motion, and Intelligent modules, see the PACSystems
RX3i Hardware and Installation Manual, GFK-2314.
Ordering Information
■ Supports up to 512 program blocks. Maximum size for
Description Catalog Number
a block is 128KB.
RX3i VME 300Mhz CPU IC695CPU310
■ Bit-in-word referencing allows you to specify individual
Lithium Battery Pack IC698ACC701
bits in a WORD reference in retentive memory as
inputs and outputs of Boolean expressions, function Auxiliary Battery Module (optional) IC693ACC302
blocks, and calls that accept bit parameters. RX3i Power Supplies
40 Watt High Capacity Universal AC IC695PSA040
■ In-system upgradeable firmware.
40 Watt High Capacity 24 VDC IC695PSD040
■ Two serial ports: an RS-485 serial port and an For additional power supplies, see the
RS-232 serial port. PACSystems RX3i System Manual,
GFK-2314.
■ Ethernet communications via the rack-based Ethernet
[Optional] RS-232 Cable IC200CBL001
Interface module (IC695ETM001). For details on
Ethernet capabilities, refer to TCP/IP Ethernet Rx3i Standard 12 Slot Rack IC695CHS012
Communications for PACSystems User’s Manual, Rx3i Standard 16 Slot Rack IC695CHS016
GFK-2224. Note: For Conformal Coat option, please consult the
■ PLC time synchronization to SNTP Time Server on factory for price and availability.
Ethernet network when used with Ethernet Release
5.0 or later module.
2 RX3i CPU
GFK-2329T
Battery Installation
A three-cell lithium battery
It is the responsibility of the OEM, system integrator, or end
pack (IC698ACC701) is
user to properly install the control system equipment for safe
installed as shown in the
and reliable operation. Product manuals provide detailed
figure below. The battery
information about installation, startup, and proper use of the
maintains program and data
control system equipment.
memory when power is
removed and operates the Installation should not be attempted without referring to the
calendar clock. When PACSystems RX3i Hardware and Installation Manual,
replacing the battery, be GFK-2314.
sure to install a new battery 1. Make sure that rack power is off.
before disconnecting the old
one. 2. Install the CPU module in rack 0. The CPU requires two
slots and can use any slots except the highest
Disposal of lithium numbered (rightmost) slot. Ensure mounting screws are
batteries must be done in tightened to completely secure the CPU in the rack.
accordance with federal,
3. Turn on power. The module should power up. When the
state, and local
CPU has successfully completed initialization, the OK
regulations. Be sure to
LED stays on and the RUN and EN LEDs are off. The
consult with the appropriate
CPU is now ready to be programmed.
regulatory agencies before
disposing of batteries. 4. Connect the battery to either of the battery connectors
on the module. (You can connect the battery at any step
To avoid loss of RAM Mode Switch and Battery Compartment in the installation process but it will begin to drain
memory contents, routine maintenance procedures should immediately unless power is applied. To maximize
include scheduled replacement of the CPU’s lithium battery battery life, install it after power has been turned on).
pack. For information on estimating battery life, refer to the
PACSystems CPU Reference Manual, GFK-2222. After the program has been verified, the mode switch can be
moved to the appropriate operation mode position: RUN I/O
ENABLED, RUN OUTPUT DISABLE, or STOP. The LEDs
User RAM Memory
indicate the position of the mode switch and status of serial
The CPU has 10 Mbytes of battery-backed CMOS RAM port activity. For details, see “LED Operation” on page 5.
memory for user data (program, configuration, register data,
and symbolic variable) storage.
Port 2 Configuration
Port 2 (COM2) is RS-485 compatible. Port 2 has a 15-pin, The RX3i CPU and I/O system is configured with Machine
female D-sub connector. This port does not support the Edition PLC-Logic Developer programming software.
RS-485 to RS-232 adapter (IC690ACC901). This is a DCE
port. The CPU verifies the actual module and rack configuration at
power-up and periodically during operation. The actual
The COM2 Active LED provides the status of serial port configuration must be the same as the programmed
activity. configuration. Deviations are reported to the CPU alarm
processor function for configured fault response. Refer to the
Port 2 RS-485 Signals
Proficy Machine Edition Logic Developer-PLC Getting
Pin Signal Started Manual, GFK-1918 and the online help for a
No. Name Description description of configuration functions.
1* Shield Cable Shield
2 NC No Connection Ethernet Global Data (EGD)
3 NC No Connection
Each RX3i CPU supports up to 255 simultaneous Ethernet
4 NC No Connection
Global Data (EGD) exchanges across all Ethernet interfaces
5 +5VDC Logic Power**
in the PLC. EGD exchanges must be configured in the
6 RTS(A) Differential Request to Send programming software and stored into the CPU. The EGD
7 0V Signal Ground configuration can also be loaded from the CPU into the
8 CTS(B‘) Differential Clear To Send programming software. Both produced and consumed
9*** RT Resistor Termination exchanges can be configured. RX3i CPUs support using
10** RD(A‘) Differential Receive Data only part of a consumed EGD exchange. EGD exchange
production and consumption can use the broadcast IP
11 RD(B‘) Differential Receive Data
address of the local subnet.
12 SD(A) Differential Send Data
13 SD(B) Differential Send Data The RX3i CPU supports 2msec EGD exchange production
14 RTS(B) Differential Request To Send and timeout resolution. RX3i EGD exchanges can be
configured for a production period of 0, indicating the
15 CTS(A’) Differential Clear To Send
exchange is to be produced every output scan. These “as
* Pin 1 is at the bottom right of the connector as viewed from the
fast as possible” exchanges are not produced more often
front of the module.
than 2msec. RX3i CPUs support enhanced EGD freshness,
** Pin 5 provides isolated +5VDC power (300mA maximum) for
powering external options. providing better EGD timeliness than Series 90-30 CPU
*** Termination resistance for the RD A’ signal should be products.
connected on units at the end of the line. To make this
termination, connect a jumper between pins 9 and 10 inside During EGD configuration, RX3i Ethernet interfaces are
the 15-pin D-shell. identified by their Rack/Slot location.
Firmware Upgrades
The CPU receives firmware upgrades through a CPU serial
port. To install a firmware upgrade, connect WinLoader to
the CPU RS-232 or RS-485 serial port. Since you are
connecting directly to the CPU, there is no need to specify
the Rack/Slot location. For upgrades to intelligent option
modules (the IC695ETM001, for example), which are
performed indirectly via the CPU serial port, you must
specify a rack/slot location.
RX3i CPU 5
GFK-2329T
LED Operation
The following table lists the CPU LED functions during normal operation (after initialization sequence is complete).
LED State
CPU Operating State
On Blinking Off
CPU OK On CPU has passed its powerup diagnostics and is functioning properly.
CPU OK Off CPU problem. RUN and OUTPUTS ENABLED LEDs may be blinking in an error
code pattern, which can be used by technical support for troubleshooting. This
condition and any error codes should be reported to your technical support
representative.
CPU OK, OUTPUTS ENABLED, CPU is in boot mode and is waiting for a firmware update through serial port.
RUN Blinking in unison
RUN On CPU is in Run mode
RUN Off CPU is in Stop mode.
OUTPUTS ENABLED On Output scan is enabled.
OUTPUTS ENABLED Off Output scan is disabled.
I/O FORCE On Override is active on a bit reference.
BATTERY Blinking Battery is low.
BATTERY On Battery is dead or not attached.
SYSTEM FAULT On CPU is in Stop/Faulted or Stop/Halted mode.
COM1 Blinking Signal activity on port.
COM2 Blinking
Specifications*
IC695CPU310
Battery: Memory retention For estimated battery life under various conditions, refer to the PACSystems CPU
Reference Manual, GFK-2222.
Program storage Up to 10 Mbytes of battery-backed RAM
10 Mbytes of non-volatile flash user memory
Power requirements +3.3 VDC: 1.25 Amps nominal
+5 VDC: 1.0 Amps nominal
Operating Temperature 0 to 60°C (32°F to 140°F)
Floating point Yes
Boolean execution speed, typical 0.195ms per 1000 Boolean contacts/coils
Time of Day Clock accuracy Maximum drift of 2 seconds per day
Elapsed Time Clock (internal timing) 0.01% maximum
accuracy
Embedded communications RS-232, RS-485
Serial Protocols supported Modbus RTU Slave, SNP, Serial I/O
Backplane Dual backplane bus support: RX3i PCI and 90-30-style serial
PCI compatibility System designed to be electrically compliant with PCI 2.2 standard
Program blocks Up to 512 program blocks. Maximum size for a block is 128KB.
Memory %I and %Q: 32Kbits for discrete
%AI and %AQ: configurable up to 32Kwords
%W: configurable up to the maximum available user RAM
Symbolic: configurable up to 10 Mbytes
* For environmental specifications and compliance to standards (for example, FCC or European Union Directives), refer to
the PACSystems RX3i Hardware and Installation Manual, GFK-2314.
6 RX3i CPU
GFK-2329T
Release Information
Firmware release 5.02 fixes an issue where Series 90-30 Intelligent Option modules in the main rack do not transition to stop
mode after a “Loss of Module” fault is logged. For details, refer to “Problems Resolved by this Revision (Firmware Release
5.02)” on page 7.
Updates
IC695CPU310 can be field-upgraded to firmware version 5.02 using the firmware upgrade utility. The upgrade kit,
44A752290-G17, can be downloaded at no charge from http://support.gefanuc.com or purchased.
Release History
Catalog Number Firmware Version Date
IC695CPU310-ER 5.02 Dec. 07
IC695CPU310-EP 5.00 Aug. 07
IC695CPU310-EN 3.83 Nov. 06
IC695CPU310-EM 3.82 Jul. 06
IC695CPU310-EL 3.81 May 06
IC695CPU310-DK 3.52 Jan. 06
IC695CPU310-DJ 3.51 Nov. 05
IC695CPU310-DH 3.50 Sep. 05
IC695CPU310-CG 3.12 Aug. 05
IC695CPU310-CF 3.11 Jun. 05
IC695CPU310-CD 3.00 Apr. 05
IC695CPU310-CC 2.90 Dec. 04
IC695CPU310-CB 2.80 Nov. 04
IC695CPU310-CB 2.51 Nov. 04
IC695CPU310-BB 2.51 Jul. 04
IC695CPU310-AA 2.50 (initial release) Jun. 04
RX3i CPU 7
GFK-2329T
Subject Description
Power up of HSC may take as As power is applied to a 90-30 High-Speed Counter, the "module ready" bit in the
long as 20 seconds status bits returned each sweep from the module may not be set for as long as 20
seconds after the first PLC sweep, even though there is no "loss of module" indication.
I/O data exchanged with the module is not meaningful until this bit is set by the
module. For details, see “Data Transfer Between High Speed Counter and CPU” in the
Series 90-30 High Speed Counter User’s Manual, GFK-0293C.
Info fault at power up Intermittently during power-up, an Informational non-critical CPU software fault may be
generated with fault extra data of 01 91 01 D6. This fault will have no effect on the
normal operation of the PLC. But, if the hardware watchdog timer expires after this
fault and before power has been cycled again, then the outputs of I/O modules may
hold their last state, rather than defaulting to zero.
Extended Memory Types for IO %R, %W and %M cannot be used as IO triggers.
Triggers
Possible Machine Edition Infrequently, an attempt to connect a programmer to a PLC via Ethernet will be
inability to connect unsuccessful. The normal connection retry dialog will not be displayed. Rebooting the
computer that is running the programmer will resolve the behavior.
SNP Update Datagram If an Update Datagram message requests 6 or less bits or bytes of data, the PLC will
message return a Completion Ack without Text Buffer. The protocol specifies that the returned
data will be in the Completion Ack message, but it may not be.
GBC30 may not resume In rare instances, a GBC30 in an expansion rack may not resume normal operation
operation after power cycle after a power cycle of either the expansion rack or the main rack.
Configuration of third-party Do not specify a length of 0 in the configuration of a third-party module. The module
modules will not work properly in the system.
Power supply status after CPU The PLC will report a “Loss of or missing option module” fault for the IC695PSD140
firmware update RX3i power supply following an update of PLC CPU firmware. Also, the slot will
appear empty in the programmer’s online status detail view. The power supply
continues to operate normally. Power cycle to restore normal status reporting.
Power supply status after Rarely, turning a power supply on or off may not result in an add or loss fault. Also, the
power cycling slot will appear empty in the programmer’s online status detail view. The power supply
continues to operate normally. Power cycle to restore normal status reporting.
Don’t use multiple targets In a system in which the hardware configuration is stored from one target and logic is
stored from a different target, powering-up from flash will not work. The observed
behavior is that, following a power up from flash, ME reports hardware configuration
and logic "not equal".
Missing “Loss of terminal The IC695ALG600/608/616 analog input modules do not produce a “Loss of terminal
block” fault block” fault when hardware configuration is stored or the module is hot-inserted, and
the terminal block is not locked into place.
Sequence Store Failure In systems with very large hardware configurations, it is possible to encounter a “PLC
Sequence Store Failure” error when writing the configuration to flash. To work around
this error, either:
1. Perform an explicit clear of flash prior to performing the write.
2. Increase the operation timeout used by Machine Edition software prior to
performing the write.
IC694MDL754: Must configure Always configure 16 bits of module status when using this module. Configuring 0 bits
module status bits of module status will result in invalid data in the module’s ESCP status bits.
IC695ALG600 Lead Resistance A configuration store operation will fail if a channel is configured for 3-wire RTD and
Compensation setting Lead Resistance Compensation is set to Disabled. A Loss of Module fault will be
logged in the I/O Fault table at the end of the store operation. To recover the lost
module, the configuration must be changed to enable Lead Resistance Compensation
and module must be power cycled.
C Toolkit PlcMemCopy This routine does allow the destination and source pointers to be outside of reference
Documentation Incorrect memory. If the destination points to discrete reference memory, overrides and
transitions will be honored. Note that the header for PlcMemCopy has been updated in
Release 3.50 of the C toolkit.
10 RX3i CPU
GFK-2329T
Subject Description
Flash clear operation may fail Occasionally flash clears may fail when the CPU is configured to load hardware config
unexpectedly and logic from flash with a battery attached. If this occurs, remove the battery and
power cycle to resolve the issue.
WinLoader may stop operating On computers running Windows 2000 and using some versions of Symantec Antivirus
protection, WinLoader will fail if used in advanced mode. Recovery requires cycling
the computer's power.
Storing a Configuration w/EGD Storing a configuration that causes a mismatch for an Ethernet module with EGD
to Mismatched Module configured causes the CPU to get into a state where all future stores will fail. The
Prevents Future Stores remedy is pulling the battery and power cycling.
Subject Description
Upgrading Firmware The process of upgrading the CPU firmware with the WinLoader utility may fail when multiple IO
modules are in the main rack, due to the time it takes to power cycle the rack system. If the
upgrade process fails, move the CPU to a rack without IO modules and restart the upgrade
process.
Winloader initial connect baud rate is fixed at 19200 baud. Note that the firmware download will
occur at 115.2K baud by default.
Note that if you have hyperterm open on a port, and then try to use Winloader on the same port,
Winloader will often say “Waiting for Target” until the hyperterm session is closed.
Hot Swap Hot Swap of power supplies or CPUs is not supported in this release
Serial Port With the following combination of circumstances, it is possible to render serial communications
Configuration with the CPU impossible:
COMMREQs User configuration disables the Run/Stop switch
User configures the power up mode to Run or Last
Logic is stored in FLASH and user configures CPU to load from FLASH on power up
User application issues COMMREQs that set the protocol on both of the serial ports to
something that does not permit communications to the ME programmer.
Incorrect The program name for PACSystems is always "LDPROG1". When another program name is used
COMMREQ Status in a COMM_REQ accessing %L memory, an Invalid Block Name (05D5) error is generated.
For Invalid Program
Name
FANUC I/O Master Scan sets on the master do not work properly for the first operation of the scan set after entering
and Slave operation RUN mode. They do work properly for subsequent scans.
After downloading a new hardware configuration and logic, a power cycle may be required to
resume FANUC I/O operation.
Use PLCs of similar performance in FANUC I/O networks. If a master or slave is located in an
RX3i system, the other PLCs should be RX3is or Series 90-30 CPU374s.
Repeated power up/down cycles of an expansion rack containing FANUC I/O slaves may result in
failure of the slaves’ operation, with the RDY LED off.
Lost count at power The serial IO Processor (IC693APU305) will lose the first count after every power up or every
up for Serial IO time the module receives a configuration.
Processor
COMMREQ Status In previous releases, the CPU allowed configuration of COMMREQ Status Words in bit memory
Words Declared in types on a non-byte-aligned boundary. Even though the given reference was not byte-aligned,
Bit Memory Types the firmware would adjust it the next-lowest byte boundary before updating status bits, overwriting
Must Be Byte- the bits between the alignment boundary and specified location. To ensure that the application
Aligned operates as expected, release 3.50 requires configuration of COMMREQ Status Words in bit
memory types to be byte-aligned. For example if the user specified status bit location of %I3, the
CPU aligns the status bit location at %I1. Release 3.50 firmware requires the user to specify the
appropriate aligned address (%I1) to ensure that the utilized location is appropriate for their
application. Note that the actual reference location utilized is not changed, but now is explicitly
stated for the user.
12 RX3i CPU
GFK-2329T