EE213 Syllabus
EE213 Syllabus
EE213 Syllabus
Course days and hours: Thursday 8:00 – 9:45 (Section-1) – 14:00 - 15:45 (Section-2)
Location: F0D01/ F0D05
Course Credit: 2 ECTS
Course Description:
The objective of this course is to familiarize the student with fundamental principles of
digital design. It provides coverage of classical hardware design for both combinational
and sequential logic circuits. In the combinational logic circuits, logic gates,
minimization techniques, arithmetic circuits are explained. In the sequential circuits:
flip-flops, synthesis of sequential circuits, and case studies, including counters,
registers, and random access memories are presented.
Required Textbook/s:
1
• %70 attendances are mandatory to pass the course. (main dd course different)
• Each person in a group has the same responsibility to complete the given lab, so
each must answer the questions that will be asked by assistants.
• If the following lab has a tutorial which should be explained, that tutorial video
or documents will be uploaded to Canvas before the lab hour (1 week before), so
each student must check the canvas and must prepare themselves by reading the
materials and watching the videos.
• The following laboratory guideline is obligatory.
_____________
Total: 100%
LABORATORY GUIDELINES
▪ The contents of the main lab will be disclosed during the lab session. You are
expected to demonstrate the requested work and to give answers to relevant
questions.
▪ Some labs may need firstly solving the problem on paper, then code on PC and
demonstrate on FPGA board. At that time, each student will solve the problem
on the paper individually, and papers will be collected and graded later. As a
result, students will get %40 percent from the paper solution, and %60 percent
from the demonstration on the board.
Course Policies:
• For the AGU Make-up policy, please refer to the website
https://goo.gl/HbPM2y section 26.
• English should be used at all times to communicate with one another during
instruction hours.
• Please, respect the allotted times provided for breaks.
• Please, bring the required materials, including textbooks and notebooks.
• Please be prepared, having read, written and studied the assigned lessons,
articles, or passages;
• Please be ready to write assignments in class that will be graded; and most
importantly work cooperatively with other students.
Attendance Policy:
• Be in the class on time (being late for class is an extreme annoyance to the entire
class).
• Class attendance is strongly recommended. Regular class time will include
informal assessment activities for which points will be assigned. Participation
in these activities will help you prepare for exams and homework and also
provide me with feedback on your progress.
• For a detailed description of AGU attendance policy, please refer to the website
at https://goo.gl/HbPM2y section 25.
2
Email Policy:
When contacting the instructor, please use the Canvas email feature. Only use
abdulkadir.kose@agu.edu.tr if Canvas is not accessible (server down, etc). Include in the
subject line the class number and name (EE213 Digital Design Laboratory). If this
information is not included, your email may not be answered. Any announcements or
warnings will be send to your AGU e-mail. Therefore it is the responsibility of every
student to read his/her AGU e-mails and CANVAS emails regularly. AGU webmail can be
accessed through https://posta.agu.edu.tr
3
Course Outline:
Week Topic
1st Course Description
2nd Introduction to Digital Design
3rd Number Systems - Logic Gates
4th Boolean Algebra
5th Logic Simplification
6th Combinational Logic
7th Combinational Logic (cont’d)
9th Sequential Logic – Latches and Flip-Flops
10th Sequential Logic – Registers and Counters
11th Sequential Logic – Analysis and Design
12th Sequential Logic – Analysis and Design (cont’d)
13th Register Transfer
14th Memory