Quectel EC200U Series Hardware Design V1.0
Quectel EC200U Series Hardware Design V1.0
Quectel EC200U Series Hardware Design V1.0
Hardware Design
Version: 1.0
Date: 2021-11-05
Status: Released
LTE Standard Module Series
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a) We acknowledge no liability for any injury or damage arising from the reliance upon the information.
b) We shall bear no liability resulting from any inaccuracies or omissions, or from the use of the
information contained herein.
c) While we have made every effort to ensure that the functions and features under development are
free from errors, it is possible that they could contain errors, inaccuracies, and omissions. Unless
otherwise provided by valid agreement, we make no warranties of any kind, either implied or express,
and exclude all liability for any loss or damage suffered in connection with the use of features and
functions under development, to the maximum extent permitted by law, regardless of whether such
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Copyright © Quectel Wireless Solutions Co., Ltd. 2021. All rights reserved.
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LTE Standard Module Series
Safety Information
The following safety precautions must be observed during all phases of operation, such as usage, service
or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal
should send the following safety information to users and operating personnel, and incorporate these
guidelines into all manuals supplied with the product. If not so, Quectel assumes no liability for customers’
failure to comply with these precautions.
Full attention must be given to driving at all times in order to reduce the risk of an
accident. Using a mobile while driving (even with a handsfree kit) causes
distraction and can lead to an accident. Please comply with laws and regulations
restricting the use of wireless devices while driving.
Switch off the cellular terminal or mobile before boarding an aircraft. The operation
of wireless appliances in an aircraft is forbidden to prevent interference with
communication systems. If the device offers an Airplane Mode, then it should be
enabled prior to boarding an aircraft. Please consult the airline staff for more
restrictions on the use of wireless devices on boarding the aircraft.
Cellular terminals or mobiles operating over radio signals and cellular network
cannot be guaranteed to connect in all possible conditions (for example, with
unpaid bills or with an invalid (U)SIM card). When emergent help is needed in such
conditions, please remember using emergency call. In order to make or receive a
call, the cellular terminal or mobile must be switched on in a service area with
adequate cellular signal strength.
The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it
receives and transmits radio frequency signals. RF interference can occur if it is
used close to TV set, radio, computer or other electric equipment.
In locations with potentially explosive atmospheres, obey all posted signs to turn
off wireless devices such as your phone or other cellular terminals. Areas with
potentially explosive atmospheres include fuelling areas, below decks on boats,
fuel or chemical transfer or storage facilities, areas where the air contains
chemicals or particles such as grain, dust or metal powders, etc.
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Revision History
Kyle CHEN/
- 2021-10-08 Creation of the document
Nathan LIU
Kyle CHEN/
1.0 2021-11-05 First official release
Nathan LIU
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Contents
1 Introduction ........................................................................................................................................ 11
1.1. Special Marks .......................................................................................................................... 11
2 Product Overview .............................................................................................................................. 12
2.1. General Description ................................................................................................................. 12
2.2. Key Features ........................................................................................................................... 13
2.3. Functional Diagram ................................................................................................................. 15
2.4. EVB .......................................................................................................................................... 16
3 Application Interfaces ....................................................................................................................... 17
3.1. General Description ................................................................................................................. 17
3.2. Pin Assignment ........................................................................................................................ 18
3.3. Pin Description......................................................................................................................... 19
3.4. Operating Modes ..................................................................................................................... 29
3.5. Power Saving........................................................................................................................... 30
3.5.1. Sleep Mode .................................................................................................................... 30
3.5.1.1. UART Application ................................................................................................. 30
3.5.1.2. USB Application with USB Remote Wakeup Function* ....................................... 31
3.5.1.3. USB Application with USB Suspend/Resume and MAIN_RI Function* .............. 31
3.5.1.4. USB Application ................................................................................................... 32
3.5.2. Airplane Mode ................................................................................................................ 33
3.6. Power Supply........................................................................................................................... 34
3.6.1. Power Supply Pins ......................................................................................................... 34
3.6.2. Voltage Stability Requirements ...................................................................................... 34
3.6.3. Reference Design for Power Supply .............................................................................. 35
3.6.4. Monitor the Power Supply .............................................................................................. 36
3.7. Turn on/Turn off/Reset ............................................................................................................. 36
3.7.1. Turn on Module with PWRKEY ...................................................................................... 36
3.7.2. Turn off Module .............................................................................................................. 38
3.7.2.1. Turn off Module with PWRKEY ............................................................................ 39
3.7.2.2. Turn off Module with AT Command...................................................................... 39
3.7.3. Reset the Module ........................................................................................................... 40
3.8. (U)SIM Interfaces..................................................................................................................... 41
3.9. USB Interface .......................................................................................................................... 44
3.10. UART Interfaces ...................................................................................................................... 45
3.11. SPI Interface ............................................................................................................................ 47
3.12. I2C Interfaces .......................................................................................................................... 48
3.13. PCM Interface .......................................................................................................................... 48
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Table Index
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Figure Index
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1 Introduction
This document defines the EC200U series module and describes its air interface and hardware interfaces
which are connected with your applications.
This document can help you quickly understand module interface specifications, electrical and
mechanical details, as well as other related information of EC200U series module. To facilitate its
application in different fields, relevant reference design is also provided for customers’ reference.
Associated with application note and user guide, you can use EC200U series module to design and set
up wireless applications easily.
⚫ EC200U-CN
⚫ EC200U-EU
Mark Definition
When an asterisk (*) is used after a function, feature, interface, pin name, AT command, or
* argument, it indicates that the function, feature, interface, pin name, AT command, or
argument is under development and currently not supported, unless otherwise specified.
Brackets ([…]) used after a pin enclosing a range of numbers indicate all pins of the same
[…] type. For example, SDIO1_DATA[0:3] refers to all four SDIO1_DATA pins: SDIO1_DATA0,
SDIO1_DATA1, SDIO1_DATA2 and SDIO1_DATA3.
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2 Product Overview
EC200U series is a wireless communication module, which supports LTE-FDD, LTE-TDD, GSM/GPRS
network data connection. It provides voice function for your special applications and also supports GNSS.
The following table shows the frequency bands of the module.
LTE-FDD B1/B3/B5/B8
LTE-TDD B34/B38/B39/B40/B41
2
GNSS GPS, GLONASS, BeiDou, Galileo, QZSS
3
Bluetooth and Wi-Fi Scan Support
LTE-FDD B1/B3/B5/B7/B8/B20/B28
LTE-TDD B38/B40/B41
1 GSM is optional.
2 GNSS function is optional.
3 EC200U series supports Bluetooth and Wi-Fi Scan functions. Due to the shared antenna interface, the two functions
cannot be used at the same time; Bluetooth and Wi-Fi Scan functions are optional (supported or not supported
simultaneously), please contact Quectel Technical Supports for details.
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With a compact profile of 28.0 mm × 31.0 mm × 2.4 mm, EC200U series can meet almost all
requirements for M2M applications such as automotive, metering, tracking system, security, router,
wireless POS, mobile computing device, PDA phone, tablet PC, etc.
EC200U series is an SMD type module which can be embedded into applications through 144 pins,
including 80 LCC pins and 64 LGA pins.
Feature Details
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WLAN Application
⚫ Supports SDIO 1.1 interface for WLAN function
Interface*
Matrix keyboard
⚫ Support 4 × 4 matrix keyboard
Interfaces
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⚫ 50 Ω impedance
RoHS ⚫ All hardware components are fully compliant with EU RoHS directive
The following figure shows a block diagram of EC200U series and illustrates the major functional parts.
⚫ Power management
⚫ Baseband
⚫ Flash
⚫ Radio frequency
⚫ Peripheral interfaces
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SAW
PAM
SAW LNA
Duplex
GNSS
VBAT_RF APT
PA
PRx
Tx
MIC 26 MHz
DCXO Transceiver
LOUDSPK
32 kHz Clock
VBAT_BB
PMIC
Control Baseband
PWRKEY
SPI Nor Flash (64Mb)
RESET_N PSRAM (128Mb)
ADCs
VDD_EXT USB (U)SIMs SPI I2Cs PCM UARTs STATUS WLAN LCD Keypads SD
Card
2.4. EVB
In order to help customers to develop applications with EC200U series, Quectel provides an evaluation
board (UMTS & LTE EVB), USB to RS-232 converter cable, earphone, antennas and other peripherals to
control or test the module. For more details, please refer to document [1].
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3 Application Interfaces
EC200U series is equipped with 80 LCC pins plus 64 LGA pins that can be connected to cellular
application platform. The subsequent chapters will provide detailed descriptions of the following
interfaces.
⚫ Power supply
⚫ (U)SIM interfaces
⚫ USB interface
⚫ UART interfaces
⚫ SPI interface
⚫ PCM and I2C interfaces
⚫ Analog audio interfaces
⚫ LCD interface
⚫ Matrix keyboard interface
⚫ SD card interface
⚫ WLAN application interface*
⚫ ADC interfaces
⚫ Status indications
⚫ USB_BOOT interface
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The following figure shows the pin assignment of EC200U series module.
MAIN_DCD
RESERVED
MAIN_RXD
MAIN_DTR
MAIN_TXD
MAIN_RTS
MAIN_CTS
USB_VBUS
KEYOUT3
KEYOUT2
VBAT_BB
VBAT_RF
VBAT_BB
VBAT_RF
USB_DM
MAIN_RI
USB_DP
STATUS
114
113
GND
GND
72
70
69
68
67
66
65
64
63
62
61
59
58
56
71
60
57
55
1 54
WAKEUP_IN GND
2 53
AP_READY
129 117 GND
SDIO2_DATA3 RESERVED
3 52
SLEEP_IND GND
5 50
NET_MODE 131 119
LCD_FMARK
GND
SDIO2_DATA1
6 49
NET_STATUS ANT_MAIN
132 120
7
VDD_EXT
SDIO2_DATA0
LCD_RSTB
109 104 100 96 91 86 48
GND
142 82 79 76 73 143
I2C2_SDA RESERVED KEYIN2 GND LOUDSPK GRFC1
8
134 122 _P
74 47
83 80 77
110 105
LCD_CS
92 87
SDIO2_CMD
GND KEYOUT0 KEYIN3 MIC_N LOUDSPK ANT_GNSS
_N
9
GND 135
WLAN_WAKE
123
LCD_CLK
84
KEYOUT1
81
RESERVED
78
KEYIN1
75
MIC_P
46
GND
10 45
USIM_GND ADC0
136 124
LCD_SDC
WLAN_EN
11 44
DBG_RXD ADC1
13 42
USIM_DET
138
AUX_TXD
126
GPIO1
I2C_SDA
14 41
USIM_VDD I2C_SCL
15 139 127 98 94 89 40
USIM_DATA BT_EN
WLAN_PWR_
EN 112 107 102 SPI_CLK
16 39
USIM_CLK
140ISINK
128 SPI_MISO
USIM2_VDD
17 38
USIM_RST SPI_MOSI
18 37
RESERVED SPI_CS
SDIO1_DATA3
SDIO1_DATA2
SDIO1_DATA1
SDIO1_DATA0
ANT_BT/WIFI_
SDIO1_CMD
RESERVED
USB_BOOT
SDIO1_VDD
PCM_DOUT
PCM_SYNC
SDIO1_CLK
PCM_CLK
RESET_N
PCM_DIN
PWRKEY
SD_DET
116
115
SCAN
GND
GND
GND
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
NOTE
1. USB_BOOT and KEYIN1 cannot be pulled up before the module’s successful startup.
2. Please keep all RESERVED and unused pins unconnected, and all GND pins are connected to
the ground.
3. Pin 85–112 should be connected to the ground.
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The following tables show the pin definition of EC200U series module.
Type Description
AI Analog Input
AO Analog Output
DI Digital Input
DO Digital Output
OD Open Drain
PI Power Input
PO Power Output
Power Supply
GND 8, 9, 19, 22, 36, 46, 48, 50–54, 56, 72, 76, 85–112
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Turn on/off
Status Indication
USB Interface
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(U)SIM Interface
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VIHmax = 2.0 V
ADC Interfaces
Loudspeaker
LOUDSPK_P 73 AO differential output
(+)
Loudspeaker
LOUDSPK_N 74 AO If unused, keep them
differential output (-)
open.
Microphone analog
MIC_P 75 AI
input (+)
Microphone analog
MIC_N 77 AI
input (-)
I2C Interface
PCM Interface
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VILmin = -0.3 V
VILmax = 0.6 V
PCM_DIN 24 DI PCM data input VIHmin = 1.26 V 1.8 V power domain.
VIHmax = 2.0 V If unused, keep it
VOLmax = 0.45 V open.
PCM_DOUT 25 DO PCM data output
VOHmin = 1.35 V
VILmin = -0.3 V 1.8 V power domain.
PCM data frame VILmax = 0.6 V If unused, keep it
PCM_SYNC 26 DI VIHmin = 1.26 V
sync open. The PCM
VIHmax = 2.0 V
function only
VILmin = -0.3 V
VILmax = 0.6 V supports slave
PCM_CLK 27 DI PCM clock VIHmin = 1.26 V mode, not master
VIHmax = 2.0 V mode.
SPI Interface
VOLmax = 0.45 V
SPI_CS 37 DO SPI chip select If you use a module
VOHmin = 1.35 V
model that supports
SPI master mode VOLmax = 0.45 V
SPI_MOSI 38 DO GNSS function, the
output VOHmin = 1.35 V
SPI function of Pin
SPI master mode
SPI_MISO 39 DI 37–40 cannot be
input
used and needs to
VOLmax = 0.45 V
SPI_CLK 40 DO SPI clock be left unconnected.
VOHmin = 1.35 V
LCD Interface
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It can be multiplexed
USB_BOOT 115 DI Matrix key input0 as KEYIN0 after
startup.
1.8 V power domain.
If unused, keep it
KEYIN1 78 DI Matrix key input1 open. The KEYIN1
cannot be pulled up
before startup.
SD Card Interface
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WLAN Interface*
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VIHmax = 2.0 V
Antenna Interface
USB_BOOT
Other Interface
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Generic RF
GRFC1 143 DIO
controller
Generic RF
GRFC2 144 DIO
controller
Reserved Pins
Mode Details
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Minimum
AT+CFUN=0 can set the module to a minimum functionality mode without removing
Functionality
the power supply. In this case, RF function will be invalid.
Mode
AT+CFUN=4 or W_DISABLE# can set the module to airplane mode. In this case, RF
Airplane Mode
function will be invalid.
In this mode, the current consumption of the module will be reduced to the minimal
Sleep Mode level. In this mode, the module can still receive paging message, SMS, voice call and
TCP/UDP data from the network normally.
In this mode, the power management unit (PMU) shuts down the power supply.
Power Down
Software is not active, the serial interface is not accessible, while operating voltage
Mode
(connected to VBAT_RF and VBAT_BB) remains applied.
The module is able to reduce its current consumption to a minimum value in sleep mode. The following
section describes power saving procedures of the module.
If the host communicates with module via UART interface, the following preconditions should be met to let
the module enter sleep mode.
The following figure shows the connection between the module and the host.
Module Host
MAIN_RXD TXD
MAIN_TXD RXD
MAIN_RI EINT
MAIN_DTR GPIO
AP_READY GPIO
GND GND
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⚫ Driving MAIN_DTR to low level by the host can wake up the module.
⚫ When the module has a URC to report, the URC will trigger the behavior of MAIN_RI pin. Please
refer to Chapter 3.22 for details about MAIN_RI behavior.
If the host supports USB suspend/resume and remote wakeup functions, the following three preconditions
must be met to make the module enter sleep mode.
The following figure shows the connection between the module and the host.
Module Host
USB_VBUS VDD
USB_DP USB_DP
USB_DM USB_DM
AP_READY GPIO
GND GND
⚫ Sending data to the module through USB can wake up the module.
⚫ When the module has a URC to report, the module will send remote wakeup signals via USB bus so
as to wake up the host.
NOTE
1. USB suspend is supported on Linux system but not supported on Windows system.
2. Pay attention to the level match shown in dotted line between the module and the host.
If the host supports USB suspend/resume but does not support remote wakeup function, the MAIN_RI
signal is needed to wake up the host.
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In this case, three preconditions can make the module enter the sleep mode.
The following figure shows the connection between the module and the host.
Module Host
USB_VBUS VDD
USB_DP USB_DP
USB_DM USB_DM
AP_READY GPIO
MAIN_RI EINT
GND GND
⚫ Sending data to the module through USB can wake up the module.
⚫ When the module has a URC to report, the URC will trigger the behaviors of MAIN_RI pin.
NOTE
1. USB suspend is supported on Linux system but not supported on Windows system.
2. Pay attention to the level match shown in dotted line between the module and the host.
If the host does not support USB suspend function, USB_VBUS should be disconnected via an external
control circuit of USB_VBUS to let the module enter sleep mode.
The following figure shows the connection between the module and the host.
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Module Host
GPIO
Power
USB_VBUS Switch VDD
USB_DP USB_DP
USB_DM USB_DM
MAIN_RI EINT
AP_READY GPIO
GND GND
NOTE
Please pay attention to the level match shown in dotted line between the module and the host.
When the module enters airplane mode, the RF function does not work, and all AT commands related to
RF function will be not accessible. This mode can be set via the following ways.
Hardware:
The W_DISABLE# is pulled up by default. Its control function for airplane mode, which is disabled by
default in software, can be enabled through AT+QCFG=“airplanecontrol”,1. When such a control
function is enabled, you can drive W_DISABLE# to low level to make the module enter airplane mode.
Software:
AT+CFUN = <fun> provides the choice of the functionality level through setting <fun> into 0, 1 or 4.
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The module provides four VBAT pins for connection with the external power supply. There are two
separate voltage domains for VBAT.
GND 8, 9, 19, 22, 36, 46, 48, 50–54, 56, 72, 76, 85–112
The power supply range of the module is from 3.3 V to 4.3 V. Please make sure that the input voltage will
never drop below 3.3 V. The following figure shows the voltage drop during burst transmission in 2G
network. The voltage drop will be less in 4G networks.
Burst Burst
Transmission Transmission
VBAT Ripple
Drop
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To decrease voltage drop, a bypass capacitor of about 100 µF with low ESR (ESR = 0.7 Ω) should be
used, and a multi-layer ceramic chip (MLCC) capacitor array should also be reserved due to its ultra-low
ESR. It is recommended to use three ceramic capacitors (100 nF, 33 pF, 10 pF) for composing the MLCC
array, and place these capacitors close to VBAT_BB and VBAT_RF. The main power supply from an
external application has to be a single voltage source and can be expanded to two sub paths with star
configuration routing. The width of VBAT_BB trace should be no less than 2 mm; and the width of
VBAT_RF trace should be no less than 2.5 mm. In principle, the longer the VBAT trace is, the wider it will
be.
In addition, in order to ensure the stability of power source, it is suggested that a TVS diode of which
reverse stand-off voltage is 4.7 V and peak pulse power is up to 2550 W should be used.
The following figure shows the star configuration routing of the power supply.
VBAT
VBAT_RF
VBAT_BB
+ +
D1 C1 C2 C3 C4 C5 C6 C7 C8
Module
Power design for the module is very important, as the performance of the module largely depends on the
power source. The power supply should be able to provide sufficient current up to 2.0 A to the module that
only supports LTE network, while 3.0 A at least should be provided for GSM network. If the voltage drop
between the input and output is not too high, it is suggested that an LDO should be used to supply power
for the module. If there is a big voltage difference between the input source and the desired output (VBAT),
use a buck converter as the power supply.
The following figure shows a reference design for +5 V input power source. The typical output of the
power supply is about 3.8 V and the maximum load current is 3.0 A.
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MIC29302WU
DC_IN VBAT
2 4
IN OUT
GND
ADJ
EN
100K
1%
5
51K
4.7K 470R
470 μF 100 nF
470 μF 100 nF
47K
VBAT_EN 47K 1%
You can use AT+CBC to monitor the VBAT_BB voltage value. For more details, see document [2].
When the module is in power-off mode, it can be turned on to normal mode by driving PWRKEY to a low
level for at least 2 s. It is recommended to use an open drain/collector driver to control the PWRKEY. A
simple reference circuit is illustrated in the following figure.
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PWRKEY
≥ 2 s
4.7K
10 nF
Turn-on pulse
47K
Another way to control the PWRKEY is to use a button directly. When pressing the button, electrostatic
strike may generate from finger. Therefore, a TVS component is indispensable to be placed nearby the
button for ESD protection.
S1
PWRKEY
TVS
Close to S1
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NOTE1
VBAT ≥2s
About 1.15 s
VDD_EXT
RESET_N
≥ 5.05 s
STATUS
(DO)
≥4s
≥ 2.23 s
NOTE
1. Please make sure that VBAT is stable before PWRKEY is pulled down. It is recommended that the
time interval between powering up VBAT and pulling down PWRKEY is no less than 30 ms.
2. PWRKEY can be pulled down directly to GND with a recommended 1 kΩ resistor if the module
needs being powered on automatically and shutdown is not needed.
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Driving PWRKEY low for at least 3 s and releasing it, the module executes power-down procedure.
VBAT
≥ 3 s ≥ 30 s
PWRKEY
STATUS
(DO)
It is also a safe way to use AT+QPOWD to turn off the module, which is similar to the procedure of turning
off the module via PWRKEY.
NOTE
1. In order to avoid damaging internal flash, please do not switch off the power supply when the
module works normally. Only after the module is shut down by PWRKEY or AT command, can the
power supply be cut off.
2. When keeping the PWRKEY to the ground, the module can only be forced to turn off by cutting off
the VBAT power supply considering that the module cannot be turned off with AT command.
Therefore, it is recommended that you can turn on or turn off the module by pulling up and pulling
down the PWEKEY instead of keeping the PWRKEY to the ground.
3. When being turned off, the module will log out of the network. The time for logging out relates to its
network status. Thus, please pay attention to the shutdown time in your design because the actual
shutdown time varies with the network status.
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The RESET_N can be used to reset the module. The module can be reset by driving RESET_N low for at
least 100 ms and then releasing it. The RESET_N signal is sensitive to interference, so it is
recommended to route the trace as short as possible and surround it with ground.
The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button
can be used to control the RESET_N.
RESET_N
≥ 100 ms
4.7K
Reset pulse
47K
S2
RESET_N
TVS
Close to S2
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LTE Standard Module Series
VBAT
≥ 100 ms
RESET_N
VIL ≤ 0.5 V
NOTE
The module provides two (U)SIM interfaces, and it supports DSDS function. The (U)SIM interfaces meet
ETSI and IMT-2000 requirements. Both 1.8 V and 3.0 V (U)SIM cards are supported.
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Pin
Pin Name I/O Description Comment
No.
USIM2_VDD 128 PO (U)SIM2 card power supply The (U)SIM2 function is optional. If
the firmware version of the module
AP_READY 2 DIO (U)SIM2 card data supports the function of the
(U)SIM2 card, the relevant
WAKEUP_IN 1 DO (U)SIM2 card clock functions of the (U)SIM2 card can
be realized by multiplexing
W_DISABLE# 4 DO (U)SIM2 card reset
AP_READY, WAKEUP_IN,
SLEEP_IND, and W_DISABLE#
SLEEP_IND 3 DI (U)SIM2 card hot-plug detect pins. For details, please consult
Quectel Technical Supports.
The module supports (U)SIM card hot-plug via the USIM_DET, and both high and low level detections are
supported. By default, the function is disabled, and it can be enabled by AT+QSIMDET. Please see
document [2] for more details about the AT+QSIMDET.
The following figure shows a reference design for (U)SIM interface with an 8-pin (U)SIM card connector.
VDD_EXT USIM_VDD
51K 10 K
USIM_GND 100 nF (U)SIM Card Connector
USIM_VDD
VCC GND
USIM_RST 0R
RST VPP
Module USIM_CLK
CLK Switch IO
USIM_DET 0R
USIM_DATA 0R
GND
33 pF 33 pF 33 pF
GND GND
Figure 17: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector
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If (U)SIM card detection function is not needed, please keep USIM_DET unconnected. A reference circuit
for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure.
USIM_VDD
10 K
USIM_GND 100 nF
(U)SIM Card Connector
USIM_VDD
VCC GND
USIM_RST 0R
RST VPP
Module USIM_CLK
CLK IO
0R
USIM_DATA 0R
33 pF 33 pF 33 pF
GND GND
Figure 18: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector
In order to enhance the reliability and availability of the (U)SIM card in your applications, please follow the
criteria below in (U)SIM circuit design:
⚫ Place (U)SIM card connector as close to the module as possible. Keep the trace length less than 200
mm as far as possible.
⚫ Keep (U)SIM card signals away from RF and VBAT traces.
⚫ Keep the trace between the ground of (U)SIM card connector and USIM_GND short and wide. Keep
the trace width of USIM_GND and USIM_VDD no less than 0.5 mm to maintain the same electric
potential. If the ground is complete on your PCB, USIM_GND can be connected to PCB ground
directly.
⚫ To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and
shield them with surrounded ground.
⚫ In order to offer good ESD protection, it is recommended to add a TVS diode array whose parasitic
capacitance should not be more than 15 pF. The 0 Ω resistors should be added in series between the
module and the (U)SIM card to facilitate debugging. The 33 pF capacitors on USIM_DATA,
USIM_CLK and USIM_RST are used for filtering interference of EGSM900. Please note that the
(U)SIM peripheral circuit should be close to the (U)SIM card connector.
⚫ The pull-up resistor on USIM_DATA can improve anti-jamming capability of the (U)SIM card. If the
(U)SIM card traces are too long, or the interference source is relatively close, it is recommended to
add a pull-up resistor near the (U)SIM card connector.
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The module provides one integrated Universal Serial Bus (USB) interface which complies with the USB
2.0 specification and supports high-speed (480 Mbps) and full-speed (12 Mbps) modes. The USB
interface only supports USB slave mode and it can be used for AT command communication, data
transmission, software debugging and firmware upgrade.
Require differential
USB_DP 69 AIO USB differential data bus (+)
impedance of 90 Ω
Require differential
USB_DM 70 AIO USB differential data bus (-)
impedance of 90 Ω
Typical 5.0 V,
USB_VBUS 71 AI USB connection detect
Minimum 3.5 V
GND 72 Ground
For more details about the USB 2.0 specifications, please visit http://www.usb.org/home.
Reserve test points for debugging and firmware upgrade in your design. The following figure shows a
reference circuit of USB interface.
Test Points
Minimize these stubs
Module MCU
R3 NM_0R
VDD R4 NM_0R
L1 USB_DM
USB_DM
USB_DP USB_DP
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A common mode choke L1 is recommended to be added in series between the module and your MCU in
order to suppress EMI spurious transmission. Meanwhile, the 0 Ω resistors (R3 and R4) should be added
in series between the module and the test points so as to facilitate debugging, and the resistors are not
mounted by default. In order to ensure the integrity of USB data line signal, L1, R3 and R4 components
must be placed close to the module, and also these resistors should be placed close to each other. The
extra stubs of trace must be as short as possible.
The following principles should be complied with when designing the USB interface, so as to meet USB
2.0 specification.
⚫ Route the USB signal traces as differential pairs with ground surrounded. The impedance of USB
differential trace is 90 Ω.
⚫ Do not route signal traces under crystals, oscillators, magnetic device and RF signal traces. It is
recommended to route the USB differential traces in inner-layer of the PCB and to surround the
traces with ground on that layer and with ground planes above and below.
⚫ Pay attention to the influence of junction capacitance of ESD protection components on USB data
lines. Typically, the capacitance value should be less than 2.0 pF, and keep the ESD protection
components to the USB connector as close as possible.
The module provides three UART interfaces: the main UART interface, the debug UART interface and
auxiliary UART Interface. The following shows their features.
⚫ Main UART interface: The main UART interface supports 4800, 9600, 19200, 38400, 57600, 115200,
230400, 460800 and 921600 bps baud rates, and the default is 115200 bps. This interface is used for
data transmission and AT command communication and supports RTS and CTS hardware flow
control.
⚫ Debug UART interface: Only supports 921600 bps baud rate, used for the output of partial logs.
⚫ Auxiliary UART Interface
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The module provides 1.8 V UART interface. Use a level shifter if the application is equipped with a 3.3 V
UART interface. A level shifter TXS0108EPWR provided by Texas Instruments is recommended. The
following figure shows a reference design.
120K
OE GND
MAIN_RI A1 B1 RI_MCU
MAIN_DCD A2 B2 DCD_MCU
MAIN_CTS A3 Translator B3 CTS_MCU
MAIN_RTS A4 B4 RTS_MCU
MAIN_DTR A5 B5 DTR_MCU
MAIN_TXD A6 B6 RXD_MCU
MAIN_RXD A7 B7 TXD_MCU
51K 51K
A8 B8
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Another example with transistor circuit is shown as below. For the design of circuits shown in dotted lines,
see that shown in solid lines, but pay attention to the direction of connection.
4.7K
VDD_EXT VDD_EXT
1 nF
MCU/ARM Module
10K
TXD MAIN_RXD
RXD MAIN_TXD
1 nF
10K
VDD_EXT
VCC_MCU 4.7K
RTS MAIN_RTS
CTS MAIN_CTS
GPIO MAIN_DTR
EINT MAIN_RI
GPIO MAIN_DCD
GND GND
NOTE
1. Triode level transistor circuit solution is not suitable for applications with baud rates exceeding 460
kbps.
2. Please note that the module CTS is connected to the host CTS, and the module RTS is connected
to the host RTS.
The SPI interface of EC200U series module only supports master mode. It allows the full duplex
synchronous communication between module and peripherals. Its working voltage is 1.8 V, and the
maximum clock frequency is 25 MHz. If a universal 4-wire SPI interface is used to connect to Nor Flash, it
provides the basic Flash operation including reading, writing and erasing, and does not support the file
system.
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NOTE
The I2C bus supports simultaneous connection of multiple peripherals except for codec IC. In other
words, if a codec IC has been mounted on the I2C bus, no other peripherals can be mounted. If there is
no codec IC on the bus, multiple peripherals can be mounted.
The module provides one PCM interface which only supports slave mode.
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The following figure shows the reference design of PCM and I2C interface with external Codec chip:
BIAS
PCM_CLK BCLK
INN
PCM_SYNC LRCK
PCM_DOUT DAC
PCM_DIN ADC
LOUTP
I2C_SCL SCL
I2C_SDA SDA LOUTN
4.7K
4.7K
Module Codec
1.8 V
Figure 22: Reference Circuit of I2C and PCM Application with External Codec Chip
NOTE
The module provides one analog audio input channel and one analog audio output channel. The pin
definition is shown in the table below.
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Loudspeaker differential
LOUDSPK_P 73 AO
output (+)
AOUT
Loudspeaker differential
LOUDSPK_N 74 AO
output (-)
⚫ AIN channel is a differential input channel, which can be applied for input of microphone (usually an
electret microphone).
⚫ The AOUT channel is a differential output with a built-in power amplifier. The default configuration of
power amplifier is Class AB and the maximum driving power is 500 mW for 8 Ω load. When PA is
configured as Class D, the maximum driving power is 800 mW for 8 Ω load.
It is recommended to use the electret microphone with dual built-in capacitors (e.g. 10 pF and 33 pF) for
filtering out RF interference, thus reducing TDD noise. The 33 pF capacitor is applied for filtering out RF
interference when the module is transmitting at EGSM900. Without placing this capacitor, TDD noise
could be heard. The 10 pF capacitor here is used for filtering out RF interference at DCS1800. Please
note that the resonant frequency point of a capacitor largely depends on the material and production
technique. Therefore, you would have to discuss with their capacitor vendors to choose the most suitable
capacitor for filtering out high-frequency noises.
The severity degree of the RF interference in the voice channel during GSM transmitting largely depends
on the application design. In some cases, EGSM900 TDD noise is more severe; while in other cases,
DCS1800 TDD noise is more obvious. Therefore, a suitable capacitor can be selected based on the test
results. The filter capacitors on the PCB should be placed as close to the audio devices or audio
interfaces as possible, and the traces should be as short as possible. They should go through the filter
capacitors before arriving at other connection points.
In order to decrease radio or other signal interference, RF antennas should be placed away from audio
interfaces and audio traces. Power traces cannot be parallel with and also should be far away from the
audio traces.
The differential audio traces must be routed according to the differential signal layout rule.
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The reference circuit of the microphone interface is shown in the figure below:
10 pF 33 pF
0603 0603 Differential
layout 10 pF 33 pF
0603 ESD
0603
MIC_P
10 pF 33 pF 10 pF 33 pF
0603 0603 0603
Module 0603
MIC_N Electret
Microphone
10 pF 33 pF ESD
0603 0603
10 pF 33 pF
0603 0603
NOTE
MIC channel is sensitive to ESD, so it is not recommended to remove the ESD components used for
protecting the MIC.
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LTE Standard Module Series
Close to Speaker
GND GND GND
Differential
layout
10 pF 33 pF ESD
0603 0603
0R
LODUSPK_P
Module 10 pF 33 pF
0603 0603
LOUDSPK_N 0R 8Ω
10 pF 33 pF ESD
0603 0603
The LCD interface of the module supports a liquid crystal display with a maximum resolution of 320 × 240
and DMA transmission, 16-bit RGB565 and YUV formats.
LCD frame
LCD_FMARK 119 DI
synchronization
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LTE Standard Module Series
Imax = 200 mA
It is driven by the current
Sink current input. sink method, and connected
ISINK 140 PI
Backlight adjustment to the backlight cathode, the
brightness can be adjusted
with current control.
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LTE Standard Module Series
SD_DET DETECTIVE
C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 D7 C6 D6
NM NM NM NM NM NM VSS
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In SD card interface design, in order to ensure good communication performance with SD card, the
following design principles should be complied with:
⚫ The voltage range of SD card power supply VDD_3 V is 2.7–3.6 V and a sufficient current up to 0.8 A
should be provided. As the maximum output current of SDIO1_VDD is 150 mA which can only be
used for SDIO pull-up resistors, an externally power supply is needed for SD card.
⚫ To avoid jitter of bus, resistors R7–R11 are needed to pull up the SDIO to SDIO1_VDD. Value of
these resistors is among 10–100 kΩ and the recommended value is 100 kΩ. SDIO1_VDD should be
used as the pull-up power.
⚫ In order to adjust signal quality, it is recommended to add 0 Ω resistors R1–R6 in series between the
module and the SD card. The bypass capacitors C1–C6 are reserved and not mounted by default. All
resistors and bypass capacitors should be placed close to the module.
⚫ In order to offer good ESD protection, it is recommended to add a TVS diode on SD card pins near
the SD card connector with junction capacitance less than 15 pF.
⚫ Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals,
etc., as well as noisy signals such as clock signals, DC-DC signals, etc.
⚫ It is important to route the SDIO signal surrounded with ground on the layer and ground planes above
and below. The impedance of SDIO data trace is 50 Ω ±10 %.
⚫ Make sure the adjacent trace spacing is more than two times of the trace width and the load
capacitance of SDIO bus should be less than 15 pF.
⚫ It is recommended to keep the trace length difference between SDIO1_CLK and SDIO1_DATA [0:3]/
SDIO1_CMD less than 1 mm and the total routing length less than 50 mm.
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The SDIO interface rate is very high. To ensure that the interface design complies with the SDIO 1.1
specification, the following principles are recommended:
⚫ It is important to route the SDIO signal surrounded with ground on the layer and ground planes above
and below. The impedance of SDIO data trace is 50 Ω ±10 %.
⚫ Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals,
etc., as well as noisy signals such as clock signals, DC-DC signals, etc.
⚫ It is recommended to keep the trace length difference between WLAN_SDIO_CLK and
WLAN_SDIO_DATA [0:3]/ WLAN_SDIO_CMD less than 1 mm and the total routing length less than
50 mm.
⚫ Make sure the adjacent trace spacing is more than two times of the trace width and the load
capacitance of SDIO bus should be less than 15 pF.
NOTE
WLAN application interface conflicts with other functions, and please consult Quectel Technical
Supports for details.
The module provides three ADC interfaces. AT+QADC=0 can be used to read the voltage value on ADC0
pin. AT+QADC=1 can be used to read the voltage value on ADC1 pin. AT+QADC=2 can be used to read
the voltage value on ADC2 pin. For more details about AT+QADC, please refer to document [2].
In order to improve the accuracy of ADC, the trace of ADC should be surrounded with ground.
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NOTE
The external resistor should be less than 100 kΩ when the voltage divider resistor applies.
The network indication pins can be used to drive network status indication LEDs. The module has
NET_MODE and NET_STATUS for network status indication. The following tables describe pin definition
and logic level changes in different network status.
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Module VBAT
2.2K
Network 4.7K
Indicator
47K
3.21. STATUS
The STATUS pin is an output for module’s operation status indication. When the module is turned on
normally, the STATUS outputs high level.
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Module VBAT
2.2K
4.7K
STATUS
47K
NOTE
The STATUS cannot be used as the indication of power-down state when VBAT doesn’t supply power to
the module.
No matter on which port a URC is presented, the URC will trigger the behavior of MAIN_RI pin.
NOTE
The AT+QURCCFG allows you to set the main UART, USB AT port or USB modem port as the URC
output port. The USB AT port is used to send AT commands by default.
In addition, MAIN_RI behaviors can be configured flexibly. The default behaviors of the MAIN_RI are
shown as below.
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State Response
URC MAIN_RI outputs 120 ms low pulse when a new URC returns
The MAIN_RI behavior can be configured by AT+QCFG="urc/MAIN_RI/ring" and see document [2] for
details.
The module provides a USB_BOOT pin. You can pull up USB_BOOT to 1.8 V before VDD_EXT is
powered up, and the module will enter download mode when it is powered on. In this mode, the module
can upgrade firmware over USB interface.
If your application has a scan key, you can also press the "USB_BOOT + KEYOUT0" scan key before
powering on the module, and the module will enter the download mode when it is turned on.
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LTE Standard Module Series
MODULE MODULE
S1
KEYOUT0
VDD_EXT
Test points
2 1 4.7K
USB_BOOT USB_BOOT
3
GND
TVS TVS TVS
Close to test points
Close to test points
NOTE
Please make sure that VBAT is stable before PWRKEY is pulled down. It is recommended that the time
interval between powering up VBAT and pulling down PWRKEY is no less than 30 ms.
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4 Antenna Interfaces
EC200U series module provides a main antenna interface, a Wi-Fi Scan/Bluetooth antenna interface and
a GNSS antenna interface. The antenna ports have an impedance of 50 Ω.
The pin definition of main antenna and Wi-Fi Scan/Bluetooth antenna interfaces is shown below.
NOTE
EC200U series supports Bluetooth and Wi-Fi Scan functions. Due to the shared antenna interface, the
two functions cannot be used at the same time; Bluetooth and Wi-Fi Scan functions are optional
(supported or not supported simultaneously), please contact Quectel Technical Supports for details.
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NOTE
The GSM network access technology of EC200U-CN is optional. If the module that you select doesn’t
support GSM network access technology, there is no corresponding frequency band.
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LTE Standard Module Series
A reference design of ANT_MAIN and ANT_BT/WIFI_SCAN is shown as below. A π-type matching circuit
should be reserved for better RF performance. The capacitors are not mounted by default.
Main
Module antenna
R1 0R
ANT_MAIN
C1 C2
NM NM
Wi-Fi Scan/
Bluetooth
antenna
R2 0R
ANT_BT/WIFI
_SCAN
C3 C4
NM NM
NOTE
1. In order to improve the receiving sensitivity, it is necessary to ensure the proper distance between
the main antenna and Wi-Fi Scan/Bluetooth receiving antenna.
2. Place the π-type matching components (R1 & C1 & C2 and R2 & C3 & C4) as close to the antenna
as possible.
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The following tables list the pin definition and frequency characteristics of the GNSS antenna interface
respectively.
50 Ω impedance.
ANT_GNSS 47 AI GNSS antenna interface
If unused, keep it open.
VDD
0.1 uF GNSS
10R
Antenna
Module
47 nH
0R 100 pF
ANT_GNSS
NM NM
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LTE Standard Module Series
NOTE
1. An external LDO can be selected to supply power according to the active antenna requirement.
2. The VDD circuit is not needed if you select a passive antenna.
For user’s PCB, the characteristic impedance of all RF traces should be controlled as 50 Ω. The
impedance of the RF traces is usually determined by the trace width (W), the materials’ dielectric constant,
height from the reference ground to the signal layer (H), and the space between the RF trace and the
ground (S). Microstrip and coplanar waveguide are typically used in RF layout to control characteristic
impedance. The following figures are reference designs of microstrip or coplanar waveguide with different
PCB structures.
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LTE Standard Module Series
Figure 33: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground)
Figure 34: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground)
In order to ensure RF performance and reliability, the following principles should be complied with in RF
layout design:
⚫ Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to
50 Ω.
⚫ The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully
connected to ground.
⚫ The distance between the RF pins and the RF connector should be as short as possible, and all the
right-angle traces should be changed to curved ones. The recommended trace angle is 135°.
⚫ There should be clearance area under the signal pin of the antenna connector or solder joint.
⚫ The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around
RF traces and the reference ground could help to improve RF performance. The distance between
the ground vias and RF traces should be no less than two times the width of RF signal traces (2 × W).
⚫ Keep RF traces away from interference sources, and avoid intersection and paralleling between
traces on adjacent layers.
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Type Requirements
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U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT.
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Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are
listed in the following table.
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NOTE
The power supply should be able to provide sufficient current up to 2.0 A to the module that only
supports LTE network, while 3.0 A at least should be provided for GSM network.
The operating and storage temperatures are listed in the following table.
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LTE Standard Module Series
7
Operating Temperature Range -35 +25 +75 ºC
8
Extended Temperature Range -40 +85 ºC
7 Within the operating temperature range, the module meets 3GPP specifications.
8 Within the extended temperature range, the module remains the ability to establish and maintain functions such as voice,
SMS, data transmission, etc., without any unrecoverable malfunction. Radio spectrum and radio network are not influenced,
while one or more specifications, such as Pout, may exceed the specified tolerances of 3GPP. When the temperature
returns to the operating temperature range, the module meets 3GPP specifications again.
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NOTE
The GSM network access technology of EC200U-CN is optional. If the module that you select doesn’t
support GSM network access technology, there is no corresponding current consumption.
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5.5. Tx Power
The following table shows the RF output power of EC200U series module.
NOTE
The GSM network access technology of EC200U-CN is optional. If the module that you select doesn’t
support GSM network access technology, there is no corresponding RF output power.
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LTE Standard Module Series
LTE-FDD
23 dBm ±2 dB < -39 dBm
B1/B3/B5/B7/B8/B20/B28
NOTE
In GPRS 4 slots TX mode, the maximum output power is reduced by 6 dB. The design conforms to the
GSM specification as described in Chapter 13.16 of 3GPP TS 51.010-1.
5.6. Rx Sensitivity
The following tables show conducted RF receiving sensitivity of EC200U series module.
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NOTE
The GSM network access technology of EC200U-CN is optional. If the module that you select doesn’t
support GSM network access technology, there is no corresponding RF receiving sensitivity data.
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5.7. ESD
If the static electricity generated by various ways discharges to the module, the module maybe damaged
to a certain extent. Thus, please take proper ESD countermeasures and handling methods. For example,
wearing anti-static gloves during the development, production, assembly and testing of the module;
adding ESD protective components to the ESD sensitive interfaces and points in the product design.
Antenna Interfaces ±4 ±8 kV
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6 Mechanical Information
This chapter describes the mechanical dimensions of the module. All dimensions are measured in
millimeter. The tolerances for dimensions without tolerance values are ±0.2 mm.
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NOTE
The package warpage level of the module conforms to the JEITA ED-7306 standard.
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NOTE
Keep at least 3 mm between the module and other components on the motherboard to improve
soldering quality and maintenance convenience.
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NOTE
Images above are for illustration purpose only and may differ from the actual module. For authentic
appearance and label, please refer to the module received from Quectel.
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The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage
requirements are shown below.
1. Recommended Storage Condition: The temperature should be 23 ±5 °C and the relative humidity
should be 35–60 %.
3. The floor life of the module is 168 hours9 in a plant where the temperature is 23 ±5 °C and relative
humidity is below 60 %. After the vacuum-sealed packaging is removed, the module must be
processed in reflow soldering or other high-temperature operations within 168 hours. Otherwise, the
module should be stored in an environment where the relative humidity is less than 10 % (e.g. a
drying cabinet).
4. The module should be pre-baked to avoid blistering, cracks and inner-layer separation in PCB under
the following circumstances:
9 This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. It is recommended to start the
solder reflow process within 24 hours after the package is removed if the temperature and moisture do not conform to, or
are not sure to conform to IPC/JEDEC J-STD-033. And do not remove the packages of tremendous modules if they are not
ready for soldering.
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NOTE
1. To avoid blistering, layer separation and other soldering issues, extended exposure of the module to
the air is forbidden.
2. Take out the module from the package and put it on high-temperature-resistant fixtures before
baking. All modules must be soldered to PCB within 24 hours after the baking, otherwise put them
in the drying oven. If shorter baking time is desired, see IPC/JEDEC J-STD-033 for the baking
procedure.
3. Pay attention to ESD protection, such as wearing anti-static gloves, when touching the modules.
Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the
stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly
so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the
thickness of stencil for the module is recommended to be 0.18–0.20 mm. For more details, please refer to
document [4].
It is suggested that the peak reflow temperature is 235–246 ºC, and the absolute maximum reflow
temperature is 246 ºC. To avoid damage to the module caused by repeated heating, it is strongly
recommended that the module should be mounted after reflow soldering for the other side of PCB has
been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and
related parameters are shown below.
Temp. (°C)
Reflow Zone
Max slope: Cooling down slope:
2~3 °C/s C -1.5 ~ -3 °C/s
246
235
217
B D
200
Soak Zone
150 A
100
Max slope: 1~3 °C/s
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Factor Recommendation
Soak Zone
Soak time (between A and B: 150 °C and 200 °C) 70 to 120 sec
Reflow Zone
Reflow Cycle
NOTE
1. During manufacturing and soldering, or any other processes that may contact the module directly,
NEVER wipe the module’s shielding can with organic solvents, such as acetone, ethyl alcohol,
isopropyl alcohol, trichloroethylene, etc. Otherwise, the shielding can may become rusted.
2. The shielding can for the module is made of Cupro-Nickel base material. It is tested that after 12
hours’ Neutral Salt Spray test, the laser engraved label information on the shielding can is still
clearly identifiable and the QR code is still readable, although white rust may be found.
3. If a conformal coating is necessary for the module, do NOT use any coating material that may
chemically react with the PCB or shielding cover, and prevent the coating material from flowing into
the module.
4. Due to the complexity of the SMT process, please contact Quectel Technical Supports in advance
for any situation that you are not sure about, or any process (e.g. selective soldering, ultrasonic
soldering) that is not mentioned in document [4].
The module adopts carrier tape packaging and details are as follow:
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W P T A0 B0 K0 K1 F E
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øD1 øD2 W
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8 Appendix References
Document Name
[1] Quectel_UMTS<E_EVB_User_Guide
[2] Quectel_EC200U&EG915U_Series_AT_Commands_Manual
[3] Quectel_RF_Layout_Application_Note
[4] Quectel_Module_SMT_User_Guide
Abbreviation Description
CS Coding Scheme
DL Downlink
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FR Full Rate
FTPS FTP-over-SSL
GND Ground
HR Half Rate
ME Mobile Equipment
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PF Paging Frame
RF Radio Frequency
SM Smart Media
UL Uplink
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