HV550QUB F70 Product Spec P2 20200521 1666592586 PDF

PROPRIETARY NOTE
THIS SPECIFICATION IS THE PROPERTY OF BOE CQ AND SHALL NOT BE

REPRODUCED OR COPIED WITHOUT THE WRITTEN PERMISSION OF BOE AND
MUST BE RETURNED TO BOE UPON ITS REQUEST
TITLE : HV550QUB-F70
Product Specification
Rev. P2
Wuhan BOE Optoelectronics Technology Co., Ltd
SPEC. NUMBER PRODUCT GROUP Rev. P2 ISSUE DATE PAGE

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PRODUCT GROUP REV ISSUE DATE
Customer SPEC Rev. P2 2020.05.21
REVISION HISTORY
(√ )preliminary specification
( )Final specification
Revision No. Page Description of changes Date Prepared
P0 - Initial Release 2020.02.27 Liu Wenliang
P1 - Update TBD information 2020.03.27 Liu Wenliang
Update Open Cell
P2 5/25/27 2020.05.21 Liu Wenliang
Transmittance & Weight
SPEC. NUMBER SPEC. TITLE PAGE

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HV550QUB-F70 Product Specification
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Contents
No. Item Page

1.0 GENERAL DESCRIPTION 4
2.0 ABSOLUTE MAXIMUM RATINGS 6
3.0 ELECTRICAL SPECIFICATIONS 7
4.0 INTERFACE CONNECTION 11
5.0 SIGNAL TIMING WAVEFORMS OF INTERFACE SIGNAL 19
6.0 SIGNAL TIMING SPECIFICATION 21
7.0 OPTICAL SPECIFICATION 24
8.0 MECHANICAL CHARACTERISTICS 26
9.0 RELIABILITY TEST 27
10.0 HANDLING & CAUTIONS 28
11.0 PRODUCT SERIAL NUMBER 29
12.0 PACKING 30
13.0 APPENDIX 32

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1.0 GENERAL DESCRIPTION

1.1 Introduction
HV550QUB-F70 is a color active matrix TFT LCD open cell using amorphous silicon TFT's
(Thin Film Transistors) as an active switching device. This module has a 54.64 inch
diagonally measured active area with UHD resolutions (3840 horizontal by 2160 vertical
pixel array). Each pixel is divided into RED, GREEN, BLUE dots which are arranged in
island and this module can display 1.07G colors. The TFT-LCD panel used for this module
is adapted for a low reflection and higher color type.
VDD
G1
+12.0V
V by one Timing Controller
CN1
8 lanes
HTPDN (51pin)
[V by one Rx & CEDS
Tx integrated] GOA TFT - LCD Panel
(3840 × RGB × 2160 pixels)
LOCKN
G2160
S5761 S1
Power Circuit Source Driver

RGB(CEDS)
Block
1.2 Features
⚫ V by one interface with 8 lanes
⚫ High-speed response
⚫ Low color shift image quality
⚫ 8-bit + FRC color depth, display 1.07G colors
⚫ High luminance and contrast ratio, low reflection and wide viewing angle
⚫ DE (Data Enable) only mode
⚫ ADS technology is applied for high display quality
⚫ RoHS compliant

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1.0 GENERAL DESCRIPTION

1.3 Application
⚫ Home Alone Multimedia TFT-LCD TV
⚫ Display Terminals for Control System
⚫ Ultra High Definition TV(UHD TV)
⚫ AV application Products
1.4 General Specification

< Table 1. General Specifications >
Parameter Specification Unit Remark
Active area 1209.6(H) × 680.4(V) mm

Number of pixels 3840*(RGB)*2160 pixels
Pixel pitch 315(H) ×315(V) μm
Pixel arrangement Pixels RGB Island
Display colors 1.07G (8bits + FRC ) colors
Display mode Transmission mode, Normally Black
At center
Open Cell
5.25 % point with
Transmittance
BOE BLU
Weight 2.48 Kg
With TCON
Power Consumption 12 Watt
board
Haze 1% , 3H, Anti-Glare Layer
Surface Treatment (for Front Polarizer)
Clear(for Rear Polarizer )

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2.0 ABSOLUTE MAXIMUM RATINGS

The followings are maximum values which, if exceed, may cause faulty operation or
damage to the unit. The operational and non-operational maximum voltage and current
values are listed in Table 2.
< Table 2. Open Cell Absolute Maximum Ratings > [VSS=GND=0V]
Parameter Symbol Min. Max. Unit Remark
Power Supply Voltage VDD VSS-0.3 13.2 V Ta = 25 ℃

Operating Temperature TOP 0 +50 ℃
TSUR -20 +60 ℃
Storage Temperature
TST -20 +60 ℃
Note 1
Operating Ambient
Hop 10 80 %RH
Humidity
Storage Humidity Hst 10 80 %RH
Note 1 : Temperature and relative humidity range are shown in the figure below.
Note 2 : Wet bulb temperature should be 39 ℃ max. and no condensation of water.

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3.0 ELECTRICAL SPECIFICATIONS

3.1 TFT LCD Open Cell
< Table 3. Open Cell Electrical Specifications > [Ta =25± 2 ℃]
Values
Parameter Symbol Unit Remark
Min Typ Max
Power Supply Input Voltage VDD 10.8 12 13.2 Vdc
Power Supply Ripple Voltage VRP - - 600 mV
Power Supply Current IDD 1.0 2.2 A
Note 1
Power Consumption PDD 12 26.4 Watt
Rush current IRUSH - - 10 A Note 2
Differential Input High
VLVTH - - +50 mV
Threshold Voltage
V by One Differential Input Low
VLVTL -50 - - mV
Interface Threshold Voltage
Common Input Voltage VLVC - - - V
Terminating Resistor Rt 90 100 110 ohm
Input High Threshold
VIH 2.0 - 3.3 V
CMOS Voltage
Interface Input Low Threshold
VIL 0 - 0.8 V
Voltage
Note 1 : The supply voltage is measured and specified at the interface connector of LCM.
The current draw and power consumption specified is for VDD=12.0V.
a) Typ: Mosaic 7X5(L0/L255) b) Max : Vertical Sub Line(L255) c) Flicker Test Pattern
R G B R G B R G
R G B R G B R G
R G B R G B R G B R G B
R G B R G B R G
R G B R G B R G
R G B R G B R G B R G B
R G B R G B R G
R G B R G B R G R G B R G B R G B R G B
R G B R G B R G
R G B R G B R G R G B R G B R G B R G B
Note 2 : The duration of rush current is about 2ms and rising time of Power Input is 1ms(min).

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3.2 VCOM I2C Bus Format
Setp1 Read VCOM
Slave Address (0x40h) Control Address (0xFFh) (0xFFh write data 00h)
Slave Slave Slave
Start 0 1 0 0 0 0 0 0 ACK 1 1 1 1 1 1 1 1 ACK 0 0 0 0 0 0 0 0 ACK Stop
Slave Address (0x40h) VCOM Address (0x25h)

Slave Slave
Start 0 1 0 0 0 0 0 0 ACK 0 0 1 0 0 1 0 1 ACK
Slave Address (0x41h) (Data Read from 0x25h) (Data Read from 0x26h)
Re- Slave Master Master
start
0 1 0 0 0 0 0 1 ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK D7 D6 D5 D4 D3 D2 D1 D0 NACK
Stop
Setp2 Adjust VCOM (Write DAC)
Setp3 Write VCOM (Write MTP)

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3.3 Interval of step to step

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4.0 INTERFACE CONNECTION

4.1 V by One CN (51Pin) Connector : F05035-51P-H(CHANGTONG) or Equivalent.
< Table 7. Open Cell Input Connector Pin Configuration >
Pin No Symbol Description Pin No Symbol Description
1 VDD Power Supply +12.0V 27 GND Ground
2 VDD Power Supply +12.0V 28 Rx0n V-by-One HS Data Lane 0
3 VDD Power Supply +12.0V 29 Rx0p V-by-One HS Data Lane 0
6 VDD Power Supply +12.0V 32 Rx1p V-by-One HS Data Lane 1
9 NC No Connection 35 Rx2p V-by-One HS Data Lane 2
10 GND Ground 36 GND Ground
11 GND Ground 37 Rx3n V-by-One HS Data Lane 3
12 GND Ground 38 Rx3p V-by-One HS Data Lane 3
13 GND Ground 39 GND Ground
14 GND Ground 40 Rx4n V-by-One HS Data Lane 4
16 NC No Connection 42 GND Ground
17 NC No Connection 43 Rx5n V-by-One HS Data Lane 5
18 SDA SDA 44 Rx5p V-by-One HS Data Lane 5
19 SCL SCL 45 GND Ground
SEL_SECTIO Low or NC: 1 section(default)
22 48 GND Ground
N High: 2 section
24 GND Ground 50 Rx7p V-by-One HS Data Lane 7
25 HTPDN Hot plug detect 51 GND Ground
26 LOCKN Lock detect
Rear view of LCM BIST Pattern

F05035-51P-H
1 51
or Equivalent)

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Notes : 1. NC (Not Connected) : This pins are only used for BOE internal operations.
2.BIST : This pin is used for selecting display pattern mode when input DE or input CLOCK quits toggling.
3. Circuit Block Diagram of HTPDN/LOCKN/SEL_SECTION.
DVDD
4.7K
NC NC
0R
Pin 25：HTPDN
0R
Pin 26：LOCKN TCON IC
0R
Pin 22：SEL_SECTION 4.7K
0R
GND GND
4. Circuit Block Diagram Pin of SDA/SCL/WP.
DVDD
4.7K
4.7K
0R
Pin 18：SDA
0R VCOM IC
Pin 19：SCL

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3.2 IC Characteristics
< Table 4. TCON Characteristics >
Values
Min Typ Max
TCON Surface Temperature TTS - - 110 ℃ Note
Note 1 : Any point on the TCON surface must be less than 110 ℃ under any conditions.
Note 2 : This test condition is based on BOE module.
< Table 5. Driver Characteristics >
Values
Min Typ Max
Driver Surface Temperature TDS - - 125 ℃ Note
Note 3 : Any point on the driver surface must be less than 125 ℃ under any conditions.
Note 4: This test condition is based on BOE module.
< Table 6. PMIC Characteristics >
Values
Min Typ Max
PMIC Surface Temperature TPS - - 100 ℃ Note
Note 5 : Any point on the PMIC surface must be less than 100 ℃ under any conditions.
Note 6: This test condition is based on BOE module.

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4.2 V by one Misc. Setting for 1 Section.
a) System side has to put pull high resistor on LOCKN & HTPDN pins.
b) V by one data mapping as follows.
< Table 8. V by one setting &data mapping table >
1 Section
Hactive = 3840
Port0 Port1 Port2 Port3
Lane0 Lane1 Lane2 Lane3 Lane4 Lane5 Lane6 Lane7
FSBS FSBS FSBS FSBS FSBS FSBS FSBS FSBS
V Blanking
FSBP FSBP FSBP FSBP FSBP FSBP FSBP FSBP

… … … … … … … …
FSBE_SR FSBE_SR FSBE_SR FSBE_SR FSBE_SR FSBE_SR FSBE_SR FSBE_SR
Pixel 1 Pixel 2 Pixel 3 Pixel 4 Pixel 5 Pixel 6 Pixel 7 Pixel 8
Line 1
… … … … … … … …
… … … … … … … …
H Blanking

… … … … … … … …
FSBE FSBE FSBE FSBE FSBE FSBE FSBE FSBE
Line 2
… … … … … … … …
… … … … … … … …

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4.3 V by one Misc. Setting for 2 Section.
a) System side has to put pull high resistor on LOCKN & HTPDN pins.
b) V by one data mapping as follows.
< Table 9. V by one setting &data mapping table >
2 Section
Hactive = 3840
Port0 Port1 Port2 Port3
Lane0 Lane1 Lane2 Lane3 Lane4 Lane5 Lane6 Lane7
V Blanking

… … … … … … … …
FSBE_SR FSBE_SR FSBE_SR FSBE_SR FSBE_SR FSBE_SR FSBE_SR FSBE_SR
Line 1
… … … … … … … …
… … … … … … … …
H Blanking

… … … … … … … …
FSBE FSBE FSBE FSBE FSBE FSBE FSBE FSBE
Line 2
… … … … … … … …
… … … … … … … …

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4.4 TCON Board Input CNT &FFC Drawing
-51pin Connector Drawing-F05035-51P-H

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-51pin Connector Drawing-PM.FPC.LVS0505101

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4.4 TCON Board Input CNT &FFC Drawing
-FFC Drawing
蓝色补强板侧
-0.00
-0.00
0.3+0.03
0.3+0.03
0.15
8.00(蓝色补强板) 8.00(蓝色补强板)
2.30±0.3
2.30Min
2.30±0.5 2.30±0.5
R0.60
-0.02
0.775+0.05
30.00±0.05
0.50±0.03
2.275±0.04
25.00±0.05
29.55±0.03
2.265±0.04
0.32±0.03
金手指面
-0.02
0.775+0.05
两端裁切一样
R0.60
3.00±0.05
4.60±0.10
100.00mm±0.5
Note: It is BOE FFC drawing. Please refer to only one side for T-con Board.

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4.5 TCON Board Output CNT &FFC Drawing
-60pin Connector Drawing-PM.FPC.LVS4906001
- FFC Drawing
Note: TCON Board output CNT = XPCBA Input CNT.

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-Input CNT & XPCBA CNT：F05049-60P-H
- FFC Drawing

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5.0 SIGNAL TIMING WAVEFORMS OF INTERFACE SIGNAL

5.1 Input data specification
<Table 10. Vx1 Byte length and Color mapping>
Color data mapping
Byte Packer input
30 bpp RGB 24 bpp RGB
Bit-0 R2 R0
Bit-1 R3 R1
Bit-2 R4 R2
Bit-3 R5 R3
0
Bit-4 R6 R4
Bit-5 R7 R5
Bit-6 R8 R6
Bit-7 R9 R7
Bit-8 G2 G0
Bit-9 G3 G1
Bit-10 G4 G2
Bit-11 G5 G3
1
Bit-12 G6 G4
Bit-13 G7 G5
Bit-14 G8 G6
Bit-15 G9 G7
Bit-16 B2 B0
Bit-17 B3 B1
Bit-18 B4 B2
Bit-19 B5 B3
2
Bit-20 B6 B4
Bit-21 B7 B5
Bit-22 B8 B6
Bit-23 B9 B7
Bit-24 - -
Bit-25 - -
Bit-26 B0 -
Bit-27 B1 -
3
Bit-28 G0 -
Bit-29 G1 -
Bit-30 R0 -
Bit-31 R1 -
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6.0 SIGNAL TIMING SPECIFICATION

6.1 Timing Parameters(DE only mode)
< Table 11. Timing Table >
Item Symbols Min Typ Max Unit
Frequency 1/Tc 69 74.25 77 MHz

Frame Rate F 57 60 62 Hz
Total TV 2180 2250 2450 TH
Vertical
Display TVD 2160 TH
Blank TVB 20 90 290 TH
Total TH 530 550 570 TCLK
Horizontal Display THD - 480 - TCLK
Blank THB 50 70 90 TCLK
Item Symbols Min Typ Max Unit
Frequency 1/Tc 69 74.25 77 MHz

Frame Rate F 47 50 51 Hz
Total TV 2180 2700 2715 TH
Vertical
Display TVD 2160 TH
Blank TVB 20 540 555 TH
Total TH 530 550 570 TCLK
Horizontal Display THD - 480 - TCLK
Blank THB 50 70 90 TCLK
Notes: This product is DE only mode. The input of Hsync & Vsync signal does not have an effect on normal
operation.

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6.2 Signal Timing Waveform

< Table 12. Signal Timing Waveforms Table >
Parameter Symbol Condition Min Typ Max Unit
3-byte 380 tTCIP/30 1667 PS
Unit Interval(VBO Operation
tRBIT 4-byte 285 tTCIP/40 1250 PS
Bit Rate)
5-byte 266 tTCIP/50 1000 PS
Eye Width at Package Pin tREYE - - 0.5 - UI
Eye Width Position A at
tA - - 0.25 - UI
Package Pin
Eye Width Position B at
tB - - 0.3 - UI
Package Pin
Eye Width Position Cat
tC - - 0.7 - UI
Package Pin
Eye Width Position D at
tD - - 0.75 - UI
Package Pin
Eye Width Position E at
tE - - 0.7 - UI
Package Pin
Eye Width Position F at
tF - - 0.3 - UI
Package Pin
Effective Veye level Veye - - 50 - mv
Intra – pair Skew TTOSK_intra - -0.3 - 0.3 UI

Inter – pair Skew TTOSK_inter - -5 - 5 UI
30KHz
SSCG - -0.5 0.5 %
modulation
tRBIT Y[mV]
A 0
B C
Veye B 50
A D Y-0 mV
Veye C 50
F E
D 0
E -50
tREYE
F -50
X=0 UI X=1 UI

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6.3 Input Signals, Basic Display Colors and Gray Scale of Colors
< Table 13. Input Signal and Display Color Table >
Input Color Data
Color MSB RED LSB MSB GREEN LSB MSB BLUE LSB
R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(1023) 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green(1023) 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
Basic Blue(1023) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1
Color Cyan 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Magenta 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1
Yellow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
RED(000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RED(001) 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R ----
RED(1022) 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RED(1023) 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green (000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green (000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0
G ----
Green (1022) 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0
Green (1023) 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
Blue(000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Blue(000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
B ----
Blue(1022) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0
Blue(1023) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1

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6.0 SIGNAL TIMING SPECIFICATION

6.4 Power Sequence
0.9VDD
0.9VDD
Power Supply 0.1VDD 0.1VDD
VDD 0V
T1 T6
3.3V T7
HTPDN
T2
T3
LOCKN
0V
CTR Data
Interface Signal
( Input Data ) 0V
T5
T4
BLU ON/OFF enable
( VON/OFF ) 0V
HOST I2C T8 T9
Command 0V
< Table 7. Sequence Table >

Values
Parameter Units
Min Typ Max
T1 0.5 - 10 ms
T2 0 - - ms
T3 - - 500 ms
T4 T2+T3 - - -
T5 100 - - ms
T6 0 - - ms
T7 1 - - s
T8 1 - - s
T9 Depends on I2C command ms
Notes: 1. Even though T1 is over the specified value, there is no problem if I2T spec of fuse is satisfied.
2. Back Light must be turn on after power for logic and interface signal are valid.
3.BLU enable must after input data.
4.HOST I2C operate after BLU enable.
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7.0 OPTICAL SPECIFICATION

The test of optical specifications shall be measured in a dark room (ambient luminance1 lux
and temperature=252℃) with the equipment of Luminance meter system (Goniometer
system and PR730) and test unit shall be located at an approximate distance 180cm from
the LCD surface at a viewing angle of θ and Φ equal to 0. We refer to θØ=0 (=θ3 ) as the 3
o’clock direction (the “right”), θØ=90 (= θ12 ) as the 12 o’clock direction (“upward”), θØ=180 (= θ9 )
as the 9 o’clock direction (“left”) and θØ=270(= θ6 ) as the 6 o’clock direction (“bottom”). While
scanning θ and/or Ø, the center of the measuring spot on the Display surface shall stay fixed.
The measurement shall be executed after 30 minutes warm-up period. VDD shall be 12.0V
+/-10% at 25C. Optimum viewing angle direction is 6 ’clock.
< Table 15. Optical Table >

[VDD = 12.0V, Frame rate = 120Hz, Ta =25± 2 ℃]
Parameter Symbol Condition Min Typ Max Unit Remark
Θ3 - 89 - Deg.
Horizontal
Viewing Θ9 - 89 - Deg.
Angle CR > 10 Note1
Θ12 - 89 - Deg.
Vertical
Θ6 - 89 - Deg.
Contrast ratio CR 1000 1200 - Note2
Wx 0.289 -
White
Wy 0.325 -
Rx Θ = 0 0.647 -
Red
Ry (Center) 0.341 - Based on
Reproduction
Normal -0.03 +0.03 BOE Bac-
of color Gx 0.309 -
Viewing klight
Green Angle
Gy 0.621
Bx 0.151 -
Blue
By 0.069 -
Response Time G to G Tg - 8 10 ms Note4
Gamma Scale 2.0 2.2 2.4 -
Cell Transmittance 4.73 5.25 % Note 5

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Note :
1. Viewing angle is the angle at which the contrast ratio is greater than 10. The viewing are
determined for the horizontal or 3, 9 o’clock direction and the vertical or 6, 12 o’clock
direction with respect to the optical axis which is normal to the LCD surface.
2. Contrast measurements shall be made at viewing angle of = 0 and at the center of the LCD
surface. Luminance shall be measured with all pixels in the view field set first to white, then
to the dark (black) state. (See Figure 1 shown in Appendix) Luminance Contrast Ratio (CR)
is defined mathematically.
Luminance when displaying a white raster

CR =
Luminance when displaying a black raster
3. The color chromaticity coordinates specified in Table 15 shall be calculated from the spectral
data measured with all pixels first in red, green, blue. Measurements shall be
made at the center of the panel. The BLU is used by BOE.
4. Response time Tg is the average time required for display transition by switching the input
signal as below table and is based on Frame rate fV =60Hz to optimize.
Each time in below table is defined as Figure 2 and shall be measured by switching the input
signal for “any level of gray(bright)”and “any level of gray(dark)”
5. Definition of Transmittance (T%) :

Module is with white(L255) signal input
Luminance of LCD Module
Transmittance = × 100 %
Luminance of BLU

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8.0 MECHANICAL CHARACTERISTICS

8.1 Dimensional Requirements
Figure 3(located in Appendix) shows mechanical outlines for the model HV550QUB-F70.
Other parameters are shown in Table 16.
< Table 16. Dimensional Parameters >
Parameter Specification Unit

Active area 1209.6 (H) × 680.4(V) mm
Pixel pitch 315 (H) × 315 (V) μm
Number of pixels 3840(H) × 2160(V) (TFT pixel) pixels
3840(H) × 2160(V) (1 CF pixel= R + G + B dots)
Weight 2.48 kg

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9.0 RELIABILITY TEST

The Reliability test items and its conditions are shown in below.
< Table 17. Reliability Test Parameters >
No Test Items Conditions
1 High temperature storage test Ta = 60 ℃, 240 hrs

2 Low temperature storage test Ta = -20 ℃, 240 hrs
3 High temperature & high Ta = 50 ℃, 80%RH, 240hrs
humidity operation test
4 High temperature operation test Ta = 50 ℃, 240hrs
5 Low temperature operation test Ta = 0 ℃, 240hrs
6 Thermal shock Ta = -20 ℃ ↔ 60 ℃ (0.5 hr), 100 cycle
This test condition is based on BOE module.

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10.0 HANDLING & CAUTIONS

(1) Cautions when taking out the Panel
 Pick the pouch only, when taking out panel from a shipping package.
(2) Cautions for handling the panel
 As the electrostatic discharges may break the LCD panel, handle the LCD
panel with care. Peel a protection sheet off from the LCD panel surface as
slowly as possible.
 As the LCD panel and back - light element are made from fragile glass material,
impulse and pressure to the LCD panel should be avoided.
 As the surface of the polarizer is very soft and easily scratched, use a soft dry
cloth without chemicals for cleaning.
 Do not pull the interface connector in or out while the LCD panel is operating.
 Put the panel display side down on a flat horizontal plane.
 Handle connectors and cables with care.
(3) Cautions for the operation
 When the panel is operating, do not lose CLK, ENAB signals. If any one of
these signals is lost, the LCD panel would be damaged.
 Obey the supply voltage sequence. If wrong sequence is applied, the panel
would be damaged.
(4) Cautions for the atmosphere
 Dew drop atmosphere should be avoided.
 Do not store and/or operate the LCD panel in a high temperature and/or
humidity atmosphere. Storage in an electro-conductive polymer packing pouch
and under relatively low temperature atmosphere is recommended.
(5) Cautions for the panel characteristics
 Do not apply fixed pattern data signal to the LCD panel at product aging.
 Applying fixed pattern for a long time may cause image sticking.

S8-65-AB-010 2929OF 33
DAS-RD-2019018-O A4(210 X 297)
10.0 HANDLING & CAUTIONS

(6) Other cautions
 In particular in winter, Before putting Panel boxes on the line, aging process is
required to make the temperature of products similar to the temperature of
workplace.
 Response time depends on the temperature.(In lower temperature, it becomes
longer.)
 Do not disassemble and/or re-assemble LCD panel.
 Do not re-adjust variable resistor or switch etc.
When returning the panel for repair or etc., Please pack the panel not to be
broken. We recommend to use the original shipping packages.
 Product assembled into module should be stored in the bag(cover case).
 Acetic acid type and chlorine type materials for the cover case are not desirable
because the former generates corrosive gas of attacking the polarizer at high
temperature and the latter causes circuit break by electro-chemical reaction.
 Be careful not to give any extra mechanical stress to the panel when designing
the set, and BLU.
 Do not pull, fold or bend the source COF and the gate COF in any processes
 If the liquid crystal material leaks from the panel, this should be kept away from
the eyes or mouth. If this contacts to hands, legs, or clothes, you must washed it
away with soap thoroughly and see a doctor for the medical examination.

S8-65-AB-010 3030OF 33
DAS-RD-2019018-O A4(210 X 297)
11.0 PRODUCT SERIAL NUMBER
MDL ID Naming Rule:

S8-65-AB-010 31 OF 33
DAS-RD-2019018-O A4(210 X 297)
12.0 PACKING
BOE provides the standard shipping container for customers, unless customer specifies
their packing information. The standard packing method and Barcode information are
shown in below.
12.1 Packing Order
Put 1Pcs EPE Pad in the box, then Totally 16pcs panels and 17Pcs EPE
put 1Pcs Panel into the box Pad per box
Place wrap film around the boxes. Put totally 8boxes and 1 cover on pallet.
Pack with 4 packing belts.

S8-65-AB-010 32 OF 33
DAS-RD-2019018-O A4(210 X 297)
12.2 Packing Note

 Box Dimension : 1350mmL× 868mmW× 121mmH
 Package Quantity in one Box : 16pcs
 Wood Pallet Dimension : 1380mmL x 900mmW x130mmH
12.3 Box Label
 Label Size : 110 mm (L)  55 mm (W)
 Contents
Model : HV550QUB-F70
Q`ty : 16 Open Cell in one box.
Serial No. : Box Serial No. See next page for detail description.
Date : Packing Date
FG Code : FG Code of Product
1. FG-CODE(前12位)
2. 包装数量
① ②
3. Box ID
③ ④ 4. 包装日期
5. FG-Code后四位
⑤
Box ID Naming Rule:

S8-65-AB-010 33 OF 33
DAS-RD-2019018-O A4(210 X 297)
13.0 APPENDIX
< Figure 1. Measurement Set Up >
< Figure 2. Response Time Testing >

S8-65-AB-010 34 OF 33
DAS-RD-2019018-O A4(210 X 297)
13.0 APPENDIX
< Figure 3. TFT-LCD Open Cell Outline Dimensions (Front View) >
背面 IC Resin区域 22*6

S8-65-AB-010 35 OF 33
DAS-RD-2019018-O A4(210 X 297)
13.0 APPENDIX
< Figure 4. TFT POL Protect Film Peeling Method >
1. Be sure to peel off slowly(recommended more than 7sec) and constant speed.
2. Peeling direction shows in Figure 4.
3. Be sure to ground person with adequate methods such as the anti-static wrist band.
4. Be sure to ground each S-PCB while peeling off the protection film.
5. Ionized air should be blown over during peeling action.
6. The protection film must not touch drivers and S-PCBs.
7. If adhesive may remain on the polarizer after the protection film peeling off, please rem
ove with isopropyl-alcohol.

S8-65-AB-010 36 OF 33
DAS-RD-2019018-O A4(210 X 297)
13.0 APPENDIX
(a)This Product is Reverse type display Mode
HV550QUB-F70
X-PCB_L X-PCB_R
1 60 1 60
60 1 60 1
CPCBA
1 51
1. Panel scan direction is from top to bottom.

2. Driver data latch direction is from right to left.

S8-65-AB-010 37 OF 33
DAS-RD-2019018-O A4(210 X 297)

HV550QUB F70 Product Spec P2 20200521 1666592586 PDF

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PROPRIETARY NOTE

THIS SPECIFICATION IS THE PROPERTY OF BOE CQ AND SHALL NOT BE

Wuhan BOE Optoelectronics Technology Co., Ltd

SPEC. NUMBER PRODUCT GROUP Rev. P2 ISSUE DATE PAGE

Customer SPEC Rev. P2 2020.05.21

SPEC. NUMBER SPEC. TITLE PAGE

Customer SPEC Rev. P2 2020.05.21

No. Item Page

SPEC. NUMBER SPEC. TITLE PAGE

Customer SPEC Rev. P2 2020.05.21

1.0 GENERAL DESCRIPTION

Power Circuit Source Driver

SPEC. NUMBER SPEC. TITLE PAGE

Customer SPEC Rev. P2 2020.05.21

1.0 GENERAL DESCRIPTION

1.4 General Specification

Parameter Specification Unit Remark

Active area 1209.6(H) × 680.4(V) mm

SPEC. NUMBER SPEC. TITLE PAGE

Customer SPEC Rev. P2 2020.05.21

2.0 ABSOLUTE MAXIMUM RATINGS

< Table 2. Open Cell Absolute Maximum Ratings > [VSS=GND=0V]

Parameter Symbol Min. Max. Unit Remark

Power Supply Voltage VDD VSS-0.3 13.2 V Ta = 25 ℃

SPEC. NUMBER SPEC. TITLE PAGE

Customer SPEC Rev. P2 2020.05.21

3.0 ELECTRICAL SPECIFICATIONS

SPEC. NUMBER SPEC. TITLE PAGE

Customer SPEC Rev. P2 2020.05.21

3.0 ELECTRICAL SPECIFICATIONS

Setp1 Read VCOM

Slave Address (0x40h) VCOM Address (0x25h)

Setp2 Adjust VCOM (Write DAC)

Setp3 Write VCOM (Write MTP)

SPEC. NUMBER SPEC. TITLE PAGE

Customer SPEC Rev. P2 2020.05.21

3.0 ELECTRICAL SPECIFICATIONS

SPEC. NUMBER SPEC. TITLE PAGE

Customer SPEC Rev. P2 2020.05.21

4.0 INTERFACE CONNECTION

Rear view of LCM BIST Pattern

SPEC. NUMBER SPEC. TITLE PAGE

Customer SPEC Rev. P2 2020.05.21

4. Circuit Block Diagram Pin of SDA/SCL/WP.

SPEC. NUMBER SPEC. TITLE PAGE

Customer SPEC Rev. P2 2020.05.21

3.0 ELECTRICAL SPECIFICATIONS

Note 2 : This test condition is based on BOE module.

< Table 5. Driver Characteristics >

Note 4: This test condition is based on BOE module.

< Table 6. PMIC Characteristics >

Note 6: This test condition is based on BOE module.

SPEC. NUMBER SPEC. TITLE PAGE

Customer SPEC Rev. P2 2020.05.21

4.0 INTERFACE CONNECTION

< Table 8. V by one setting &data mapping table >

FSBP FSBP FSBP FSBP FSBP FSBP FSBP FSBP

FSBP FSBP FSBP FSBP FSBP FSBP FSBP FSBP

SPEC. NUMBER SPEC. TITLE PAGE