5 4 3 2 1

Eletro-XTechnical
https://t.me/schematicslaptop

D D

Hellcat 14/15 _ ICL

p
to
ap
sl
ic
C C

Schematics DIAGRAM

t
ma
che
/s
me
t.
//
B B
s:

2019-09-17
tp

REV : SA
ht

<CoreDesign>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan,R.O.C.

DY : None Installed Title

Cover Page
Eletro-XTechnical
UMA: Unified Memory Architecture Size Document Number Rev
OPS: Optimal Playable Settings A4 Hellcat 14/15_ ICL SA
Date: Tuesday, September 17,2019 Sheet 1 of 106
5 4 3 2 1
 5 4 3 2 1

HellCat CML Block Diagram

GPU
Eletro-XTechnical
VRAM(GDDR5) *2 DDR4
GDDR5 NVIDIA PCIEx2
2GB
N17S-G0/G2 Channel A SODIMM
81,82 76-80

12

eDP x2
14"/15"LCD DDR4
IntelCPU Channel B SODIMM
D
TouchPanel I2C D

55 13

Ice LakeU
USB2.0 x1 USB3.0
CCD/DMIC MUX and Re-driver
(IR Camera) DMIC Option2 DP TI DP/USB3.0
55 For Hellcat TUSB546
For MKB 73

2CH SPEAKER AudioCodec DMIC Option1

(2CH 2W/4ohm) 27 PD Controller USB3.1 TypeC
REALTEK I2C
CYPRESS CC1/CC2
29
ALC3204 HDA
CYPD5126 72
16 PCIe*Lanes

p
IOBoard 3 SATALanes
73

to
6 USB3.1 Gen1/Gen2Lanes
Universal Jack
10 USB2.0/1.1Lanes
HDMI
Finger Print HDMI 1.4b
USB2.0

ap
5 GbELanes 57
with PowerButton
High DefinitionAudio
SATA/PCIEx4 M.2 NGFF/NvMe

sl
SSD 63

C
SATA/PCIEx4 M.2 NGFF/NvMe C
LAN 10/100/1000

ic
For MKB-V
RJ45 Conn PCIE SSD 63

Realtek RTL8111H

USB 3.1 Gen1

t
Re-driver
PARADE PCIE/USB2.0

ma
USB3.0 USB3.0
USB3.0 PS8713BT
CNVi
NGFF WLAN
Port2 USB2.0
61

he
USB3.0
For Hellcat
SD Card CardReader USB3.0 Port1
For MKB-V
SD 3.0 USB2.0
Realtek USB2.0

c
35
MKB-N Micro SDCard RTS5144
Sensor BD on For Hellcat MB SIDE

/s
For MKB-V LIDSENSOR Panel side Free FallGsensor For Hellcat
MKB-N S-5712ACDL1
ST LNG2DMTR 70
INT Accelerometer
MGRSENSOR E-compass Gyro+G Free FallGsensor For Hellcat
For Hellcat

me
HGDEDM013A ST ST 14/15_ ICL
ST LIS2DW12 70
LIS2MDL LSM6DS3
KBC

B
t. I2C

SPI Flash ROM

8+16 MB 25 B
//
TPM 91 For MKB-V
s:

I2C TouchPAD
eSPI debug port eSPI Bus
65

68
tp

INT

BattConn KBC
ht

Charger SMBUS PS2

ISL9538C MICROCHIP
DC Jack MEC1515H-D0-I
Fan Control
Thermal PWM FAN
SMBUS 26

NUVOTON
NCT7718W 26 24

Keyboard 65

A A

<Corrre Desiiign>

Wistron Corporation
Eletro-XTechnical Tiittle
21F,,, 88,,,Sec...1,,,HsiinTaiiWi u Rd..,,,. Hsichih,,,ii
Taipeiii Hsiiien221,,, Taiwan,,,ii R..O..C.....

BlockDiagram
SiiizeDocumenttt Numberrr Rev
Custttom Hellcat 14/15_ ICL SA
Dattte:::Tuesday,,, Septttemberrr 17,,, 2019 Sheett 2 off 106
5 4 3 2 1
 A B E
C D

PCH SMBus Block Diagram

3D3V_S5_PCH
3D3V_S0
KBC SMBus Block Diagram
‧
‧
TP_VDD
Eletro-XTechnical
SRN10KJ-5-GP
3D3V_S0
SMBus Address:0xA0/0xA1 ‧
SRN2K2J-1-GP
‧
DIMM 1 SRN10KJ-5-GP

1
SMBCLK CPU_SMB_SDA ‧ ‧ PCH_ SMBCL K SCL
TouchPad Conn. 1

SMBDATA CPU_SMB_SCL ‧ ‧ PCH_SMBDATA SDA

PS2_DAT0 DAT_TP_SIO
‧ DAT_TP_SIO TPDATA

SMBus Address:0xA0/0xA1
PS2_CLK0 CLK_TP_SIO
‧ CLK_TP_SIO TPCLK
2N7002SPT
3D3V_AUX_KBC
DIMM 2
SCL ‧
SDA
3D3V_S5_PCH
SRN4K7J-8-GP

‧ TPAD SRN33J-7-GP
Battery Conn.
PCH_SMBCLK SMB01_CLK18 ‧PB‧AT_CHG_SMBCLK PBAT_SMBCLK1 CLK_SMB

p
SCL
SMBus address:16
SRN2K2J-1-GP PCH_SMBDATA SDA SMB01_DATA18
‧PBAT_CH‧G_SMBDAT PBAT_SMBDAT1 DAT_SMB

to
SMBus Address:0x58/0x59
SML0CLK SML0_CLK
HPA02224RGRR
SML0DATA SML0_DATA
PTN3355

ap
PCH_SMBCLK VDDA33_DP
SMSC SCL
SDA SMBus address:12
PCH_SMBDATA TMS
(Janus Only) MEC1404

sl
SMBus Address:0xC0H/0x40H
2 2

ic
GPU_THM_SMBCLK GPIO0/SCL2
GPU_THM_SMBDAT GPIO12/SDA2

PCH

t
3D3V_S0 SMBus Address:
3D3V_S5_PCH 0x94/0x95/0x96/0x97

ma
SMBus Address:0x98/0x99
‧
‧CPU_SMB_SCL_THM SCL Thermal
SRN2K2J-8-GP

SRN2K2J-8-GP
3D3V_S0
‧ CPU_ SMB_ SDA_ THM SDL
NCT7718W GPU T8

he
‧

‧ ‧ SML1_ SMBCLK ‧ ‧CPU_SMB_SCL_THM SCL Thermal

c
SML1CLK

SML1DATA ‧ ‧ SML1_SMBDATA
‧ ‧ CPU_SMB_ SDA_ THM SDL NCT7718W

/s
SMBus Address:0x82/0x83 SMBus Address:0x98/0x99
2N7002SPT
3D3V_1D8V_VGA_S0

me
‧
SRN4K7J-8-GP
3D3V_VGA_S0
dGPU t.
3
‧ 3
//
SMB_CLK_VGA I2CS_SCL
‧ I2CS_SDA
SMB_DATA_VGA
‧
SMBus Address:0x9E/0x9F
s:

3D3V_S0 5V_S0
tp

0R2J-2-GP
‧ ‧ DY
ht

3D3V_S0
SRN2K2J-1-GP
‧
SRN2K2J-1-GP CMP_VOUT1 CMP_VOUT1
‧ GPIO166/CMP_VREF1/UART_CLK LCD_TST_EN
H_PROCHOT_EC
‧ ‧
LCD_TST_EN

0R2J-2-GP
DDPB_CTRLCLK ‧CPU_DP1_ CTRL_ CLK DDC_CLK_HDMI
‧
DDPB_CTRLDATA ‧ CPU_DP1_CTRL_DATA
‧ ‧ DDC_DATA_HDMI
‧ HDMI CONN LCD_TST

2N7002DW-1-GP

4 4

<CorrreDesiiign>

WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle

SMBUS Block Diagram Rev

Size DocumentttNumberrr
A2 Hellcat 14/15_ ICL SA
Dattte::: Tuesday,,, Septttemberrr17,,, 2019 Sheettt104 offf 106
A B C D E
 A B C D E

Thermal Block Diagram Audio BlockEletro-XTechnical

Diagram
1 1

3D3V_S5_PCH 3D3V_S0
PCH PAGE28 D+ NCT7718_DXP
SPKR_L+

SPEAKER
MMBT3904-3-GP SPKR_L-
SC2200P50V2KX-2GP SPKR_R-
SPKR_R+

Thermal D- NCT7718_DXN

Place near CPU

NCT7718 PWM CORE
Codec
‧ ‧ ‧

p
S ML1_DATA CPU _SMB_SDA_THM SDA
SML1DATA/GPIO74
2N7002
ALC324

to
SML1CLK/GPIO75 SML1_ CL K
‧ ‧ ‧ ‧CPU_SMB_SCL_THM SCL
MMBT3904-3-GP

6 HP MIC

ap
T8

COMBO
SML1_DATA

SML1_CLK

3D3V_S0 PURE_HW_SHUTDOWN#
3V/5V

sl
2N7002 AUD_HP1_JACK_L
T_CRIT# THERM_SYS_SHDN# D EN
PAGE20 S PCH_PWROK
G AUD_HP1_JACK_R
2
‧ Put under CPU(T8 HW shutdown) 2

ic
SLEEVE

RING2

t
PAGE27 PAGE86
GPIO74
KBC Digital

ma
GPIO73

MEC1404 2N7002
SMB_CLK_VGA_R I2CS_SCL
VGA DMIC_DATA_R R2714
0R2J-2-GP
DMIC_DATA
MIC

he
SMB_DATA_VGA_R I2CS_SDA DMIC_CLK_R
R2716
DMIC_CLK
GPIO0/DMIC_DATA 0R2J-2-GP

MESO-LE

c
GPIO1/DMIC_CLK

/s
GPIO94 GPIO56
GPIO4
GB2-64 (23x23)

me
FAN_TACH1
FAN1_DAC_1

t.
//
3 3
TACH

FAN
s:

VIN
5V
FAN_VCC1

tp
ht

VIN VSET VOUT

FAN CONTROL
APL5606AKI
PAGE28

4 4
<Core Desiiign>

Wistron Corporation
21F, 88, Sec.1, Hsiiin Taiii W u Rd., Hsiiichiiih,
Taiiipeiii Hsiiien 221, Taiiiwan, R.O.C.

Eletro-XTechnical Tiitlle

Siiize
Thermal/Audio BlockDiagram
Document Number Rev
Custom
Hellcat 14/15_ ICL SA
Date: Tuesday, September 17, 2019 Sheet 105 of 106
A B C D E
 5 4 3 2 1

CLK Block Diagram

Eletro-XTechnical

Intel CPU
D Haswell/Broadwell ULT D

M_A_DIMA_CLK_DDR0
CK0 SA_CLK0
CK0# M_A_DIMA_CLK_DDR#0
SA_CLK#0
DDR3L DIMM1
M_A_DIMA_CLK_DDR1
CK1 SA_CLK1
M_A_DIMA_CLK_DDR#1
CK1# SA_CLK#1 CLK_PCIE_WLAN_P3
CLKOUT_PCIE_P2 REFCLKP0
WLAN
CLKOUT_PCIE_N2
CLK_PCIE_WLAN_N3
REFCLKN0 NGFF

p
to
LAN

ap
CLK_PCIE_LAN_P4
RTL8106E/RTL8111G
CLKOUT_PCIE_P3

sl
REFCLK_P
FBA_CLK0P CLK_PCIE_LAN_N4
CK CLKOUT_PCIE_N3 REFCLK_N
C

VRAM1 VGA C

ic
FBA_CLK0N
CK#
N15V-GM-S-A2
GB2-64 (23x23) LANXIN
CKXTAL1

t
FBA_CLK0P
CLK_PCIE_VGA#
CK ‧ FBA_CLK0 PEX_REFCLK# CLKOUT_PCIE_N4

ma
VRAM2 CK#
FBA_CLK0N
‧ FBA_CLK0# X3001
25MHz
CLK_PCIE_VGA
PEX_REFCLK CLKOUT_PCIE_P4

he
LANXOUT
CKXTAL2
FBA_CLK1P
CK
VRAM3 XTAL_IN

c
FBA_CLK1N
CK#

/s
X7601
27MHz
FBA_CLK1P
CK ‧ FBA_CLK1
Audio

me
VRAM4 FBA_CLK1N
‧ FBA_CLK1# XTAL_OUT
XTL_27M_OUT_GPU
CK#
RN2102
Realtek
t. HDA_BCLK/I2S0_SCLK
HDA_BITCLK HDA_CODEC_BITCLK BITCLK ALC3223
B SRN33J-5 -GP-U B
//
RTC_X1
RTCX1

R5815 SUSCLK_NGFF
SUS_CLK NGFF
s:

X1901 0R2J-2-GP
32.768KHz

RTC_X2
tp

RTCX2
XTAL24_IN KBC
XTAL24_IN NPCE285P
ht

SUSCLK/GPIO62 SUS_CLK_PCH SUS_CLK SUS_CLK_KBC

R1710 R2441
X1801
24MHz
0R2J-2-GP ‧ 0R2J-2-GP
GPIO0/EXTCLK/F_SDIO3
CLK_PCI_KBC_R R1805 CLK_PCI_KBC
CLKOUT_LPC_1
0R2J-2-GP
XTAL24_OUT LCLK/GPIOF5
XTAL24_OUT
CLKOUT_LPC_0 CLK_PCI_LPC_R R1804
0R2J-2-GP
CLK_PCI_LPC
LPC

CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P
Test Point
A A

<CorrreDesiiign>

WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle
CLK Block Diagram
SiiizeDocumentttNumberrr Rev
A2 SA
Hellcat 14/15_ ICL
Dattte:::Tuesday,,, Septttemberrr17,,,2019 Sheettt100offf 106
5 4 3 2 1
 5 4 3 2 1

DCBATOUT
Adapter VCCST_PWRGD VCCST_PWRGD 1V_VGA_EN_R 1D35V_VGA_EN

PM_SLP_S4# ISL95829CHRTZ EN
Eletro-XTechnical
TypeC Adapter AOZ2262QI-10 G5416QS1U
EN(S5)
ISL95808HRZ-T-1-GENP RT8816BGQW
EN
SY8288RAC
EN(S3)
SM_PGCNTL_R
Charger AOZ5038QI-05 AOZ5038QI-05
ISL9538C 1D0V_S5
D D

Battery BT+ 2D5V_S3 0D6V_S0 1V_CPU_CORE 1V_VCCGT

1D2V_S3 VCCSA VGA_CORE 1D35V_VGA_S0
PM_SLP_S3# &
PM_SLP_S4# GPPC_H18_VCCIO_LPM

EN EN
0 Ohm 0 Ohm 0 Ohm 0 Ohm
G5027RD1D G5027RD1D G5027RD1D

1D0V_VCCAMPHYPLL
1D0V_VCCA_XTAL
1V_VCCST_CPU 1V_VCCSTG 1V_VCCIO 1D2V_VCCSFR_OC
1D0V_VCCPRIM_MPHY 3D3V_VCCPRTC

p
to
ap
sl
C C

t ic
PWR_3D3V_EN1

ma
PWR_5V_EN1

SY8286BRAC EN

he
EN
SY8288CRAC
3D3V_AUX_S5

c
5V_S5
5V_AUX_S5 5V_PWR_2 3D3V_S5

/s
USB_PWR_EN# PM_SLP_S3# PM_SLP_S3# 1D05V_VGA_EN SIO_SLP_S4#
USB_CHG_EN 3V_5V_POK
EN EN EN

me
EN
G5016KD1U RT5797ALGQW
EN
EN
USB30_VCCA SY6288DAAC x 2 APL5934KAI APL5930KAI

B
USB30_VCCB 5V_S0

SIO_SLP_S0#
t. 3D3V_S0
1V_VGA_S0 1D8V_S5
2D5V_S3
B
//
EN
TPS22965DSGR
s:

R-sense MOSFET
SYW232DFC
Power Shape
tp

R-sense 0 Ohm POLYSW POLYSW 0 Ohm 0 Ohm 1D8V_S0

1D8V_VCCPRIM
1D8V_AON_S0 Regulator LDO Switch
ht

5V_FAN_VCC 5V_HDD_SIP +5V_KB_BL 5V_HDMI_S0+5V_PVDD +5V_AVDD R-sense

POLYSW POLYSW Short Short 1D8V_CPVDD

RT9724GB 0 Ohm Pad
Choke Pad

3D3V_LCDVDD_S0 3D3V_GSEN2 3D3V_CAMERA_S0 3D3V_SEN_S0 3D3V_SSD 3D3V_HDMI_VDD +3V_AVDD

A A

<CorrreDesiiign>

WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle
Power Block Diagram
SiiizeDocumentttNumberrr Rev
A2 SA
Hellcat 14/15_ ICL
Dattte:::Tuesday,,, Septttemberrr17,,,2019 Sheettt103 off 106
5 4 3 2 1
 5 4 3 2 1

KBL-U/Y Timing Diagram for G3 to S0/M0 [Non Deep Sx Platform] Tulip Skylake POWER UP SEQUENCE DIAGRAM (NON Deep Sx
Platform)
Red: Power Rail
Orange: Output from KBC

Eletro-XTechnical
Light Blue: Output from CPU
DC SI7121DN-T1-GE3
BT+ Page43
a Battery
Page43
Page43

V8P10-5300M3-86A d
AC +DC_IN SI7121DN-T1-GE3
a Adapter in 3V_5V_EN
Page43 Page43

AD+
e
EN1 EN2
D 3D3V_S5 D

Charger
BQ24770RUYR DCBATOUT VIN TPS51225RUKR
DC/DC
(3.3V/5V) 5V_S5
ACOK Page44 3 5
Page45 DDR_VTT_PG_CTRL Level SM_PGCNTL_R
b PWR_CHG_ACOK
d Shifter
3D3V_AUX_S5 f
R2469

SIO_SLP_S4#
3V_5V_EN

SIO_SLP_S3#
Page45 R2446 3V_5V_POK
Page24
SWITCH
Page40 PM_SLP_SUS#

ALWON
c SLP_S4# SLP_S3# DDR_PG_CTL

GPIO36 GPIO05
KBC_PWRBTN#
PSL_IN2# DPWROK
GPIO34
1
The DSW rails must be stable for at least
PCH_RSMRST# 10 ms before DSW_PWROK is asserted to PCH.
GPIO66 DSW_PWROK
f PM_RSMRST# RSMRST#
ACAV_IN b Skylake-U MCP
PSL_IN1# GPIO20
2 SIO_PWRBTN#

p
PWRBTN#
h
RSMRST_PWRGD#
TBD KBC
ALL_SYS_PWRGD and VR_RDY assert,
MEC1404 delay 10ms; PCH_PWROK assert.

Delay10ms
RSMRST#_KBC: Delay 10 ms after receive

to
RSMRST_PWRGD# and PM_SLP_SUS#. 8b

AND
RSMRST#_KBC
RESET_OUT# SIO_SLP_S0#
GPIO36 GPIO107 PCH_PWROK SLP_S0#

ALL_SYS_PWRGDassert, PM_SUSWARN# 9
delay 10ms; PCH_PWROKassert. GPIO02 SUSWARN# PROCPWRGD
ALL_SYS_PWRGD
7 GPIO57 i

ap
GPIO81 SUSACK#
PLTRST# 10 PCH_PLTRST#
It is recommended that SYS_PWROK be asserted after AND
both PWROK assertion and processor core VR PWRGD assertion.

PM_SLP_S4#

sl
3 GPIO44

PM_SLP_S3# 8d
4 GPIO01 H_VCCST_PWRGD ALL_SYS_PWRGD

C
VCCST_PWRGD
Level Shifter C

8c SYS_PWROK 74LVC1G07GW Page17

GPIO141 SYS_PWROK
EXT_PWR_GATE# 7

ic
Page24 PWR_VDDQ_PG
EXT_PWR_GATE#
e 6 ALL_SYS_PWRGD
ALL_SYS_PWRGD assert, SLP_SUS#
delay 100ms; SYS_PWROK assert. RSMRST_PWRGD#
h DY

SIO_SLP_SUS#
3D3V_S5

DS3
t
SVID Transanctions

Vin

ma
3D3V_S5_PCH
PCH_ALW_ON EN SW

SY6288C10CAC IMVP8
(DS3) Page41 CPU SVID Rails
6 PWR_VDDQ_PG SA/Core/GT/GTx
VR_ON
VR_RDY

he
VR_READY

8a

c
3V_5V_POK RSMRST_PWRGD#
f 0R 0402

h
g 1D8V_S5_PWROK

/s
0R 0402

1D0V_S5_PWRGD
g
0R 0402 DY

me
For DDR4 power sequence 3D3V_S5 5V_S5
1D0V_S5 5V_S5
3D3V_S5

Vin VCNTL
3V_5V_POK
1D8V_S5
3 Vin VDD
4 5 IN
Out
1D5V_S0

B
2D5V_S3

1D2V_S3

0D6V_VREF_S0
t. f
EN

1D8V_S5
APL5930KAI
PGOOD

Page54
Vout

+V1.8A_SIP
1D8V_S5_PWROK
g
SIO_SLP_S4#
EN

M5938ARD1U
SW

Page40
+V1.00U_CPU(VCCST)
SIO_SLP_S3#
TLV70215DBVR
EN

Page54
B
//
0R

PWR_DCBATOUT_1D0V
1D0V_S5
3D3V_S5

VIN

1D0V_PWR
3 4a Vin
s:

3V_5V_POK LX Vin
SIO_SLP_S4# 2D5V_S3
f
EN
SY8208DQNC 1D0V_S5_PWRGD LX
SIO_SLP_S3# M5938ARD1U
PGOOD
EN
5 EN
+VCCIO +VCCSTG
Page53 g APL5930KAI PWR_2D5V_PG
SW 0R 0402

NV N17S GPU Power ON sequence

PGOOD
Page40
Page54 4b
NV N17S GPU Power Down sequence 1D0V_PWR
0R
VCCPRIM_CORE
tp

5V_S5 3D3V_S5

4c
ht

4b PWR_2D5V_PG S5
1D2V_S3
Vin1 Vin2

RT8231AGQW 5 G5016KD1U VOut1

5V_S0
SIO_SLP_S3# 0D6V_VREF_S0 SIO_SLP_S3# 3D3V_S0
S3 EN VOut2

PWR_VDDQ_PG
5 PGOOD Page40
Page51
6

A A

a b c d e f g h i

1 2 3a 4 4a 4b 5 6 7 8 8a 8b 9 10

<<<CCCoooreeeDDDeeesssigggnnn>>>

Eletro-XTechnical
Wiiistron Corporatiiion
222111FFF, 888888,SSSeeeccc.111, HHHsssinnnTTTaaai WuuuRRRddd.,
HsscchhhTTappeieepiaaT,hihhcisHH
HseennneissHH 222222111, Tawwwan,nnaaiaaTTRRROCCC.

TTTitleee
PowerSequence
SSSizzzeee DDDooocccuuumeeennntNNNuuumbbbeeer RRReevv
A0 MOCKIIINGBIIIRD_IIICL SA
DDDaaateee: TTTuuueeesssdddaaayyy,SSSeeepppteeembbbeeer 111777,222000111999 SSShhheeeeeet 1100222 ooof110066
5 4 3 2 1
 5 4 3 2 1

Main Func = CPU

Eletro-XTechnical

[24] PECI_CPU 1D05V_VCCSTG_TERM CPU1D 4 OF19

[22,24,44,46] PROCHOT#_CPU
D H_CATERR# J4 P3 CPU_JTAG_TCK D
PECI_CPU CD5 CATERR# PROC_TCK K5 CPU_JTAG_TDI
1 R313 2 CPU_JTAG_TDO PROCHOT#_CPU_R C3 PECI PROC_TDI K3 CPU_JTAG_TDO
[99] CPU_JTAG_TCK PROCHOT# PROC_TDO
51R2J-2-GP THERMTRIP#_CPU E3 P4 CPU_JTAG_TMS
[99] CPU_JTAG_TDI THRMTRIP# PROC_TMS
[99] CPU_JTAG_TDO
DY N1 CPU_JTAG_TRST#
1 R311 2 CPU_JTAG_PREQ# PROC_TRST#
[99] CPU_JTAG_TMS PROC_POPIRCOMP
51R2J-2-GP _RCOM
P
CJ4 CPU N5
[99] CPU_JTAG_TRST# PCH_OPIRCOMP PCH_TRST# R5 PCH_JTAG_TCK
[99] PCH_JTAG_TCK _POPI 1 RSVD_25
R314 51R2J-2-GP CPU_EOPIO_RCOMP PCH_TCK K1
[99] CPU_JTAG_PRDY# PCH_OPI_RCOMP B14
DU3
1 R315 251R2J-2-GP CPU_JTAG_TDI RSVD_26 PCH_TDI K2
[99] CPU_JTAG_PREQ# EDRAM_OPIO_RCOMP A14 PCH_TDO
1 2 CPU_JTAG_TMS DBG_PMODE DL15

p
[15,99] DBG_PMODE N3
DBG_PMODE PCH_TMS
TPAD14-OP-GP N2

to
PCH_JTAGX
TP301 1 GPP_E3 DV11
TOUCH_PANEL_PD# DT11 GPP_E3/CPU_GP0 P6 CPU_JTAG_PRDY# M6
TOUCH_PAD_INTR# CR38 GPP_E7/CPU_GP1 PROC_PRDY# CPU_JTAG_PREQ#

ap
[15] GPP_E6 GPP_B3/CPU_GP2 PROC_PREQ#
[15] GPP_H2 TOUCH_PANEL_DET# CR39
GPP_B4/CPU_GP3
1 R312 2 CPU_JTAG_TCK GPP_E6 DT12

sl
51R2J-2-GP GPP_H2 DJ38 GPP_E6
GPP_H2/CNV_BT_I2S_SDO
[55] TOUCH_PANEL_PD# DY DL38
GPP_H19/TIME_SYNC0

ic
C RN304 C
1 4 CPU_JTAG_TRST# ICE-LAKE-U-GP-U
[55] TOUCH_PANEL_DET#
2 3 PCH_JTAG_TCK

t
SRN51J-GP

ma
1D05V_VCCSTG_TERM
1 R305 2 CPU_POPI_RCOMP
49D9R2F-GP

he

2
[24,65] TOUCHPAD_INTR# PCH_OPI_RCOMP R302
1 R306 2
49D9R2F-GP 1KR2F-3-GP

c
DY

/s
RN306

1
1 4 EDRAM_OPIO_RCOMP PROCHOT#_CPU 1 R303 2 PROCHOT#_CPU_R
2 3 CPU_EOPIO_RCOMP 499R2F-2-GP

me
SRN49D9F-GP

TOUCHPAD_INTR# 2
t. R307
1TOUCH_PAD_INTR#
0R2J-2-GP 1D05V_VCCST
//
B B

2 R304 1 THERMTRIP#_CPU
1KR2F-3-GP
s:

1 R309 2 H_CATERR#
tp

3D3V_S0 49D9R2F-GP
ht

1: non touch
1

0: touch R301
100KR2J-1-GP
2

<CoreDesign>
TOUCH_PANEL_DET#

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan,R.O.C.

Title
CPU (THML/JTAG)
Eletro-XTechnical
Size Document Number Rev
A4
Hellcat 14/15_ ICL SA
Date: Tuesday, September 17, 2019 Sheet 3 of 106
5 4 3 2 1
 5 4 3 2 1

CPU1A 1 OF19
Main Func = CPU eDP_TX_CPU_N0
eDP_TX_CPU_P0
Y5 DDIA_TXN_0 TCP0_TX_N0 BB5
BB6
DP2_DDI_TX_N0
DP2_DDI_TX_P0
Y3 DDIA_TXP_0 TCP0_TX_P0
eDP_TX_CPU_N1 Y1 DDIA_TXN_1 AV6 DP2_DDI_TX_N1
[55] eDP_TX_CPU_N0 TCP0_TX_N1
Eletro-XTechnical
eDP_TX_CPU_P1 Y2 DDIA_TXP_1 AV5 DP2_DDI_TX_P1
[55] eDP_TX_CPU_P0 TCP0_TX_P1
V2 DDIA_TXN_2 BH2 DP2_DDI_TX_N2
TCP0_TXRX_N0
V1 DDIA_TXP_2 BH1 DP2_DDI_TX_P2
[55] eDP_TX_CPU_N1 TCP0_TXRX_P0
V3 DDIA_TXN_3 BF1 DP2_DDI_TX_N3
[55] eDP_TX_CPU_P1 TCP0_TXRX_N1
V5 DDIA_TXP_3 BF2 DP2_DDI_TX_P3
TCP0_TXRX_P1
eDP_AUX_CPU_N W 4 DDIA_AUX_N AY5 DP2_AUX_CPU_N
TCP0_AUX_N
eDP_AUX_CPU_P W 3 DDIA_AUX_P TCP0_AUX_P AY6 DP2_AUX_CPU_P
D D
HDMI_DDI_TX_N2 AE3 DDIB_TXN_0
HDMI_DDI_TX_P2 AE5 DDIB_TXP_0
eDP TCP1_TX_N0 AR5
[55] eDP_AUX_CPU_N
HDMI_DDI_TX_N1
[55] eDP_AUX_CPU_P
HDMI_DDI_TX_P1
AE2 DDIB_TXN_1 TCP1_TX_P0 AR6
AE1 DDIB_TXP_1
HDMI_DDI_TX_N0 AC5 DDIB_TXN_2 TCP1_TX_N1 AL5
[24] L_BKLT_EN HDMI_DDI_TX_P0 TCP1_TX_P1 AL3
HDMI_DDI_TX_N3 AC1
AC3 DDIB_TXP_2 TCP1_TXRX_N0 BD2
[55] EDP_VDD_EN HDMI_DDI_TX_P3
DDIB_TXN_3 TCP1_TXRX_P0 BD1
AC2 DDIB_TXP_3 TCP1_TXRX_N1 BB1
[55] L_BKLT_CTRL
AD3 TCP1_TXRX_P1 BB2
AD4 DDIB_AUX_N
[55] eDP_HPD_CPU DDIB_AUX_P TCP1_AUX_N AN3
AN5
DP15 TCP1_AUX_P
DJ17 GPP_E22/DDPA_CTRLCLK/PCIE_LNK_DOWN
GPP_E23/DDPA_CTRLDATA/BK4/SBK4

p
[57] HDMI_DDI_TX_P0 TCP2_TX_N0 BF6
HDMI
CPU_DPB_CTRL_CLK DL40
[57] HDMI_DDI_TX_N0 CPU_DPB_CTRL_DATADP42
GPP_H16/DDPB_CTRLCLK TCP2_TX_P0 BF5

to
GPP_H17/DDPB_CTRLDATA TCP2_TX_N1 BJ5
[57] HDMI_DDI_TX_P1 DL17 TCP2_TX_P1 BJ6
[57] HDMI_DDI_TX_N1 DK17 GPP_E18/DDP1_CTRLCLK/TBT_LSX0_TXD TCP2_TXRX_N0 BL1
[15] TBT_LSX0_RXD GPP_E19/DDP1_CTRLDATA/TBT_LSX0_RXD TCP2_TXRX_P0 BL2

ap
[57] HDMI_DDI_TX_P2 DN17 TCP2_TXRX_N1 BM2
[57] HDMI_DDI_TX_N2 DP17 GPP_E20/DDP2_CTRLCLK/TBT_LSX1_TXD TCP2_TXRX_P1 BM1
HDMI [57] HDMI_DDI_TX_P3
[15] TBT_LSX1_RXD
DK34
GPP_E21/DDP2_CTRLDATA/TBT_LSX1_RXD BG6
TCP2_AUX_N BG5

sl
[57] HDMI_DDI_TX_N3 TCP2_AUX_P
GPP_D10 DL34 GPP_D9/ISH_SPI_CS_N/DDP3_CTRLCLK/GSPI2_CS0_N/TBT_LSX2_TXD
GPP_D10/ISH_SPI_CLK/DDP3_CTRLDATA/GSPI2_CLK/TBT_LSX2_RXD
[57] CPU_DISP_HPDB
DN33 BP6
C GPP_D12 DL33 GPP_D11/ISH_SPI_MISO/DDP4_CTRLCLK/GSPI2_MISO/TBT_LSX3_TXD TCP3_TX_N0 BP5 C
[57] CPU_DPB_CTRL_CLK

ic
GPP_D12/ISH_SPI_MOSI/DDP4_CTRLDATA/GSPI2_MOSI/TBT_LSX3_RXD TCP3_TX_P0 BV5
[57] CPU_DPB_CTRL_DATA TCP3_TX_N1 BV6
eDP_HPD_CPU DW 11
CPU_DISP_HPDB CV42 GPP_E14/DPPE_HPDA/DISP_MISCA TCP3_TX_P1 BR1
DP1_HPD_CPU_R CV39 GPP_A18/DDSP_HPDB/DISP_MISCB TCP3_TXRX_N0 BR2

t
CY43 GPP_A19/DDSP_HPD1/DISP_MISC1 TCP3_TXRX_P0 BT2
CR41 GPP_A20/DDSP_HPD2/DISP_MISC2 TCP3_TXRX_N1 BT1
DP for Type-CMux
USB_OC1#

ma
USB_OC2# CT41 GPP_A14/USB_OC1_N/DDSP_HPD3/DISP_MISC3 TCP3_TXRX_P1
DGPU_HOLD_RST# DV14 GPP_A15/USB_OC2_N/DDSP_HPD4/DISP_MISC4 BT6
GPP_E17 TCP3_AUX_N BT5 R402
EDP_VDD_EN TCP3_AUX_P 150R2F-1-GP
[73] DP2_DDI_TX_P0 DN21 EDP_VDDEN

he
L_BKLT_EN TCRCOMP_DN 1 2
[73] DP2_DDI_TX_N0
L_BKLT_CTRL
DL19 EDP_BKLTEN TC_RCOMP_N AY1
DU19 EDP_BKLTCTL TCRCOMP_DP
[73] DP2_DDI_TX_P1 TC_RCOMP_P AY2
[73] DP2_DDI_TX_N1 J3 RSVD_1
[73] DP2_DDI_TX_P2 CT38 GPP_A17 1
GPP_A17/DISP_MISCC CV43 3.3V_CAM_EN TP403TPAD14-OP-GP

c
[73] 1 DISP_UTILS_DSI_DE_TE1 D2 1
DP2_DDI_TX_N2 TPAD14-OP-GP TP409 TP404TPAD14-OP-GP
[73] 1 R401 2 DISP_RCOMP R2 DISP_UTILS GPP_A21 CV41 KB_DET#
DP2_DDI_TX_P3 DISP_RCOMP GPP_A22

/s
[73] DP2_DDI_TX_N3 150R2F-1-GP

ICE-LAKE-U-GP-U
DisplayPortAUX

me
[73] DP2_AUX_CPU_P NOTE:
"eDP_HPD_CPU"
[73] DP2_AUX_CPU_N
"eDP_VDDEN_CPU"
PD 100K to LCD side
t.
DGPU_HOLD_RST# 3D3V_S0

1
B B
//

1
R420 R419
OPS 10KR2J-3-GP DP1_HPD_CPU_R
10KR2J-3-GP
3D3V_S0 HDMI
s:

1
2
KB_DET#
[76] DGPU_HOLD_RST# 2
RN402
3 CPU_DPB_CTRL_DATA
R403
100KR2J-1-GP
1 4 CPU_DPB_CTRL_CLK
tp

2
SRN2K2J-1-GP
ht

[72,73] DP1_HPD_CPU Add RTC Gen 9 reset circuit_20170814

3D3V_S5_PCH
leakage issue
3D3V_S5_PCH
R421 1 2 USB_OC1# 3D3V_S5_PCH
10KR2J-3-GP

R422 1 2 USB_OC2#
1
1

10KR2J-3-GP R405
R406
RTC_RST10KR2J-3-GP RTC_RST10KR2J-3-GP
[15] GPP_D12
2

A Q401 <CoreDesiiign> A
2

1 6 DP1_HPD_CPU_R
Note:ZZ.27002.F7C01

[15] GPP_D10
2 5 DP1_HPD_CPU Wistron Corporation
21F, 88, Sec.1, HsiiinTaiiiWu Rd., Hsiiichiiih,
[65] KB_DET# CPU_DP_HPD_P3 4 RTC_RST TaiiipeiiiHsiiien221, Taiiiwan,R.O.C.

Eletro-XTechnical commonpart Title

[66] USB_OC1# 2N7002KDW-1-GP
75.27002.F7C
CPU (DDI/EDP/TBT/TPC/)
Siiize DocumentNumber Rev
2nd = 075.27002.0E7C A3
Hellcat 14/15_ ICL SA
Date: Tuesday, September17, 2019 Sheet 4 of 106
5 4 3 2 1
 5 4 3 2 1

Channel A DDR4 ball type: Non-Interleaved Type

CPU1B 2 OF 19

M_A_DQ0 [12] M_A_DQ0 CA48 BL48 M_A_CLK#0

Eletro-XTechnical
M_A_DQ1 [12] DDRA_DQ0_0/DDR0_DQ0_0 DDRA_CLK_N/DDR0_CLK_N_0
M_A_DQ1 CA47 BL47 M_A_CLK0
M_A_A0 [12] M_A_DQ2 [12] M_A_DQ2 CA49 DDRA_DQ0_1/DDR0_DQ0_1 DDRA_CLK_P/DDR0_CLK_P_0 BF42 M_A_CLK#1
M_A_A1 [12] M_A_DQ3 [12] M_A_DQ3 BV49 DDRA_DQ0_2/DDR0_DQ0_2 DDRB_CLK_N/DDR0_CLK_N_1 BF43 M_A_CLK1
M_A_DQ4 [12] M_A_DQ4 CA45 DDRA_DQ0_3/DDR0_DQ0_3 DDRB_CLK_P/DDR0_CLK_P_1
M_A_A2 [12]
M_A_A3 M_A_DQ5 [12] M_A_DQ5 BV47 DDRA_DQ0_4/DDR0_DQ0_4 BG49 M_A_CKE0
[12]
M_A_A4 M_A_DQ6 [12] M_A_DQ6 BV45 DDRA_DQ0_5/DDR0_DQ0_5 DDRA_CKE0/DDR0_CKE0
BJ47
[12] M_A_DQ7 DDRA_DQ0_6/DDR0_DQ0_6 DDRA_CKE1/NC BF38
M_A_A5 [12] M_A_DQ7 BV48
M_A_A6 [12] M_A_DQ8 [12] M_A_DQ8 CC42 DDRA_DQ0_7/DDR0_DQ0_7 DDRB_CKE0/NC BF41 M_A_CKE1
M_A_A7 [12] M_A_DQ9 M_A_DQ9 DDRA_DQ1_0/DDR0_DQ1_0 DDRB_CKE1/DDR0_CKE1
CC39
M_A_A8 [12] M_A_DQ10 [12] M_A_DQ10 CC43 DDRA_DQ1_1/DDR0_DQ1_1 BM38 M_A_CS#0
M_A_A9 [12] M_A_DQ11 [12] M_A_DQ11 DDRA_DQ1_2/DDR0_DQ1_2 DDRA_CS_0/DDR0_CS_N_0 BM42
[12] CE38
D M_A_A10 [12] M_A_DQ12 [12] M_A_DQ12 CC38 DDRA_DQ1_3/DDR0_DQ1_3 DDRA_CS_1/NC BP42 D
M_A_A11 [12] M_A_DQ13
[12]
M_A_DQ13 CE39 DDRA_DQ1_4/DDR0_DQ1_4 DDRB_CS_0/NC BG42 M_A_CS#1
M_A_DQ14 M_A_DQ14 CE42 DDRA_DQ1_5/DDR0_DQ1_5 DDRB_CS_1/DDR0_CS_N_1
M_A_A12 [12] [12]
M_A_A13 [12]
M_A_DQ15
[12]
M_A_DQ15 CE43 DDRA_DQ1_6/DDR0_DQ1_6 BM43 M_A_BA0
M_A_DQ16 M_A_DQ16 DDRA_DQ1_7/DDR0_DQ1_7 DDRB_CA4/DDR0_BA0
M_A_A14 [12] BT48 BG39 M_A_BA1
M_A_DQ17 [12] M_A_DQ17 BT47 DDRA_DQ2_0/DDR0_DQ2_0 NC/DDR0_BA1
M_A_A15 [12] M_A_DQ18 [12] M_A_DQ18 BT49 DDRA_DQ2_1/DDR0_DQ2_1 BB49 M_A_BG0
M_A_A16 [12] M_A_DQ19 [12] M_A_DQ19 BN49 DDRA_DQ2_2/DDR0_DQ2_2 DDRA_CA5/DDR0_BG0 BD47 M_A_BG1
M_A_DQ20 [12] M_A_DQ20 BT45 DDRA_DQ2_3/DDR0_DQ2_3 NC/DDR0_BG1
M_A_DQ21 [12] M_A_DQ21 BN47 DDRA_DQ2_4/DDR0_DQ2_4 BB48 M_A_A0
M_A_DQS_DP0 M_A_DQ22 [12] M_A_DQ22 BN45 DDRA_DQ2_5/DDR0_DQ2_5
M_A_DQS_DP0 [12] NC/DDR0_MA0 BL49 M_A_A1
M_A_DQS_DP1 M_A_DQ23 M_A_DQ23 BN48 DDRA_DQ2_6/DDR0_DQ2_6 M_A_A2
M_A_DQS_DP2 M_A_DQS_DP1 [12] M_A_DQ24 [12]
M_A_DQ24 DDRA_DQ2_7/DDR0_DQ2_7 NC/DDR0_MA1 BG38
M_A_DQS_DP2 [12] BV42 DDRB_CA5/DDR0_MA2 BL45 M_A_A3
M_A_DQS_DP3 [12] M_A_DQ25
[12]
M_A_DQ25 BV39 DDRA_DQ3_0/DDR0_DQ3_0 BJ46 M_A_A4
M_A_DQS_DP4 M_A_DQS_DP3 [12] M_A_DQ26 DDRA_DQ3_1/DDR0_DQ3_1 NC/DDR0_MA3
M_A_DQ26 BV43 BG48 M_A_A5
M_A_DQS_DP5 M_A_DQS_DP4 NC/DDR0_MA4 BE45 M_A_A6
[12] M_A_DQ27 [12] M_A_DQ27 BW 38 DDRA_DQ3_2/DDR0_DQ3_2
M_A_DQS_DP6 M_A_DQS_DP5 DDRA_CA0/DDR0_MA5
[12] M_A_DQ28 [12] M_A_DQ28 BV38 DDRA_DQ3_3/DDR0_DQ3_3 BG45 M_A_A7
M_A_DQS_DP7 M_A_DQS_DP6
[12]
M_A_DQ29 [12] M_A_DQ29 BW 39 DDRA_DQ3_4/DDR0_DQ3_4 DDRA_CA2/DDR0_MA6 BG47 M_A_A8
M_A_DQS_DP7 M_A_DQ30 M_A_DQ30 BW 42 DDRA_DQ3_5/DDR0_DQ3_5 DDRA_CA4/DDR0_MA7 BE47 M_A_A9
[12] [12]
M_A_DQ31 [12] M_A_DQ31 BW 43 DDRA_DQ3_6/DDR0_DQ3_6 DDRA_CA3/DDR0_MA8 BJ38 M_A_A10
M_A_DQS_DN0 M_A_DQ32 M_A_DQ32 AY48 DDRA_DQ3_7/DDR0_DQ3_7 DDRA_CA1/DDR0_MA9
M_A_DQS_DN0 [12] [12] BB47 M_A_A11
M_A_DQS_DN1 M_A_DQ33 M_A_DQ33 AY47 DDRB_DQ0_0/DDR0_DQ4_0 NC/DDR0_MA10 BE48 M_A_A12
M_A_DQS_DN2 M_A_DQS_DN1 [12] [12]
M_A_DQ34 AY49 DDRB_DQ0_1/DDR0_DQ4_1 NC/DDR0_MA11 BM39 M_A_A13

p
M_A_DQS_DN3 M_A_DQS_DN2 [12] M_A_DQ34
[12] M_A_DQ35 M_A_DQ35 AU45 DDRB_DQ0_2/DDR0_DQ4_2 NC/DDR0_MA12 BG43 M_A_A14
M_A_DQS_DN4 M_A_DQS_DN3 [12] [12] DDRB_DQ0_3/DDR0_DQ4_3
M_A_DQ36 M_A_DQ36 AY45 DDRB_CA0/DDR0_MA13 BJ42 M_A_A15
M_A_DQS_DN5 M_A_DQS_DN4 [12] M_A_DQ37 [12] AU47 DDRB_DQ0_4/DDR0_DQ4_4 DDRB_CA2/DDR0_MA14W E# BM41 M_A_A16

to
M_A_DQS_DN5 M_A_DQ37
M_A_DQS_DN6 [12] M_A_DQ38 [12] M_A_DQ38 AU48 DDRB_DQ0_5/DDR0_DQ4_5
M_A_DQS_DN7 M_A_DQS_DN6 DDRB_CA1/DDR0_MA15CAS#
M_A_DQS_DN7 [12] M_A_DQ39 [12] M_A_DQ39 AU49 DDRB_DQ0_6/DDR0_DQ4_6 BJ39 M_A_DIMA_ODT0
DDRB_CA3/DDR0_MA16RAS#
[12] M_A_DQ40 [12] M_A_DQ40 AY42 DDRB_DQ0_7/DDR0_DQ4_7 BB45 M_A_DIMA_ODT1
M_A_DQ41 [12] M_A_DQ41 AY38 DDRB_DQ1_0/DDR0_DQ5_0 NC/DDR0_ODT_0
M_A_DQ42 [12] M_A_DQ42 AY43 DDRB_DQ1_1/DDR0_DQ5_1 NC/DDR0_ODT_1
BY47 M_A_DQS_DN0
BB39 DDRB_DQ1_2/DDR0_DQ5_2

ap
M_A_DQ43 [12] M_A_DQ43 BY46 M_A_DQS_DP0
M_A_DQ44 [12] M_A_DQ44 AY39 DDRB_DQ1_3/DDR0_DQ5_3 CC41 M_A_DQS_DN1
[12] M_A_CLK#0 [12] M_A_DIMA_ODT0 DDRA_DQSN_0/DDR0_DQSN_0
M_A_DQ45 [12] M_A_DQ45 BB38 DDRB_DQ1_4/DDR0_DQ5_4 CE41 M_A_DQS_DP1
DDRA_DQSP_0/DDR0_DQSP_0
[12] M_A_DIMA_ODT1 M_A_DQ46 [12] M_A_DQ46 BB42 DDRB_DQ1_5/DDR0_DQ5_5 BR47 M_A_DQS_DN2
[12] M_A_CLK0 M_A_DQ47 BB43 DDRB_DQ1_6/DDR0_DQ5_6 DDRA_DQSN_1/DDR0_DQSN_1
[12] M_A_DQ47 BR46 M_A_DQS_DP2
DDRA_DQSP_1/DDR0_DQSP_1
M_A_DQ48 [12] M_A_DQ48 AR48 DDRB_DQ1_7/DDR0_DQ5_7 BV41 M_A_DQS_DN3
[12] M_A_CKE0 DDRA_DQSN_2/DDR0_DQSN_2

sl
[12] M_A_ACT_N M_A_DQ49 [12] M_A_DQ49 AR47 DDRB_DQ2_0/DDR0_DQ6_0 BW 41 M_A_DQS_DP3
DDRA_DQSP_2/DDR0_DQSP_2
M_A_DQ50 [12] M_A_DQ50 AR49 DDRB_DQ2_1/DDR0_DQ6_1 AV46 M_A_DQS_DN4
[12] M_A_CKE1 [12] M_A_PARITY M_A_DQ51 AM45 DDRB_DQ2_2/DDR0_DQ6_2 DDRA_DQSN_3/DDR0_DQSN_3
[12] M_A_DQ51 AV47 M_A_DQS_DP4
DDRA_DQSP_3/DDR0_DQSP_3
M_A_DQ52 [12] M_A_DQ52 AR45 DDRB_DQ2_3/DDR0_DQ6_3 AY41 M_A_DQS_DN5
[12] M_A_ALERT_N DDRB_DQSN_0/DDR0_DQSN_4
C M_A_DQ53 [12] M_A_DQ53 AM47 DDRB_DQ2_4/DDR0_DQ6_4 BB41 M_A_DQS_DP5 C
DDRB_DQSP_0/DDR0_DQSP_4
M_A_DQ54 [12] M_A_DQ54 AM48 DDRB_DQ2_5/DDR0_DQ6_5 AN46 M_A_DQS_DN6

ic
DDRB_DQSN_1/DDR0_DQSN_5
M_A_DQ55 [12] M_A_DQ55 AM49 DDRB_DQ2_6/DDR0_DQ6_6 AN47 M_A_DQS_DP6
DDRB_DQSP_1/DDR0_DQSP_5
M_A_CLK1 [12] M_A_DQ56 [12] M_A_DQ56 AT42 DDRB_DQ2_7/DDR0_DQ6_7 AR41 M_A_DQS_DN7
[12] M_A_CS#0 M_A_DQ57 AT39 DDRB_DQ3_0/DDR0_DQ7_0 DDRB_DQSN_2/DDR0_DQSN_6
M_A_CLK#1 [12] [12] M_A_DQ57 AT41 M_A_DQS_DP7
M_A_DQ58 DDRB_DQSP_2/DDR0_DQSP_6
[12] M_A_DQ58 AR43 DDRB_DQ3_1/DDR0_DQ7_1
M_A_DQ59 DDRB_DQSN_3/DDR0_DQSN_7 BF39 M_A_PARITY
[12] M_A_DQ59 AT38 DDRB_DQ3_2/DDR0_DQ7_2
M_A_CS#1 [12] M_A_DQ60 M_A_DQ60 AR38 DDRB_DQ3_3/DDR0_DQ7_3 DDRB_DQSP_3/DDR0_DQSP_7 BE49 M_A_ACT_N
[12]

t
[12] M_A_BA0 M_A_DQ61 AR39 DDRB_DQ3_4/DDR0_DQ7_4 BD46 M_A_ALERT_N
[12] M_A_DQ61
NC/DDR0_PAR
M_A_BA1 M_A_DQ62
[12]
M_A_DQ62 AR42 DDRB_DQ3_5/DDR0_DQ7_5
[12] M_A_DQ63 M_A_DQ63 AT43 DDRB_DQ3_6/DDR0_DQ7_6 NC/DDR0_ACT# M38

ma
[12] DDRB_DQ3_7/DDR0_DQ7_7 NC/DDR0_ALERT#
M_A_BG0 [12] C44 V_SM_VREF_CNTA
[12] R505 2 1100R2F-L1-GP-USM_RCOMP_0 D47 B45 V_SM_VREF_CNTB
RSVD_73 M39
M_A_BG1 R506 2 1100R2F-L1-GP-U SM_RCOMP_1 E46 DDR_RCOMP_0 VTT_CNTL_CPU
[12] 1100R2F-L1-GP-U SM_RCOMP_2 C47 DDR_RCOMP_1 DDR0_VREF_CA
R507 2 DK47 SM_DRAMRST#_CPU
DDR1_VREF_CA
DDR_RCOMP_2
[12] DDR_VTT_CTL
ICE-LAKE-U-GP-U

he
Channel B [12]
[12]
DRAM_RESET#

CPU1C 3 OF 19

M_B_DQ0 [13] M_B_DQ0 AK48 Y48 M_B_CLK#0

M_B_DQ1 AK45 DDRC_DQ0_0/DDR1_DQ0_0 DDRC_CLK_N/DDR1_CLK_N_0 Y47 M_B_CLK0

c
M_B_DQ1 [13]
M_B_DQ2 M_B_DQ2 AK49 DDRC_DQ0_1/DDR1_DQ0_1 DDRC_CLK_P/DDR1_CLK_P_0 M43 M_B_CLK#1
[13]
M_B_DQ3 [13] M_B_DQ3 AG47 DDRC_DQ0_2/DDR1_DQ0_2 DDRD_CLK_N/DDR1_CLK_N_1 M42 M_B_CLK1
AK47 DDRC_DQ0_3/DDR1_DQ0_3 DDRD_CLK_P/DDR1_CLK_P_1

/s
M_B_DQ4 M_B_DQ4 3D3V_S5
M_B_A0 [13] M_B_DQ5 [13] M_B_DQ5 AG45 DDRC_DQ0_4/DDR1_DQ0_4 U45 M_B_CKE0
M_B_A1 [13] M_B_DQ6 [13] M_B_DQ6 AG48 DDRC_DQ0_5/DDR1_DQ0_5 DDRC_CKE0/DDR1_CKE0 V46
M_B_A2 [13] [13] M_B_DQ7 AG49 DDRC_DQ0_6/DDR1_DQ0_6 DDRC_CKE1/NC M41
M_B_DQ7
M_B_A3 M_B_DQ8 AJ38 DDRC_DQ0_7/DDR1_DQ0_7 DDRD_CKE0/NC P43 M_B_CKE1 3D3V_S0
[13] M_B_DQ8 [13] DDRD_CKE1/DDR1_CKE1
M_B_A4 M_B_DQ9 [13] M_B_DQ9 AL39 DDRC_DQ1_0/DDR1_DQ1_0
[13]

me
M_B_A5 M_B_A6 M_B_DQ15 [13] M_B_DQ10 AJ39 DDRC_DQ1_1/DDR1_DQ1_1 V42 M_B_CS#0 R508
[13] M_B_DQ14 [13] M_B_DQ11 AL43 DDRC_DQ1_2/DDR1_DQ1_2 DDRC_CS_0/DDR1_CS_N_0 V39
10KR2J-3-GP

1
M_B_A7 [13] M_B_DQ12 [13] M_B_DQ12 AL38 DDRC_DQ1_3/DDR1_DQ1_3 DDRC_CS_1/NC Y39
AJ42 DDRC_DQ1_4/DDR1_DQ1_4 DDRD_CS_0/NC T39 M_B_CS#1 Q501 R520
M_B_A8 [13] M_B_DQ13 M_B_DQ13 Q502
[13] DDRD_CS_1/DDR1_CS_N_1

2
1
M_B_A9 M_B_DQ10 M_B_DQ14 AL42 DDRC_DQ1_5/DDR1_DQ1_5 VTT_CNTL_CPU G 2N7002K-2-GP 10KR2J-3-GP
[13]
M_B_A10 [13] M_B_DQ11 [13] M_B_DQ15 AJ43 DDRC_DQ1_6/DDR1_DQ1_6 T38 M_B_BA0
M_B_A11 [13] M_B_DQ22 [13] M_B_DQ16

t.
AB49 DDRC_DQ1_7/DDR1_DQ1_7 DDRD_CA4/DDR1_BA0 T42 M_B_BA1 D Q502_G G

2
M_B_A12 [13] M_B_DQ17 AB48 DDRC_DQ2_0/DDR1_DQ2_0 NC/DDR1_BA1
M_B_DQ17 [13]
M_B_A13 M_B_DQ18 AE49 DDRC_DQ2_1/DDR1_DQ2_1 R45 M_B_BG0 S D VTT_CNTL
[13] M_B_DQ21 [13] DDRC_CA5/DDR1_BG0 N47 M_B_BG1
M_B_A14 M_B_DQ19 M_B_DQ19 AE47 DDRC_DQ2_2/DDR1_DQ2_2
[13] NC/DDR1_BG1
B M_B_A15 [13] M_B_DQ18 M_B_DQ20 AE48 DDRC_DQ2_3/DDR1_DQ2_3 PJA138KA-GP S B
[13] M_B_DQ21
M_B_A16 [13] M_B_DQ16 AB47 DDRC_DQ2_4/DDR1_DQ2_4 P42 M_B_A0 084.00138.0A31 N o t i c e: Z Z . 2N 7 0 2 . J3 1 0 1
//
[13] M_B_DQ22 AB45 DDRC_DQ2_5/DDR1_DQ2_5 NC/DDR1_MA0 Y49 M_B_A1
[13] M_B_DQ20
[13] AE45 DDRC_DQ2_6/DDR1_DQ2_6 NC/DDR1_MA1 U48 M_B_A2
[13] M_B_DQ23 M_B_DQ23
M_B_DQ24 AD38 DDRC_DQ2_7/DDR1_DQ2_7 DDRD_CA5/DDR1_MA2 Y45 M_B_A3 2nd =84.05067.031
M_B_DQ30 [13] 84.2N702.J31
M_B_DQ25 AD39 DDRC_DQ3_0/DDR1_DQ3_0 NC/DDR1_MA3 U47 M_B_A4
M_B_DQ27 [13]
M_B_DQS_DN0 M_B_DQ26 AE39 DDRC_DQ3_1/DDR1_DQ3_1 NC/DDR1_MA4 R49 M_B_A5
M_B_DQS_DN0 [13] M_B_DQ29 [13]
M_B_DQS_DN1 M_B_DQ31 [13] M_B_DQ27 AE43 DDRC_DQ3_2/DDR1_DQ3_2 DDRC_CA0/DDR1_MA5 U49 M_B_A6
s:

M_B_DQS_DN2 M_B_DQS_DN1 [13] M_B_DQ28 AE38 DDRC_DQ3_3/DDR1_DQ3_3 DDRC_CA2/DDR1_MA6 M47 M_B_A7

M_B_DQ25 [13]
M_B_DQS_DN3 M_B_DQS_DN2 [13] AD43 DDRC_DQ3_4/DDR1_DQ3_4 DDRC_CA4/DDR1_MA7 M45 M_B_A8
M_B_DQ28 [13] M_B_DQ29
M_B_DQS_DN3 [13] AD42 DDRC_DQ3_5/DDR1_DQ3_5 DDRC_CA3/DDR1_MA8 R47 M_B_A9
M_B_DQS_DN4 M_B_DQ24 M_B_DQ30
M_B_DQS_DN4 [13] [13] M_B_DQ31 AE42 DDRC_DQ3_6/DDR1_DQ3_6 DDRC_CA1/DDR1_MA9 P39 M_B_A10
M_B_DQS_DN5 M_B_DQ26
M_B_DQS_DN5 M_B_DQ32 J48 DDRC_DQ3_7/DDR1_DQ3_7 NC/DDR1_MA10 N46 M_B_A11 1D2V_S3
M_B_DQS_DN6 [13] M_B_DQ35 [13]
M_B_DQS_DN6 J45 DDRD_DQ0_0/DDR1_DQ4_0 NC/DDR1_MA11 R48 M_B_A12
M_B_DQS_DN7 M_B_DQ33
tp

M_B_DQS_DN7 [13] M_B_DQ38 [13]

M_B_DQ34 J49 DDRD_DQ0_1/DDR1_DQ4_1 NC/DDR1_MA12 Y41 M_B_A13
[13] M_B_DQ36 [13]
M_B_DQ35 G47 DDRD_DQ0_2/DDR1_DQ4_2 DDRD_CA0/DDR1_MA13 V41 M_B_A14
M_B_DQ37 [13] M_B_DQ36 J47 DDRD_DQ0_3/DDR1_DQ4_3 DDRD_CA2/DDR1_MA14W E# Y42 M_B_A15
M_B_DQS_DP0 M_B_DQ34
M_B_DQS_DP0 [13] [13] G45 DDRD_DQ0_4/DDR1_DQ4_4 DDRD_CA1/DDR1_MA15CAS# V47 M_B_A16 R510
M_B_DQS_DP1 M_B_DQS_DP1 M_B_DQ37
M_B_DQS_DP2 [13] M_B_DQ39 [13] M_B_DQ38 G48 DDRD_DQ0_5/DDR1_DQ4_5 DDRD_CA3/DDR1_MA16RAS# 470R2F-GP
M_B_DQS_DP3 M_B_DQS_DP2 [13] M_B_DQ32 M_B_DQ39 E48 DDRD_DQ0_6/DDR1_DQ4_6 V43 M_B_DIMB_ODT0
ht

M_B_DQ33 [13] R511

M_B_DQS_DP3

2
1
M_B_DQS_DP4 [13] [13] M_B_DQ40 J38 DDRD_DQ0_7/DDR1_DQ4_7 NC/DDR1_ODT_0 V38 M_B_DIMB_ODT1 SM_DRAMRST#_CPU 1 2 DDR4_DRAMRST#
M_B_DQS_DP4 M_B_DQ40 NC/DDR1_ODT_1
M_B_DQS_DP5 [13] M_B_DQ41 [13] M_B_DQ41 G39 DDRD_DQ1_0/DDR1_DQ5_0
M_B_DQS_DP5 G38 DDRD_DQ1_1/DDR1_DQ5_1
M_B_DQS_DP6 [13] M_B_DQ42 [13] M_B_DQ42 AH46 M_B_DQS_DN0 0R2J-2-GP
M_B_DQS_DP6 G42 DDRD_DQ1_2/DDR1_DQ5_2 DDRC_DQSN_0/DDR1_DQSN_0 AH47 M_B_DQS_DP0 C501
M_B_DQS_DP7 [13] M_B_DQ47 M_B_DQ43
M_B_DQS_DP7 [13] DDRC_DQSP_0/DDR1_DQSP_0 AJ41 M_B_DQS_DN1
[13] M_B_DQ44 M_B_DQ44 J39 DDRD_DQ1_3/DDR1_DQ5_3

SCD1U16V2KX-3DLGP
[13]
M_B_DQ45 M_B_DQ45 J42 DDRD_DQ1_4/DDR1_DQ5_4 DDRC_DQSN_1/DDR1_DQSN_1 AL41 M_B_DQS_DP1
[13]
M_B_DQ43 [13] M_B_DQ46 G43 DDRD_DQ1_5/DDR1_DQ5_5 DDRC_DQSP_1/DDR1_DQSP_1 AC47 M_B_DQS_DN2

21
M_B_DQ46 M_B_DQ47 J43 DDRD_DQ1_6/DDR1_DQ5_6 DDRC_DQSN_2/DDR1_DQSN_2 AC46 M_B_DQS_DP2
[13] M_B_CLK#0 [13] M_B_DIMB_ODT0 [13] M_B_DQ48 B43 DDRD_DQ1_7/DDR1_DQ5_7 DDRC_DQSP_2/DDR1_DQSP_2 AE41 M_B_DQS_DN3 DY
M_B_DQ52
[13] M_B_DQ49 D43 DDRD_DQ2_0/DDR1_DQ6_0 DDRC_DQSN_3/DDR1_DQSN_3 AD41 M_B_DQS_DP3
[13] M_B_CLK0 [13] M_B_DIMB_ODT1 M_B_DQ51
M_B_DQ50 A43 DDRD_DQ2_1/DDR1_DQ6_1 DDRC_DQSP_3/DDR1_DQSP_3 H47 M_B_DQS_DN4
M_B_DQ55 [13]
M_B_DQ51 C40 DDRD_DQ2_2/DDR1_DQ6_2 DDRD_DQSN_0/DDR1_DQSN_4 H46 M_B_DQS_DP4
[13] M_B_ACT_N M_B_DQ49 [13] C43 DDRD_DQ2_3/DDR1_DQ6_3 DDRD_DQSP_0/DDR1_DQSP_4 G41 M_B_DQS_DN5
M_B_DQ52
M_B_DQ54 [13] D40 DDRD_DQ2_4/DDR1_DQ6_4 DDRD_DQSN_1/DDR1_DQSN_5 J41 M_B_DQS_DP5
M_B_DQ48 [13] M_B_DQ53
[13] M_B_CKE1 [13] M_B_PARITY M_B_DQ54 B40 DDRD_DQ2_5/DDR1_DQ6_5 DDRD_DQSP_1/DDR1_DQSP_5 C42 M_B_DQS_DN6
M_B_DQ50 [13] M_B_DQ55 A40 DDRD_DQ2_6/DDR1_DQ6_6 DDRD_DQSN_2/DDR1_DQSN_6 D42 M_B_DQS_DP6
[13] M_B_CKE0 [13] M_B_ALERT_N M_B_DQ53
M_B_DQ63 [13] M_B_DQ56 B35 DDRD_DQ2_7/DDR1_DQ6_7 DDRD_DQSP_2/DDR1_DQSP_6 D36 M_B_DQS_DN7
M_B_DQ62 [13] M_B_DQ57 D35 DDRD_DQ3_0/DDR1_DQ7_0 DDRD_DQSN_3/DDR1_DQSN_7 C36 M_B_DQS_DP7
M_B_DQ57 [13] M_B_DQ58 A35 DDRD_DQ3_1/DDR1_DQ7_1 DDRD_DQSP_3/DDR1_DQSP_7
M_B_CLK1 [13] M_B_DQ56 [13] M_B_DQ59 D38 DDRD_DQ3_2/DDR1_DQ7_2 P38 M_B_PARITY
[13] M_B_CS#0 M_B_CLK#1 [13] M_B_DQ58 M_B_DQ60 C35 DDRD_DQ3_3/DDR1_DQ7_3 NC/DDR1_PAR M48 M_B_ACT_N
[13]
A M_B_DQ59 [13] M_B_DQ61 C38 DDRD_DQ3_4/DDR1_DQ7_4 NC/DDR1_ACT# M49 M_B_ALERT_N A
M_B_DQ61 [13] M_B_DQ62 B38 DDRD_DQ3_5/DDR1_DQ7_5 NC/DDR1_ALERT#
M_B_DQ60 [13] M_B_DQ63 A38 DDRD_DQ3_6/DDR1_DQ7_6
[13] M_B_BA0 M_B_CS#1 [13] DDRD_DQ3_7/DDR1_DQ7_7
[13]
ICE-LAKE-U-GP-U
[13] M_B_BA1 [13]
[13] <CorrreDesiiign>
[13] M_B_BG0 [13]
[13]
[13] M_B_BG1 [13]
[13]
Wistron Corporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

[12] V_SM_VREF_CNTA Eletro-XTechnical [51] VTT_CNTL Tiitttlle

CPU (DDR)
[13] V_SM_VREF_CNTB [12,13] DDR4_DRAMRST#
Size DocumentttNumberrr Rev
A2
Hellcat 14/15_ ICL SA
Dattte:::Tuesday,,, Septttemberrr17,,,2019 Sheettt 5 off 106
5 4 3 2 1
 5 4 3 2 1

1D05V_VCCIO_OUT

1 R606 2 CFG_0
CFG_0
CPU1S 19 OF19
Eletro-XTechnical
1KR2J-1-GP CFG_1
AG6 CFG_0 RSVD_TP_1 A47
AE7 CFG_1 RSVD_TP_2 B47
1 R607 2 CFG_1 CFG_3
AG7 CFG_2
AD9 CFG_3 RSVD_57 C1
1KR2J-1-GP AE9 CFG_4 RSVD_58 E1
AB9 CFG_5
1 R608 2 CFG_3
D AJ6 CFG_6 RSVD_TP_10 CT32 D
1KR2J-1-GP
CFG_8
AB7 CFG_7 RSVD_TP_11 CV32
V10 CFG_8
1 R609 2 CFG_8 CFG_9 AJ5 CFG_9 G15
CFG_10 RSVD_79
1KR2J-1-GP Y10 CFG_10 RSVD_80 F15
AJ7 CFG_11
1 R610 2 CFG_9 CFG_12 AB10 CFG_12 BW 11
CFG_13 RSVD_TP_5
1KR2J-1-GP AL7 CFG_13 RSVD_TP_6 CA11
AL9 CFG_14
R611 AJ9 CFG_15 C16
1 2 CFG_10 VSS_428A16
1KR2J-1-GP V6 VSS_429
V7 CFG_16 C2
1 R612 2 CFG_12 CFG_17 RSVD_55 A4
1KR2J-1-GP Y6 RSVD_56
Y7 CFG_18 DP5

p
R613 CFG_19 RSVD_65 DR5
1 2 CFG_13 R605
1 2 49D9R2F-GPCFG_RCOMP RSVD_66

to
1KR2J-1-GP AD6 CFG_RCOMP
T9 RSVD_59 D14
T7 BPM_N_0 RSVD_60 E16
CPU1R 18 OF19 T10 BPM_N_1 DV6

ap
T6 BPM_N_2 RSVD_TP_13 DW6
TP_DA11 BPM_N_3 RSVD_TP_14
N34 RSVD_TP_27 RSVD_TP_35 DA11 1 TP619
AK10 RSVD_TP_28 RSVD_TP_36 CL32 BJ11 RSVD_62 RSVD_TP_24 DP2
BT36 RSVD_7 RSVD_TP_37 CN32 BL10 RSVD_63 RSVD_TP_25 DP1

sl
AH10 RSVD_TP_29 RSVD_32 CY35
BC10 RSVD_TP_30 RSVD_33 DB37 AV1 RSVD_TP_17 RSVD_TP_15 DW4
C
CH33 RSVD_TP_31 RSVD_34 DF37 RSVD_TP_16 DV4 C
AT2 RSVD_TP_18

ic
CJ32 RSVD_12 IST_TP_0 BF11 TP_ISP_0 1
TP603 AT1 RSVD_TP_20 TP_3 CM33
AM10 RSVD_TP_32 IST_TP_1 BD11 TP_ISP_1 1
TP602 AU1 RSVD_TP_19 TP_4 DB10
TP_ISP_TRIG_0 1
BH10 RSVD_TP_33 IST_TRIG_0 BE10 TP604 AU2 RSVD_TP_21
J34 RSVD_TP_34 IST_TRIG_1 BF10 TP_ISP_TRIG_1 1 T P605 RSVD_TP_12 R1

t
AV2 RSVD_TP_22
Y11 CW 33 DW 3

ma
L34 RSVD_9 PCH_IST_TP_0 CY32 TP_PCH_IST_1 1 DP3 RSVD_TP_7 DV3
RSVD_10 PCH_IST_TP_1 TP607 DT2 RSVD_67 RSVD_TP_8
AJ11 CY37 RSVD_68 DH49
CG32 RSVD_17 RSVD_27 CV37 AR10 RSVD_TP_9
RSVD_21 RSVD_28 AP10 RSVD_69

he
DL8
BP36 RSVD_71 RSVD_TP_23
CK33 BM36 RSVD_70 DW 47
BP41 RSVD_22 G34 RSVD_72 TP_1 DV47
AL11 RSVD_20 RSVD_35 H34 TP_2 DU47

c
J15
BG11 RSVD_23 RSVD_46 DJ34 K15 VSS_430 VSS_432
AN11 RSVD_24 RSVD_48 DK31 VSS_431

/s
P10
M13 RSVD_16 RSVD_49 DK15 1TP_SKTOCC# C5 RSVD_TP_26
M34 RSVD_18 RSVD_50 CP3 TP608 1TP_PROC_SELECT# D4 SKTOCC#
RSVD_19 RSVD_51 CP5 TP609 A5 RSVD_78
RSVD_52 AN9 RSVD_64

me
RSVD_53 AN7 ICE-LAKE-U-GP-U
RSVD_54 AF10
DU42 RSVD_36 AE11
DW42 RSVD_42 RSVD_37 H5

B
D33 RSVD_43
L13 RSVD_44
K13 RSVD_45
RSVD_47
RSVD_38 D1
RSVD_39 DJ40
RSVD_40 DK40
RSVD_41
t. B
//
ICE-LAKE-U-GP-U
s:
tp
ht

A <CoreDesiiign> A

WistronCorporation
21F, 88, Sec.1, HsiiinTaiiiWu Rd., Hsiiichiiih,
TaiiipeiiiHsiiien221, Taiiiwan,R.O.C.

Eletro-XTechnical
Title
CPU (CFG/IST)
Siize DocumentNumber Rev
A3
Hellcat 14/15_ ICL SA
Date: Tuesday, September 17, 2019 Sheet 6 of 106
5 4 3 2 1
 5 4 3 2 1

SVID DATA
Main Func = CPU 1D05V_VCCST

Eletro-XTechnical

2
R703
100R2F-L1-GP-U
1V_CPU_CORE 1V_CPU_CORE
R708
0R2J-2-GP 2

1
D CPU1L 12 OF19 SVID_DATA_CPU_R 1 SVID_DATA_CPU D

A19 CJ35
AC12 VCCIN_1 VCCIN_52 CK10
[46]
[46]
SVID_ALERT#_CPU
SVID_CLK_CPU
SVID_DATA_CPU
V13 VCCIN_2
W 12 VCCIN_3
VCCIN_4
VCCIN_53 J32
VCCIN_54 CL34
VCCIN_55 CL35
SVID ALERT
[46] Y13
VCCIN_5 VCCIN_56 1D05V_VCCST
K29 CN34
[46] VCCCORE_SENSE VCCIN_6 VCCIN_57
K31 CN35
[46] VSSCORE_SENSE VCCIN_7 VCCIN_58

1
B19
VCCIN_8 VCCIN_59 CP33
CR34 R701

p
B23 VCCIN_9 VCCIN_60
B27 VCCIN_10 VCCIN_61 A29 56R2J-4-GP

to
B29 CR35
VCCIN_11 VCCIN_62 R706
BN10
VCCIN_12 VCCIN_63 CT33 0R2J-2-GP 2

2
BP11 VCCIN_13 VCCIN_64 CT34 SVID_ALERT#_CPU_R 1 SVID_ALERT#_CPU

ap
BP9 VCCIN_14 VCCIN_65 CT35
BR10 VCCIN_15 VCCIN_66 CU33
BT11 VCCIN_16 VCCIN_67 D19 SVID CLOCK

sl
A21 VCCIN_17 VCCIN_68 D21
BT9 VCCIN_18 VCCIN_69 D23
BU10 VCCIN_19 VCCIN_70 D24 1D05V_VCCST

ic
C C
BV36 VCCIN_20 VCCIN_71 D27
BV9 VCCIN_21 VCCIN_72 AA12

t
BW 10 VCCIN_22 VCCIN_73 D29

2
BW 36 VCCIN_23 VCCIN_74 F19

ma
BW 9 VCCIN_24 VCCIN_75 F21 R702
BY10 VCCIN_25 VCCIN_76 F23
F24
DY 43R2F-2-GP
C19

he
VCCIN_26 VCCIN_77 F27
C23 R709
VCCIN_27

1
A23 VCCIN_78 F29
VCCIN_28 VCCIN_79 SVID_CLK_CPU_R 0R2J-2-GP 2
C27 G1 SVID_CLK_CPU

c
VCCIN_29 1
C29 VCCIN_80 G19
VCCIN_30

/s
VCCIN_81
CA36 VCCIN_31
VCCIN_82
G23 Layout note:
CA9 VCCIN_32 AB1
VCCIN_83 G27
CB10 VCCIN_33

me
CC11 VCCIN_34
VCCIN_84 G29 3.Length matchin 25mil, and close SOC in 2inch "
VCCIN_85
CC36 VCCIN_35 H19
VCCIN_86
CC9 VCCIN_36 H23
t.
CD10 VCCIN_37
CE11 VCCIN_38
VCCIN_87
VCCIN_88
VCCIN_89
H27
H29
1V_CPU_CORE

A24 VCCIN_39 J18

//
B VCCIN_90 B
CE34 VCCIN_40 VCCIN_91 J20
1 R704 2 VCCCORE_SENSE
CE35 VCCIN_41 VCCIN_92 J22
100R2F-L1-GP-U
s:

CF10 VCCIN_42 VCCIN_93 J23

AB13 1 R705 2 VSSCORE_SENSE
CF33 VCCIN_43 VCCIN_94
CG11 VCCIN_44 J26 100R2F-L1-GP-U
VCCIN_95
tp

CG34 VCCIN_45 VCCIN_96 J28

CG35 VCCIN_46 VCCIN_97 K17
CH10 VCCIN_47 VCCIN_98 K19
ht

J30 VCCIN_48 VCCIN_99 K21

CJ11 VCCIN_49 VCCIN_100 K23
A27 VCCIN_50 VCCIN_101 K24 Layout Note:
CJ34 VCCIN_51 VCCIN_102 K27 1. Place close to CPU
VCCIN_103 M1
VCCIN_104 U1 2. VCC_SENSE/ VSS_SENSE
SVID_ALERT#_CPU_R H1 impedance=50 ohm
SVID_CLK_CPU_R H2 VIDALERT# F17 VCCCORE_SENSE 3. Length match<25mil
<CoreDesign>
VIDSCK VCCIN_SENSE G17 VSSCORE_SENSE
SVID_DATA_CPU_R H3
VIDSOUT VSSIN_SENSE
ICE-LAKE-U-GP-U Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan,R.O.C.

Title
CPU (VCCIN/VID)
Eletro-XTechnical
Size Document Number Rev
A4
Hellcat 14/15_ ICL SA
Date: Tuesday, September 17, 2019 Sheet 7 of 106
5 4 3 2 1
 5 4 3 2 1

Main Func = CPU

Eletro-XTechnical

CPU1M 13 OF19
D 1200mA D
1D2V_S3 AA37 BP39 1D2V_S3
AG36 VDDQ_1 VDDQ_31 BR37
AJ36 VDDQ_2 VDDQ_32 BT38
AL36 VDDQ_3 VDDQ_33 AC35
VDDQ_4 VDDQ_34
AL49 BU37
VDDQ_5 VDDQ_35
AN36 BU49
VDDQ_6 VDDQ_36
AP37 CA39
VDDQ_7 VDDQ_37
AR36 CB49
VDDQ_8 VDDQ_38
AR37 VDDQ_9 VDDQ_39 L38
AT36 L49

p
VDDQ_10 VDDQ_40
AT49 N36
VDDQ_11 VDDQ_41

to
AA49 T49
VDDQ_12 VDDQ_42
AV36 VDDQ_13 VDDQ_43 AC37
AW 37 AD35

ap
VDDQ_14 VDDQ_44
AY36 VDDQ_15 VDDQ_45 AD36
BA37 VDDQ_16 VDDQ_46 AE36
BA49 AF49

sl
VDDQ_17 VDDQ_47
BB36 VDDQ_18 [RSVD]
BD36 VDDQ_19 RSVD_77 C33
BE37

ic
C VDDQ_20 C
BF36 VDDQ_21 A33
BF37 RSVD_2 B33
VDDQ_22
RSVD_3

t
AB36
BF49
VDDQ_23
VDDQ_24 BG9 700mA

ma
VCC1P8A_1 BJ9 1D8V_PCH_C10
BG36 VDDQ_25
BJ36 VDDQ_26 VCC1P8A_2 BM9
BL37 VDDQ_27 VCC1P8A_3 BW 1

he
BM49 VDDQ_28 VCC1P8A_4 BW2
BN37 VDDQ_29 VCC1P8A_5
BP38 R35

c
VDDQ_30 [VCCSTG_OUVT C]CSTG_OUT_3 1D05V_VCCSTG_OUT_FUSE_R 1D05V_VCCSTG_OUT_FUSE
[VCCSTG_OUVT C]CSTG_OUT_4
V34
610mA

/s
1D05V_VCCST CB1 [VCCSTG_OUVT C]CSTG_OUT_5
T34
VCCST U35
120mA 1D05V_VCCSTG BY1
[VCCSTG_OUVT C]CSTG_OUT_6
AB34 1 2

me
VCCSTG [VCCSTG_OUVT C]CSTG_OUT_7 W35
[RSVD] RSVD_74 R808
AA35 BGA Package Ballout Mechanical Specification
[RSVD] RSVD_75 Y34 Document Number:572793 D01R3F-L-GP
1D05V_VCCSTG_OUT_FUSE F33
G33
[RSVD]
VCCSTG_OUT_1
VCCSTG_OUT_2
t.
RSVD_76 Revision 0.71

CD2 1D05V_VCCP_OUT_SFR(150mA)
//
B B
E5 VCCPLL
1D05V_VCCSTG_OUT_LGC VCCSTG_OUT_LGC
VCCPLL_OC_1
CG38 1D2V_VCCPLL_OC(150mA)
1D05V_VCCSTG_TERM
s:

CG41
1 2 VCCPLL_OC_2 CG42
VCCPLL_OC_3 CG49
R803 VCCPLL_OC_4
tp

D01R3F-L-GP AD7
VCCIO_OUT 1D05V_VCCIO_OUT
ht

ICE-LAKE-U-GP-U

<CoreDesign>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan,R.O.C.

Title
CPU (VDDQ/VCC/VCCST/VCCSTG)
Eletro-XTechnical
Size Document Number Rev
A4
Hellcat 14/15_ ICL SA
Date: Tuesday, September 17, 2019 Sheet 8 of 106
5 4 3 2 1
 5 4 3 2 1

Main Func DM1A 1 OF 4

= MEMORY M_A_A0
M_A_A1
144
133 A0 DQ0 7
8 M_A_DQ57
M_A_DQ60
M_A_A2 132 A1 DQ1 20 M_A_DQ56 DM1D 4 OF 4
M_A_A3 131 A2 DQ2 21 M_A_DQ63 M_A_DQ[56:63] DM1B 2 OF 4

Eletro-XTechnical
M_A_A4 128 A3 DQ3 4 M_A_DQ61 1 99
M_A_A5 126 A4 DQ4 3 M_A_DQ59 11 M_A_DQS_DN7 2 VSS VSS 102
DQ5 16 DQS0_C 5 VSS VSS 103
M_A_DQS_DN0 M_A_A6 127 A5 M_A_DQ58 13 M_A_DQS_DP7
M_A_DQS_DN0 [5] DQ6 17 M_A_DQ62 DQS0_T 6 VSS VSS 106
M_A_DQS_DN1 M_A_A7 122 A6 32 M_A_DQS_DN5
M_A_DQS_DN1 [5] DQ7 28 DQS1_C 9 VSS VSS 107
M_A_DQS_DN2 M_A_A8 125 A7 M_A_DQ40 34 M_A_DQS_DP5
M_A_DQS_DN2 [5] DQ8 29 DQS1_T 10 VSS VSS 167
M_A_DQS_DN3 M_A_A9 121 A8 M_A_DQ42
53 M_A_DQS_DN6
M_A_DQS_DN4 M_A_DQS_DN3 [5] M_A_A10 146 A9 DQ9 41 14 VSS VSS 168
M_A_DQ47 DQS2_C 55
M_A_DQS_DN4
M_A_DQS_DN5
M_A_DQS_DN5
[5] M_A_A11 120 A10/AP DQ10 42 M_A_DQ43 M_A_DQ[40:47] DQS2_T
M_A_DQS_DP6 15 VSS VSS 171
M_A_DQS_DN6 [5] M_A_A12 119 A11 DQ11 24 M_A_DQ44 74 M_A_DQS_DN4 18 VSS VSS 172
M_A_DQS_DN6 DQ12 25 DQS3_C VSS 175
M_A_DQS_DN7 [5] M_A_A13 158 A12 M_A_DQ41 76 M_A_DQS_DP4 19 VSS
M_A_DQS_DN7 M_A_A14 151 A13 DQ13 38 DQS3_T 22 VSS VSS 176
[5] M_A_DQ45 177 M_A_DQS_DN2
D
M_A_DQS_DP0 M_A_A15 156 W E#/A14 DQ14 37 M_A_DQ46 DQS4_C 179 M_A_DQS_DP2 23 VSS VSS 180
D
M_A_DQS_DP1 M_A_DQS_DP0 [5] M_A_A16 152 CAS#/A15 DQ15 50 M_A_DQ54 26 VSS VSS 181
DQS4_T 198
M_A_DQS_DP2 M_A_DQS_DP1 [5] RAS#/A16 DQ16 49 M_A_DQ51 27 VSS VSS 184
DQS5_C M_A_DQS_DN0
M_A_DQS_DP3 M_A_DQS_DP2 [5] M_A_BA0 150 DQ17 62 M_A_DQ49 30 VSS VSS 185
200 M_A_DQS_DP0
M_A_DQS_DP4 M_A_DQS_DP3
M_A_DQS_DP4
[5] M_A_BA1 145 BA0 DQ18 63 M_A_DQ52 M_A_DQ[48:55] DQS5_T
219 M_A_DQS_DN3 31 VSS VSS 188
M_A_DQS_DP5 [5] M_A_BG0 115 BA1 DQ19 46 M_A_DQ55 DQS6_C 35 VSS VSS 189
M_A_DQS_DP5 M_A_BG1 113 BG0 221 M_A_DQS_DP3 36 VSS VSS 192
M_A_DQS_DP6 [5] DQ20 45 M_A_DQ53 DQS6_T 1D2V_S3
M_A_DQS_DP7 M_A_DQS_DP6 BG1 DQ21 58 240 M_A_DQS_DN1 39 VSS VSS 193
[5] M_A_DQ48 DQS7_C
M_A_DQS_DP7 92 DQ22 59 M_A_DQ50 242 M_A_DQS_DP1 40 VSS VSS 196
[5] DQS7_T
91 CB0/NC DQ23 70 M_A_DQ37 95 43 VSS VSS 197
M_A_A0 [5] 101 CB1/NC DQ24 DQS8_C 44 VSS VSS 201
71 M_A_DQ39 97
M_A_A1 [5] 105 CB2/NC DQ25 M_A_DQ35 DQS8_T 47 VSS VSS 202
83
M_A_A2
M_A_A3
[5]
88 CB3/NC
DQ26 84 M_A_DQ33 M_A_DQ[32:39] DM0#/DBI0#
12 48 VSS VSS 205
[5] DQ27 33 51 VSS VSS 206
M_A_A4 87 CB4/NC 66 M_A_DQ38 54
[5] DM1#/DBI# 52 VSS VSS 209
M_A_A5 100 CB5/NC DQ28 67 M_A_DQ36 75
[5] 104 CB6/NC DM2#/DBI2# 56 VSS VSS 210
M_A_A6 DQ29 7 M_A_DQ32 178
[5]
CB7/NC DQ30 890 M_A_DQ34 DM3#/DBI3#
199 57 VSS VSS 213
M_A_A7 M_A_CLK0 137 DQ31 174 M_A_DQ22 DM4#/DBI4# 60 VSS VSS 214
[5] 220
M_A_A8 M_A_CLK#0 139 CK0_T DQ32 173 M_A_DQ23 DM5#/DBI5# 61 VSS VSS 217
[5] 241
M_A_A9 DQ33 187 DM6#/DBI6# 64 VSS VSS 218
M_A_CLK1 138 CK0_C M_A_DQ16 96
M_A_A10 [5]
M_A_A11
M_A_CLK#1 140 CK1_T/NF
CK1_C/NF
DQ34 186 M_A_DQ17 M_A_DQ[16:23] DM7#/DBI7#
DDR4-260P-78-GP-U 65 VSS VSS 222
[5] DQ35 170 M_A_DQ19 DM8#/DBI#/NC 68 VSS VSS 223
M_A_A12 [5] M_A_CKE0 109 DQ36 M_A_DQ21 062.10011.M001 3D3V_S0 69 VSS VSS 226

p
169
M_A_A13 M_A_CKE1 110 CKE0 DQ37 M_A_DQ20 1D2V_S3 72 VSS VSS 227
[5] 183 DM1C 3 OF 4
M_A_A14 CKE1 DQ38 182 M_A_DQ18 73 VSS VSS 230
M_A_A15 [5]
M_A_CS#0 149 DQ39 195 M_A_DQ3 77 VSS VSS 231

to
[5] 111 255
M_A_A16 M_A_CS#1 157 CS0# DQ40 194 M_A_DQ7 112 VDD VDDSPD 78 VSS VSS 234
[5] 162 CS1# DQ41 207 117 VDD 2D5V_S3 C1228 81 VSS VSS 235
M_A_DQ2 C1201
[5] 165 C0/CS2#/NC DQ42 208 M_A_DQ4 M_A_DQ[0:7] 118 VDD 257 82 VSS VSS 238

SCD1U16V2KX-3DLGP

SC2D2U10V3KX-1DLGP-U
M_A_DQ0 [5] C1/CS3#/NC DQ43 191 123 VDD VPP 259 85 VSS VSS 239
M_A_DQ6
M_A_DQ1 [5] M_A_DIMA_ODT0 155 DQ44 190 M_A_DQ5 124 VDD VPP 86 VSS VSS 243

21

21
M_A_DQ2 VDD

ap
[5] M_A_DIMA_ODT1 161 ODT0 DQ45 203 M_A_DQ1 129 258 89 VSS VSS 244
M_A_DQ3 [5] ODT1 DQ46 204 M_A_DQ0 130 VDD 0D6V_S0 DY DY 90 VSS VSS 247
VTT
M_A_DQ4 [5] SA0_CHA_DIM0256 DQ47 216 M_A_DQ26 135 VDD 93 VSS VSS 248
M_A_DQ5 SA1_CHA_DIM0 260 SA0 DQ48 215 M_A_DQ25 136 VDD 94 VSS VSS 251
M_A_DQ6 [5]
SA2_CHA_DIM0 166 SA1 DQ49 228 M_A_DQ31 141 VDD 98 VSS VSS 252
[5]
M_A_DQ7
[5]
SA2 DQ50 229
DQ51 211
M_A_DQ30 M_A_DQ[24:31] 142 VDD VSS VSS

sl
M_A_DQ8 PCH_SMBDATA 254 M_A_DQ28 147 VDD 261
M_A_DQ9 [5] DQ52 212 M_A_DQ24 VDD
PCH_SMBCLK 253 SDA 148 261 262 DDR4-260P-78-GP-U
M_A_DQ10 [5] SCL DQ53 224 M_A_DQ29 153 VDD
262
M_A_DQ11 [5] DQ54 225 M_A_DQ27 154 VDD 062.10011.M001
M_A_DQ12 DDR4_DRAMRST# 108 DQ55 237 M_A_DQ15 159 VDD
C [5] NP1 C
M_A_DQ13 1D2V_S3 M_A_ACT_N 114 RESET# DQ56 236 M_A_DQ14 160 VDD
[5] NP1 NP2

ic
M_A_DQ14 DQ57 249 VDD
[5] M_A_ALERT_N 116 ACT# M_A_DQ13 163
M_A_DQ15 NP2
M_A_DQ16 [5]
1 DY 2 TS#_DIMM0_1 134 ALERT#
EVENT#/NF
DQ58 250
DQ59 232
M_A_DQ11 M_A_DQ[8:15] VDD
R1215 240R2F-1-GP M_A_DQ8
M_A_DQ17 [5] M_A_PARITY DQ60 233 M_A_DQ10
143 DDR4-260P-78-GP-U
M_A_DQ18 [5] PARITY DQ61 245 M_A_DQ9
M_A_DQ19 [5] M_VREF_CA_DIMMA 164 DQ62 246 M_A_DQ12 062.10011.M001

t
M_A_DQ20 [5] VREFCA DQ63
M_A_DQ21 [5] 0D6V_S0 0D6V_S0 0D6V_S0
M_A_DQ22
DDR4-260P-78-GP-U

ma
M_A_DQ23 [5]
[5] C1229
M_A_DQ24
[5]
062.10011.M001
M_A_DQ25
2 1

1D2V_S3
SCD1U25V2KX-1-DL-GP

M_A_DQ26 [5] C1225C1226

M_A_DQ27 [5]
M_A_DQ28 [5]
DY C1223 C1227

2 1
21
he

SC4D7U6D3V3KX-DLGP
M_A_DQ29

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP
[5]

21

21

SC4D7U6D3V3KX-DLGP
M_A_DQ30 [5]
M_A_DQ31 [5]
M_A_DQ32
[5] C1208 C1202 C1209 C1203 C1204 C1205 C1206 C1210
M_A_DQ33
M_A_DQ34 [5]
3D3V_S0

21

21

21

21

21

21

21

21
c
DY DY DY DY

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP
M_A_DQ35 [5]
M_A_DQ36 [5]
M_A_DQ37 [5]

/s
R1204 1 DY 2 10KR2J-3-GP SA0_CHA_DIM0
M_A_DQ38 [5]
M_A_DQ39 [5] R12052 1 0R2J-2-GP
M_A_DQ40 [5]
M_A_DQ41 [5]
M_A_DQ42
M_A_DQ43 [5]

me
M_A_DQ44 [5]
2D5V_S3
M_A_DQ45 [5]
3D3V_S0
M_A_DQ46 [5] DDR4_DRAMRST#
M_A_DQ47 [5]

1
C1214 C1215 C1216 C1217 C1218 C1219 C1220 C1221
M_A_DQ48 [5] 2 10KR2J-3-GP SA1_CHA_DIM0
R1208 1 DY EC1202 DY
DY DY DY
M_A_DQ49

t. EC1203
2

[5]

2
C1231 C1212
M_A_DQ50

2 1
ED1217 R1210 2 1 0R2J-2-GP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

21
[5] DY C1207

SC2D2U6D3V2MX-DL-GP

SCD1U25V2KX-1-DL-GP

SC4D7U6D3V3KX-DLGP
M_A_DQ51
[5] DY

21

21

21
DY AZ5725-01FDR7G-GP

SC4D7U6D3V3KX-DLGP
M_A_DQ52
B M_A_DQ53 [5] 83.05725.0A0 B
M_A_DQ54 [5]

SC1U10V2KX-1DLGP
//
M_A_DQ55 [5]
1

M_A_DQ56 [5] 3D3V_S0

M_A_DQ57 [5]
M_A_DQ58 [5]
M_A_DQ59 [5] R1211 1 DY 2 10KR2J-3-GP SA2_CHA_DIM0
M_A_DQ60
[5]
s:

M_A_DQ61 R1212 2 1 0R2J-2-GP

[5]
M_A_DQ62
M_A_DQ63 [5]

M_A_CLK0 [5[]5]
M_A_CLK#0 [5] [5]
tp

M_A_CLK1 [5[]5]
M_A_CLK#1 [5] [5]
[5] 1D2V_S3
M_A_CKE0 [5][5]
M_A_CKE1 [5]
[5]
RN1201
ht

M_A_CS#0 [5] 1 4 R1206

M_A_CS#1 [5] 2 3 M_VREF_CA_DIMMA 1 2 V_SM_VREF_CNTA

SRN1KJ-7-GP 2R2F-GP
M_A_DIMA_ODT0 [5]
1

C1222
M_A_DIMA_ODT1 [5]
SCD022U16V2KX-3DLGP

PCH_SMBDATA [13,18] +V_VREF_PATH1

12

PCH_SMBCLK [13,18]
R1209
DDR4_DRAMRST# [5,13] 24D9R2F-L-GP
M_A_ACT_N [5]
M_A_ALERT_N [5]
M_A_PARITY [5]
2

M_A_BA0 [5]
M_A_BA1 [5]
M_A_BG0 [5]
M_A_BG1 [5]

A V_SM_VREF_CNTA [5] A

<CorrreDesiiign>

WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle

DDR3-SODIMM1
Siize DocumentttNumberrr Rev
A2
Hellcat 14/15_ ICL SA
Dattte::: Tuesday,,, Septttemberrr17,,, 2019 Sheettt 12 offf 106
5 4 3 2 1
 5 4 3 2 1

Main Func DM2A 1 OF 4 3D3V_S0

= MEMORY M_B_A0 144 8 M_B_DQ56 1D2V_S3
M_B_A1 133 A0 DQ0 7 M_B_DQ60 M_B_DQ[56:63] DM2C 3OF 4 DM2D 4OF 4
M_B_A2 132 A1 DQ1 20 M_B_DQ61
M_B_A3 131 A2 DQ2 21 M_B_DQ59 111 255 1 99

Eletro-XTechnical
M_B_A4 128 A3 DQ3 4 M_B_DQ57 112 VDD VDDSPD 2 VSS VSS 102
M_B_A0 [5]
DQ4 3 M_B_DQ58 117 VDD 2D5V_S3 C1328 5 VSS VSS 103
M_B_A1 [5] M_B_A5 126 A4 C1329
DQ5 16 M_B_DQ62 118 VDD 257 6 VSS VSS 106

SCD1U16V2KX-3DLGP
M_B_A6 127 A5

SC2D2U10V3KX-1DLGP-U
M_B_A2 [5] DQ6 17 VDD VPP 259
M_B_DQ63 123 9 VSS VSS 107
M_B_A3 [5] M_B_A7 122 A6 DQ7 28 M_B_DQ54 124 VDD VPP 0D6V_S0 10 VSS VSS 167

21

21
M_B_A4 [5] 125 A7
M_B_A8 121
M_B_A5 [5]
M_B_A9 A8 DQ8 29 M_B_DQ55 M_B_DQ[48:55] 129 VDD
VTT
258
DY DY 14 VSS VSS 168
M_B_A10 146 A9 DQ9 41 M_B_DQ52 130 VDD 15 VSS VSS 171
M_B_A6 [5] M_B_A11 120 A10/AP DQ10 42 M_B_DQ50 135 VDD 18 VSS VSS 172
M_B_A7 [5] M_B_A12 119 A11 DQ11 24 M_B_DQ53 136 VDD 19 VSS VSS 175
M_B_A8 [5] DQ12 25 VDD
M_B_A13 158 A12 M_B_DQ51 141 22 VSS VSS 176
M_B_A9 [5] DQ13 38 VDD
M_B_A14 151 A13 M_B_DQ49 142 23 VSS VSS 180
M_B_A10 [5]
D
M_B_A15 156 W E#/A14 DQ14 37 M_B_DQ48 147 VDD 261 26 VSS VSS 181
M_B_A11 [5] D
M_B_A16 152 CAS#/A15 DQ15 50 M_B_DQ39 148 VDD 261 262 27 VSS VSS 184
M_B_A12 [5]
M_B_A13 [5]
RAS#/A16 DQ16 49 M_B_DQ35 M_B_DQ[32:39] 153 VDD 262 30 VSS VSS 185
M_B_BA0 150 DQ17 62 M_B_DQ36 154 VDD 31 VSS VSS 188
M_B_A14 [5] M_B_BA1 145 BA0 DQ18 63 M_B_DQ37 159 VDD NP1 35 VSS VSS 189
M_B_A15 [5] M_B_BG0 115 BA1 DQ19 46 M_B_DQ33 160 VDD NP1 NP2 36 VSS VSS 192
M_B_A16 DQ20 45 NP2
M_B_BG1 113 BG0 M_B_DQ38 163 VDD 39 VSS VSS 193
BG1 DQ21 58 M_B_DQ34 VDD 40 VSS VSS 196
M_B_BA0 [5[]5] DQ22 59 43 VSS VSS 197
92 M_B_DQ32
M_B_BA1 [5] 91 CB0/NC DQ23 70 44 VSS VSS 201
M_B_DQ42 DDR4-260P-82-GP-U
M_B_BG0 [5] 101 CB1/NC DQ24 71 M_B_DQ44 M_B_DQ[40:47] 47 VSS VSS 202
M_B_BG1 [5] 105 CB2/NC DQ25 83 M_B_DQ47 062.10011.M004 48 VSS VSS 205
DQ26 84 M_B_DQ43 51 VSS VSS 206
M_B_CLK0 [5] 88 CB3/NC
DQ27 66 M_B_DQ41 52 VSS VSS 209
[5] 87 CB4/NC
M_B_CLK#0 DQ28 67 M_B_DQ40 56 VSS VSS 210
M_B_CLK1 [5] 100 CB5/NC DQ29 79
104 CB6/NC M_B_DQ45 57 VSS VSS 213
M_B_CLK#1 [5] CB7/NC DQ30 80 M_B_DQ46 60 VSS VSS 214
DM2B 2OF 4
M_B_CLK0 137 DQ31 174 M_B_DQ17 61 VSS VSS 217
M_B_CKE0 [5]
M_B_CKE1 [5]
M_B_CLK#0 139 CK0_T DQ32 173 M_B_DQ23 M_B_DQ[16:23] DQS0_C
11 M_B_DQS_DN7 64 VSS VSS 218
M_B_CLK1 138 CK0_C DQ33 187 M_B_DQ19 13 M_B_DQS_DP7 65 VSS VSS 222
M_B_CLK#1 140 CK1_T/NF DQ34 186 M_B_DQ18 DQS0_T 68 VSS VSS 223
M_B_CS#0 [5] 32 M_B_DQS_DN6
CK1_C/NF DQ35 170 M_B_DQ16 DQS1_C 69 VSS VSS 226
M_B_CS#1 [5] 34 M_B_DQS_DP6
M_B_CKE0 109 DQ36 169 M_B_DQ21 DQS1_T 72 VSS VSS 227

p
53 M_B_DQS_DN4
M_B_CKE1 110 CKE0 DQ37 183 M_B_DQ20 DQS2_C 73 VSS VSS 230
M_B_DIMB_ODT0 [5] CKE1 55 M_B_DQS_DP4
DQ38 182 M_B_DQ22 DQS2_T 77 VSS VSS 231
M_B_DIMB_ODT1 [5] M_B_CS#0 149 DQ39 195 M_B_DQ5 M_B_DQ[0:7] 74 M_B_DQS_DN5 78 VSS VSS 234

to
M_B_CS#1 157 CS0# DQ40 194 M_B_DQ3 DQS3_C 76 M_B_DQS_DP5 81 VSS VSS 235
PCH_SMBDATA [12,18] 162 CS1# DQ41 207 M_B_DQ1 DQS3_T 82 VSS VSS 238
PCH_SMBCLK [12,18] 177 M_B_DQS_DN2
165 C0/CS2#/NC DQ42 208 M_B_DQ2 DQS4_C 179 M_B_DQS_DP2 85 VSS VSS 239
C1/CS3#/NC DQ43 191 M_B_DQ7 DQS4_T 86 VSS VSS 243
DDR4_DRAMRST# [5,12,13] M_B_DIMB_ODT0 155 DQ44 190 M_B_DQ6 198 M_B_DQS_DN0 89 VSS VSS 244
[5] DQS5_C 200 M_B_DQS_DP0

ap
M_B_ACT_N M_B_DIMB_ODT1 161 ODT0 DQ45 203 M_B_DQ0 90 VSS VSS 247
M_B_ALERT_N [5] ODT1 DQS5_T 219 M_B_DQS_DN3
DQ46 204 M_B_DQ4 93 VSS VSS 248
SA0_CHB_DIM0 256 DQ47 216 M_B_DQ25 DQS6_C 94 VSS VSS 251
221 M_B_DQS_DP3
M_B_PARITY [5] SA1_CHB_DIM0 260 SA0 DQ48 215 M_B_DQ30 M_B_DQ[24:31] DQS6_T
240 M_B_DQS_DN1
98 VSS
VSS
VSS 252
VSS
SA2_CHB_DIM0 166 SA1 DQ49 228 M_B_DQ26 DQS7_C 1D2V_S3
V_SM_VREF_CNTB [5] SA2 DQ50 229 M_B_DQ31 242 M_B_DQS_DP1
DQS7_T

sl
PCH_SMBDATA 254 DQ51 211 M_B_DQ29 95 DDR4-260P-82-GP-U
DQS8_C
PCH_SMBCLK 253 SDA DQ52 212 M_B_DQ24 97
DQS8_T
SCL DQ53 224 M_B_DQ28 062.10011.M004
DQ54 225 M_B_DQ27 12
DQ55 237 M_B_DQ11 DM0#/DBI0#
C DDR4_DRAMRST# 108 33 C
M_B_DQ0 [5] DM1#/DBI#
M_B_DQ1 [5]
1D2V_S3 M_B_ACT_N 114 RESET# DQ56 236 M_B_DQ14 M_B_DQ[8:15] DM2#/DBI2#
54

ic
M_B_ALERT_N 116 ACT# DQ57 249 M_B_DQ9 75
M_B_DQ2 [5] DM3#/DBI3#
1 R1312 2 TS#_DIMM1_1 134 ALERT# DQ58 250 M_B_DQ8 178
M_B_DQ3 [5] EVENT#/NF DQ59 232 M_B_DQ13 DM4#/DBI4#
M_B_DQ4 DY 240R2F-1-GP DM5#/DBI5# 199
[5] M_B_PARITY 143 DQ60 233 M_B_DQ15
M_B_DQ5 [5] PARITY DM6#/DBI6# 220
DQ61 245 M_B_DQ10 0D6V_S00D6V_S00D6V_S0 2D5V_S3
M_B_DQ6 DQ62 246 M_B_DQ12 DM7#/DBI7# 241
[5] M_VREF_CA_DIMMB 164 DDR4-260P-82-GP-U

t
M_B_DQ7 VREFCA DQ63 DM8#/DBI#/NC 96
M_B_DQ8 [5]
M_B_DQ9 [5] 062.10011.M004
DDR4-260P-82-GP-U

ma
M_B_DQ15 [5]
M_B_DQ14 [5] C1301 1D2V_S3 C1311 C1313
0614 Layout HT 062.10011.M004

1
C1324 C1325

SC4D7U6D3V3KX-DLGP
M_B_DQ12 [5]

1
C1326C1327

21

21

21
SCD1U25V2KX-1-DL-GP
M_B_DQ13 [5]
DY

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP
M_B_DQ10

2
[5] 3D3V_S0

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP
M_B_DQ11

2
[5]

SC1U10V2KX-1DLGP
he
M_B_DQ22 DDR4_DRAMRST#
M_B_DQ17 [5] C1303C1304C1305 C1306 C1307C1308 C1309 C1310
R1302 1 DY 10KR2J-3-GP SA0_CHB_DIM0

21

21

21

21
M_B_DQ21 [5] 2
M_B_DQ19 [5] DY DY DY

SC10U6D3V3MX-DL-GP
21

21

21

21
R1303 2 1 0R2J-2-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP
M_B_DQ18 [5] ED1302
2

M_B_DQ16 [5] DY AZ5725-01FDR7G-GP

c
M_B_DQ20 [5]
M_B_DQ23
83.05725.0A0
[5]
M_B_DQ30 [5]

/s
3D3V_S0
1

M_B_DQ27
[5]
M_B_DQ29
M_B_DQ31 [5]
M_B_DQ25 [5] R1306 1 2 10KR2J-3-GP SA1_CHB_DIM0
M_B_DQ28 [5]
M_B_DQ24 2 DY 1 R1307
[5]

me
M_B_DQ26 [5]
M_B_DQ35 0R2J-2-GP
[5]
M_B_DQ38 [5]

1
C1315 C1316 C1317 C1318 C1319C1320 C1321 C1322
M_B_DQ36 [5]
M_B_DQ37 [5]
3D3V_S0 DY DY DY
EC1303

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP
M_B_DQ34 [5]

t.

2
1D2V_S3
M_B_DQ39 [5] 2 10KR2J-3-GP SA2_CHB_DIM0

21
R13101 DY D

SC2D2U6D3V2MX-DL-GP
M_B_DQ32 [5]
M_B_DQ33 [5] R13112 1 0R2J-2-GP
Y
M_B_DQ40 [5] RN1301 R1305
B 1 4 B
M_B_DQ41 [5] 2 3 M_VREF_CA_DIMMB 1 2 V_SM_VREF_CNTB
M_B_DQ42
//
[5]
M_B_DQ47 [5]
M_B_DQ44 SRN1KJ-7-GP 2R2F-GP
[5]
1

M_B_DQ45 C1323
[5]
M_B_DQ43 [5] SCD022U16V2KX-3DLGP
M_B_DQ46 [5]
s:

M_B_DQ52 [5] +V_VREF_PATH2

12

M_B_DQ51
[5] R1309
M_B_DQ55
[5] 24D9R2F-L-GP
M_B_DQ49
[5]
M_B_DQ54
[5]
M_B_DQ48
[5]
tp

M_B_DQ50
2

[5]
M_B_DQ53
[5]
M_B_DQ63
[5]
M_B_DQ62
M_B_DQ57 [5]
M_B_DQ56 [5]
ht

M_B_DQ58 [5]
M_B_DQ59 [5]
M_B_DQ61 [5]
M_B_DQ60 [5]
[5]
M_
[5B]_DQS_DN0
M_[5B]_DQS_DN1

M_B_DQS_DN0
[5]
M_B_DQS_DN1
M_B_DQS_DN2 [5]
M_[5B]_DQS_DN2 [5]
M_B_DQS_DN3
M_B_DQS_DN3 [5]
M_B_DQS_DN4
M_B_DQS_DN4 [5]
M_B_DQS_DN5
M_B_DQS_DN6 M_B_DQS_DN5
M_B_DQS_DN6 [5]
M_B_DQS_DN7 [5]
M_B_DQS_DN7
[5]

M_B_DQS_DP0
M_B_DQS_DP0 [5]
M_B_DQS_DP1
M_B_DQS_DP1 [5]
M_B_DQS_DP2
A M_B_DQS_DP2 [5] A
M_B_DQS_DP3
M_B_DQS_DP3 [5]
M_B_DQS_DP4
M_B_DQS_DP4 [5]
M_B_DQS_DP5 M_B_DQS_DP5
M_B_DQS_DP6 [5]
M_B_DQS_DP6
M_B_DQS_DP7 M_B_DQS_DP7 [5]
[5]
<CoreDesiiign>

WistronCorporation
21F,,, 88,,, Sec.1,,, HsiiinTaiiiW u Rd., Hsiiichiih,,,
Taipei Hsiiien221, Taiwan, R...O...C...

Eletro-XTechnical Tittle

DDR3-SODIMM1
Siize DocumentNumber Rev
A2
Hellcat 14/15_ ICL SA
Dattte::: Tuesday,,, Septttember17, 2019 Sheet 13 offf 106
5 4 3 2 1
 5 4 3 2 1

[76] GFX_PCIE_ RX_ N0 [76]

GFX_ PCI E_ RX_ P 0 [76]
GFX_PCIE_TX_ N0 [76]
GFX_ PCI E_ TX_ P 0
C PU1H 8OF 19
[76] GFX_PCIE_ RX_ N1 [76]

Eletro-XTechnical
W LAN_ PCI E_RX_ N C V7 DJ 8 USB1_ USB 30_ RX_ N
GFX_ PCI E_ RX_ P 1 [76]
W LAN_ PCI E_RX_ P CV6 PCI E7_RXN PCIE1_RXN/ USB 31_1_RXN DJ 6 USB1_ USB 30_RX_ P
WLAN
GFX_PCIE_TX_ N1 [76]
GFX_ PCI E_ TX_ P 1 W LAN_ PCI E_TX_ N DD3 PCI E7_RXP PCIE1_RXP/ USB 31_1_RXP DJ 2 USB1 _USB30_ TX_ N
USB3.0 PORT ON MB
W LAN_ PCI E_TX_ P DD5 PCI E7_TXN PCIE1_TXN/ USB 31_1_TXN DJ 1 USB1_ USB30_ TX_ P
PCIE7_TXP PCIE1_TXP/ USB 31_ 1_TXP
LAN_ PCI E_RX_ N CT6 DG9 USB2_ USB 30_ RX_ N
LAN_ PCI E_RX_ P CT7 PCI E8_RXN PCIE2_RXN/ USB 31_2_RXN DG7 USB2_ USB30_ RX_ P
LAN
SCD1U16 V2KX-3DLGP
LAN_ PCI E_TX_ N C1613 1LAN2 LAN_ PCI E_TX_ C_N DA3 PCI E8_RXP PCIE2_RXP/ USB 31_2_RXP DJ 3 USB 2_USB30_TX_ N USB3.0 PORT1 ON IODB
[61] W IFI_RF_EN
LAN_ PCI E_TX_ P C1614 1LAN2 LAN_ PCI E_TX_ C_P DA5 PCI E8_TXN PCIE2_TXN/ USB 31_2_TXN DJ 5 USB 2_USB30_TX_ P
SCD1U16 V2KX-3DLGP PCIE8_TXP PCIE2_TXP/ USB 31_ 2_TXP
SSD_ PCI E_RX_ N9 C P7 D E7
PCIE3_RXN/ USB 31_3_RXN DE9
SSD_ PCI E_RX_ P9 CP6 PCI E9_RXN
PCIE3_RXP/ USB 31_3_RXP DF 3
D
SSD_ PCI E_TX_ N9 DA2 PCI E9_RXP D
SSD_ PCI E_TX_ P9 DA1 PCI E9_TXN PCIE3_TXN/ USB 31_3_TXN DF5
[61] W LAN_ PCI E_ RX_ N PCIE9_TXP PCIE3_TXP/ USB 31_ 3_TXP
[61] W LAN_ PCI E_ RX_ P SSD_ PCI E_RX_ N10 C M7 DC7 USB 4_USB30_RX_ N
[61] W LAN_ PCI E_ TX_ N SSD_ PCI E_RX_ P10 CM6 PCI E10_RXN PCIE4_RXN/ USB 31_4_RXN DC9 USB 4_USB30_RX_ P
[61] WLAN_PCIE_TX_ P CY3 PCI E10_RXP PCIE4_RXP/ USB 31_4_RXP DF2
SSD_ PCI E_TX_ N10 USB 4_USB30_TX_ N TYPE-C MUX
CY4 PCI E10_TXN PCIE4_TXN/ USB 31_4_TXN DF1
SSD2
SSD_ PCI E_TX_ P10 USB 4_USB30_TX_ P
PCIE10_TXP PCIE4_TXP/ USB 31_ 4_TXP
SSD_ PCI E_RX_ N11 C K7 D A6 GFX_PCI E_RX_ N0
SSD_ PCI E_RX_ P11 CK 6 PCIE11_RXN/SATA 0_RXN PCIE5_RXN/ USB 31_5_RXN DA7 GFX_PCI E_RX_ P0
SSD_ PCI E_TX_ N11 CW 2 PCIE11_RXP/SATA 0_RXP PCIE5_RXP/ USB 31_5_RXP DE4 GFX_PCIE_ TX_ C_ N0 C1605 2 1 GFX_PCIE_ TX_ N0
SSD_ PCI E_TX_ P11 CW 1 PCIE11_TXN/SATA0 _TXN PCIE5_TXN/ USB 31_5_TXN DE3 GFX_ PCI E_TX_ C_ P0 C1606 2OPS 1 GFX_ PCI E_TX_ P0
PCIE11_TXP/SATA0 _TXP PCIE5_TXP/ USB 31_ 5_TXP OPS SCD22 U10 V2KX-2-GP
SSD_ PCI E_RX_ N12 C J6 C Y7 GFX_PCIE_ RX_ N1 SCD22U10 V2KX-2-GP
SSD_ PCI E_RX_ P12 CJ 7 PCIE12_RXN/SATA 1A_ RXN PCIE6_RXN/ USB 31_6_RXN CY6
GPU
GFX_PCI E_RX_ P1
[63] SSD_PCIE_ RX_ N1 [63]
SSD_ PCI E_TX_ N12 CW 5 PCIE12_RXP/SATA 1A_ RXP PCIE6_RXP/ USB 31_6_RXP DD1 GFX_PCIE_ TX_ C_ N1 C1607 2 1 GFX_PCIE_ TX_ N1
SSD_ PCI E_TX_ P12 CW 3 PCIE12_TXN/SATA 1A_ TXN PCIE6_TXN/ USB 31_6_TXN DD2 GFX_ PCI E_TX_ C_ P1 C1608 2 OPS1GFX_ PCI E_TX_ P1
SSD _ PCI E_ RX_ P 1 [63]
SSD_PCIE_TX_ N1 [63]
PCIE12_TXP/SATA1 A_TXP PCIE6_TXP/ USB 31_ 6_TXP OPS
SSD_ PCI E_ TX_ P 1 SSD_ PCI E_RX_ N1 C G7 D N8 USB1_USB20_N SCD22U10 V2KX-2-GP
SSD_ PCI E_RX_ P1 CG6 PCI E13_RXN USB2N_1 DP 8 USB1_USB 20_P USSBC3D.220U1P0VO2RKXT-2-GOPN MB (USB Charger)
SSD_ PCI E_TX_ N1 CT3 PCI E13_RXP USB2P_ 1
[63] SSD_PCIE_ RX_ N2 [63]
SSD _ PCI E_ RX_ P 2 [63]
SSD_ PCI E_TX_ P1 CT5 PCI E13_TXN DK11 USB2_ USB 20_N
USB2N_2 DJ 11 USB2_ USB 20_P
SSD_PCIE_TX_ N2 [63]
PCIE13_TXP USB3.0 PORT1 ON IODB
SSD_ PCI E_ TX_ P 2 SSD_ PCI E_RX_ N2 C E6 USB2P_ 2

[63] SSD_PCIE_ RX_ N3 [63]

SSD_ PCI E_RX_ P2 CE7 PCI E14_RXN D P13
SSD _ PCI E_ RX_ P 3 [63]
SSD_ PCI E_TX_ N2 CT2 PCI E14_RXP USB2N_3 DN13 USB2.0 PORT1 ON IODB
SSD_PCIE_TX_ N3 [63]
SSD_ PCI E_TX_ P2 CT1 PCI E14_TXN USB2P_ 3
SSD_ PCI E_ TX_ P 3 PCIE14_TXP DK10 USB4_ USB 20_N
[63] SSD _ PCI E_ RX_ N SSD1 SSD_ PCI E_RX_ N3
SSD_ PCI E_RX_ P3
CC5
CC6 PCIE15_RXN/SATA1 B_RXN
USB2N_4 DJ 10 USB4_ USB 20_P
USB2P_ 4
TYPE-C USB/ I2C MUX
[63] SSD_ PCI E_ RX_ P
[63] SSD_ PCI E_ TX_ N SSD_ PCI E_TX_ N3 CR3 PCIE15_RXP/SATA 1B_ RXP DL5 FP1_USB 20_N
SSD_ PCI E_TX_ P3 CR4 PCIE15_TXN/SATA 1B_ TXN USB2N_5 DL3 FP1_USB 20_ P
Finger Print
[63] SSD_ PCI E_ TX_ P PCIE15_TXP/SATA1 B_TXP USB2P_ 5

p
SSD_ PCI E_RX_ N C A6 DP11 CCD_USB 20_ N

[63] SSD_ DEVSLP

SSD_ PCI E_RX_ P CA 5 PCIE16_RXN/SATA 2_RXN USB2N_6 DN11 CCD_USB 20_P CAMERA
SSD_ PCI E_TX_ N CP1 PCIE16_RXP/SATA2 _RXP USB2P_ 6
CP2 PCIE16_TXN/SATA2 _TXN

to
[63] M2_SSD_ PED ET SSD_ PCI E_TX_ P DK13 CARD1_ USB 20_N
PCIE16_TXP/SATA2 _TXP USB2N_7 DJ 13 CARD1_ USB20_ P Card Reader From IODB
BLUETOOTH_E N D W 12 USB2P_ 7
M2_SSD _PED ET CR42 GPP_ E0/ SATAXPCI E0/ SATAGP 0 D N6
M2_SSD2_ PEDET CR43 GPP_ A12/ SATAXPCI E1/ SATAGP 1 USB2N_8 DP 6
GPP_ A13/ SATAXPCI E2/ SATAGP 2 USB2P_ 8
USB_ OC 0# DW 14 D L2
[35] USB1_USB 30 _ RX_ N USB_ OC 3# USB2 N_ 9 DL1
[35] USB1_USB 30 _ RX_ P CT43 GPP_ E9/ USB_ OC 0#

ap
[35] USB1_USB 30 _ TX_ N GPP_ A16/ USB_OC 3# USB2P_ 9
[35] USB1_ USB 30 _ TX_ P DU12 DP10 BT_USB20 _N
SSD_ DEVSLP DU11 GPP_ E 4 / DEVSLP 0 USB2 N_ 10 DN10 BT_USB 20 _P
WLAN (BT)
SSD 2_D EVSLP CV48 GPP_E5/ DEVSLP 1 USB2P_ 10
[66] USB2_USB 30 _ RX_ N GPP_ A11/ DEVSLP 2
[66] USB2_USB 30 _ RX_ P D L6 USB_ID R1604 1 2 10KR2J-3-GP
C [66] USB2_USB 30 _ TX_ N D T38 USB_ID C
[66] USB2_ USB 30 _ TX_ P DW 38 GPP_ H12 / M2_SKT2_CFG0 DV DL 11 USB_VBUSSENSE R1602 1 2 10KR1J-GP
USB_VBU SSEN SE
W IFI_RF_EN 38 GPP_ H13 / M2_SKT2_CFG1

sl
3D 3V_S5_PCH TABLE_ MODE# R1632 1 DY 2 0R2J-2-GP DUAL_BOOT_ EVENT# DU38 GPP_ H14 / M2_SKT2 _CFG2 DN5 USB2_COMP R1603 1 2 113R2F-GP
GPP_ H15 / M2_SKT2 _CFG3 USB 2_COMP
1 R1601 2 PCIE_RCOMPN D N1 CD3
PCIE_RCOMPP DN3 PCI E_RCOMPN RSVD _BSC A N
100R2 F-L1-GP-U PCI E_RCOMPP
[36] USB1_ USB 20 _ N
USB_OC 0# R1606 1 2 10KR2J-3-GP
[36] USB1_ USB20 _P
ICE-LAKE-U-GP-U

ic
[66] USB2_ USB 20 _ N
[66] USB2_ USB20 _P USB_OC 3# R1633 1 2 10KR2J-3-GP

[66] FP1_USB 20 _ N
[66] FP1_USB 20_ P

[72] USB4_ USB 20 _ N

[72] USB4_ USB20 _P

t
[55] CCD_USB 20_ N [55]
CCD_USB 20 _ P

ma
[66] CARD1_ USB 20 _ N
[66] CARD1_ USB 20 _ P

[61] BT_USB20 _N
[61] BT_USB 20_ P

he
[73] USB4_USB 30 _ RX_ P
[73] USB4_USB 30 _ RX_ N

[73] USB4_ USB 30 _ TX_ P

c
[73] USB4_USB 30 _ TX_ N

/s
[66] LAN_PCIE_ RX_ N
[66] LAN_PCIE_ RX_ P
[66] LAN_PCIE_ TX_ N [66]
LAN_PCIE_ TX_ P
B B

me
[16,63] TABLE_ MODE#

[63] SSD_ PCI E_ TX_ P 9

[63] SSD_PCIE_TX_ N9
t.
//
[63] SSD_PCIE_ RX_ N9 [63]
SSD_ PCI E_ RX_ P 9

[63] SSD_PCIE_TX_ P10

[63] SSD_PCIE_TX_ N 10 [63]
SSD_ PCI E_ RX_ P 10 [63]
SSD_PCIE_RX_ N10
s:

[63] SSD_PCIE_TX_ P11 [63]

SSD_PCIE_TX_ N 11 [63]
SSD_ PCI E_ RX_ P 11 [63]
SSD_PCIE_RX_ N11

[63] SSD_PCIE_TX_ P12 [63]

SSD_PCIE_TX_ N12
[63] SSD_ PCI E_ RX_ P 12
tp

[63] SSD_PCIE_RX_ N12

[63] SSD 2_DEVSLP

[16,63] M2_SSD2_PEDET

[35] USB_OC 0#
ht

[61] BLUETOOTH_ EN

A A

<CorrreDesiiign>

WistronCorporation
21F,,, 88,,,Sec...1,,,Hsiiin Taiii W u Rd...,,,Hsiiichiiih,,,
Taiiipeiii Hsiiien 221,,, Taiiiwan,,,R...O...C...

Tiittle
CPU (PCIE/SATA/USB)
Siiize Do umenttt Numberrr Rev
Custttom
Hellcat 14/15_ ICL SA
Datte::: Tuesday,,, Septttemberrr 17,,,2019 Sheettt 16 offf 106
5 4 3 2 1

Eletro-XTechnical
 5 4 3 2 1

Main Func = PCH 3D3V_S0

CPU1K 11OF 19
[40,54,55,81] PM_SLP_S3#
SIO_SLP_SUS# DM49 CY42 SIO_PW RBTN# 1 R1722 2 CPU_C10_GATE#
[40,51,66] PM_SLP_S4# GPD3/PW RBTN# DE46 AC_PRESENT
1SIO_SLP_S5# DF45 SLP_SUS# 100KR2J-1-GP 3D3V_S5_PCH

Eletro-XTechnical
TP1702 PM_SLP_S4# DC48 GPD10/SLP_S5# GPD1/ACPRESENT DH48 PCH_BATLOW#
[40] SIO_SLP_S0# GPD5/SLP_S4# GPD0/BATLOW #
PM_SLP_S3# DF47
1SIO_SLP_A# DH47 GPD4/SLP_S3# CL39 90 8 20 - SA _ Ja m es C L3 9 R em o ve ne t T B T_ I 2 C_ I NT # 3D3V_S5_PCH
[17,24] SYS_PW ROK TP1703 SIO_SLP_S0#CL45 GPD6/SLP_A# GPP_B11/PMCALERT DU40 CPU_C10_GATE#
GPP_B12/SLP_S0# GPP_H18/CPU_C10_GATE# DG40 TPM_PRSNT# 3D3V_S5
[24] SIO_PW RBTN# 1 R1723 2 AC_PRESENT R1733
TP1720
1 SIO_SLP_WLAN# DE49 GPP_H3/SX_EXIT_HOLDOFF_N/CNV_BT_I2S_SDO
100KR2J-1-GP non dTPM 100KR2J-1-GP
1SIO_SLP_LAN# DN48 GPD9/SPL_WLAN# DL45 PCH_PCIE_WAKE#
[24,26] IMVP_VR_ON TP1707 SLP_LAN# W AKE#
2 R1724 1 LAN_WAKE#
PM_RSMRST# 1 R174 24RSMRST# DG49 DE47 LAN_WAKE# R1770 TPM_PRSNT#
[18,64] PM_RSMRST# RSMRST# GPD_2/LAN_WAKE# DF48 PM_LANPHY_ENABLE 10KR2J-3-GP
0R2J-2-G P SYS_RESET# DK19 2 1
PCH_PLTRST# CM49 SYS_RESET# GPD11/LANPHYPC/DSWLDO_MON 10KR2J-3-GP 2 R1726 1 SYS_RESET#
[44] AC_IN#

21
3V_5V_PWRGD 0R2J-2-GP 1 R1748 2 GPP_B13/PLTRST# CE4 10KR2J-3-GP
D VCCST_OVERRIDE D
[40] CPU_C10_GATE# CF2 VCCST_PW RGD_R 3D3V_S5_PCH
PCH_DPWROK_R
DY DR48 VCCST_PW RGD CE3 VCCSTPWRGOOD_TCSS dTPM
R1738
VCCSTPW RGOOD_TCSS VCCSTPWRGOOD_TCSS [40] R1727 100KR2J-1-GP
[53] SIO_SLP_SUS# IMVP_VR_ON 1 R1743 2 PCH_PWROK DN47 DSW _PWROK CF1 VCORE_PWRGD 1 1 2 PCH_PCIE_WAKE# 1KR2F-3-
DP19 PCH_PW ROK PROCPW RGD TP1719
0R2J-2-GP SYS_PW ROK GP
SYS_PWROK

1
2
DC47 GPD7 R1728
SYS_PWROK GPD7
INPUT3VSEL DN49 1 2 SIO_PW RBTN#
RTC_INTRUDER# DR47 INPUT3VSEL
R1717 SPI_VCCIO_SEL 100KR2J-1-GP

100KR2J-1-GP
RTC_AUX_S5
ICE-LAKE-U-GP-U
[15] GPD7 R1718
2
330KR2J-L1-GP
1 2 RTC_INTRUDER#
[15] PCH_DPW ROK RSMRST#
PCH_PWROK SPI Voltage
PCH_DPWROK_R Configu-ration
SYS_RESET#
PCH_PLTRST#
R1713R1716

p
2

1
1

1
10KR2J-3-GP

10KR2J-3-GP

EC1701 EC1702 EC1703 EC1704

3V SELECT STRAP

SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP

to
SC1KP50V2KX-1DLGP
2
2

2
DY DY DY DY LOW → 3.3V +/-5%
1

3D3V_S5_PCH
[17,24] SYS_PWROK HIGH → 3.0V +/-5%

ap
3D3V_S5_PCH

1
R1729
DY 4K7R2J-2-GP
20190424(EVT)
Reverse R1705, R1739 by Dell Andy

1
INPUT3VSEL R1725

sl
10KR2J-3-GP R1705

12
PW R_IMVP_PWRGD 1 DY 2 IMVP_VR_ON
R1730

2
100KR2J-1-GP PCH_BATLOW # 0R2J-2-GP
C C

2
D1701

ic
R1739
AK AC_IN#

1
[61,63,66,76,91] PLT_RST# R1732 VCCST_PW RGD 1 DY 2 PW R_IMVP_PWRGD
10KR2J-3-GP 3D3V_AUX_S5 RB520S30-GP
0R2J-2-GP
Q1702 83.R2003.A8M

2
3D3V_AUX_S5 AC_PRESENT

t
R1747 4 3 2nd =083.52030.008F
100KR2J-1-GP
DY
1 2 5 2 PM_RSMRST#
90 8 21 - S A_ J am e s R e m o ve R 17 0 3

Note:ZZ.27002.F7 C0
ma
[24,40,44,46] VCCST_PWRGD R1737
R1746 1 2 PM_RSMRST#_M 6 1
2

10KR2J-3-GP

1
100KR2J-1-GP common part
Q1701
1KR2J-1-GP 2N7002KDW-1-GP
1

R1702

he
[44,46] PW R_IMVP_PWRGD PM_RSMRST# 1 2 75.27002.F7C
4 3
D2 S2
PCH_RSMRST#_R [24]
3V_5V_POK# 5 2 3V_5V_POK_C 1 R1749 2 3V_5V_PWRGD
G1 G2

6 1 0R2J-2-GP

c 1
S1 D1
EC1712
C1710 SCD1U16V2KX-3DLGP
R1764

2 1
DY SCD47U10V2KX-1-GP
100KR2J-1-GP

/s
2
PJT138KA-GP
DY
2
1

90 8 21 - S A_ J am e s R e m o ve R 17 0 3

[25,53] 3V_5V_PWRGD 075.00138.0A7C

me
B
SYS_PWROK 1 R1750 2
0R2J-2-GP
90821-SA_James R1750 DY

PCH_PWROK
3D3V_S5_PCH t. PCH_DPWROK_R 1 R1765 2
0R2J-2-GP
PCH_DPWROK

C1711
B

SCD1U16V2KX-3DLGP
R1766
//
2 R1763 1SIO_SLP_S0# 100KR2J-1-GP

21
100KR2J-1-GP
DY

2
1
SIO_SLP_SUS# R1752 1 DY 2100KR2J-1-GP
R1714
s:

PCH_PLTRST# 1 2 PLT_RST#
PM_SLP_S4# R1753 1 DY 2100KR2J-1-GP
0R2J-2-GP

PM_SLP_S3# R17541 2100KR2J-1-GP

2

R1715
tp

100KR2J-1-GP
1

1D05V_VCCST3D3V_S0
90821-SA_James Remove net SIO_SLP_WLAN#
90821-SA_James Remove R1765
ht

R1768 R1769
1KR2F-3-GP DY 100KR2J-1-GP

2
1

2
1
R1767
VCCST_PWRGD 1 2 VCCST_PWRGD_R

60D4R2F-GP

R1719 C9214
47KR2F-GP SCD022U16V2KX-3DLGP

21
2
1
A A

<CorrreDesiiign>

WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle
CPU (PMU)
SiiizeDocumenttt NumberrrA2 Rev
SA
Hellcat 14/15_ ICL
Dattte:::Tuesday,,, Septttemberrr17,,,2019 Sheettt 17 off 106
5 4 3 2 1
 5 4 3 2 1

Main Func = PCH CPU1E 5 OF 19

SPI_CLK_CPU_R R18201 2 49D9R2F-GP SPI_CLK_CPU DB42

SPI_SI_CPU_R 2 49D9R2F-GP SPI_SI_CPU DD43 SPI0_CLK DK27 CPU_SMB_SCL
R18211
DF43 SPI0_MOSI GPP_C0/SMBCLK DP24 CPU_SMB_SDA

SMBUS
SPI_SO_CPU_R R1822 1 2 49D9R2F-GP SPI_SO_CPU
SPI_W P_CPU_R R1825 1 2 49D9R2F-GP SPI_W P_CPU DF42 SPI0_MISO GPP_C1/SMBDATA DL24 GPP_C2 3D3V_S5_PCH

SPI0
SPI_HOLD_CPU_R SPI_HOLD_CPU DD41 SPI0_IO2 Strap Pin GPP_C2/SMBALERT#
R18261 2 49D9R2F-GP

Eletro-XTechnical
[24,25,91] SPI_CLK_ROM SPI_CS_CPU_N0 DB43 SPI0_IO3
[24,25,91] SPI_SI_ROM SPI_CS_CPU_N1 DF41 SPI0_CS0# DK24 SML0_SMBCLK CPU_SMB_SCL 2 1KR2J-1-GP
R18041
[24,25,91] SPI_SO_ROM
SPI ROM
SPI_CS_CPU_N2 DB41 SPI0_CS1# GPP_C3/SML0CLK DJ24 SML0_SMBDATA CPU_SMB_SDA R18051 2 1KR2J-1-GP SPI_CLK_CPUR18131 2 100KR2J-1-GP

SML 0
[24,25] SPI_WP_ROM SPI0_CS2# GPP_C4/SML0DATA DP22 GPP_C5
[24,25] SPI_HOLD_ROM Strap Pin GPP_C5/SML0ALERT#
[24,25] SPI_CS_ROM_N0 DV16 SML0_SMBCLK R18061 2 499R2F-2-GP
[24,25] SPI_CS_ROM_N1 DT16 GPP_E11/SPI1_CLK/BK1/SBK1 DN22 CPU_SMB_SCL_P1 2 499R2F-2-GP
SML0_SMBDATA R18071

SML1
[15] DU18 GPP_E13/SPI1_MOSI/BK3/SBK3 GPP_C6/SML1CLK/SUSW ARN_N/SUSPW RDNACKDL22 CPU_SMB_SDA_P1

SPI1
SPI_HOLD_CPU DT18 GPP_E12/SPI1_MISO/BK2/SBK2 GPP_C7/SML1DATA/SUSACK#
TPM_SPI_IRQ# DW 18 GPP_E1/SPI1_IO2 CPU_SMB_SCL_P1 R1810 1 2 1KR2J-1-GP
DW 16 GPP_E2/SPI1_IO3 CR47 PCH_ESPI_CLK CPU_SMB_SDA_P1 R18111 2 1KR2J-1-GP
SATA_LED# DU16 GPP_E10/SPI1_CS_N/BK0/SBK0 GPP_A5/ESPI_CLK CN45 PCH_ESPI_IO0
D D
GPP_E8/SATALED#/SPI1_CS1# GPP_A0/ESPI_IO0 CN48 PCH_ESPI_IO1
GPP_A1/ESPI_IO1 CN49 PCH_ESPI_IO2
TPM

eSPI
1 CL_CLK DV19 GPP_A2/ESPI_IO2 CN47 PCH_ESPI_IO3
TP1809

MLINK
TPAD14-OP-GP 1 CL_DATA DW 19 CL_CLK GPP_A3/ESPI_IO3 CT45 ESPI_CS#
[91] SPI_CS_CPU_N2 TPAD14-OP-GP TP1810 1 CL_RST# DT19 CL_DATA GPP_A4/ESPI_CS# CR46 ESPI_RESET#
TPAD14-OP-GP TP1811 CL_RST# GPP_A6/ESPI_RESET#
[91] TPM_SPI_IRQ#

XTL_32K_X1_CPU

XTL_32K_X2_CPU
3D3V_S0 ICE-LAKE-U-GP-U

R1808

WLAN
[61] WLAN_CLK_CPU_P
1 2 SATA_LED# 3D3V_S0
[61] WLAN_CLK_CPU_N PCH_ESPI_CLK 1 R1834 2 ESPI_CLK
[61] WLAN_CLKREQ_CPU_N RN1802 ESPI_CLK RC1801 1 2 SC27P50V2JN-2-GP
10KR2J-3-GP 1 4 33R2F-3-GP DY
2 3 PCH_ESPI_IO0 RF Reserve

2
1 R1835 2 ESPI_IO0
0R2J-2-GP R1847 R1849
0R2J-2-GP 0R2J-2-GP
If support TPM SRN1KJ-7-GP PCH_ESPI_IO1 1 R1836 2 ESPI_IO1
change to 5R Q1802
0R2J-2-GP

1
CPU_SMB_SDA 6 1 PCH_SMBDATA PCH_ESPI_IO2 1 R1837 2 ESPI_IO2

p
1
Note:ZZ.27002.F7 C0
[24,68] ESPI_IO0

XTL_32K_X1_CPU_R

XTL_32K_X2_CPU_R
0R2J-2-GP
[24,68] ESPI_IO1 5 2
ESPI_IO2 PCH_ESPI_IO3 1 R1838 2 ESPI_IO3

to
[24,68]
ESPI [24,68] ESPI_IO3 4 3 0R2J-2-GP 1 R1844 2
[24,68] ESPI_CS# 10MR2J-L-GP
[24,68]ESPI_RESET# 2N7002KDW-1-GP PCH_SMBCLK
[24,68] ESPI_CLK Intel requst set as PDG . X1803
1 2
CPU_SMB_SCL 75.27002.F7C

ap
XTAL-32D768KHZ-88-GP
[12,13] PCH_SMBCLK
[12,13] PCH_SMBDATA C1810
CPU1J 10OF 19
SC15P50V2JN-DL-GP C1809
SC12P50V2JN-DL-GP

12

21
[12,13] SML0_SMBCLK 082.30003.0191

sl
CF5 SSD2_CLK_CPU_N
OTHER
GFX_CLK_CPU_N CJ3
[12,13] SML0_SMBDATA
GPU GFX_CLK_CPU_P
CLK_PCIE_PEG_REQ#
CJ5 CLKOUT_PCIE_N0
DK33 CLKOUT_PCIE_P0
CLKOUT_PCIE_N5 CF3 SSD2_CLK_CPU_P
CLKOUT_PCIE_P5 DP40 SSD2_CLKREQ_CPU_N SSD2
GPP_D5/SRCCLKREQ0# GPP_H11/SRCCLKREQ5#
C
[15] GPP_C2
[15] GPP_C5
3D3V_S0
WLAN W LAN_CLK_CPU_N
W LAN_CLK_CPU_P
CL2
CL1 CLKOUT_PCIE_N1 DL48 XTL_32K_X1_CPU
C
RN1805 C1810(Cg) C1809(Cd)

ic
[24,61] SUS_CLK WLAN_CLKREQ_CPU_N DN34 CLKOUT_PCIE_P1 RTCX1 DL49 XTL_32K_X2_CPU
1 8 LAN_CLKREQ_CPU_N
2 7 CLK_PCIE_PEG_REQ# GPP_D6/SRCCLKREQ1# RTCX2 EPSON
6 WLAN_CLKREQ_CPU_N LAN_CLK_CPU_N CL3 DT47 RTC_RST# 082.30003.0191 15pF 12pF
3
[66]
[66]
LAN_CLK_CPU_N
LAN_CLK_CPU_P 4
5 SSD2_CLKREQ_CPU_N
LAN LAN_CLK_CPU_P
LAN_CLKREQ_CPU_N
CL5 CLKOUT_PCIE_N2
DP34 CLKOUT_PCIE_P2
RTCRST# DK46 SRTC_RST#
SRTCRST# R1812 SEIKO
[66] LAN_CLKREQ_CPU_N GPP_D7/SRCCLKREQ2# DF49 SUS_CLK SUS_CLK 1 DY 2 082.30003.0301 12pF 15pF

t
SRN10KJ-6-GP CK3 GPD8/SUSCLK
CK4 CLKOUT_PCIE_N3 100KR2J-1-GP NDK
R1801 1 2 SSD_CLKREQ_CPU_N DP36 CLKOUT_PCIE_P3 DW 8 XTL_38D4M_X1_CPU 082.30003.0221 15pF 12pF

ma
GPP_D8/SRCCLKREQ3# XTAL_IN DU8 XTL_38D4M_X2_CPU
10KR2J-3-GP
SSD1 SSD_CLK_CPU_N
SSD_CLK_CPU_P
CJ2
CJ1 CLKOUT_PCIE_N4
XTAL_OUT

SSD_CLKREQ_CPU_N DN40 CLKOUT_PCIE_P4 DU6 XCLK_BIASREF R1823 1 2 60D4R2F-GP

[64] SATA_LED# GPP_H10/SRCCLKREQ4# XCLK_BIASREF

he
[24,25] RTCRST_ON RTC_AUX_S5
ICE-LAKE-U-GP-U

1
2
C1805
[15] SPI_SI_CPU R1850

c
SC15P50V2JN-DL-GP RN1801
[15]SPI_WP_CPU XTL_38D4M_X1_CPU 1 2 XTL_38D4M_X1_CPU_R 1 2
SRN20KJ-1-GP
0R2J-2-GP

/s

4
3
X1802 Q1803

3
XTAL-38D4MHZ-18-GP RTCRST_ON G RTC_RST
082.30040.0091 SRTC_RST#
GPU

1
me
R1824 RTC_RST D RTC_RST#
2nd =082.30040.0161

1
1
GFX_CLK_CPU_N 200KR2F-L-GP 3rd =082.30040.0171 EC1804 R1816
[76]

SC1U10V2KX-1DLGP
S
DY

10KR2J-3-GP
[76] GFX_CLK_CPU_P PCH_SPI_EN_Q G1801

SCD1U16V2KX-3DLGP

C1808
1
[76] CLK_PCIE_PEG_REQ#

2
2N7002K-2-GP C1807

2
84.2N702.J31 SC1U10V2KX-1DLGP

GAP-OPEN
t.

2
2nd =84.2N702.031

21
1
2
R1851 C1806
XTL_38D4M_X2_CPU 1 2 XTL_38D4M_X2_CPU_R 1 2 3rd = 84.07002.I31
SSD
G

B 0R2J-2-GP SC15P50V2JN-DL-GP B
[63] SPI_CLK_ROM D S SPI_CLK_CPU_R (#514849)
//
SSD_CLK_CPU_N
[63]
SSD_CLK_CPU_P
[63] SSD_CLKREQ_CPU_N Q1804 Layout: Place at the open door area.
PJE8408-R1-00001-GP

[63] SSD2_CLK_CPU_P
[63] SSD2_CLK_CPU_N 084.08408.0031
s:

[63]SSD2_CLKREQ_CPU_N
tp

[17,64] PM_RSMRST# PCH_SPI_EN_Q PCH_SPI_EN_Q PCH_SPI_EN_Q PM_RSMRST# R1802 1 DY 2 0R1J-GP

[24] EC_PCH_SPI_EN
R1814
EC_PCH_SPI_EN R18031 PCH_SPI_EN 1 2
2 0R1J-GP
ht
G

G
100KR2J-1-GP

SPI_SI_ROM D S SPI_SI_CPU_R SPI_W P_ROM D S SPI_WP_CPU_R SPI_CS_ROM_N0 D S SPI_CS_CPU_N0

Q1805 Q1807 Q1809

PJE8408-R1-00001-GP PJE8408-R1-00001-GP PJE8408-R1-00001-GP
5V_S5 3D3V_S5

084.08408.0031 084.08408.0031 084.08408.0031

R1817 R1815
100KR2J-1-GP 100KR2J-1-GP

Q1811

2
1

2
1
1 6 Q1811_D_G

1
Note:ZZ.27002.F7 C0
PCH_SPI_EN_Q PCH_SPI_EN_Q PCH_SPI_EN_Q
PCH_SPI_EN 2 5

PCH_SPI_EN_Q 3 4

2N7002KDW-1-GP
G

A 75.27002.F7C A

SPI_SO_ROM D S SPI_SO_CPU_R SPI_HOLD_ROM D S SPI_HOLD_CPU_R SPI_CS_ROM_N1 D S SPI_CS_CPU_N1

Q1806 Q1808 Q1810

PJE8408-R1-00001-GP PJE8408-R1-00001-GP PJE8408-R1-00001-GP
<CorrreDesiiign>

084.08408.0031 084.08408.0031 084.08408.0031

WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle
CPU (SPI/LPC/SMBS/XTAL/CLK)
SiiizeDocumenttt NumberrrA2 Rev
SA
Hellcat 14/15_ ICL
Dattte:::Tuesday,,, Septttemberrr17,,,2019 Sheettt 18 off 106
5 4 3 2 1
 5 4 3 2 1

Main Func = PCH

[27] HDA_SDOUT_CODEC
ME_FWP_SW 1 R1904 2
1KR2J-1-GP
HDA_SDO Eletro-XTechnical
[27] HDA_SYNC_CODEC
[27] HDA_BITCLK_CODEC
[15] HDA_SDO 33R2J-2-GP
[98] ME_FWP_SW 33R2J-2-GP
33R2J-2-GP
[27] HDA_SDIN0_CPU 0R2J-2-GP
D CPU1G 7 OF19 D
GPP_G6/SD_CLK CE46 2 R1942 1
[79] GPU_EVENT#
HDA_BITCLK_CODEC1 2 R1914 HDA_BCLKCY46 GPP_G1/SD_DATA0 CC48 GC6_FB_EN_MCP
HDA_SYNC_CODEC 1 2 R1913 HDA_SYNCCV49 GPP_R0/HDA_BCLK/I2S0_SCLK SD_READ_MODE# OPS 0R2J-2-GP GC6_FB_EN [79,86]
HDA_SDOUT_CODEC 1 2 R1915 HDA_SDO CY47 GPP_R1/HDA_SYNC/I2S0_SFRM GPP_G2/SD_DATA1 CC49
HDA_SDIN0_CPU 1 2 R1901 HDA_SDI0 CV45 GPP_R2/HDA_SDO/I2S0_TXD GPP_G3/SD_DATA2 CC47
1 HDA_RST# DA47 GPP_R3/HDA_SDI0/I2S0_RXD GPP_G4/SD_DATA3 CF45 GPU_EVENT_MCP# 2 R1902 1 GPU_EVENT#
TP1901 GPP_R4/HDA_RST# GPP_G0/SD_CMD CC45 OPS 0R2J-2-GP
[24,98] ME_FWP TPAD14-OP-GP
DP33
SD3.0 GPP_G7/SD_WP CF49
GPP_D19/I2S_MCLK GPP_G5/SD_CD# CE47
[70] FFS_INT2 DGPU_PW ROK DC45 GPP_A23/I2S1_SCLK
RTC_DET# GPP_H0/CNV_BT_I2S_SDO DK38
BOARD_ID2
DA49 GPP_R5/HDA_SDI1/I2S1_SFRM GPP_H1/SD_PWR_EN_N/CNV_BT_I2S_SDO DG38
DA45 GPP_R6/I2S1_TXD
[25] RTC_DET# BOARD_ID1 SD3_RCOMP 1 R1917 2
DA48 GPP_R7/I2S1_RXD SD3_RCOMP CJ43 200R2F-L-GP
CT49 GPP_A7/I2S2_SCLK

p
[24,85] DGPU_PWROK CT48
CV47 GPP_A8/I2S2_SFRM/CNV_RF_RESET# DMIC_PCH_C LK DMIC_PCH_CLK_R
2
T
NI_
S
FF GPP_A10/I2S2_RXD GPP_S6/SNDW4_CLK/DMIC_CLK0 DG36 DMIC_PCH_DATAR 19271R1928
Hellcat 2 33R2J-2-GP
1 Hellcat 233R2DJM-2I-CG_PPCH_DATA_R

to
[24,85] DGPU_PW R_EN DGPU_PWR_EN
CT47 GPP_A9/I2S2_TXD/MODEM_CLKREQ GPP_S7/SNDW4_DATA/DMIC_DATA0 DG34
PROJECT_ID0 CY39 GPP_S0/SNDW1_CLK SNDW_RCOMP CV38 SNDW_RCOMP R19161 2 200R2F-L-GP
[27,55] DMIC_SDA_CODEC PROJECT_ID1 CY38 GPP_S1/SNDW1_DATA

ap
[27,55] DMIC_SCL_CODEC AUDIO
PROJECT_ID2 DB39
PROJECT_ID3 DD38 GPP_S2/SNDW2_CLK
3D3V_S0 GPP_S3/SNDW2_DATA
[55] DMIC_PCH_CLK_Q 1D8V_S5
VRAM_ID1 DF38

sl
[55] DMIC_PCH_DATA_Q DD39 GPP_S4/SNDW3_CLK/DMIC_CLK1
VRAM_ID2
GPP_S5/SNDW3_DATA/DMIC_DATA1
1

R1908
[66] SD_READ_MODE# ICE-LAKE-U-GP-U
C 10KR2J-3-GP C

ic
Q1904 Hellcat
2

DMIC_PCH_CLK_R 1 S1 D1 6 DMIC_PCH_CLK_Q
FFS_INT2 R1941 1D8V_S5
HDA_BITCLK_CODEC

t
DGPU_PWR_EN 1 OPS 2 2 G1 G2 5

2
RN1914

ma
10KR2J-3-GP R1929 1 4 DMIC_PCH_CLK_R 3 D2 4

1
EC1901 S2
DY 100KR2J-1-GP 2
Hellcat 3 DMIC_PCH_DATA_R

SC22P50V2JN-4DLGP
PJT138KA-GP DMIC_PCH_DATA_Q

he
1
DY SRN2K2J-1-GP 075.00138.0A7C
3D3V_S0 2nd =075.00138.0F7C
DMIC_PCH_DATA_R
RN1915

c
1 4 DMIC_PCH_CLK_Q
3D3V_S0 3D3V_S0 DMIC_PCH_DATA_Q
2 Hellca 3

/s
t
1

R1919 SRN2K2J-1-GP
2IN1 R1907
DY10KR2J-3-GP

me
10KR2J-3-GP
2

BOARD_ID2 BOARD_ID1 1D8V_S5 1D8V_S5

t. 3D3V_S5_PCH
1

1
R1909 R1938 R1940

1
B
ICL-U R1910 B
//
CLAM10KR2J-3-GP 10KR2J-3-GP UMA 10KR2J-3-GP UMA 10KR2J-3-GP R1926
10KR2J-3-GP
2

2
s:

2
VRAM_ID2 VRAM_ID1
RTC_DET#

1
tp

1D8V_S5 1D8V_S5 1D8V_S5 1D8V_S5 R1937 R1939

10KR2J-3-GP 10KR2J-3-GP
2GB VRAM 2GB VRAM
1

1
ht

2
R1925 R1923 R1920 R1918
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP DY 10KR2J-3-GP
MKB-N &Hellcat
2

PROJECT_ID3 PROJECT_ID2 PROJECT_ID1 PROJECT_ID0

1

R1924 R1922 R1921 R1912

DY 10KR2J-3-GP 10KR2J-3-GP DY 10KR2J-3-GP 10KR2J-3-GP
MKB-V
2

A <CoreDesiiign> A

Wistron Corporation
21F, 88, Sec.1, HsiiinTaiiiWu Rd., Hsiiichiiih,
TaiiipeiiiHsiiien221, Taiiiwan,R.O.C.

Eletro-XTechnical
Title
CPU (HAD/I2S/SD/DMIC)
Siiize DocumentNumber Rev
A3 SA
Hellcat 14/15_ ICL
Date: Tuesday, September17, 2019 Sheet 19 of 106
5 4 3 2 1
 5 4 3 2 1

Main Func = PCH

CPU1F 6 OF19

Eletro-XTechnical
3D3V_S0
[91] TPM_PIRQ#
CH48 DV33
[15] GPP_B23 NRB_BIT CF48 GPP_B16/GSPI0_CLK GPP_D13/ISH_UART0_RXD DW33 RN2005
CF47 GPP_B18/GSPI0_MOSI GPP_D14/ISH_UART0_TXD DT33 CPU_I2C_SDA_ISH0 3 2
CH49 GPP_B17/GSPI0_MISO GPP_D15/ISH_UART0_RTS_N/GSPI2_CS1_N/IMGCLKOUT5 DU33 KB_LED_BL_DET CPU_I2C_SCL_ISH0 4 1
SPKR CH47 GPP_B15/GSPI0_CS0# GPP_D16/ISH_UART0_CTS_N/CNV_WCEN
[65,66] CPU_I2C_SDA_P0 GPP_B14/SPKR/TIME_SYNC1/GSPI0_CS1#
[65,66] CPU_I2C_SCL_P0 DK22 SIO_EXT_WAKE#
TPM_PIRQ# GPP_C12/UART1_RXD/ISH_UART1_RXD SRN1KJ-7-GP
CL47 DW 24
CK47 GPP_B20/GSPI1_CLK GPP_C13/UART1_TXD/ISH_UART1_TXD DV24
D [55,70] SENSOR_I2C_SDA GPP_C14/UART1_RTS#/ISH_UART1_RTS# DU24 D
CK46 GPP_B22/GSPI1_MOSI
[55,70] SENSOR_I2C_SCL GPP_B21/GSPI1_MISO GPP_C15/UART1_CTS#/ISH_UART1_CTS#
CH45
GPP_B23 CL48 GPP_B19/GSPI1_CS0# CN43 CPU_I2C_SDA_ISH0R20511 2 0R2J-2-GP SENSOR_I2C_SDA ISH
[15] NRB_BIT GPP_B23/SML1ALERT#/PCHHOT#/GSPI1_CS1# GPP_B5/ISH_I2C0_SDA CN42 CPU_I2C_SCL_ISH0 R20521 2 0R2J-2-GPSENSOR_I2C_SCL
FFS_INT1 GPP_B6/ISH_I2C0_SCL
[15,27] SPKR DP21 GPP_C8/UART0_RXD
TPAD14-OP-GPTP2026 1 SBIOS_TX DK21 GPP_C9/UART0_TXD CN41
GPP_B7/ISH_I2C1_SDA
[24,66] LID_CL_SIO# DL21 GPP_C10/UART0_RTS# GPP_B8/ISH_I2C1_SCL CL43
DJ22 GPP_C11/UART0_CTS#
CL41
[55] CPU_I2C_SDA_TS UART_2_CRXD_DTXD DT22 GPP_B9/I2C5_SDA/ISH_I2C2_SDA CJ39
[55] CPU_I2C_SCL_TS UART_2_CTXD_DRXD DW22 GPP_C20/UART2_RXD GPP_B10/I2C5_SCL/ISH_I2C2_SCL DU36 ISH_GP0 R2039 1 2IN1 2 0R2J-2-GPGSEN_INT1_C For Gyro+G
DV22 GPP_C21/UART2_TXD GPP_D0/ISH_GP0 DV36 ISH_GP1 R2037 1 2IN1 2 0R2J-2-GPGSEN2_INT1_C
TOUCH_PANEL_INTR# DU22 GPP_C22/UART2_RTS# GPP_D1/ISH_GP1 DW36 ISH_TABLE_MODE# R2053 1
2IN1 2 0R2J-2-GP TABLE_MODE#
[65] KB_LED_BL_DET GPP_C23/UART2_CTS# GPP_D2/ISH_GP2 DT36
CPU_I2C_SDA_TS GPP_D3/ISH_GP3 DU34 ISH_KB_DISABLE

p
DT24
[70] FFS_INT1 Touch Screen CPU_I2C_SCL_TS DT23 GPP_C16/I2C0_SDA GPP_D17/ISH_GP4 DW34LID_CL_SIO#
GPP_C17/I2C0_SCL GPP_D18/ISH_GP5 DT14 LID_CL_SIO_TAB#

1
to
[24,66] LID_CL_SIO_TAB# GPP_E15/ISH_GP6 DU14 R2056
CPU_I2C_SDA_P0 DW 23
[55] DBC_PANEL_EN
Touch Pad CPU_I2C_SCL_P0 DU23 GPP_C18/I2C1_SDA GPP_E16/ISH_GP7
2IN1 100KR2J-1-GP
GPP_C19/I2C1_SCL
DU41 GPP_H4/I2C2_SDA

ap
[70] GSEN2_INT1_C

2
[55] GSEN_INT1_C DV41 GPP_H5/I2C2_SCL

[15,27] TOUCH_PANEL_INTR# DW41 GPP_H6/I2C3_SDA

DBC_PANEL_EN DT41 GPP_H7/I2C3_SCL

sl
DT40 GPP_H8/I2C4_SDA/CNV_MFUART2_RXD
[24] NB_MODE DW40 GPP_H9/I2C4_SCL/CNV_MFUART2_TXD
C C

ic
ICE-LAKE-U-GP-U
[24,64] MASK_SATA_LED#

[64] SATA_LED#_D 3D3V_S5_PCH

t
3D3V_S0
[24,64] BATT_WHITE_LED#

ma
R2001 1 DY 2 10KR2J-3-GPSIO_EXT_WAKE#
Q2001
[68] UART_2_CRXD_DTXD 1 6 NB_MODE

Note:ZZ.27002.F7C01
[68] UART_2_CTXD_DRXD R2002 1DEBUG2 51KR2J-1-GPUART_2_CRXD_DTXD

he
ISH_KB_DISABLE 2 5 MASK_SATA_LED#
[24] TABLE_MODE# 3D3V_S5
R2003 1DEBUG2 51KR2J-1-GP UART_2_CTXD_DRXD BATT_WHITE_LED# 3 4 SATA_LED#_D

c
2N7002KDW-1-GP
75.27002.F7C

/s

2
R2050
2IN1 10KR2J-3-GP

me

1
NB_MODE

B
t. B
//
s:
tp
ht

<CoreDesiiign>
A A

Wistron Corporation
21F, 88, Sec.1, HsiiinTaiiiWu Rd.,Hsiiichiiih,
TaiiipeiiiHsiiien221, Taiiiwan, R.O.C.

Tiiitllle

Eletro-XTechnical Siiize
CPU (UART/I2C/ISH)
DocumentNumber Rev
A3 SA
Hellcat 14/15_ ICL
Date: Tuesday, September 17, 2019 Sheet 20 of 106

5 4 3 2 1
 5 4 3 2 1

Main Func = PCH

[61] CNV_WR_DN0
CPU1I 9 OF19
Eletro-XTechnical
[61] CNV_WR_DP0
[61] CNV_WR_DN1
[61] D12 DP27
CNV_WR_DP1 C12 CSI_E_CLK_N GPP_F8/EMMC_DATA0 DU30
[61] CNV_W R_CLKN
[61] B12 CSI_E_CLK_P GPP_F9/EMMC_DATA1 DT30
CNV_W R_CLKP A12 CSI_E_DN_0 GPP_F10/EMMC_DATA2 DT29
[61] CNV_WT_DN0 G13 CSI_E_DP_0 GPP_F11/EMMC_DATA3 DV30
D [61] CNV_WT_DP0 D
F13 CSI_E_DN_1 GPP_F12/EMMC_DATA4 DU29 3D3V_S0
[61] CNV_WT_DN1 CSI_E_DP_1

eMMC
GPP_F13/EMMC_DATA5 DW30 R2101
[61] CNV_WT_DP1 GPP_F14/EMMC_DATA6 DW29 SPK_ID
K10 2 1
[61] CNV_W T_CLKN GPP_F15/EMMC_DATA7 DV28
L10 CSI_F_CLK_N 10KR2J-3-GP
[61] CNV_W T_CLKP GPP_F7/EMMC_CMD DW 28
L8 CSI_F_CLK_P
M8 CSI_F_DN_0 GPP_F16/EMMC_RCLK DN27
[61] CNV_BRI_RSP GPP_F17/EMMC_CLK DT28 1D8V_S5
M11 CSI_F_DP_0 R2104
[15,61] CNV_RGI_DT L11 CSI_F_DN_1 GPP_F18/EMMC_RESET# DU28 EMMC_RCOMP1 2
[15,61] CNV_BRI_DT_R CSI_F_DP_1 EMMC_RCOMP 200R2F-L-GP

2
[61] CNV_RGI_RSP
D9 CSI_D_CLK_N R2106
C9 CSI_D_CLK_P CNV_WT_D0N DV45 CNV_W T_DN0
20KR2F-L-GP DY
A7 CSI_D_DN_0 CNV_WT_D0P DU45 CNV_WT_DP0
B7 CSI_D_DP_0 CNV_WT_D1N DU44 CNV_WT_DN1
B9 CSI_D_DN_1 CNV_WT_D1P DT44 CNV_WT_DP1

1
[29] SPK_ID CNV_WT_CLKN
CNV_WT_CLKN DL42

p
A9 CSI_D_DP_1
D7 CSI_D_DN_2/CSI_C_DN_0 CNV_WT_CLKP DK42 CNV_WT_CLKP
CNV_BRI_RSP

to
C7 CSI_D_DP_2/CSI_C_DP_0

CSI2
D8 CSI_D_DN_3/CSI_C_CLK_N CNV_WR_D0N DP44 CNV_W R_DN0
C8 CSI_D_DP_3/CSI_C_CLK_P CNV_WR_DP0
CNV_WR_D0P DN44
DG42 CNV_WR_DN1
CNV_WR_D1N
G11 CNV_WR_D1P DG44 CNV_WR_DP1

ap
J11 CSI_H_CLK_N CNV_WR_CLKN
[61] CNV_RF_REST# F6 CSI_H_CLK_P CNV_WR_CLKN DK44 CNV_WR_CLKP
CSI_H_DN_0 CNV_WR_CLKP DJ44

CNVi
G6
G10 CSI_H_DP_0 DT45 CNV_WT_RCOMP1 R2102 2

sl
F10 CSI_H_DN_1 CNV_W T_RCOMP 150R2F-1-GP
[61] CLKREQ_CNV G8 CSI_H_DP_1 DL29 CNV_BRI_RSP
J8 CSI_H_DN_2/CSI_G_DN_0 GPP_F1/CNV_BRI_RSP/UART0_RXD DP31 CNV_RGI_DT
C K6 CSI_H_DP_2/CSI_G_DP_0 GPP_F2/CNV_RGI_DT/UART0_TXD DL31 CNV_BRI_DT R21091 2 33R2J-2-GPCNV_BRI_DT_R C

ic
R2103 L6 CSI_H_DN_3/CSI_G_CLK_N GPP_F0/CNV_BRI_DT/UART0_RTS# DN29 CNV_RGI_RSP
100R2F-L1-GP-U CSI_H_DP_3/CSI_G_CLK_P GPP_F3/CNV_RGI_RSP/UART0_CTS#
2 1 CSI_RCOMP CNV_RF_REST#
B4 CSI_RCOMP GPP_F4/CNV_RF_RESET# DJ29
DP29

t
1 GPP_D4 DT34 GPP_F6/CNV_PA_BLANKING DL27 GPP_F19 1
GPP_F19/A4WP_PRESENT TP2103 TPAD14-OP-GP
TP2101 DP38 GPP_D4/IMGCLKOUT0 CLKREQ_CNV
GPP_F5/MODEM_CLKREQ DK29

ma
DK36 GPP_H20/IMGCLKOUT1
TPAD14-OP-GP DL36 GPP_H21/IMGCLKOUT2
DN38 GPP_H22/IMGCLKOUT3
GPP_H23/IMGCLKOUT4

he
ICE-LAKE-U-GP-U

c
/s
me
B
t. B
//
s:
tp
ht

A <CoreDesiiign> A

Wistron Corporation
21F, 88, Sec.1, HsiiinTaiiiWu Rd., Hsiiichiiih,
TaiiipeiiiHsiiien221, Taiiiwan,R.O.C.

Eletro-XTechnical
Title
CPU (CSI/EMMC/CNVi)
Siiize DocumentNumber Rev
A3
Hellcat 14/15_ ICL SA
Date: Tuesday, September17, 2019 Sheet 21 of 106
5 4 3 2 1
 5 4 3 2 1

Main Func = PCH 1D8V_CPU_AUX 3D3V_S5_VCCPRIM 3D3V_S5_PCH

CPU1N 14OF 19
R2202 (209mA)
AH1 DF23 1 2
[50] VCCAUX_SENSE AW 10 VCCIN_AUX_1 VCCPRIM_3P3_2 DG26
[50] VSSAUX_SENSE AY11 VCCIN_AUX_2 VCCPRIM_3P3_3 DG28 0R2J-2-GP

Eletro-XTechnical
AY9 VCCIN_AUX_3 VCCPRIM_3P3_4
BA10 VCCIN_AUX_4 1D8V_S5
BB9 VCCIN_AUX_5
CH1 VCCIN_AUX_6 DF15
[40,50] CORE_VID0 CK11 VCCIN_AUX_7 VCCPRIM_1P8_2 DF17
[40,50] CORE_VID1 CL10 VCCIN_AUX_8 VCCPRIM_1P8_3 DF18
CM11 VCCIN_AUX_9 VCCPRIM_1P8_4 DF20 (705mA) 1D05V_S5_VCCPRIM_OUT 1D05V_S5_OUT 3D3V_S5_HDA 1D05V_S5_BYPASS 1D05V_VNN_BYPASS
CN1 VCCIN_AUX_10 VCCPRIM_1P8_5 DG17
AJ1 VCCIN_AUX_11 VCCPRIM_1P8_6 DG18 C2203 C2208 C2214
CN10 VCCIN_AUX_12 VCCPRIM_1P8_7

1
DG20

SCD1U16V2KX-3DLGP
SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

1
CP11 VCCIN_AUX_13 VCCPRIM_1P8_8 DF34 R2209 R2210
CR10 VCCIN_AUX_14 VCCPRIM_1P8_9

21

21
D DY 100KR2J-1-GP DY 100KR2J-1-GP D

2
CT11 VCCIN_AUX_15
CU10 VCCIN_AUX_16
DY DY DY

2
CV1 VCCIN_AUX_17
CV11 VCCIN_AUX_18
CW 10VCCIN_AUX_19 DW 37
CY11 VCCIN_AUX_20 VCCLDOSTD_0P85 0D85V_S5_VCCLDOSTD_OUT
DC1 VCCIN_AUX_21 DW 15 1D8V_S5_CLKLDO (100mA)
AL1 VCCIN_AUX_22 VCCA_CLKLDO_1P8
P13 VCCIN_AUX_23 DW 32
VCCDPHY_1P24 1D24V_S5_VCCDPHY_OUT 1D05V_VCCP_OUT_SFR
R12 VCCIN_AUX_24
T13 VCCIN_AUX_25 DD34
3D3V_S5_PCH 3D3V_S5_VCCPRIM_FUSE VCCDSW_1P05 1D05V_S5_VCCDSW_OUT
U12 VCCIN_AUX_26
DC11 VCCIN_AUX_27 BY2 1D05V_S5_OUT (1.5A)
DE12 VCCIN_AUX_28 VCC1P05_1 CB2 Supply to
1 R22142 DF12 VCCIN_AUX_29 VCC1P05_2 CC1
VCC1P05_3
VCCST & VCCSTG C2215 C2216
0R2J-2-GP AM1 VCCIN_AUX_30 SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP
[VCC1P05_OUTPUT_PLL] CD1

21

21
AN1 VCCIN_AUX_31
VCC1P05_OUT_PLL 1D05V_VCCP_OUT_SFR (Output)
AT11 VCCIN_AUX_32
AT9 VCCIN_AUX_33 DG31 DY DY
VCCPRIM_1P05_1 1D05V_S5_VCCPRIM_OUT
AU10 VCCIN_AUX_34
PH/PL 100R at VR side. AV9 VCCIN_AUX_35
VCCIN_AUX_36 VCCPRIM_1P05_2 DG29

p
VCCAUX_SENSE BF9 3D3V_S5_PCH
VCCPRIM_1P05_3 DF29
VSSAUX_SENSE BD9 VCCIN_AUX_VCCSENSE R2211
VCCIN_AUX_VSSSENSE

to
VCCPRIM_1P05_4 DF31 100KR2J-1-GP
1 2 CORE_VID0
DG33 3D3V_S5_PCH 3D3V_S5 90 8 21 - S A_ J am e s a d d R 22 1 8
1 2 CORE_VID1
DJ15 VCCRTC RTC_AUX_S5 90 8 21 - S A_ J am e s a d d R 22 1 7
1D05V_S5_BYPASS VCC_V1P05EXT_1P05 DE31
3D3V_VCCDSW
(3mA) 3D3V_S5_PCH R2212
100KR2J-1-GP
90 8 21 - S A_ J am e s ad d D 2 2 01

CY34 VCCDSW _3P3 1 R2205 2

1D05V_VNN_BYPASS VCC_VNNEXT_1P05 3D3V_S5_PCH

ap
DF26
VCCPGPPR 3D3V_S5_HDA 0R2J-2-GP
DC33 1 R2207 2 1D8V_S5 R2218
3D3V_S5_VCCPRIM_FUSE VCCPRIM_3P3_1 CL38 CORE_VID0 0R2J-2-GP 100KR2J-1-GP
DD35 VCCPRIM_1P8_1 GPP_B0/CORE_VID0 CJ38 CORE_VID1 1 R2201 2 VRALERT#
1D8V_S5 GPP_B1/CORE_VID1 CN38 VRALERT# R2213
1 DY 2 100KR2J-1-GP
GPP_B2/VRALERT#

2
1
DB34 VCCSPI

sl
3D3V_S5_PCH 3D3V_SPI 0R2J-2-GP
1 R22082 VRALERT# 1 R2217 2 VRALERT#_RK A
[Q] Follow EVB or need to connect to PD or power page . PROCHOT#_CPU [3,24,44,46]
0R2J-2-GP ICE-LAKE-U-GP-U 0R2J-2-GP D2201 RB520S30-GP
Follow TDKdesign 83.R2003.A8M
1D8V_S5 R2216
C 2nd = 83.1R003.N8F C
1 DY 2

ic
VRALERT#_R [44]
0R2J-2-GP
3D3V_S5_VCCPRIM 3D3V_VCCDSW

t
C2209
C2201 C2202 SC1U10V2KX-1DLGP
DY DY
SC1U10V2KX-1DLGP

DY

ma
SCD1U16V2KX-3DLGP

21
21

21

he
RTC_AUX_S5

c
C2206 C2207

/s
SC1U10V2KX-1DLGP

SCD1U16V2KX-3DLGP
1D8V_S5

21

21
C2210 C2212 C2217
1
1

DY DY
SC1U10V2KX-1DLGP

DY

me
SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

2
2

Trace width > 40mil

B
Must take care
this power layout
and add shield GND.
t.
1D05V_S5_VCCDSW_OUT

C2204
B
//
1D8V_S5 1D8V_S5_CLKLDO SC1U10V2KX-1DLGP
21

1 R2204 2
0R2J-2-GP
1 R2215 2
s:

0R2J-2-GP

C2218
C2211 Place cap within
DY
SC1U10V2KX-1DLGP

SC22U6D3V3MX-1-DL-GP 3mm from SOC edge.

tp
2 1
21

1D24V_S5_VCCDPHY_OUT

C2205
ht

SC4D7U6D3V3KX-DLGP
21

Need to apply XFL4012-601ME P/N

Place cap within

3mm from SOC edge

0D85V_S5_VCCLDOSTD_OUT

C2213
SC2D2U10V3KX-1DLGP-U
21

A A

<CorrreDesiiign>

WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle
CPU (PCH-LP PWR&Caps)
Siize DocumentttNumberrr Rev
Custttom SA
Hellcat 14/15_ ICL
Date::: Tuesday,,, Septttemberrr 17,,, 2019 Sheett 22 off 106
5 4 3 2 1
 5 4 3 2 1

Main Func = PCH

CPU1O 15 OF19 CPU1P 16 OF19
CPU1Q 17 OF19
Eletro-XTechnical
A11 VSS_1 VSS_75 AF45 BT3 VSS_149 VSS_223 CR37 DJ33 VSS_297 VSS_362 F11
A46 VSS_2 VSS_76 AF47 BT39 VSS_150 VSS_224 CR45 DJ36 VSS_298 VSS_363 F31
BA45 VSS_3 VSS_77 AG1 BT41 VSS_151 VSS_225 CR49 DJ42 VSS_299 VSS_364 F45
BA47 VSS_4 VSS_78 AG11 BT42 VSS_152 VSS_226 CT37 DK3 VSS_300 VSS_365 F47
BB11 VSS_5 VSS_79 AG3 BT43 VSS_153 VSS_227 CT39 DK4 VSS_301 VSS_366 F8
D BB3 VSS_6 VSS_80 AG38 BT7 VSS_154 VSS_228 CT42 DK49 VSS_302 VSS_367 G21 D
BB7 VSS_7 VSS_81 AG39 BU45 VSS_155 VSS_229 CT9 DK6 VSS_303 VSS_368 G24
BC37 VSS_8 VSS_82 AG41 BU47 VSS_156 VSS_230 CU45 DK8 VSS_304 VSS_369 G3
BD3 VSS_9 VSS_83 A31 BV1 VSS_157 VSS_231 CU47 DL10 VSS_305 VSS_370 G31
BD38 VSS_10 VSS_84 AG42 BV11 VSS_158 VSS_232 CU49 DL13 VSS_306 VSS_371 G36
BD39 VSS_11 VSS_85 AG43 BV2 VSS_159 VSS_233 CV3 DL44 VSS_307 VSS_372 G49
BD41 VSS_12 VSS_86 AG5 BV3 VSS_160 VSS_234 CV34 DL47 VSS_308 VSS_373 G5
A48 VSS_13 VSS_87 AG9 BV7 VSS_161 VSS_235 CV35 DM47 VSS_309 VSS_374 H17
BD42 VSS_14 VSS_88 AH2 BW3 VSS_162 VSS_236 CV5 DN15 VSS_310 VSS_375 H21
BD43 VSS_15 VSS_89 AH37 BW37 VSS_163 VSS_237 CV9 DN19 VSS_311 VSS_376 H24
BD45 VSS_16 VSS_90 AH45 BW5 VSS_164 VSS_238 CY41 DN24 VSS_312 VSS_377 H31
BD49 VSS_17 VSS_91 AH49 BW6 VSS_165 VSS_239 CY45 DN31 VSS_313 VSS_378 H33
BD5 VSS_18 VSS_92 AJ2 BW7 VSS_166 VSS_240 CY49 DN36 VSS_314 VSS_379 H36
BD6 VSS_19 VSS_93 AJ3 BY37 VSS_167 VSS_241 CY9 DN42 VSS_315 VSS_380 H45
BD7 VSS_20 VSS_94 A34 BY45 VSS_168 VSS_242 D13 DP45 VSS_316 VSS_381 H49

p
BE1 VSS_21 VSS_95 AK37 BY49 VSS_169 VSS_243 D17 DR49 VSS_317 VSS_382 J10
BE2 VSS_22 VSS_96 AL2 C11 VSS_170 VSS_244 D31 DT1 VSS_318 VSS_383 J13

to
BF3 VSS_23 VSS_97 AL45 C13 VSS_171 VSS_245 D44 DT10 VSS_319 VSS_384 J16
A49 VSS_24 VSS_98 AL47 C14 VSS_172 VSS_246 D49 DT15 VSS_320 VSS_385 J36
BF45 VSS_25 VSS_99 AL6 C17 VSS_173 VSS_247 DA10 DT20 VSS_321 VSS_386 J6
BF47 VSS_26 VSS_100 AM2 C21 VSS_174 VSS_248 DA33 DT27 VSS_322 VSS_387 K11
BF7 VSS_27 C24 VSS_175 DT3 VSS_323

ap
VSS_101 AM37 VSS_249 DA9 VSS_388 K33
BG3 VSS_28 VSS_102 AN2 C31 VSS_176 VSS_250 DB32 DT32 VSS_324 VSS_389 K8
BG41 VSS_29 VSS_103 AN38 C34 VSS_177 VSS_251 DB35 DT37 VSS_325 VSS_390 L36
BG7 VSS_30 VSS_104 AN39 C39 VSS_178 VSS_252 DB38 DT42 VSS_326 VSS_391 L39
BH37 VSS_31 VSS_105 A36 C48 VSS_179 VSS_253 DB45 DT49 VSS_327 VSS_392 L41

sl
BJ1 VSS_32 VSS_106 AN41 C49 VSS_180 VSS_254 DB47 DT6 VSS_328 VSS_393 L42
BJ2 VSS_33 VSS_107 AN42 C6 VSS_181 VSS_255 DB49 DT7 VSS_329 VSS_394 L43
C
BJ3 VSS_34 VSS_108 AN43 CA3 VSS_182 VSS_256 DC3 DT8 VSS_330 VSS_395 L45 C
AA45 VSS_35 VSS_109 AN45 CA38 VSS_183 VSS_257 DC49 DU1 VSS_331 VSS_396 L47

ic
BJ41 VSS_36 VSS_110 AN49 CA41 VSS_184 VSS_258 DC5 DU10 VSS_332 VSS_397 M10
BJ43 VSS_37 VSS_111 AN6 CA42 VSS_185 VSS_259 DC6 DU15 VSS_333 VSS_398 M3
BJ45 VSS_38 VSS_112 AR1 CA43 VSS_186 VSS_260 DD37 DU2 VSS_334 VSS_399 M36
BJ49 VSS_39 VSS_113 AR11 CA7 VSS_187 VSS_261 DD42 DU20 VSS_335 VSS_400 M5

t
BJ7 VSS_40 VSS_114 AR2 CB37 VSS_188 VSS_262 DE10 DU27 VSS_336 VSS_401 N45
BM11 VSS_41 VSS_115 AR3 CB45 VSS_189 VSS_263 DE13 DU32 VSS_337 VSS_402 N49

ma
BM3 VSS_42 VSS_116 A39 CB47 VSS_190 VSS_264 DE17 DU37 VSS_338 VSS_403 P11
BM45 VSS_43 VSS_117 AR7 CC3 VSS_191 VSS_265 DE18 DU48 VSS_339 VSS_404 P41
BM47 VSS_44 VSS_118 AR9 CC7 VSS_192 VSS_266 DE20 DU49 VSS_340 VSS_405 P8
BM5 VSS_45 VSS_119 AT3 CE37 VSS_193 VSS_267 DE22 DU7 VSS_341 VSS_406 R3

he
AA47 VSS_46 VSS_120 AT45 CE45 VSS_194 VSS_268 DE23 DV2 VSS_342 VSS_407 R37
BM6 VSS_47 VSS_121 AT47 CE49 VSS_195 VSS_269 DE26 DV44 VSS_343 VSS_408 T11
BM7 VSS_48 VSS_122 AT5 CE9 VSS_196 VSS_270 DE28 DV48 VSS_344 VSS_409 T36
BP1 VSS_49 VSS_123 AT6 CG37 VSS_197 VSS_271 DE29 DV8 VSS_345 VSS_410 T41

c
BP2 VSS_50 VSS_124 AT7 CG39 VSS_198 VSS_272 DE33 DW1 VSS_346 VSS_411 T43
BP3 VSS_51 VSS_125 AU37 CG43 VSS_199 VSS_273 DE45 DW10 VSS_347 VSS_412 T45

/s
BP43 VSS_52 VSS_126 AV11 CG45 VSS_200 VSS_274 DE6 DW2 VSS_348 VSS_413 T47
BP7 VSS_53 VSS_127 A42 CG47 VSS_201 VSS_275 DF13 DW20 VSS_349 VSS_414 U3
BR45 VSS_54 VSS_128 AV3 CG9 VSS_202 VSS_276 DF22 DW27 VSS_350 VSS_415 U37
BR49 VSS_55 VSS_129 AV38 CH3 VSS_203 VSS_277 DF28 DW44 VSS_351 VSS_416 U5

me
AB11 VSS_56 VSS_130 AV39 CH5 VSS_204 VSS_278 DF33 DW46 VSS_352 VSS_417 V11
AB3 VSS_57 VSS_131 AV41 CJ37 VSS_205 VSS_279 DF35 DW48 VSS_353 VSS_418 V36
AB38 VSS_58 VSS_132 AV42 CJ42 VSS_206 VSS_280 DF39 DW49 VSS_354 VSS_419 V45
AB39 VSS_59 VSS_133 AV43 CJ9 VSS_207 VSS_281 DG10 DW7 VSS_355 VSS_420 V49

B
AB41 VSS_60
A17 VSS_61
AB42 VSS_62
AB43 VSS_63
VSS_134 AV45
VSS_135 AV49
VSS_136 AV7
VSS_137 AY3
CK45 VSS_208
CK49 VSS_209
CK9 VSS_210
CL37 VSS_211
t.
VSS_282 DG12
VSS_283 DG13
VSS_284 DG15
VSS_285 DG22
E11 VSS_356
E34 VSS_357
E36 VSS_358
E39 VSS_359
VSS_421 V9
VSS_422 W37
VSS_423 Y36
VSS_424 Y38 B
//
AB5 VSS_64 VSS_138 A44 CL42 VSS_212 VSS_286 DG23 E42 VSS_360 VSS_425 Y43
AB6 VSS_65 VSS_139 AY7 CL49 VSS_213 VSS_287 DG47 E6 VSS_361 VSS_426 Y9
AC45 VSS_66 VSS_140 B17 CM45 VSS_214 VSS_288 DG6 VSS_427 DE15
AC49 VSS_67 VSS_141 B2 CM47 VSS_215 VSS_289 DH1 ICE-LAKE-U-GP-U
s:

AD10 VSS_68 VSS_142 B21 CM9 VSS_216 VSS_290 DH3

AD11 VSS_69 VSS_143 B24 CN3 VSS_217 VSS_291 DH45
AD34 VSS_70 VSS_144 B3 CN37 VSS_218 VSS_292 DH5
AD37 VSS_71 VSS_145 B31 CN39 VSS_219 VSS_293 DJ19
A3 VSS_72 VSS_146 B48 CN5 VSS_220 VSS_294 DJ21
tp

AE6 VSS_73 VSS_147 BA1 CP9 VSS_221 VSS_295 DJ27

AF37 VSS_74 VSS_148 BA2 CR32 VSS_222 VSS_296 DJ31
ICE-LAKE-U-GP-U ICE-LAKE-U-GP-U
ht

A <CoreDesiiign> A

Wistron Corporation
21F, 88, Sec.1, HsiiinTaiiiWu Rd., Hsiiichiiih,
TaiiipeiiiHsiiien221, Taiiiwan,R.O.C.

Eletro-XTechnical
Title
CPU (VSS)
Siiize DocumentNumber Rev
A3
Hellcat 14/15_ ICL SA
Date: Tuesday, September17, 2019 Sheet 23 of 106
5 4 3 2 1
 5 4 3 2 1

Main Func = KBC 3D3V_S5_KBC 3D3V_S5_KBC 3D3V_S5_KBC 3D3V_S5_KBC 3D3V_S5_KBC

3D3V_S5 Hellcat 3D3V_S5_KBC

1D05V_VCCST
PANEL_BKEN K
D2401
eDP back ligh t
MODEL ID
A PANEL_BKEN_EC
Control from EC

1
[65] KSO00

1
RB 520S 30-GP R2442
[65] KSO01 R2443
PECI_VREF VREF_ADC VTR_REG VTR_PLL VTR1_ADC
[65] KSO02 VTR2 83.R2003.A8M 82K 5R2F-GP MODEL ID 10KR2J-3-GP BOARDID
[65] KSO03 2ND = 083.52030.008F
[65] KSO04

C243 2

C242 7

C242 5

C242 2

C242 4
SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP
[65] KSO05
MODEL_ID 64.82525.6DL

C2406
SCD1U16V2K X-3DLGP
[65] KSO06 D2405
eDP back ligh t

21

21

21

21

21
[65] KSO07 K A L_BKLT_EN BOARD_ID

21
[65] KSO08 Control from PCH
[65] KSO09 R2441

Eletro-XTechnical

SCD1U16V2KX-3DLGP
C2407
[65] KSO10 100KR2F-L1-GP
[25] VCCDSW_EN [17,24] PCH_DPWROK RB 520S 30-GP R2444
[65] KSO11

SCD1U16V2K X-3DLGP
21
100KR2F-L1-GP

212
[65] KSO12 83.R2003.A8M

C2408
[65] KSO13

2 12
[65] DAT_TP_SIO_I2C_CLK
2ND= 083.52030.008F

21
[65] KSO14
[65] KSO15 [65] CLK_TP_SIO_I2C_DAT
[65] KSO16
[17] SIO_PWRBTN# [64] LED_MASK#
Hellcat
14/15_ ICL
[18,68] ESPI_CS# 3D3V_S5_KBC 3D3V_S5
[66] LID_POWER_ON#
[18,68] ESPI_CLK
[65] KSI[0..7] R2446
KSI0
KSI1 [72] CCG5C_I2C_INT# 21
KSI2 0R2J-2-GP
[18,68] ESPI_RESET#
KSI3
KSI4 [20,64] MASK_SATA_LED#
3D3V_S5_KBC
KSI5 [17] SYS_PWROK
[98] ME_FWP
D KSI6KSI7
[43,44] PBAT_PRES#
64.49925.6DL DGPUHOT# 1
R2477
2 GPU_PWR_LEVEL D

SCD1U16V2KX-3DLGP
C2421

SCD1 6V2KX-3DLGP
C2416
[18,25] RTCRST_ON
RN2412 1 64.64925.6DL 0R2J-2-GP

21

21
8 KSO08 U

SCD1U16V2KX-3DLGP
C2420

SCD1U16V2KX-3DLGP
C2412

SCD1U16V2KX-3DLGP
C2411

SCD1U16V2KX-3DLGP
C2410

SCD1U16V2KX-3DLGP
C2414

SCD1U16V2KX-3DLGP
C2413
[18,68] ESPI_IO[3..0] ESPI_IO0 1
ESPI_IO1 [17] PCH_RSMRST#_R
2
3
7
6
KSO02
KSO10
64.82525.6DL

21

21

21

21

21

21
ESPI_IO2 4 5 KSO03
ESPI_IO3

[3,65] TOUCHPAD_INTR#
SRN100KJ-5-GP
RN2409 DGPU_PWROK_EC R2471 2 1 DGPU_PWROK
1 8 KSI2 0R2J-2-GP
2 7 KSI0
[20,66] LID_CL_SIO# [43,44] AC_DIS
3 6 KSI7
4 5 KSI3
[17,40,44,46] VCCST_PWRGD [35,66] USB_PWR_EN# 3D3V_S5_KBC 3D3V_S5 DY R2426 10KR2J-
[65] CAP_LED#_R 3-GP
SRN100KJ-5-GP If don't need RTC alarm wake up,
For eSPI

12
RN2410 RN2403 can change to 3D3V_AUX_S5
[64] CHG_AMBER_LED#
1 8 KSO09 1 8 KSI1 U2401 R2448
2 7 KSO12 2 7 KSO15 3D3V_RTC DY 100KR2J-1-GP
3 6 KSO13 3 6 KSO00 1D8V_S5 1D8V_S5_KBC A8 B64 #PCS_DSS 3D3V_S5
[53] PRIM_PWRGD 4 5 KSO16 4 5 KSI6 B5 VTR1 A41B43
GPIO101/BGPO1

12
[64] BATT_WHITE_LED# GPIO104/UART0_TX/ TFDP_CLK/VTR2_STRAP MSCLK
MSDATA
B48 VTR1 GPIO105/UART0_RX/TFDP_DATA/TRACECLK B3
VTR1 RESET_OUT# R2473 2 LID_CL_SIO# 2 R2494 1 TBT_RESET_N_EC#
B39 1 0R2J-2-GP SYS_PWROK

2
[74] TYPEC_DCIN1_EN# R2472 GPIO106/PWROK B36 KSO04
SRN100KJ-5-GP SRN100KJ-5-GP A52 VTR1
0R2J-2-GP VTR1 GPIO107/SMI#/KSO04/I2C10_SCL 100KR2J-1-GP
[26] FAN_TACH1 RN2404
RN2411 1 8 KSI4 VTR1_ADC A15 B37 KSO05
4 KSO11 VTR1_ADC GPIO112/KSO05 A35 KSO06
1 2 7 KSI5 R2462 1 2 0R2J-2-GP G3

1
[43,44] PBAT_CHG_SMBDAT 2 3 KSO14 3 6 KSO07 GPIO113/KSO06/ICT9 B38 PCH_RSMRST# 10R2J-2-GP PCH_RSMRST#_R
VTR2 B26 R2404 2
4 5 KSO06 C2423 2 1 SCD1U16V2KX-3DLGP B19 VTR2 LID_CL_SIO# 3D3V_S5 3D3V_S5
SRN100KJ-6-GP GPIO114/PS2_CLK0A/EC_SCI# A36
[17,26] IMVP_VR_ON VTR3 GPIO115/PS2_DAT0A B41 PS_ID
VTR_PLL B4 GPIO116 A39 TABLE_MODE#
RN2407 3D3V_ECVBAT
SRN100KJ-5-GP A64 VTR_PLL GPIO117
[20] NB_MODE
JTAG DEBUGCONN
1 4KSO05 VTR_REG B9 VBAT R2436 R2434
A34 KSO07
Layout Note: GPIO120/KSO07

SCD1U16V2KX-3DLGP
C2428
2 3KSO04 3D3V_RTC C2418 2 1 SC1U10V2KX-1DLGP VREF_ADC B11 VTR_REG B45 KSO08 100KR2J-1-GP 100KR2J-1-GP
[63] SSD_SCP#
21 VR_CAP B8 VREF_ADC GPIO121/PVT_IO0/KSO08 A43 KSO09
[65] KB_LED_PWM Place closeto Mec1515

21
VR_CAP GPIO122/PVT_IO1/KSO09 B46 KSO10

21

21
[20] TABLE_MODE# SRN100KJ-6-GP R2420 100KR2J-1-GP
[27] BEEP GPIO123/PVT_IO2/KSO10 B10 KSO11
SYSPWR_PRES GPIO124/PVT_CS#/KSO11/ICT12 B47 KSO12 LED_MASK# USB_PW R_EN# 3D3V_S5
R2454 2 DY 1 100KR2J-1-GP B68
SHD_CS1# B28 GPIO000/SYSPWR_PRES/VCI_IN3#/I2C11_SDA GPIO125/PVT_CLK/KSO12 A44

p
[17,40,54,55,81] PM_SLP_S3# KSO13
GPU_THM_SMBDAT A59 GPIO002/PWM5/SHD_CS1# GPIO126/PVT_IO3/KSO13 A46 RTCRST_ON 3D3V_S0
GPU_THM_SMBCLK B62 GPIO003/I2C00_SDA/UART2_RI# GPIO127/A20M/UART1_RTS#
[43] PS_ID A25 PBAT_CHG_SMBDAT
PM_LAN_ENABLE R2483 2 1 AUX_ON A47 GPIO004/I2C00_SCL/ UART2_DCD#
GPIO007/I2C03_SDA/PS2_CLK0B GPIO130/I2C01_SDA B27 PBAT_CHG_SMBCLK
R2485 RN2455 R2456
0R2J-2-GP FPR_SCAN# GPIO131/I2C01_S CL A49 KSO16 R2449 R2463
M_BIT[64] M_BIST B50

to

8
7
6
5
MASK_SATA_LED# B21 GPIO010/I2C03_SCL/PS2_DAT0B GPIO132/I2C06_SDA/KSO16

49D9R2F-GP

SRN10KJ-6-GP

10KR2J-3-GP

10KR2J-3-GP
1
R2455

100KR2J-1-GP
[43,44] PBAT_CHG_SMBCLK VCCDSW_EN B25 GPIO011/SMI_ALT#/PWM4/ICT7 B53 CAP_LED#
3D3V_S5_KBC 3D3V_S5_KBC 3D3V_ECVBAT DGPU_PWROK_EC A24 GPIO012/I2C07_SDA GPIO140/I2C06_SCL/ICT5/KSO17 B60 PTP_DIS# DY10KR2J-3-GP
PW M_FAN1 A27 GPIO013/I2C07_SCL GPIO141/I2C05_SDA/UART2_RTS# A57 LED_MASK#
JTAG
JTAG

21

21

21
[55] PANEL_MONITOR

21
SHD_IO 3 A21 GPIO014/PWM6/GPTP_IN2 GPIO142/I2C05_SCL/UART2_CTS# B61 UPD1_SMBDAT

2
[68] HOST_DEBUG_TX JTAG1
KSI0 B32 GPIO016/GPTP_IN1/SHD_IO3/ICT3/DSW_PWROK GPIO143/I2C04_SDA/UART0_CTS# A58 UPD1_SMBCLK SSD_SCP#
JTAG

1
2
3
4
3D3V_S5 GPIO017/KSI0/UART0_DCD# GPIO144/I2C04_SCL/UART0_RTS# B58 JTAG_TDI 11
[65] PTP_DIS# R2458 JTAG_PU

2
R2460 R2496 GPIO145/I2C09_SDA/JTAG_TDI/UART2_RX A55 JTAG_TDO 1
KSI1 A29
10KR2J-3-GP
DY 10KR2J-3-GP 100KR2J-1-GP KSI2 B31
GPIO020/KSI1 GPIO146/I2C09_SCL/JTAG_TDO/UART2_TX B59 JTAG_CLK JTAG_TDI
[3] PECI_CPU GPIO147/I2C15_SDA/JTAG_CLK/UART2_DSR# 2 JTAG_TMS
DY B34 GPIO021/KSI2

21
KSI3
3
R2491 2 1 10KR2J-3-GP TYPEC_DCIN1_EN# B35 GPIO026/KSI3/UART0_DTR#/I2C12_SDA JTAG_TMS JTAG_CLK

ap
21
KSI4 A56
[27] NB_MUTE# For Charge (confirm level shift 1.8V to 3.3V) 4

1
GPIO027/KSI4/UART0_DSR#/I2C12_SCL GPIO150/I2C15_SCL/JTAG_TMS/UART2_DTR# A30 KSO15 JTAG_TDO
GPU_PWR_LEVEL FPR_SCAN# LID_POW ER_ON# KSI6 A32 GPIO151/ICT4/KSO15 A9 KSO14
ECDEBUG 5
[24,66] LID_CL_SIO_TAB# GPIO031/KSI6/GPTP_OUT1 GPIO152/KSO14 B54 BAT2_LED# 6 MSCLK
KSI5 A33 7
GPIO153/LED2 A48 CLK_TP_SIO_I2C_DAT MSDATA
[44,64] HW_ACAV_IN KSI7 B33 GPIO030/KSI5/I2C10_SDA 8 HOST_DEBUG_TX
IMVP_VR_ON B1 GPIO032/KSI7/GPTP_OUT0/UART0_RI# GPIO154/I2C02_SDA/PS2_CLK1B B51 DAT_TP_SIO_I2C_CLK
9 DEBUG_TX
[66] FPR_SCAN# 3D3V_S0 Need very close to EC, BEEP A6 GPIO033/TACH3 GPIO155/I2C02_SCL/PS2_DAT1B B49 BREATH_LED# 1
10
TP 2403
PDG: < 0.5 inch es. GPIO035/PWM8/CTOUT1/ICT15 GPIO156/LED0 BAT1_LED#
A50 12
R24141 2 0R2J-2-GP
KSO00 A31 GPIO157/LED1
[26] PWM_FAN1
PECI_CPU 1 2 PECI_EC
A37 GPIO040/GPTP_OUT2/KSO00/UART1_CTS# A54 PCIE_WAKE#
JTAG
GPIO165/32KHZ_IN/CTOUT0 ACES-CON10-28-GP-U
R2437 PANEL_BKEN_EC GPIO042/PECI_DAT/SB-TSI_DATB40
20.K0460.010

sl
R2430 43R2J-GP PECI_VREF A38 GPIO043/SB-TSI_CLK B42 HOST_DEBUG_TX
KSO01 B57 GPIO044/VREF_VTT GPIO170/UART1_TX/JTAG_STRAP B56 CCG5C_I2C_INT#
10KR2J-3-GP B44 GPIO045/KSO01/PWM2_ALT/ICT14/CR_STRAP GPIO171/UART1_RX A45 PBAT_PRES#
DY C2405 KSO02
A42 GPIO046/KSO02/ICT11 GPIO175/CMP_VOUT1/PWM8_ALT HOST_DEBUG_TX 1 R2484 2

12

21
[55] LCD_TST SC100P50V2JN-3GP KSO03
GPIO047/KSO03/PWM3_ALT/ICT13
D2403 6K2R2F-GP
FAN_TACH1 K TACH_FAN1 A11 I_BATT 1 3D3V_S5_KBC
For USBTypeC
A B55 TP 2402
C LID_CL_SIO_TAB# A51 GPIO050/ICT0_TACH0 GPIO200/ADC00/TRACEDAT0 B12 I_ADP C
LCD_TST A26 GPIO051/ICT1_TACH1 GPIO201/ADC01/TRACEDAT1 A12 MODEL_ID
RB 520S 30-GP
83.R2003.A8M KB_LED_PWM B29 GPIO052/ICT2_TACH2 GPIO202/ADC02/TRACEDAT2 B13 TOUCHPAD_INTR#
NB_MODE A28 GPIO053/PWM0 GPIO203/ADC03/TRACEDAT3 A13 BOARD_ID
[55] LCD_VCC_TEST_EN 2ND= 083.52030.008F SHD_CS0# B24
GPIO054/PWM1 GPIO204/ADC04 B14 TBT_RESET_N_EC R2401 1DY 2 0R2J-2-GP TBT_RESET_N_EC#

ic
GPIO205/ADC05 A14
SHD_CLK USB_PW R_EN#

2
1
GPIO055/PWM2/SHD_CS0#/BSS_STRAP A23
VCCST_PWRGD R2464 1 2 RUNPW ROK A2 GPIO056/PWM3/SHD_CLK GPIO206/ADC06 B15 PCH_DPW ROK RN2413
0R2J-2-GP GPIO057/VCC_PWRGD GPIO207/ADC07/CMP_STRAP SRN2K2J-1-GP
HW_ACAVIN_NB R2475 1 2 HW _ACAVIN_NB_R NB_MUTE#
3D3V_S5 B52 A1
0R2J-2-GP ESPI_RESET# B16 GPIO060/KBRST/TST_CLK_OUT GPIO221/32KHZ_OUT/SYS_SHDN# B30 PROCHOT
EC_PCH_SPI_EN B63 GPIO061/ESPI_RESET#/PWM7_ALT/EC_SCI_ALT# GPIO222/PROCHOT_IN# A22 SHD_IO 0
TP 2404 1 USB_PWR_SHR_EN_L# A20 GPIO062(RESETO#)/I2C11_SCL

3
4
GPIO223/SHD_IO0 B22 SHD_IO 1
[43,44] HW_ACAVIN_NB GPIO045 (CR_STRAP) TP 2405 1 USB_POWERSHARE_VBUS_EN A16 GPIO063/ESPI_ALERT#/PWM6_ALT/ICT8 GPIO224/GPTP_IN0/SHD_IO1 A3 LCD_VCC_TEST_EN
ESPI_CLK B18 GPIO064/PCI_RESET# GPIO226 B23 SHD_IO 2

2
[40] A LW ON 3D3V_S5_KBC R2498 ESPI_CS# B17 GPIO065/ESPI_CLK/I2C13_SCL/ICT5_ALT GPIO227/SHD_IO2/PWRGD_STRAP
JTAG TYPEC_DCIN1_EN# A10 GPIO066/ESPI_CS#/I2C13_SDA

t
GPU_PWR_LEVEL

100KR2J-1-GP
A53
[44] AD_IA GPIO241/PWM0_ALT/CMP_VOUT0 B6 PANEL_MONITOR UPD1_SMBDAT
GPIO067/VREF2_ADC 3D3V_S5
ESPI_IO0 A17 GPIO242/CMP_VIN0 A7 AC_DIS

1
ESPI_IO1 A18 GPIO070/ESPI_IO0/I2C14_SDA GPIO244/CMP_VIN1 A5 M_BIST UPD1_SMBCLK
[66] PCIE_LAN_WAKE# R2450 JTAG_RST# ESPI_IO2 B20 GPIO071/ESPI_IO1/I2C14_SCL GPIO246/CMP_VREF0 CABLE2_OCP# 2 R2419 1
100KR2J-1-GP ESPI_IO3 A19 GPIO072/ESPI_IO2/I2C01_SDA_ALT A60 CABLE2_OCP#
EC G3 Flash Share

ma
GPIO073/ESPI_IO3/I2C01_SCL_ALT GPIO253/BGPO0 B7 SIO_PWRBTN# 100KR2J-1-GP
[55] PANEL_BKEN [61] JIO3_PCIE_WAKE# R2409 C2419
12

GPIO254/PWM1_ALT/CMP_VREF1 A4 ME_FWP

100R2F-L1-GP-U
POWER_SW_IN# GPIO255
NON_JTAG

SC1U10V2KX-1DLGP
SPI_HOLD_ROM R2412 2 1 75R2F-2-GP SHD_IO3 B67
[44,79] DGPUHOT# KSO01 G3 JTAG LID_POW ER_ON# A63 VCI_IN0#/GPIO163

12
[66] PM_LAN_ENABLE SPI_WP_ROM 2 1 SHD_IO2
R2413 7 5R2F-2-GP VCI_IN1#/GPIO162
SPI_SO_ROM G3 SHD_IO1 B66

12
[19,85] DGPU_PWROK R24102 1 33R2F-3-GP
SPI_SI_ROM R2411 2 1G3
HW_ACAV_IN A61 NC#B66 R2421
33R2F-3-GP SHD_IO0 B65 VCI_OVRD_IN/GPIO172
[3,22,44,46] PROCHOT#_CPU SPI_CLK_ROM R2416 2 G3 1 33R2F-3-GP SHD_CLK ALW ON 330R2J-3-GP
VCI_OUT/GPIO250
[55] CABLE2_OCP# SPI_CS_ROM_N0 R2403 2 G3 1 0R2J-2-GP SHD_CS0# C1
AD_IA
GND I_ADP 2 1
[4] L_BKLT_EN SPI_CS_ROM_N1 R2497 2 G3 1 0R2J-2-GP SHD_CS1#
SUS_CLK 1 R2406 2 PCH_SUSCLK A62
G3

he
nRESET_IN B2 SUSCLK_IN
[55] TOUCH_REPORT_SW
0R2J-2-GP JTAG_RST# A40 RESET_IN#
JTAG_RST# C2435
[64] KBC_PWRBTN# [12,13] SML0_SMBCLK
SC2200P50V2KX-2DLGP
[12,13] SML0_SMBDATA

21
MEC1515H-D0-I-NB-GP
EC G3 Flash Share
[72] UPD1_SMBCLK
071.01515.0A03
[72] UPD1_SMBDAT For eSPI
3D3V_S5_KBC
[18,25,91] SPI_CLK_ROM
R2453 2 DY 1 0R2J-2-GP 3D3V_S5

c
[18,25,91] SPI_SO_ROM
[18,25,91] SPI_SI_ROM GPIO55 (BSS_STRAP)
[18,25] SPI_WP_ROM RN2405
[18,25] SPI_HOLD_ROM 2 3

1
[18,25] SPI_CS_ROM_N0 R2461 1 4
[18,25] SPI_CS_ROM_N1
TP 2401 1 PCH_RSMRST#_R Already pull low 10KR2J-3-GP

/s
[18] EC_PCH_SPI_EN on CPU side PROCHOT Q2416 SRN100KJ-6-GP
Q2408
TPAD14-OP-GP

2
BAT2_LED# 1 6 BATT_WHITE_LED#
PCH_RSMRST#_R
non-G3 SHD_CS0#
D2406 CAP_LED# 1 6 CAP_LED#_R
R2405 2 10R2J-2-GP

1
[18,61] SUS_CLK nRESET_IN
K A PRIM_PWRGD R2417 3D3V_S5
2 5
3D3V_S5
2 5
PRIM_PWRGD R2402 n2on-G3 1 0R2J-2-GP SHD_IO2 DY DY100KR2J-1-GP CHG_AMBER_LED# 3 4 BAT1_LED#
3D3V_S0
T
O
C
H
P
R
RB 520S 30-GP PROCHOT#_CPU 34
R2438

2
DY 100KR2J-1-GP 83.R2003.A8M 2N7002KDW -1-GP
2N7002KDW -1-GP
2ND =083.52030.008F 75.27002.F7C
12

me
75.27002.F7C
D2407
R2452 2 DY 1 0R2J-2-GP
K A EC_PCH_SPI_EN

DY 3D3V_S0

2
RB 520S 30-GP
R2474
83.R2003.A8M DY100KR2J-1-GP
2ND= 083.52030.008F R2489

1
t. 100KR2J-1-GP

12
CAP_LED#

B B

D2402
3D3V_S5_KBC
//
LID_CL_SIO# K A TOUCH_REPORT_SW
RN2402
PBAT_CHG_SMBCLK 3 2 LRB 751V -40T1G-GP
PBAT_CHG_SMBDAT 4 1
83.00751.08F
SRN4K7J-8-GP
2nd = 083.00751.0B8F
pull high on CPU side
3D3V_S5_KBC
s:

PBAT_PRES# R2415 1 2 100KR2J-1-GP

GPU_THM_SMBDAT R2447 2 1 0R2J-2-GP SML0_SMBCLK

GPU_THM_SMBCLK R2459 2 1 0R2J-2-GP SML0_SMBDATA

tp

PowerSwitchLogic(PSL)

3D3V_ECVBAT
ht

R2451
100KR2J-1-GP

R2432
KBC_PWRBTN# 1 2 POWER_SW_IN#

1KR2J-1-GP
C2426

211 2
SC2D2U10V3KX-1DLGP-U

3D3V_S5

R2495
1KR2J-1-GP

21
A D2409 A

PCIE_W AKE# A K PCIE_LAN_WAKE#

RB 520S 30-GP
83.R2003.A8M
2ND = 083.52030.008F
D2408
A K JIO3_PCIE_WAKE#

RB 520S 30-GP
83.R2003.A8M
2ND = 083.52030.008F

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Eletro-XTechnical
Wiiistron Corporatiiion
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TTTaaaipppeeei Hsssieeennn 222222111,TTTaaaiwaaannn, R...O...C...

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5 4 3 2 1
 Main Func = SPI Flash
5 4 3 2 1
Socket for 16M
3D3V_S5
SKT251 3D3V_S5
SPI_CS_ROM_N1
SPI_SO_ROM_R12
SPI_W P_ROM_R1
1

3 EVT 6
8
7 SPI_HOLD_ROM_R1
SPI_CLK_ROM_R1
3D3V_S5
Layout : SKT251 and U2503 co-lay
4 5 SPI_SI_ROM_R1

1
C2501 C2502

Eletro-XTechnical
SKT-G6179HT0321-001-GP R2501
DY

SC10U6D3V3MX-DL-GP
SCD1U16V2KX-3DLGP
62.10089.011 3D3V_S5

21
21
4K7R2J-2-GP
U2501
[18,24] SPI_CS_ROM_N1
8M

2
SPI_CS_ROM_N0 1 8
[18,24] SPI_CS_ROM_N0 7
SPI_SO_ROM R25071 2 33R2J-2-GP SPI_SO_ROM_R 2 CS# VCC SPI_HOLD_ROM_R R25701 2 15R2F-2-GP SPI_HOLD_ROM
SPI_W P_ROM R25712 1 33R2J-2-GP SPI_WP_ROM_R 3 DO/IO1 IO3 6 SPI_CLK_ROM_R R2568 1 2 33R2J-2-GP SPI_CLK_ROM
[18,24,91] SPI_SO_ROM 3D3V_S5 4 IO2 SPI_SI_ROM_R
CLK 5 R2569 1 2 33R2J-2-GP SPI_SI_ROM
GND DI/IO0
[18,24,91]SPI_CLK_ROM
W 25Q64JVSSIQ-GP
D
3D3V_S5 D
[18,24,91] SPI_SI_ROM
R2576 1 2 100KR2J-1-GP SPI_WP_ROM 072.25Q64.0H01
2nd = 072.25647.000D

1
[18,24] SPI_HOLD_ROM 2 100KR2J-1-GP SPI_HOLD_ROM
R2577 1 R2508 3rd =072.25B64.0C01
4K7R2J-2-GP 3D3V_S5
[18,24] SPI_WP_ROM
U2503

16M

2
SPI_CS_ROM_N1 1 8
SPI_SO_ROM R25091 2 33R2J-2-GP SPI_SO_ROM_R1 2 CS# VCC 7 SPI_HOLD_ROM_R1 R25741 2 15R2F-2-GP SPI_HOLD_ROM
SPI_WP_ROM R25752 1 33R2J-2-GP SPI_WP_ROM_R1 3 DO/IO1 HOLD#/RESET#/IO3 6 SPI_CLK_ROM_R1 R2572 1 2 33R2J-2-GP SPI_CLK_ROM
4 W P#/IO2 CLK 5 SPI_SI_ROM_R1 R25731 2 33R2J-2-GP SPI_SI_ROM
GND DI/IO0

W 25Q128JVSIQ-GP

072.25128.0B51
2nd =072.25127.0001
3rd =072.25128.0D61
Main Func = RTC

p
to
3D3V_RTC RTC_AUX_S5

ap
Q2507
PJA3413-1-GP
3D3V_AUX_S5
S
RTC_RST
D

sl
2 084.03413.0031
[19] RTC_DET#

2
R2502 2nd = 084.02301.0031 R2505
C VCCDSW_EN 0R2J-2-GP 4K7R2J-2-GP C

G
[24]
RTC_RST

ic
1

[18,24] RTCRST_ON
3D3V_RTC_SYS
3D3V_RTC

RTC_3P3_EN_D1
1

+RTC_VCC R2503

t
DY47KR2F-GP D2501
1

ma
2

1
C2503
BAT54C-12-GP SCD47U25V3KX-1-DL-GP

he
75.00054.A7D

2
2nd =75.00054.T7D

R2567 1 2

c
Q2501 RTCRST_ON RTC_3P3_EN_G

1 6 RTC_DET#
RTC_RST
1

/s
Note:ZZ.27002.F7C01

1
R2504 1MR2J-1-GP C2517
2 5 RTC_3P3_EN_G R2518
10MR2J-L-GP +RTC_VCC SCD022U16V2KX-3DLGP

21
100KR2J-1-GP
RTC_3P3_EN_D 3 4
2

RTC_RST RTC_RST

2
me
2N7002KDW-1-GP

75.27002.F7C

B
t. 3D3V_S5
3D3V_S5

B
//

1
R2514
10KR2J-3-GP
RTC_RST
s:

2
1
R2520 D2503
100KR2J-1-GP 1
[45] 3V_5V_POK
3
tp

RTC_RST 3V_5V_PWRGD [17,53]

2
VCCDSW_EN 2

BAT54A-11-GP
RTC_RST
ht

3D3V_S5_PCH 3D3V_VCCDSW
3D3V_S5

R2516 U2502
RTC_RST
2 1 1 5
0R3J-0-U-GP 2 VOUT VIN
3 GND 4
FLG# EN/EN#

RT9742CGJ5-GP

074.09742.0A9F
2nd =074.00524.0B9F

A A

<CoreDesiiign>

WistronCorporation
21F,,, 88,,, Sec.1,,, HsiiinTaiiiW u Rd., Hsiiichiih,,,
Taipei Hsiiien221, Taiwan, R...O...C...

Eletro-XTechnical Tittle

Flash Rev
Size DocumentNumber
A2 SA
Hellcat 14/15_ ICL
Dattte::: Tuesday,,, Septttember17, 2019 Sheet 25 offf 105
5 4 3 2 1
 5 4 3 2 1

Main Func = Thermal Sensor

PWM FAN1
Layout Note:
Signal Routing Guideline:
Trace width = 15mil

5V_S0 5V_FAN_VCC
Eletro-XTechnical
R2612
1 2 5V_FAN_VCC

0R2J-2-GP

C2604
SC4D7U6D3V3KX-DLGP

C2605
SCD1U16V2KX-3DLGP

C2603
SC2200P50V2KX-2DLGP
RB551V30-GP
D2601
3D3V_S0 3D3V_S0
DY DY

21
21

21
D D

AK
83.R5003.H8H

2
1
RN2602
SRN2K2J-1-GP
7718

3
4
Q2601
SML0_SMBDATA 6 1 CPU_SMB_SDA_THM

1
Note:ZZ.27002.F7 C0
5
[18,24,79]SML0_SMBDATA 7718 2 5V_FAN_VCC
4 3 FAN1
[18,24,79] SML0_SMBCLK 6
2N7002KDW-1-GP PW M_FAN1 4
FAN_TACH1 3
75.27002.F7C CPU_SMB_SCL_THM 2
EC2602 EC2601
2nd =075.27002.0E7C 1

SC10P50V2JN-4DLGP

SC10P50V2JN-4DLGP
[17,24] IMVP_VR_ON SML0_SMBCLK 5

21

21
ACES-CON4-29-GP

to
DY DY AFTP2604 1
[40] PURE_HW_SHUTDOW N# 20.F1639.004
020.F0097.0004
20.F1804.004

ap
FAN_TACH1 1
AFTP2601

sl
PWM_FAN1 1
AFTP2602
5V_FAN_VCC 1
[24] PW M_FAN1 3D3V_S0 AFTP2603
C C

ic
[24] FAN_TACH1

C2601
SC10U6D3V3MX-DL-GP

C2602
SCD1U16V2KX-3DLGP
1
DY

t
21
7718

ma
he
NCT7718_DXP IMVP_VR_ON
7718
THM261
C2607
SC470P50V3JN-2GP
C2606
1 8 CPU_SMB_SCL_THM
Q2603
DY

SC2200P50V2KX-2DLGP

C2608
SCD1U16V2KX-3DLGP
LMBT3904LT1G-GP B 2 VDD 7718 SCL 7 CPU_SMB_SDA_THM
7718 3 D+ SDA 6
21

c
ALERT#

21
84.T3904.H11
E C

T_CRIT# 4 D- ALERT# 5 DY

2 1
NCT7718_DXN T_CRIT# GND
2nd = 84.03904.K11

/s
2.System Sensor, Put on palm rest NCT7718W-GP
74.07718.0B9

1
R2601

me
0R2J-2-GP
Q2602
Layout Note: IMVP_VR_ON G
C2607 close THM2601
2

D PURE_HW_SHUTDOW N#

B
Layout Note:
Both DXN and DXP routing 10 mil trace width and 10 mil spacing.
t. THERM_SYS_SHDN# S

2N7002K-2-GP
84.2N702.J31
2ND =84.2N702.031
3rd = 84.07002.I31
B
//
4th =84.2N702.W31
3D3V_S0
s:

R2603 1 7718 2 7K5R2F-1-GP ALERT#

3D3V_S5
tp

R2604 1 2 7K5R2F-1-GP T_CRIT#

7718
ht

A A

<CorrreDesiiign>

WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle

THERMAL NCT7718W/Fan
Size DocumentttNumberrr Rev
A2
Hellcat 14/15_ ICL SA
Dattte::: Tuesday,,, Septttemberrr17,,, 2019 Sheettt 26 offf 106
5 4 3 2 1
 5 4 3 2 1

Main Func = Audio

[19] HDA_SDIN0_CPU

[19] HDA_SDOUT_CODEC

[19]HDA_SYNC_CODEC AUD_HP1_JACK_L
Eletro-XTechnical
moat
[19] HDA_BITCLK_CODEC

Audio Codec ChipALC3204 AUD_HP1_JACK_R

AUD_AGND
+5V_AVDD

R27031 2
5V_S0

5V_S0 +5V_PVDD Layout Note: 0R3J-0-U-GP

SC2D2U10V3KX-1DLGP-U LDO1_CAP C2706

Place close to Pin 20

C2707
SC10U6D3V3MX-DL-GP
R27011 2

C2708

C2709

SCD1U16V2KX-3DLGP
D D

C2702

1
0R5J-5-GP

1
2

21

21
R27071 C2703

R2702
100KR2J-1-GP
1D8V_CPVDD
0R5J-5-GP SC2D2U10V3KX-1DLGP-U

21

21

21
C2704

SC2D2U10V3KX-1DLGP-U
SC2D2U10V3KX-1DLGP-
SC2D2U10V3KX-1DLGP-U
[29] AUD_SPK_R+ C2705

SCD1U16V2KX-3DLGP

2
LINE1_VREFO

MIC2_VREFO
[29] AUD_SPK_R- 1D8V_S0 1D8V_CPVDD

21

21

LDO1_CAP
Analog moat

22 AUD_VREF 2
[29] AUD_SPK_L+

CPVEE
R2709 1 2 AUD_AGND

CBN
CBP
0R2J-2-GP
[29] AUD_SPK_L- AUD_AGND EC2701 1 2 SCD1U16V2KX-3DLGP
Digital EC2702 1 2 SCD1U16V2KX-3DLGP

U 26
1.8V power rail should be supplied by EC2703 1 2 SCD1U16V2KX-3DLGP

30

29

28

27

25

24

23

21
linear regulator, not awitching U2701 EC2704 12 SCD1U16V2KX-3DLGP EC2705
regulator.if switch regulator is 1 2 SCD1
unavilable, please make sure that switch U16V2KX-3DLGP

VREF

LDO1-CAP
CBP

CBN

CPVEE
CPVDD

HP-OUT-L
HP-OUT-R

MIC2-VREFO
LINE1-VREFO-L
frequency operates at out-band(over 20KHz)

R27191 2
1D8V_S0 +5V_AVDD AUD_AGND
31
0R2J-2-GP C2710 AUD_AGND AVSS2 20
NB_Mute# SC10U6D3V3MX-DL-GP
[24] LDO2_CAP AVDD1

p
32

21
2 1
AUD_AGND C2711 LDO2-CAP
SPKR SC10U6D3V3MX-DL-GP 19 AUD_AGND
[15,20]
>2A moat +3V_1D8V_AVDD 33
AVDD2
AVSS1
18 LINE1_L
R2704 1 2 0R2J-2-GP

to
AUD_AGND R2705 1 2 0R2J-2-GP
[24] BEEP +5V_PVDD 34 LINE1-L
R2706 1 2 0R2J-2-GP
+5V_PVDD PVDD1 17 1_RENLI
C2714 ALC3204

SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP
[66] AUD_SENSE LINE1-R

1
C2713 AUD_SPK_L+ 35

SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
SPK-L+ 16
QFN40 (5X5)
AUD_SPK_L- 36 V3D3_STB AUD_AGND Layout Note:

21
[29] LINE1_VREFO
SPK-L- VD33STB Tied at point only under

ap
071.03204.0003 15 MIC_CAP C2715 1 2
AUD_AGND
AUD_SPK_R- 37 MIC2-CAP Codec or near the Codec
SC10U6D3V3MX-DL-GP
[29] MIC2_VREFO SPK-R- 14 AUD_SLEEVE
AUD_SPK_R+ 38 SPK-R+ SLEEV/MIC2-R
13 AUD_RING
[29] AUD_HP1_JACK_L +5V_PVDD RING2/MIC2-L

GPIO0/DMIC-DATA12
39 PVDD2

sl
12 AUD_HPJD_N
Layout Note:

GPIO1/DMIC-CLK
[29] AUD_HP1_JACK_R C2718 HP/LINE1-JD_JD1

1
C2717 PDB_R 40 PDB
Speaker trace 11 AUD_PC_BEEP

SDATA-OUT
DVDD must >= DVDD_IO width >40mil @ 41 PCBEEP

21

LDO3-CAP

SDATA-IN
[29] LINE1_L GND

DVDD-IO

DC_DET
2W4ohm speaker

BIT-CLK
C C

SYNC
DVDD
power

ic
[29] LINE1_R 3D3V_S0 +3V_1D8V_DVDD

R2715 1 2 ALC3204-CG-GP-U Analog

moat

10
0R3J-0-U-GP +3V_1D8V_DVDD
C2741 C2740 Digital

1
+3V_1D8V_DVDD

t
SCD1U16V2KX-3DLGP

HDA_SDOUT_CODEC_R

HDA_BITCLK_CODEC_R
SC2D2U10V3KX-1DLGP-U
[29,66] AUD_SLEEVE place close to pin8

HDA_CODEC_SDIN0

HDA_SYNC_CODEC
place close to pin1

DMIC_SDA_CODEC

DMIC_SCL_CODEC
2

2
[29,66] AUD_RING +3V_1D8V_DVDD

ma

C2723
SC4D7U6D3V3KX-DLGP
C2721

C2720
SC10U6D3V3MX-DL-GP

21
SCD1U16V2KX-3DLGP

LDO3_CAP
[55] DMIC_SCL_CODEC

1
[55] DMIC_SDA_CODEC R2717

21
21
For RTC Gen9 reset circuit change power rail.

DVSS
DY 100KR2J-1-GP Open drain output.
pull up to DVDD or
20170921

he
max. 5V
[81] 1D8V_EN#

2
NB_Mute# R27121 2 PDB_R 2 0R2J-2-GP V3D3_STB
3D3V_RTC R2708 1
0R2J-2-GP C2722
SC10U6D3V3MX-DL-GP R2716 1 DY 2 100KR2J-1-GP DVSS
3D3V_S0

21
/s
AUD_SENSE R27111 2 AUD_HPJD_N
200KR2F-L-GP

me
R27101 2
+3V_1D8V_DVDD
100KR2J-1-GP

Azalia I/F EMI

B
HDA_SDOUT_CODEC
HDA_BITCLK_CODEC t.
HDA_SDIN0_CPU R27241 2 33R2J-2-GP HDA_CODEC_SDIN0 SPKR R2741 1
1KR2J-1-GP
2 HDA_SPKR_R 1
D2703

3 AUD_PC_BEEP_C
C2735
1 2 AUD_PC_BEEP
B
1

EC2709EC2710
//
SCD1U16V2KX-3DLGP
DY
SC10P50V2JN-4DLGP

HDA_SDOUT_CODEC R27221 2 HDA_SDOUT_CODEC_R R2734 1 2 KBC_BEEP_R 2

21

0R2J-2-GP BEEP
SC15P50V2JN-DL-GP

1KR2J-1-GP

1
HDA_BITCLK_CODEC R27231 2 HDA_BITCLK_CODEC_R BAT54C-12-GP
0R2J-2-GP

C2739
SC100P50V3JN-2GP
GP R2735
1KR2J-1-
75.00054.A7D D
s:

21
2
tp

Q2704 1D8V_S0
1D8V_S5
PJA3413-1-GP
ht

150mA S D
1

C2737 C2736
1

R2736 084.03413.0031
SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP
C2738
10KR2J-3-GP DY
SCD1U16V2KX-3DLGP 2

21
G

n
2

d
2

PM_SLP_S3# 1 R2740 2 Q4009_G 1 R2738 2 1D8V_EN_R# =

[81] PM_SLP_S3#
0R2J-2-GP
08
20KR2J-L2-GP 4.
1D8V_EN#
G

0
23
0
S D
1.
Q2705 0614 Layout HT 00
3
PJE8408-R1-00001-GP 1

A
084.08408.0031 A

<CoreDesiiign>

WistronCorporation
21F,,, 88,,, Sec.1,,, HsiiinTaiiiW u Rd., Hsiiichiih,,,
Taipei Hsiiien221, Taiwan, R...O...C...

Eletro-XTechnical Tittle

Audio Codec ALC3204

Size DocumentNumber Rev
A2 SA
Hellcat 14/15_ ICL
Date: Tuesday,,, Septttember 17,2019 Sheet 27 off 106
5 4 3 2 1
 5 4 3 2 1

Main Func = Audio Layout Note: Speaker CONN Pin Net name
Speaker trace width >40mil @ 2W4ohm speaker power
SPK1 Pin1 SPK_L+
7

AUD_SPK_L+ R29021 2 0R3J-0-U-GP AUD_SPK_L+_C1 Eletro-XTechnical

Pin2SPK_L-

2 0R3J-0-U-GP AUD_SPK_L-_C 2
Pin3 SPK_R-
AUD_SPK_L- R29011
AUD_SPK_R-_C 3
[27] AUD_SPK_R+
AUD_SPK_R- R29031 2 0R3J-0-U-GP
AUD_SPK_R+_C 4 MKB Pin4 SPK_R+
AUD_SPK_R+R29041 2 0R3J-0-U-GP
[27] AUD_SPK_R- SPK_ID 5
[27] AUD_SPK_L- 6
Pin5 SPK_DET#
[27] AUD_SPK_L+
D
8
Pin6 GND D

AUD_SPK_R+_C Follow CML_DIS

AUD_SPK_R-_C ACES-CON6-20-GP-U
[20] SPK_ID
AUD_SPK_L-_C 20.F1639.006 SPK_ID 1: FG

1
EC2902 EC2901 EC2903EC2904
AUD_SPK_L+_C
0: Veci

ED2902
2nd = 20.F1804.006

SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP
AZ5725-01FDR7G-GP

SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP
SPK_ID

ED2903
2

AZ5725-01FDR7G-GP

2
ED2904
ED2901

ED2905
2
DY

AZ5725-01FDR7G-GP
SPK2

AZ5725-01FDR7G-GP

AZ5725-01FDR7G-GP
2
DY 5

2
1
DY DY DY

1
2 AUD_SPK_L-_C 1 AFTP2901

1
3 Hellcat AUD_SPK_L+_C 1 AFTP2902

1
AUD_SPK_R-_C 1

1
AFTP2903

1
4

p
AUD_SPK_R+_C 1 AFTP2904
6
SPK_ID 1 AFTP2911

to
ACES-CON4-29-GP
83.05725.0A0 83.05725.0A0 83.05725.0A0
20.F1639.004
83.05725.0A0 83.05725.0A0 020.F0097.0004
20.F1804.004

ap
sl
C
From Codec C

ic
Universal Jack (Moved to I/OBoard)
RN2901
MIC2_VREFO 2 3
1 4

t
[27] MIC2_VREFO
SRN2K2J-1-GP
[27,29,66] AUD_RING

ma
AUD_RING
AUD_HP1_JACK_L R2908 1 2 10R2F-L-GP AUD_HP1_JACK_L1
[27] AUD_HP1_JACK_L LINE1_L C2907 1 2 LINE1-L_C R29221 2 1KR2J-1-GP
SC10U6D3V3MX-DL-GP
[27] LINE1_L

he
LINE1_R C2908 1 2 LINE1-L_R R29211 2 1KR2J-1-GP
[27] LINE1_R AUD_HP1_JACK_R SC10U6D3V3MX-DL-GP R29101 2 10R2F-L-GP AUD_HP1_JACK_R1
AUD_SLEEVE

[27] AUD_HP1_JACK_R D2901

c
LINE1_VREFO A K LINE1_VREFO_D1 R29121 2
AUD_SLEEVE

/s
[27,29,66] 4K7R2J-2-GP
RB520S30-GP 83.R2003.A8M
[27] LINE1_VREFO 2ND = 083.52030.008F
A K LINE1_VREFO_D2 R2913 1 2

me
RB520S30-GP D2902 4K7R2J-2-GP
83.R2003.A8M
2ND = 083.52030.008F

B To IO Board
t. B
//
s:

[27,29,66] AUD_RING
tp

[66] AUD_HP1_JACK_L1
ht

[66] AUD_HP1_JACK_R1

[27,29,66] AUD_SLEEVE

A <CoreDesiiign> A

Wistron Corporation
21F, 88, Sec.1, HsiiinTaiiiWu Rd., Hsiiichiiih,
TaiiipeiiiHsiiien221, Taiiiwan,R.O.C.

Eletro-XTechnical
Title

Audio IO
Siiize DocumentNumber Rev
A3
Hellcat 14/15_ ICL SA
Date: Tuesday, September 17, 2019 Sheet 29 of 106
5 4 3 2 1
 5 4 3 2 1

Eletro-XTechnical

D D

Main Func = USB3.0 Port1

p
to
5V_USB30_VCCA
5V_S5
2A U3502

5 1
[24,66]USB_PWR_EN# IN OUT 2
ED3502
C3507 USB_PW R_EN# 4 GND 3
EN# OC#

1
2 USB1_USB20_CON_N

SC1U10V2KX-1DLGP
Active Low

ap
SY6288DAAC-GP 3

2
074.06288.009B
R3512 1 USB1_USB20_CON_P
USB_OC0#_R 2 1 USB_OC0#

0R2J-2-GP AZ5315-02F-GP

83.05315.0A0
[16] USB_OC0#

sl
C C

ic
USB1_USB20_N 4
EL3501
3 USB1_USB20_CON_N
USB3.0Port1
[36] USB1_USB20_N USB1_USB20_P 1 2 USB1_USB20_CON_P 5V_USB30_VCCA
[36] USB1_USB20_P DLM0NSN900HY2D-GP USB3.0 Port1 Layout Note: Close USB3 USB3

068.09002.2001 1 5 USB1_USB30_RX_CON_N

t
VBUS STDA_ SSRX-
STDA_ SSRX+
6 USB1_USB30_RX_CON_P

5V_USB30_VCCA USB1_USB20_CON_N 2 8 USB1_USB30_TX_CON_N

USB1_USB20_CON_P 3 D- STDA_ SSTX- 9 USB1_USB30_TX_CON_P
2A

ma
D+ STDA_ SSTX+
10
11 10 4
12 11 GND 7
C3508 13 12 GND
C3509 C3506 13

1
C3510

1
SCD1U16V2KX-3DLGP

SC22U6D3V3MX-1-DL-GP
SC22U6D3V3MX-1-DL-GP
21
SKT-USB13-457-GP

he

SC1U10V2KX-1DLGP
2

2
C3512
R3501 R3503 Stuff for ESD R2 spec 022.10005.0ZE1
USB1_USB30_TX_P 1 2 USB1_USB30_TX_CMC_P 2 1 USB1_USB30_TX_CON_P USB1_USB30_RX_P 2 1 USB1_USB30_RX_CON_P
ED3501

m
SCD1U16V2KX-3DLGP 0R2J-2-GP 0R2J-2-GP 8
3
[16] USB1_USB30_TX_N
[16] USB1_USB30_TX_P
USB1_USB30_RX_CON_N 1 10 USB1_USB30_RX_CON_N
FILTER-4P-201-GP

c
[16] USB1_USB30_RX_N
FILTER-4P-201-GP 4 3 068.10129.2021 USB1_USB30_RX_CON_P 2 9 USB1_USB30_RX_CON_P
[16] USB1_USB30_RX_P 4 3 068.10129.2021 DY
1 2 3rd = 68.24500.201 USB1_USB30_TX_CON_N 4 7 USB1_USB30_TX_CON_N
1
DY 2 3rd = 68.24500.201 2nd = 068.01210.2031

/s
2nd = 068.01210.2031 EL3503 USB1_USB30_TX_CON_P 5 6 USB1_USB30_TX_CON_P
EL3502

C3511
R3502 R3504 AZ1043-04F-R7G-GP
USB1_USB30_TX_N 1 2 USB1_USB30_TX_CMC_N 2 1 USB1_USB30_TX_CON_N USB1_USB30_RX_N 21 USB1_USB30_RX_CON_N
075.01043.0073
SCD1U16V2KX-3DLGP 0R2J-2-GP 0R2J-2-GP
2nd = 075.08810.0A73

me
3rd = 075.73044.0003

B
t. B
//
Main Func = USB3.0 Port2
s:
tp
ht

A A

Eletro-XTechnical
<CoreDesiiign>

WistronCorporation
21F,,,88,,,Sec.1,,,Hsiiin Taiii W u Rd., Hsiiichiiih,,,
Taiiipeiii Hsiiien 221,,,Taiiiwan,,,R.O.C...

Title

USB3.0CONN
Siiize DocumentNumber Rev
A1
Hellcat 14/15_ ICL SA
Datte::: Tuesday,,, September 17, 2019 Sheet 35 offf 106
5 4 3 2 1
 5
4 3 2 1

SSID = Power Plane & Sequence

5V_S0 &3D3V_S0 5V_S0 PowerGood

[51] 1D2V_VTT_PWRGD 5V_S0 Comsumption
Peak current 5A
[17,54,55,81] PM_SLP_S3#

ROSA RunPower 3D3V_S0 3D3V_S0 Eletro-XTechnical

[45] 3V_5V_EN D4001
[26] PURE_HW_SHUTDOWN# 3D3V_S0 Comsumption 3V_5V_EN PURE_HW_SHUTDOWN#
[24] ALWON Peak current 2.5A A K
5V_S5
RB520S30-GP R4063
U4001 SC470P50V2KX-3DLGP 83.R2003.A8M 1KR2J-1-GP
SC470P50V 2XK-3DLGP R4006 2nd = 083.52030.008F
5V_S5 4 12 U4001_CT1 C40571 2 5V_S0 20KR2F-L-GP

21
VBIAS CT1 10 U4001_CT2 C40691 2 R4062
3D3V_S5 C T2 1D2V_VTT_PWRGD 1 2 VCCST_PW RGD

21
1 13
IN1#1 OUT1# 13 0R2J-2-GP
R4009 1 2 10KR2J-3-GP ALW ON
[17] SIO_SLP_S0# 2 IN1#2 OUT1# 14 148
6 IN2#6 OUT2# 8 9 C4004
D 7 D
[17,51,66] PM_SLP_S4# IN2#7 OUT2 #9 SC10U6D3V3MX-DL-GP
C4009

21
R4010
PM_SLP_S3# 1 2 3V5V_S0_ON 3 11
EN1

SC10U6D3V3MX-DL-GP
5 GND 3D3V_S0
[22,50] CORE_VID0 0R2J-2-GP EN2 15

21
[22,50] CORE_VID1 THERMAL_PAD
C4003
[17] CPU_C10_GATE#
G2898KD1U-GP

12
DY

SCD22U10V2KX-2-GP
074.02898.0093
[17,24,44,46] VCCST_PWRGD C4005

21
SC10U6D3V3MX-DL-GP

All_SYS_PWRGD

1D05V_VCCSTG_EN
R4060
CPU_C10_GATE# 1 2
3D3V_S5

p
0R2J-2-GP

C4002
R4061 U4002
DY

to
SIO_SLP_S0# U4002_B 1 SCD1U16V2KX-3DLGP
1 DY 2 5

21
A VCC B
0R2J-2-GP PM_SLP_S3#
2 GND Y

3 4 VCCSTG_EN

U74LVC1G08G-AL5-R-GP-U

ap
73.01G08.EHG
R4055
1 DY 2

0R2J-2-GP

R4056

sl
1 DY 2

0R2J-2-GP

C C

ic
1D05V_VCCST_EN
1D05V_VCCST/1D05V_VCCSTG 1D2V_VCCPLL_OC

t
75.00054.A7D
D4004
BAT54C-12-GP

ma
CORE_VID0 1

650mA 1D2V_S3 1D2V_VCCPLL_OC

3

1D05V_S5_OUT 1D05V_VCCST 1D05V_VCCSTG R4044 CORE_VID1 2

U4012 1 2

1 8 R4012 1 DY 2 0R3J-0-U-GP D01R3F-L-GP VCCST_OVERRIDE 1

he
2 IN#1 OUT#8 7
OUT#7 6
9 IN#2 3 VCCST_EN
IN#9 OUT#6
3 PM_SLP_S4# 2
VCCST_EN R4033 1 2 1D05V_VCCST_EN5V_S5 4 VBIAS 5 C4053
ON GND D4005

C4054
0R2J-2-GP

SCD1U16V2KX-3DLGP
SC10U6D3V3MX-DL-GP
C4085 C4062 BAT54C-12-GP
G5027CRD1D-GP-U 75.00054.A7D

21

21

c
SC10U6D3V3MX-DL-GP

SCD1U16V2KX-3DLGP

074.05027.0B93
21

2nd = 074.05201.0A93
21

DY
If VCCPLL_OC is powered directly from VDDQ with no
power gate, then SLP_3# should be replaced with SLP_S4# in the

/s
VCCST enable logic.

Q4004

me
4 3 VCCST_OVERRIDE_N 2 R4003 1 3D3V_S5
100KR2J-1-GP
VCCSTPW RGOOD_T CSS 2

N o t e: Z Z . 2 70 0 2
150mA [17] VCCSTPWRGOOD_TCSS
5

.F7 C0 1
VCCST_OVERRIDE 6
1D05V_S5_OUT 1D05V_VCCSTG R4001 2N7002KDW-1-GP
U4010
100KR2J-1-GP 75.27002.F7C
1
2 IN#1 OUT#8 7
8

t.

12
2 R4002 1
9 IN#2 OUT#7 6 3D3V_S5
IN#9 OUT#6 100KR2J-1-GP
C4060
1D05V_VCCSTG_EN5V_S5 3 VBIAS

1
CPU_C10_GATE#

C4059
R4034 1 2
4 ON GND 5
SC10U6D3V3MX-DL-GP
0R2J-2-GP

SCD1U16V2KX-3DLGP
B C4093 C4061 B
21
//
2
G5027CRD1D-GP-U
SC1U10V2KX-1DLGP

SCD1U16V2KX-3DLGP

074.05027.0B93
21

2nd = 074.05201.0A93
21

DY
s:
tp
ht

V-tree_VCCIO

R4015 1 DY 2 0R2J-2-GP VCCST_PW RGD

1D8V_PCH_C10/1D8V_S0 1D8V_PCH_C10_R 700mA 1D8V_PCH_C10

R4045
1D8V_S5

R4048
D01R3F-L-GP
12
D01R3F-L-GP
1 2
ICL no VCCIO C4040
DY
1

SCD1U16V2KX-3DLGP
C4071

C4070 Premium
5V_S5 Volume

21
SCD1U16V2KX-3DLGP
SC10U6D3V3MX-DL-GP
21

SC1U10V2KX-1DLGP 2DY 1C4033

SC470P50V2KX-3DLGP
U4011 SC470P50V2KX-3DLGP

1D8V_S5
4 12 U4011_CT1 C4088 1 2 3D3V_S5
VBIAS CT1 10 U4011_CT2 C4089 1 2
C T2
1D8V_S0_R 1D8V_S0

1
1 13
2 IN1#1 OUT1# 13 14 R4007 R4005
A A

SC10U6D3V3MX-DL-GP 1 2 C4008
6 IN1#2
7 IN2#6
OUT1# 14 8
OUT2# 8 9
D01R3F-L-GP
1 2
500mA DY 100KR2J-1-GP

IN2#7 OUT2 #9
1

2
C4010

Q4009_D
CPU_C10_GATE# 0R2J-2-GP 2 1 R4046 1D8V_PCH_C10_EN 3 11 C4011
SCD1U16V2KX-3DLGP

PM_SLP_S3# 0R2J-2-GP 2 1 R4054 1D8V_S0_EN 5 EN1 GND

2

EN2
SC10U6D3V3MX-DL-GP

15 2D5V_S3
21

D
THERMAL_PAD

G
Q4009
G2898KD1U-GP G PJE8408-R1-00001-GP
DY DY
074.02898.0093
1

1
C4072

C4074

R4014 D TEST_PG
S
1MR2J-1-GP
SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

DY 084.08408.0031

S
DY DY
Eletro-XTechnical
Q4010
2

<CorrreDesiiign>

PJE8408-R1-00001-GP

2
084.08408.0031
WistronCorporation
21F,,,88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiichiiih,,,
Taiiipeiii Hsiiien 221,,,Taiiiwan,,,R...O...C...

Tiittle

Power PlaneEnable
Siiize Documenttt Numberrr Rev
A1
Hellcat 14/15_ ICL SA
Datte::: Tuesday,,, Septttemberrr 17,,, 2019 Sheettt 40 offf 106
5 4 3 2 1
 5 4 3 2 1

Main Func = ADT Input

[24,44]AC_DIS

5V_S5

Eletro-XTechnical
[24] PS_ID

R4302 3D3V_S5 3D3V_S5

[24,44] HW_ACAVIN_NB 2nd = 84.03904.K11R4303
15KR2F-GP
PQ3802_1 B 10KR2J-3-GP
84.T3904.H11
Layout Note:

1
LMBT3904LT1G-GP

21

1
Q4302 D4302
PSID Layout width > 25mil

CE
PSID_DISABLE#_R_C R4304
[44,89]+DC_IN_C LBAV99LT1G-1-GP
R4309 2K2R2J-2-GP
100KR2J-1-GP 75.00099.O7D

1 2 12
2nd =75.00099.K7D

2
3
D Q4301 G D
3rd =75.00099.Q7D
PS_ID_R
[44,89]+DC_IN
D 4th =75.00099.D7D
R4305
S PS_ID_R1 1 2 PS_ID
PJA138KA-GP 084.00138.0A31
2nd = 084.00138.0C31 33R2J-2-GP
Pin Definition: TBD 90828-SA_James Remove EL4304
90828-SA_James RemoveEL4303
ED4303
AZ5725-01FDR7G-GP
83.05725.0A0
DCIN1 60ohm@100MHz
DCR=0.02 ohm Barrel Adapter Piug-in Detect

12
9
Max current = 6000mA
1

2
3
1 AFTP4301
0823 Layout HT
S1 Follow Bandon
3D3V_S5

1
R4313
4 +DC_IN 19V_AD+
200KR2F-L-GP
5 PU4301
6 +DC_IN_C 1S D 8
7 2 S D 7
8 3 S D 6

C4303
SCD01U25V2KX-3DLGP

C4306
SC10U25V5KX-DL-GP

R4316
20KR2J-L2-GP
90828-SA_James Remove EL4301 D 5 3D3V_S5
C4302

240KR3-GP
EC4302

SC1U25V3KX-1-DLGP
C4301
10 90828-SA_James RemoveEL4302
SCD1U25V2KX-1-DL-GP G R4320 C4308

1
R4307
SCD1U25V2KX-1-DL-GP
DY

21
21
AONR21321-GP

21

21

21

100KR2F-L1-GP

SC100P50V2JN-3DLGP
4
ETY-CON8-23-GP-U

21
D4301
20.F2120.008 +DC_IN

AK
P6AF24A-R1-00001-GP

21
2
083.00624.00AM

2 12
90821-SA_James change DCIN1 Connector pin Definition
084.21321.0037
Q4305 R4314

p
E R4317 U4302 10KR2J-3-GP

47KR2F-GP
Q4304
R2
C AD_OFF_L B 150KR2F-L-GP

1
R4308
90828-SA_James RemoveEC4301 AC_DIS B R1 C AD_OFF_R 5
U4302- 1

21
R1
E 2 INPUT- VC C

to
1
R2 LMUN5112T1G-GP-U U4302+ 3 GND 4 HW _ACAVIN_NB

2
R4379 INPUT+ OUTPUT
100KR2J-1-GP LMUN5212T1G-GP 084.05112.001K C4307
+DC_IN_C PS_ID_R R4319 AS331KTR-G1-GP
84.05212.B11 15KR2F-GP
DY

SC100P50V2JN-3DLGP
74.00331.H2F

21 2 1

21
90828-SA_James Remove R4311
EC4312
90828-SA_James Remove R4315

1
EC4313 EC4311

ap
90828-SA_James RemoveD4308
DY DY
SC1KP50V2KX-1DLGP

SCD1U25V2KX-1-DL- GP

SCD1U25V2KX-1-DL- GP
2

2
If=0.3A

sl
JGND JGND

C AFTP4303 1 +DC_IN_C C
PS_ID_R

ic
AFTP4304 1

t
ma
c he
/s
me
B
t. B
//
s:
tp
ht

[24,44] PBAT_CHG_SMBCLK

[24,44] PBAT_CHG_SMBDAT
Main Func = M-BAT Input Placement: Close to Batt Connector
[24,44]PBAT_PRES#

Batt Connecter
PBAT_PRES#

PBAT_CHG_SMBDAT

PBAT_CHG_SMBCLK
BT+

DY EC4307 D4307
EC4308
SCD1U50V3KX-GP SC1KP50V2KX-1DLGP DY SMF18A-GP
3

3
21
21

D4304 D4305 D4306

AK

BATT1 LBAV99LT1G-1-GP LBAV99LT1G-1-GP LBAV99LT1G-1-GP

11 75.00099.O7D 75.00099.O7D 75.00099.O7D
1
A RN4302 A
1

2
SRN100J-3-GP 2
3
PBAT_CHG_SMBCLK 2 3 PBAT_SMBCLK1 4
PBAT_CHG_SMBDAT 1 4 PBAT_SMBDAT1 5
PBAT_PRES# PBAT_PRES1# 3D3V_S5_KBC
6
1 R4301 2 SYS_PRES1# 7
1 2 0R2J-2-GP 8
9
2nd =75.00099.K7D 2nd =75.00099.K7D 2nd =75.00099.K7D
R4310
100R2J-2-GP 10 3rd =75.00099.Q7D 3rd =75.00099.Q7D 3rd =75.00099.Q7D
12
EC4309 EC4310 EC4306 4th =75.00099.D7D 4th =75.00099.D7D 4th =75.00099.D7D
ETY-CON10-33-GP
SC10P50V2JN-4DLGP

SC10P50V2JN-4DLGP

SC10P50V2JN-4DLGP

Eletro-XTechnical
<CorrreDesiiign>
21

21

21

020.F0667.0010
DY DY DY 1 AFTP4306
1
1
AFTP4307
AFTP4308
Wistron Corporation
21F,,,88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiichiiih,,,
Taiiipeiii Hsiiien 221,,,Taiiiwan,,,R...O...C...
PBAT_PRES1# 1 AFTP4309
PBAT_SMBDAT1 1 AFTP4310
PBAT_SMBCLK1 1 AFTP4311 Tiittle
BT+ 1
BT+ 1
AFTP4312
AFTP4313
Documenttt Numberrr
DCIN
BT+ 1 AFTP4314 Siize Rev
SYS_PRES1# 1 AFTP4315
A1 Hellcat 14/15_ ICL SA
Dattte:::Tuesday,,, Septtemberrr 17,,,2019 Sheettt43 offf 106

5 4 3 2 1
 5 4 3 2 1

Main Func = Charger

OFFPAGE ISL9538C For Charger

Eletro-XTechnical
EE needs check it!! 19V_DCBATOUT
19V_AD+ +SDC_IN 20V_DCBATOUT

[24,43]PBAT_CHG_SMBDAT
PBAT_CHG_SMBDAT
I2C form EC
S2 PR4401
D01R6F-1-GP
12

PC4406PC4407PC4408PC4409 PC4410PC4411PC4412PC4413 PC4414 PC4442

PBAT_CHG_SMBCLK PC4469 PC4401 PG4401 PG4402 PC4402 PC4403 PC4404 PC4405
[24,43] PBAT_CHG_SMBCLK PU4415 PR4468 PR4466 DY

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP
AONR21321-GP DY

SC10U25V5KX-DL-GP

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SCD1U25V2KX-1-DL-GP
8D S 1 100KR2F-L1-GP

21

21

21

21

21

21

21

21

21

21
SC1500P50V2KX-2-DL-GP
100KR2J-1-GP

S
7D S 2

21

21

21

21

21
21

21

21
HW_ACAV_IN 6D S 3 G PWR_ADP_19V_E
[24,64]HW_ACAV_IN 5D
G PQ4451

PWR_CHG_CSIP_R

PWR_CHG_CSIN_R
21
To EC SM2421PSANC-TRG-GP
084.02421.0031

21
4
D [17]AC_IN# D

1
PR4422 PR4423
084.21321.0037 PWR_ADP_19V_F 1R2F-GP 1R2F-GP
PR4465
[24,43]AC_DIS PWR_ADP_19V_G 1 2
0R2J-2-GP

2
ISL9538 AMON/ BMON to EC PC4415
[24]AD_IA 1 PR4494 2 PWR_CHG_IMON 0R0402- 21
PAD-1-GP
PR4467 SC4D7U25V5KX-DL-GP
PBAT_PRES# 10KR2F-2-GP
[24,43] PBAT_PRES#
PC4416 PC4417

5
6
7
8
SC1U25V2KX-4-GP SC1U25V2KX-4-GP

D5
PR4464

D
D
D
PU4405
084.07380.0037 084.07380.0037

21
21

D
D
D
D
100KR2F-L1-GP PU4403

PWR_ADP_19V_A 21
AON7380-GP
AON7380-GP

21
VCCPD_VBUS_ACK
[74]VCCPD_VBUS_ACK
4 4

G
G

1 S
2 S
3 S
8

7
6
S
S
S
From NXP ACK +SDC_IN

3
2
1
PQ4452 TP4401
TPAD14-OP-GP PC4436 DCR=8 mm ~9m Oh m,
[24,43]HW_ACAVIN_NB 3 4 SCD22U25V3KX-DL-GP Idc=13A, Isat=16A
2 1 PWR_CHG_BT1_R 2 1
AC_DIS 2 5HW_ACAVIN_NB 10 . 0 mm x 11 . 5mm x 3 . 0 mm

1
PR4402
6 DC_IN_OFF

Note:ZZ

2.F7C01
1 2D2R3-1-U-GP

.2700
PL4401
1 2
2N7002KDW-1-GP IND-2D2UH-447-GP
+SDC_IN 75.27002.F7C 068.2R210.2351
2nd= 075.27002.0E7C
PD4407
RB520S30-GP

5
6
7
8

D5
D
D
D
PWR_CHG_PHASE1

D
D
PWR_CHG_ASGATE

PW R_CHG_UGATE

084.07380.0037

084.07380.0037
D
PU4404 PU4406

p
AK

PW R_CHG_BOOT
[3,22,24,46]PROCHOT#_CPU AON7380-GP AON7380-GP

D
PWR_CHG_CSI
19V_DCBATOUT
83.R2003.A8M
PWR_CHG_LGATE1 4 DY PR4416 4

PWR_CHG_DCIN_R
2ND = 083.52030.008 F 2D2R5J-1-GP

G
G
15 PWR_CHG_CSIP

1 S
2 S
3 S
8

7
6
PD4401

to
S
S
PR4403

3
2
1
AK
[24,79] DGPUHOT#

1
2 1
+SDC_IN

1PWR_CHG_SNB 2 1
RB520S30-GP
83.R2003.A8M 10R5J-GP PC4419
2 ND = 083.52030.008F PU4401

10
16
SC4D7U25V3KX-GP

21

N 13
CSI 14

ASGAT 12

E 11
PR4405 VDD
4D7R2F-GP

PHASE 9
1

CSIP
ADP

BOOT1
PWR_CHG_VDDP 12

1LGATE1
UGATE

ap
PR4404 PC4421
402KR2F-GP SC4D7U10V3KX-DL-GP DY PC4435
SC1KP50V2KX-1DLGP
8 PWR_CHG_VDDP 12

1
PC4422 PWR_CHG_DCIN 17
SC4D7U10V3KX-DL-GP
2

DCIN VDDP
[46]CHGR_PSYS_IMVP

21
18 7 PWR_CHG_LGATE2
VDD LGATE2
PWR_CHG_ACIN 19 6PWR_CHG_PHASE2
ACIN PHASE2 PR4408 PC4423
ISL9538CHRTZ-T-GP
PWR_CHG_OTGEN 20 5 PWR_CHG_UGATE2 2D2R3-1-U-GP SCD22U25V3KX-DL-GP
[17,46] PWR_IMVP_PWRGD CMIN

sl
074.09538.M500 UGATE2
[17,24,40,46] VCCST_PWRGD 21 4 PWR_CHG_BOOT2 2 1PWR_CHG_BT2_R 1 2 PC4424

2
C SDA BOOT2 SC1U25V2KX-4-GP C
PR4406 PR4417
PC4420 100KR2F-L1-GP 100KR1F-GP 22 3 12 PG4405
SCD1U25V2KX-1-DL-GP SCL VSYS DY PR4424 GAP-CLOSE-PW R-3-GP
21
12

23 2 PWR_CHG_CSOP PC4439 21PWR_CHG_CSOP_R 21

CSOP SC1U25V2KX-4-GP
1
PROCHOT#
[43,89]+DC_IN 1R2F-GP
PWR_CHG_ACOK 24 1 PWR_CHG_CSON 21
ACOK CSON PC4425 PR4407

AMON/BMO
SC1U25V2KX-4-GP D005RL3720F-1-GP

ic
BATGONE

CMOUT
33

21
T E
GND

PSY

T GA

21
PR

29 COM

32 NVBA
2 PR4425 1PWR_CHG_CSON_R 21

28 G

B
BT+

30 P

31 S
PU4412
E3 1 2 1R2F-GP

27
25

26
PBAT_CHG_SMBDAT PG4406 AONR21307-GP
DY GAP-CLOSE-PW R-3-GP PWR_CHG_VBATIN 1 S D8
[66]PWR_CHG_VBATIN PBAT_CHG_SMBCLK PC4426 2 S D7
SC1U25V2KX-4-GP 3 S D6
D5

PW R_CHG_BATGON

PWR_CHG_VBAT1
PWR_CHG_PROCHOT#

PWR_CHG_BGATE
PWR_CHG_OTGP
PC4427 PC4428

PWR_CHG_COMP

t
PWR_CHG_PSYS
PWR_CHG_PROG

PWR_CHG_AMO
G

SC10U25V5KX-DL-GP

SC10U25V5KX-DL-GP

4
PC4429

21

21
084.21307.0037

SC4700P50V2KX-1DLGP
ma

21
G

N
VDD VDD

E
PR4409
90815-SA_James add PR4430 PBAT_PRES# 21 PC4440 SC1U25V3KX-
1-DLGP
1

[22]VRALERT#_R 1PR4430 2PWR_CHG_PROCHOT# PR4427 PR4429 21

100KR1F-GP
0R0402-PAD-1-GP 100KR2F-L1-GP 100KR2F-L1-GP TP4402 1
TPAD14-OP-GP
PR4478
PC4430

he
1100R1F-GP 2
2

PQ4415 SC10P50V2JN-4DLGP

21
PR4413
#
ACOK

4 3 21
12

2 0R0402-PAD-1-GP
HW_ACAV_IN 5 2 PR4410
PG4408 13K7R2F-GP
GAP-CLOSE-PWR-3-GP 105KR1F-GP PR4442 1 2 CHGR_PSYS_IMVP
AC_IN# 61

PR4412
1

0R1J-GP

1
PR4426

c
2N7002KDW-1-GP
196KR2F-GP
75.27002.F7C PWR_CHG_IMON
2

2nd = 075.27002.0E7 C
20V_VCCPD_VBUS +DC_IN

+3D3V_VDD_DCIN

/s
PC4432
SC1KP50V2KX-1DLGP

21

1
PD44C1
BAT54C-12-GP
75.00054.A7D PQ44D1
2 nd = 75.00054.T7D PU44C1 +3D3V_VDD_+SDC_IN Gen 11 AO3409-1-GP Gen 11

1
PR44D4
PR4411 PU44C1_VIN 20V>+DC_IN>4.7V 1 PR44D0

me
499R2F-2-GP 5 VCCST_PW RGD 2 1 OVP_VR_EN OVP_VR_EN_A 2 1 VCORE_OVP_+A
OUT S Gen 11 D
2 VIN

13
PC4433 3 GND 4 0R2J-2-GP 0R2J-2-GP
0523 EN ADJ
2

PR44C7 PC44C3
SC1KP50V2KX-1DLGP DY PWR_CHG_COMP_R PR44C2 PC44C2

PU44C1_ADJ
13K3R2F-L1-GP SC10U25V3MX-5-GP PR44D2
21

AP2204K-ADJTRG1-GP R1 16K9R2F-GP SC2D2U10V3KX-1DLGP-U

PC44D1 Gen114K99R2F-L-GP

21

G
74.02204.03F

21

12
Gen 11

SCD1U25V2KX-1-DL-GP
PQ4402 PC4431

21
B B
GPWR_CHG_PROCHOT#_R SCD01U25V2KX-3DLGP PR44D6

t. OVP_VR_EN_G 0R2J-2-GP
21

PR44C4 2 Gen101
DGPUHOT# D PU44C1_EN 1 2 PU44C1_EN_R Vout=1.24*(1+(R1/R2))
PU 3 V3 _AON_S0 on GPU side S PR44C3 PR44D5
100KR2F-L1-GP R2 10KR2F-2-GP VCORE_OVP_OUT
OPS PR44C1 PC44C1 Gen 11 1KR2F-3-GP

212 1
2N7002K-2-GP 10KR2F-2-GP DY SC100P50V2JN-3DLGP

21
OVP_VR_EN_G_A

21
84.2N702.J31 Gen11PR44D1

21
200KR2F-L-GP
//
2ND= 84.2N702.031 +3D3V_VDD_+SDC_IN VDD
3rd=84.07002.I31

Vcore_OVP

21

4
CPU_Core
PQ44D0
PC44D0

1
1
1V_CPU_CORE PR44A7 DY 0R2J-2-GP
PR44A8 2N7002KDW-1-GP
0R2J-2-GP G1en112 75.27002.F7C

3
PR44D3 PR44D9
SCD22U25V3KX-DL-GP 0R2J-2-GP

2
0R2J-2-GP

2
PWR_IMVP_PWRGD 1 2OVP_PCH_PWROK

1
VCORE_OVP_PWR PWR_CHG_ACIN_A 2 1PWR_CHG_ACIN
s:

PR44A6
DY

1
Gen100R2J-2-GP Gen 11
PU +VCCSTG = 1.0 V on CPU side 3D3V_S5
3D3V_S5 PROCHOT#_CPU Gen10PR44D7
0R2J-2-GP
VCORE_OVP_+A PR44A2

12
200KR2F-L-GP

2
PR44A0 +SDC_IN PR44A4
1

PU44A1 10KR2F-2-GP OVP_PCH_PWROK_G

21
PR4435
tp

205KR2F-GP
PR4472 PQ4416 100KR1F-GP VCORE_OVP_- 1
5

21
100KR1F-GP 2 INPUT- VCC

2
4 3
VCORE_OVP_+ 3 GND 4 VCORE_OVP_OUT
2
21

PWR_CHG_PROCHOT# INPUT+ OUTPUT

5 2
PWR_CHG_PROCHOT#_R AS331KTR-G1-GP
Note:ZZ

2.F7C01

6 1
.2700

PC44A9 PC44A1
PR44A1 PR44A3 74.00331.H2F

SC100P50V2JN-3DLGP
2N7002KDW-1-GP

SC100P50V2JN-3DLGP
PD44A1

100KR2F-L1-GP

75KR2F-GP
ht

KA

21

21
75.27002.F7C
CHECK EE

21

21
2 nd = 075.27002.0E7C L1SS355T1G-GP

19V_AD+ follow custormer circuits. 83.00355.G1F

TypeC Prochot
- GP
100KR1F
PR4473
1

Follow custormer circuits.

2

PROCHOT#_CPU

PROCHOT#_CPU
3D3V_S5 PR4436 DY
1MR1J-GP
21

A A
PR4431 PQ4418
CE PQ4408_E

TypeC_F 100KR1F-GP PD4404

KA PD4403_A B PQ4408
PQ4405
21

3 4 MMBT3906FN3-GP-U
D2 S2 1SS355VMTE-17-GP 84.03906.010
PQ4418_2 2 TypeC_F5 PQ4418_5 83.00355.H1F 3 4
G1 G2 D2 S2
1 6 PQ4405_2 2 5 PQ4405_5
PQ4417 S1 D1 PC4449 G1 G2
SSM3K35AMFV-GP PC4438
TypeC_F 1 6
1

SCD1U16V2KX-3DLGP

084.03K35.0031 PR4499 NTZD3154N5G-2-GP

21

SCD1U16V2KX-3DLGP

S1 D1
0R1J-GPDY 75.03154.07C
21
1

D S 19V_DCBATOUT PR4475 PR4463 NTZD3154N5G-2-GP

PQ4418_6

T ypeC_F 680KR1F-GP 0R1J-GPDY 75.03154.07C

2

PQ4405_6

TypeC_F
<CorrreDesssiign>
2

2
PWR_CHG_ACOK

PR4497
PR4432
PWR_CHG_ACOK

100KR1F-GP
2

10KR1F-GP PR4474
G

3D3V_S5 TypeC_F PR4450 WistronCorporation

12

100KR1F-GP
10KR1F-GP 21F,,,88,Seccc..1,,HsssiinTaiiWuRd..,,Hsssiccchih,,
21

3D3V_S5 Taiiipeiii Hsssiien221,,,Taiiwan,,,R...O...C...

1
21

VCCPD_VBUS_ACK
Tiittle

Power (Charger_ISL9538) Revvv

SiizzzeDoccumenttNumberrr
Cusssom SA
MOCKIIINGBIIIRD_IIICL

Eletro-XTechnical
Datte:::Tuesssdayyy,,,Septtemberrr17,,,2019 Sheett 44off106f
5 4 3 2 1
 5 4 3 2 1

SSID = PWR.Plane.Regulator_5V

OFFPAGE-Signal OFFPAGE-GAP SY8288C For 5V Eletro-XTechnical

PR4559
1 2 PW R_5V_EN
[40,45] 3V_5V_EN
0R2J-2-GP
D D

PH on EE Side 19V_DCBATOUT PU4551

9 PW R_5V_PG
PR4561 2 PG
1 2 PW R_5V_PG IN#2 Cyntec.6.8x7.3x 3.0mm
[25,45] 3V_5V_POK
0R2J-2-GP PC4552 PC4554PC4555
3

4
IN#3 BS
1 PW R_5V_BOOT 1
PR4554
2PW R_5V_BOOT_A 1 2 DCR:14~15mOhm
Idc : 9A , Isat :18A
Designcurrent:7A
0R0603-PAD-1-GP-U PC4553
DY DY

SCD1U25V2KX-1-DL-GP

SC10U25V5KX-DL-GP

SC10U25V5KX-DL-GP
IN#4

21

21

21
SCD1U25V2KX-1-DL-GP PL4551
5 IND-1D5UH-53-GP-U 5V_S5
IN#5
6 PW R_5V_PH
LX#6 1 2
PW R_5V_PG 10 19
NC#10 LX#19 DY DY
20 PC4556PC4557 PC4558 PC4559 PC4560 PC4561
16 LX#20
NC#16 Traceused10mil PC4565
PG4562 DY

SCD1U16V2KX-3DLGP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP
GAP-CLOSE-PWR-3-GP

21

21

21

21

21

21
21
14 PW R_5V_VOUT 12
PW R_5V_VCC 17 OUT

p
VCC
PC4562
13 PW R_5V_FB

1
SC2D2U10V3KX-1DLGP-U 1 2PW R_5V_FB_A2 1
FF

to
PR4555
PW R_5V_EN 12 PC4563
EN1 1KR2F-3-GP

2
SC1KP50V2KX-1DLGP
PW R_5V_EN2 11 15 PW R_5V_LDO
EN2 LDO
For2celluse

ap
PR4556 PC4551

GND

GND

GND

GND
1MR2J-1-GP SC4D7U6D3V3KX-DLGP

21
SY8288CRAC-GP

2
1

18

21
PR4557 074.08288.0B43
499KR2F-1-GP

sl
19V_DCBATOUT 1 2

C PR4558 PC4564 DY C
PW R_5V_FB

12
499KR2F-1-GP

ic
SCD1U25V2KX-1-DL-GP

2
1
PR4551
DY348KR2F-GP

t 2
1
EN rating25V

ma
EN Rising Threshold: 0.8V

Ilimt : 8A

he
SSID = PWR.Plane.Regulator_3D3V
TPS 51393For 3D3V

c
/s
OFFPAGE-Signal OFFPAGE-GAP

me
19V_DCBATOUT PW R_DCBATOUT_3D3V
PR4501 PC4506
PG4515 0R0603-PAD-1-GP-U SCD1U25V2KX-1-DL-GP
PR4560 PW R_3D3V_BOOT 2 1 PW R_3D3V_BOOT_A 2 1
1 2 PW R_3D3V_EN GAP-CLOSE-PW R-3-GP
1 2

B
[40,45] 3V_5V_EN
0R2J-2-GP
PG4516
GAP-CLOSE-PWR-3-GP
1 2
t. VinOperatingrange: 4.5V~24V
Vin_Max:26V
PW R_3D3V_VCC

PC4522
SC2D2U10V3KX-1DLGP-U
Cyntec.6.8x7.3x 3.0mm
DCR:14~15mOhm
Idc : 9A , Isat :18A Design Current :8A B

21
PH on EE Side

17
//
PW R_DCBATOUT_3D3V PU4501 3D3V_S5
PR4562 PL4501
PG4517
1 2 PW R_3D3V_PG

VCC
GAP-CLOSE-PWR-3-GP 2 6 PW R_3D3V_PH 1 2
[25,45] 3V_5V_POK 1 2 3 VIN SW #6 19
0R2J-2-GP PC4502 PC4503 4 VIN SW #19 20 IND-1D5UH-23-GP-U
PC4501 5 VIN SW #20 PW R_3D3V_LDO
s:
SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

VIN

1
PG4518 10 PC4509PC4510PC4511PC4513 PC4512
SCD1U25V2KX-1-DL-GP

1
NC#10 15 PW R_3D3V_LDO DY
21

21

21

GAP-CLOSE-PWR-3-GP PW R_3D3V_EN 12 DY

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP
1 2 PW R_3D3V_EN211 EN LDO 16
ENLDO NC#16

2
PR4514 PW R_3D3V_BOOT1

1
BOOT 7 PC4507
tp

PW R_3D3V_PG 9

1MR2J-1-GP

1
PW R_3D3V_FB13 PGOOD GND 8 SC4D7U6D3V3KX-DLGP
14 FB GND 18
VOUT

2
GND 21
GND
2
ht

TPS51393PRJER-GP
074.51393.0A43
Placeanotherside , makeGND plan bigger
ClosetoPC4511
19V_DCBATOUT Traceused10mil PG4530
GAP-CLOSE-PWR-3-GP
PW R_3D3V_VOUT 1 2
1

PR4509
PC4526 PR4506
300KR2J-GP 1 2
12 PW R_3D3V_FB2
2

EN rating:5.5V 240KR2F-L-GP
SC470P50V2KX-3DLGP
EN Rising Threshold :1.5V
EN Falling Threshold:0.4V
1

PR4508
100KR2J-1-GP
A A
2

DY PR4505
100KR2J-1-GP
3D3V_AUX_S5 1 2 <CorrreDesiiign>
3D3V_AUX_S5
PG4532
GAP-CLOSE-PW R-3-GP WistronCorporation
2 1 PW R_3D3V_LDO 21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical
Tiitttlle
POWER (SY8288_5V/3D3V)
Size DocumentttNumberrr Rev
A2 SA
Hellcat 14/15_ ICL
Datte:: Tuesday,, Septemberr 17,, 2019 Sheett 45 off 105

5 4 3 2 1
 5 4 3 2 1

Main Func = CPU_CORE 1D05V_VCCST

OFFPAGE
SVID Eletro-XTechnical

6
PR460
5
PR460
4
PR460
PR4632
0R0402-PAD-1-GP

1
1 2 PW R_VCORE_SCLK_R
[7] SVID_CLK_CPU
DY
PR4633
0R0402-PAD-1-GP

2
1
2
1
2
1 2 PW R_VCORE_SDIO_R
[7] SVID_DATA_CPU

45D3R2F-L-GP
75R2F-2-GP
100R2F-L1-GP-U
D D

PR4634
-1D-GP
0R0402-PA
1 2 PW R_VCORE_ALERT#_R 1D05V_VCCSTG_TERM
[7] SVID_ALERT#_CPU
PW R_VCORE_SCLK_R
PW R_VCORE_ALERT#_R

PW R_VCORE_SDIO_R

1
PR4603
DY 1KR2F-3-GP

4
PR462
3
PR462
2
PR462
2
5V_S5
PR4607
100R2F-L1-GP-U
1 2

1
PW R_VCORE_VRHOT_R
PR4617
0R2J-2-GP

p
PR4601

2
1
2
1
2

2
1
3D3V_S0 2 1
19V_DCBATOUT
PR4631 0R2J-2-GP

10R2F-L-GP
49D9R2F-GP
0R0402-PAD-1-GP

to
0R0402-PAD-1-GP
1 2 PW R_VCORE_VRHOT_R

1
[3,22,24,44]PROCHOT#_CPU PC4613 12
PR4609
10KR2J-3-GP SC1U10V2KX-1DLGP

2 1
PC4601 SCD22U25V2KX-4-GP

ap
CHGR_PSYS_IMVP PW R_VCORE_VR_READY
[44] CHGR_PSYS_IMVP
PC4612
SC4700P50V2KX-1DLGP

PW R_VCORE_ALERT#
PR4636

PWR_VCORE_VRHOT
PW R_VCORE_VR_EN

PWR_VCORE_SDIO
0R0402-PAD-1-GP 12

PWR_VCORE_VIN
1 2 PW R_VCORE_VR_READY
PROG1

27 PWR_VCORE_VDD
sl
7,44] PW R_IMVP_PWRGD

PWR_VCORE_SCLK
PR4602 VBOOT:1.8V
PR4635 12K1R2F-L1-GP
0R0402-PAD-1-GP 1 DY 2 F=750kHz
1 2 PW R_VCORE_VR_EN C
,C24,40,44] VCCST_PW RGD

1
PR4619 PR4620

ic
9K31R2F-GP 9K31R2F-GP
PC4609

26
25
33

32
VR_READY 30 31

SCK 29
ALERT# 28
VCORE SENSE SC330P50V2KX-3-DL-GP PU4601

2
12

VDD
VR_ENABLE

SDA
GND

VR_HOT#

VIN
t
PR4608
VSSCORE_SENSE CHGR_PSYS_IMVP 1 24 PW R_VCORE_PROG1 PC4610
[7] VSSCORE_SENSE 93K1R2F-L-GP
1 2 PW R_VCORE_IMON 2 PSYS PW PROG1 23 PW R_VCORE_PROG2 PR4621 SCD22U25V2KX-4-GP

ma
R_VCORE_NTC 3 IMON PROG2 22 PW R_VCORE_BOOT1 1 2 PW R_VCORE_BOOT1_N 1 2
PW R_VCORE_COMP 4 NTC ISL95869HRTZ-T-GP BOOT1 21 PW R_VCORE_UGATE1 0R3F-1-GP-U
VCCCORE_SENSE PW R_VCORE_FB 5 COMP 074.95869.0073 UGATE1 20 PW R_VCORE_PHASE1
[7] VCCCORE_SENSE PW R_VCORE_RTN 6 FB PHASE1 19 PW R_VCORE_LGATE1
PW R_VCORE_ISUMN1 7 RTN LGATE1 18 PR4625
8 ISUMN PW M3 17 PW R_VCORE_VDDP 2 1

he
ISUMP VDDP 5V_S5
1

PR4616 0R2J-2-GP
10KR2F-2-GP

PHASE2
UGATE2

LGATE2
BOOT2
ISEN1
ISEN2
ISEN3
FCCM
PC4625
SC1U10V2KX-1DLGP
2

21
16
9
10
11
12
13
4
15
PW R_VCORE_NTC_N

/s
B=4500

PW R_VCORE_UGATE2
PWR_VCORE_PHASE2
PWR_VCORE_LGATE2
PWR_VCORE_BOOT2
PW R_VCORE_UGATE1 PR4618
1

[47] PW R_VCORE_UGATE1
NTC-470K-17-GP
069.60012.0001
2

me
PW R_VCORE_PHASE1 PR4655
[47] PW R_VCORE_PHASE1
27K4R2F-GP
PW R_VCORE_LGATE1
[47] PW R_VCORE_LGATE1
1

B
[47]

[47]
PW R_VCORE_UGATE2

PW R_VCORE_PHASE2
PW R_VCORE_UGATE2

PW R_VCORE_PHASE2
t. 1
PR4611
2 PW R_VCORE_BOOT2_N 1 2

0R3F-1-GP-U PC4611
B
//
PW R_VCORE_LGATE2 SCD22U25V2KX-4-GP
[47] PW R_VCORE_LGATE2
1

PR4615
1K3R2F-1-GP
5V_S5
PW R_VCORE_ISEN2 PW R_VCORE_ISEN2
s:

[47] PW R_VCORE_ISEN2
PC4608
PW R_VCORE_ISEN1
SC82P50V2JN-3-DL-GP

[47] PW R_VCORE_ISEN1 PW R_VCORE_ISEN1

PW R_VCORE_ISUMP
21

[47] PW R_VCORE_ISUMP
2 1 PWR_VCORE_COMP_N 2

PW R_VCORE_ISUMN PW R_VCORE_ISUMP
tp

[47] PW R_VCORE_ISUMN
1

1
PR4614 PR4613 PR4612
2KR2F-3-GP DY 392R2F-GP PC4614 PC4618 PR4653
2K87R2F-1-GP

1 PR4629 2PWR_VCORE_ISUMP_N PC4602 2K61R2F-1-GP

SCD022U16V2KX-3DLGP

SCD022U16V2KX-3DLGP

1
1
PC4607 PC4623 PR4630

SCD1U16V2KX-3DLGP
VCCCORE_SENSE 0R2J-2-GP
ht

21

21
PR4628 11KR2F-L-GP
SCD01U25V2KX-3DLGP

PWR_VCORE_FB42

1 2 PW R_VCORE_ISUMN_N 1 2 PC4616 PW R_VCORE_ISUMNP_2

2
2

22
SCD022U16V2KX-3DLGP

2
21
SC2200P50V2KX-2DLGP 3K48R2F-GP
2 1PWR_VCORE_FB22
2 1PWR_VCORE_FB12

PR4667
0R0402-PAD-1-GP PR4650

PR4640
NTC-10K-29-GP-U
69.60011.201
B=3370
1

100R2F-L1-GP-U
1 2 PR4627
PC4604 1V_CPU_CORE
SC820P50V2KX-1-DL-GP 511R2F-2-GP

1
PC4606 1 2 PW R_VCORE_ISUMN
SC330P50V2KX-3-DL-GP PR4665 PC4615 PR4666
0R0402-PAD-1-GP PC4603
DY 1 2 PW R_VCORE_FB3
SCD01U25V2KX-3DLGP
1 2 VSSCORE_SENSE
2 DY 1 SCD01U16V2KX-3DLGP

21
0R2J-2-GP

PC4638
PC4605 PR4626
SC330P50V2KX-3-DL-GP

SC330P50V2KX-3-DL-GP 100R2F-L1-GP-U
21

21

2
1

A A

<CorrreDesiiign>

Wistron Corporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,, Hsiiichiih,,,
TaiiipeiiiHsiiien221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle
POWER (95829_CPUCORE(1/3))
DocumentttNumberrr
Siiize Rev
A2 Hellcat 14/15_ ICL SA
Dattte:::Tuesday,,, Septttemberrr 17,,, 2019 Sheettt 46 offf 106

5 4 3 2 1
 5 4 3 2 1

Main Func = VCCIN

19V_DCBATOUT PW R_DCBATOUT_VCOREA PW R_DCBATOUT_VCOREA

OFFPAGE
Eletro-XTechnical
PL4703
1 2
BLM21PG220SN1DGP PC4702 PC4703 PC4704PC4705 PC4706
68.00084.831

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SCD1U25V2KX-1-DL-GP
PW R_VCORE_UGATE1

21

21

21

21

21
[46] PW R_VCORE_UGATE1
PW R_VCORE_PHASE1
[46]

[46]
PW R_VCORE_PHASE1

PW R_VCORE_LGATE1
PWR_VCORE_LGATE1 1
PL4704
2
BLM21PG220SN1DGP
ICL_U42 15W
D
68.00084.831
Performance D

[46] PW R_VCORE_UGATE2
PW R_VCORE_UGATE2

PW R_VCORE_PHASE2
TDC=39A
[46]

[46]
PW R_VCORE_PHASE2

PW R_VCORE_LGATE2
PW R_VCORE_LGATE2 PW R_VCORE_LGATE1 ICCMAX=70A
Cyntec 6.8mmx7.6mmx3.0mm 1V_CPU_CORE
DCR: 0.9m ohm +/-7%
PW R_VCORE_ISEN2
Idc : 38A , Isat : 45A

10
[46] PW R_VCORE_ISEN2 PU4701
PW R_VCORE_ISEN1 S2
PL4701
[46] PW R_VCORE_ISEN1 PW R_VCORE_UGATE1 1 G1 G2 8 IND-D15UH-33-GP
PW R_VCORE_ISUMP
[46] PW R_VCORE_ISUMP Q1
Q2
PW R_VCORE_PHASE1 2 S1/D2 D2/S1 7 PW R_VCORE_PHASE1 1 2
PW R_VCORE_ISUMN
[46] PW R_VCORE_ISUMN
3 D1 D2/S1 6 068.R1510.1171
4 D1 D2/S1 5

1
PW R_DCBATOUT_VCOREA

DY PR4705

p
D1
PT4701
AOE6932-GP 2D2R6J-3-GP SE330U2D5VDM-2GP

21
PG4711 PG4712
075.06932.0A73 79.3371V.2PL

2
to
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP

12
1 2
PW R_VCORE_SNB1

1
PC4710
DY SC1KP50V2KX-1DLGP

PWR_VCORE_ISUMP_GA
ap
2
PW R_VCORE_ISUMN_GA

sl
PW R_VCORE_ISEN1 1 2

PR4721 PR4722
100KR2F-L1-GP PR4709 100KR2F-L1-GP
C
PW R_VCORE_ISUMP 1
10R2F-L-GP DY C
2

ic

2
1

2
1
PR4708
3K65R2F-1-GP
PW R_VCORE_ISUMN

t
PW R_DCBATOUT_VCOREA PW R_VCORE_ISEN2

ma
PC4717 PC4714 PC4716PC4715 PC4718
SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SCD1U25V2KX-1-DL-GP
2 1

2 1

2 1

2 1

2 1

c he
/s
Cyntec 6.8mmx7.6mmx3.0mm
DCR: 0.9m ohm +/-7%
Idc : 38A , Isat : 45A

10
1V_CPU_CORE
PU4702
S2
PL4702

me
PW R_VCORE_UGATE2 1 G1 G2 8 IND-D15UH-33-GP
Q1 Q2
PW R_VCORE_PHASE2 2 S1/D2 D2/S1 7 PW R_VCORE_PHASE2 1 2

3 D1 D2/S1 6 068.R1510.1171

t. 4 D1 D2/S1 5

1
PW R_DCBATOUT_VCOREA
D1
DY PR4714
AOE6932-GP 2D2R6J-3-GP

9
B PG4713 PG4714 B
075.06932.0A73

2
//
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP

12

12
PW R_VCORE_SNB2

PC4713
DY SC1KP50V2KX-1DLGP

PWR_VCORE_ISUMP_GB
2 1
s:

PW R_VCORE_ISUMN_GB

PW R_VCORE_ISEN2 1 2
tp

PR4723
100KR2F-L1-GP

PW R_VCORE_ISUMP 1 2 PR4724
PR4715 100KR2F-L1-GP
ht

PR4716 10R2F-L-GP DY
3K65R2F-1-GP

2
1

2
1
PW R_VCORE_ISUMN

PW R_VCORE_ISEN1

A A

<CorrreDesiiign>

WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle
POWER (95829_CPUCORE(2/3))
Size DocumentttNumberrr Rev
A2 SA
Hellcat 14/15_ ICL
Dattte::: Tuesday,,, Septttemberrr17,,, 2019 Sheettt47 off 106
5 4 3 2 1
 5 4 3 2 1

Main Func = VCCIN_AUX

19V_DCBATOUT PW R_VCCIN_AUX_IN PW R_VCCIN_AUX_IN

OFFPAGE
Eletro-XTechnical
PL5003
1 2
BLM21PG220SN1DGP
68.00084.831 PC5006PC5007 PC8638PC8639

VID

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP

SC10U25V3MX-5-GP
2 1

2 1

2 1

2 1
PL5004
1 PR5014 2 PW R_VCCIN_AUX_VID00R2J- 1 2
[22,40] CORE_VID0 BLM21PG220SN1DGP
2-GP
68.00084.831
D 1 PR5015 2 PW R_VCCIN_AUX_VID1 0R2J- D
[22,40] CORE_VID1
2-GP

PR5012
2 1 PW R_VCCIN_AUX_EN_R PC5009
[53] 1D8V_S5_PWROK
SC1U10V2KX-1DLGP
0R2J-2-GP PW R_VCCIN_AUX_BOOT 2 1

PR5013
2 1 PW R_VCCIN_AUX_PG
[54] 1D8V_CPU_AUX_PG
0R2J-2-GP

ICL_U4215W

p
10
PR5002
PU5001
VCCIN_AUX SENSE 124KR2F-GP
Performance
20 PW R_VCCIN_AUX_IN

BOOT
2 PW R_VCCIN_AUX_CS 1 PW R_VCCIN_AUX_IN

to
5V_S5 1
3D3V_S0 CS_DIS VSYS

[22] VCCAUX_SENSE
2
PR5017
1 PW R_VCCIN_AUX_FB_O
PR5001
PU5002
2 2
PU5003 TDC=14A
2D2R2J-GP 11 PW R_VCCIN_AUX_UG
0R2J-2-GP
2 1 PW R_VCCIN_AUX_VCC15 UG 1
3
4
3
4 1 ICCMAX=32A

1
PVCC

ap
PR5004 10 10
PR5018 12 PW R_VCCIN_AUX_LX Cyntec.6.8 x 7.3 x 3mm

1
10KR2J-3-GP PC5008 9 9 1D8V_CPU_AUX
2 1 PW R_VCCIN_AUX_RGND 16 PH DCR: 2.5~2.8 mOhm
SC1U10V2KX-1DLGP 7 7
[22] VSSAUX_SENSE VCC 8 6 8
13 PW R_VCCIN_AUX_LG
6 Idc : 23A , Isat : 40A

2
0R2J-2-GP 5
LG 5
PW R_VCCIN_AUX_PG 4 PL5001

sl
PG 1 2
14
PW R_VCCIN_AUX_EN_R 1 2 PW R_VCCIN_AUX_EN 19 PGND FDMS3600-02-RJK0215-COLAY-GP FDMS3600-02-RJK0215-COLAY-GP IND-D22UH-37-GP
EN
PR5005 075.07321.0073 075.07321.0073

1
1
C 2D2R2J-GP PC5010 2 PW R_VCCIN_AUX_ISENP PR5021 C

1
ISENSEP

1
SC1U10V2KX-1DLGP 17K8R2F-GP PR5016 PR5007 PT5001

ic
PW R_VCCIN_AUX_VID1 17 0R2J-2-GP 100R2F-L1-GP-U SE330U2D5VDM-2GP
VID1

2
3 PW R_VCCIN_AUX_ISENN
ISENSEN 79.3371V.2PL

2
2
PC5011

2
PW R_VCCIN_AUX_VID0 18 SCD1U25V2KX-1-DL-GP
VID0 8 1D8V_CPU_AUX 21
VOUT

t
5 PW R_VCCIN_AUX_COMP
PR5003 COMP PR5008 PR5022

ma
2 DY 1 PW R_VCCIN_AUX_FSW 9 332R2F-1-GP 634R2F-1-GP
FSW SEL 6 PW R_VCCIN_AUX_FB 1 2 PW R_VCCIN_AUX_RC 1 2
FB
10KR2J-3-GP

7 PW R_VCCIN_AUX_RGND

AGND
RGND

he
PR5023
RT6543AGQW -GP NTC-10K-29-GP-U

21
074.06543.0073 1 2

PWR_VCCIN_AUX_FB_O
B=3370K

c
/s
PC5003 PR5011 PC5002 PR5009
SC2200P50V2KX-2DLGP 10KR2F-2-GP SC470P50V2KX-3DLGP 1K6R2F-GP
1 2 PW R_VCCIN_AUX_COMP_R 1 2 2 1 PW R_VCCIN_AUX_FB_R 2 1
DY
DY

me
PC5004 PR5010
SC22P50V2JN-4DLGP 5K62R2F-GP
21 2 1

B
t. PR5006
B
//
100R2F-L1-GP-U
2 1
s:

1
PR5020
0R2J-2-GP

2
tp
ht

A A

<CorrreDesiiign>

WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle

RT6543A_VCCIN_AUX
Size DocumentttNumberrr Rev
A2
SA
Dattte:::Tuesday,,, Septttemberrr17,,,2019 Sheettt 50 off 106
5 4 3 2 1
 5 4 3 2 1

OFFPAGE OFFPAGE_GAP PW R_DCBATOUT_ VDDQ

Eletro-XTechnical
S5
D D

PM_SLP_S 4# 19V_DCBATO UT PW R_DCBATOUT_ VDDQ PC 5102 PC 5105 PC 5101

2D5V

1
1
[17,40,66] PM_ SLP_ S4#

SCD1U25V2KX-1-DL-GP

SC10U25V5KX-DL-GP
SC10U25V5KX-DL-GP
Design Current : 0.105A

21
R5148

2
2
1 2
PW R_VDDQ_ V2P5
D01R6 F- 3-GP
S3 murata. 2.5 x 2.0 x 1.2 mm
VTT_C N TL
[5] VTT_CNTL
DCR:240mOhm
Idc : 1.3A , Isat : 1.5 A PC5137 PC5126
PH on EE Side DY

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP
PL5102

21

21
1 2

1D 2V_VTT_ PW RGD
0IN6D8-4.4D7RU7H1-3052.-1G1P11
5V_S5
[40] 1D 2V_VTT_ PW RGD
PR5117
1 2 PU5101

0R0402-PAD-1- GP
15 PW R_VDDQVPP_ PH PR5118
PW R_ DCBATOUT_ VDDQ 7 SW_VPP
PC 5135 PC 5136 0R0402-PAD -1- GP
PVIN
12 PW R_VDDQVPP_ SENSE 1 2

SC1U10V2KX-1DLGP

SC10U6D3V3MX-DL-GP
3D 3V_S5 PW R_VDDQ_ VCC 14 VPPSNS
PVIN_VPP PR5111 PC 5110
SCD 1U25V 2KX-1-DL- GP

21

21
0R3J-0-U- GP
PW R_VDDQ_ VLDOI N
18 PW R_VDDQ_ BOOT 1 2 PW R_VDDQ_BOOTA 2 1 Cyntec. 6.6 x 7.3 x 3.0 mm 1D2V_S3
PC 5134 13 BST DCR:4.8m~5.3mOhm
PR5116 SC 10U6 D3V3MX- DL- GP VCC_5V
SW
17 PW R_VDDQ_ PH Idc : 16 A , Isat : 17A Design Current : 5.65A

21
DY
100KR2J-1-GP
5 PW R_VDDQ_ SENSE 1D 2V_S3
PL5101
C PW R_VDDQ_ VLDOI N 1 VDDQSNS C

21
VLDOIN 2 1 2
1 D 2 V_ VTT_ PW RGD 8 PGOOD VTT COIL-D68UH- 9-GP
4
PM_ SLP_ S 4 # 11
VTTSNS 68.R6810.20J
SLP_S4

1
6 PW R_VDDQ_ VTTREF PR5110 PC 5106 PC 5107 PC 5109 PC 5113 PC 5108

p
VTTREF PW R_VDDQVTT DY 2D 2R6J - 3- GP DY
VTT_C N TL 10
VTT_CNTL

2
16

2
PGND_VPP PC 5127

to
3 9 PW R_VDDQ_ SNB

SCD1U16V2KX-3DLGP
AGND PGND

1
21
PC 5130 DY PC 5128 PR5113

1
TPS 51486 RJ ER- GP

21

21
0R0402-PAD -1- GP SC 22U6D 3 V3 MX-1-DL- GP
DY PC 5115
074.51486.0043 SC 1500 P50V2KX- 2-DL- GP SC 22U6D 3 V3 MX-1-DL- GP
SC 22U6D 3 V3 MX-1-DL- GP

2
1

2
SC 22U6D 3 V3 MX-1-DL- GP

ap
SC 10U6D 3V3MX-DL- GP SC 22U6D 3V3MX-1-DL- GP
SC 10U6D 3V3MX-DL- GP

put as close as PU 5101 pin 2

put as close as PU 5101 pin 6

VTT

sl
Design Current : 0.42A

ic
B B

1D 2V_S3 PW R_VDDQ_ VLDOI N

t
PG5115
GAP- CLOSE- PW R- 3-GP
1 2

ma
VTT

he
0D 6V_S0 PW R_VDDQVTT

12

PG5111

c
GAP- CLOSE- PW R- 3-GP

/s
A A

<CorrreDesiiign>
2D5V
2D 5V_S3 PW R_VDDQ_ V2P5
WistronCorporation

me
PG5118 21F,,, 88,,, Sec...1,,,Hsiiin Taiii W uRd...,,,Hsiiichiiih,,,
Taiiipeiii Hsiiien 221,,, Taiiiwan,,,R...O...C...
2 1
Tiittllle
GAP-CLOSE-PWR-3-GP
051_POWER (TPS51486R_VDDQ/VTT)
Siize Documenttt Numberrr Rev

5 4
t. 3 2
Custt m

1
Hellcat
Dattte:::Tuesday,,,Septttemberrr 17,,,2019
14/15_ ICL
Sheettt 51 offf 106
SA
//
s:
tp
ht

Eletro-XTechnical
 5 4 3 2 1

Main Func = 1D8V/1D2V

OFFPAGE OFFPAGE_GAP Design Current=1.7A
3D3V_S5 Eletro-XTechnical
Chilisin. 2.5mm×2.0mmX1.2mm PWR_1D8V

1
3D3V_S5 PWR_1D8V_VIN
PR5308 PU5301 DCR: 59m Ohm
10KR2J-3-GP PG5301 Idc : 3 A , Isat : 4A
D
PH on EE Side GAP-CLOSE-PWR-3-GP
1 2
PWR_1D8V_VIN
PGND
9 D

PL5301

2
PR5307 4 5 IND-1UH-300-GP
PWR_1D8V_PG PG5302 PW R_1D8V_VIN PGND NC#5 6 PWR_1D8V_PH 1 2
1 2 3
[24] PRIM_PWRGD GAP-CLOSE- PWR-3-GP PWR_1D8V_PG 2 VIN LX 7 PWR_1D8V_EN 8
0R2J-2-GP PG EN

1
1 2 1
FB SGND
R1

1
PC5301 PR5309 PC5302 PC5303
100KR2F-L1-GP
DY
SC22U6D3V3MX-1-DL-GP 3D3V_S5

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP
21

21
RT5797ALGQW-GP PC5305

21
PR5306

SC22P50V2JN-L-GP
074.05797.0073

2
[17,25] 3V_5V_PWRGD 1 2 PWR_1D8V_EN DY PR5305
1D8V_S5 PWR_1D8V 100KR2F-L1-GP PWR_1D8V_FB
0R2J-2-GP PG5303

1
GAP-CLOSE-PWR-3-GP
R2

2
2 1 PR5304

p
PR5311 49K9R2F-L-GP
1 DY 2

to
[17] SIO_SLP_SUS#

2
0R2J-2-GP
PG5304 PWR_1D8V_EN
GAP-CLOSE-PWR-3-GP

ap
2 1 Vo=0.6x(1+R1/R2)
PR5310 PC5307

1
2 1 PWR_1D8V_PG DY SC1U10V2KX-1DLGP =0.6x(1+100/49.9)
C [50] 1D8V_S5_PWROK C
=1.802V

sl
2
PG5305
0R2J-2-GP GAP-CLOSE-PWR-3-GP
2 1

t ic
ma
c he
/s
me
B B

t.
//
s:
tp
ht

<CoreDesign>

A
Wistron Corporation A

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan,R.O.C.

Title
LCD&CAM&DMC&Touch
Size DocumentNumber Rev
B
Hellcat 14/15_ ICL SA
Date: Tuesday, September17, 2019 Sheet 53 of 106
5 4 3 2 1

Eletro-XTechnical
 5 4 3 2 1

Main Func = 1D05V

OFFPAGE OFFPAGE-GAP
Eletro-XTechnical
PR5450
1 2 PW R_VNN_EN
[50] 1D8V_CPU_AUX_PG
D 0R2J-2-GP D

PR5454 3D3V_S5
PWR_1D05A_EN 1 2 PW R_VNN1D05_POK1 PW R_VNN 1D05V_VNN_BYPASS

0R2J-2-GP PR5420 1 2 PWR_VNN1D05_POK1

100KR2J-1-GP
R5499 1 DY 2 D01R2J-L-GP
PR5421 1 2 PWR_VNN1D05_POK2
100KR2J-1-GP

PW R_1D05V 1D05V_S5_BYPASS
PR5452
1 2 PWR_VNN1D05_VID Design Current=0.2A

p
[17,40,55,81]PM_SLP_S3#
0R2J-2-GP R5498 1 DY 2 D01R2J-L-GP DFE252012F-1R0M=P2

to
PW R_VNN
1 2

ap
PL5401
IND-1UH-363-GP
PC5411 PC5412
PC5401 1 2 SC1U10V2KX-1DLGP

sl

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP
2 PR5413

21

21
1
5V_S5 2D2R2J-GP PU5401
C
DesignCurrent=0.2A C

ic
PC5402 1 2 SC10U6D3V3MX-DL-GP PWR_VNN1D05_VCC 8 15 PWR_VNN_EN
VCC EN1 6
EN2
PWR_1D05A_EN 1239AS-H-100N=P2
1 PR5422 2 0R0402-PAD-1-GP PWR_VNN1D05_VIN1 11 PW R_1D05V
1 PR5410 2 0R0402-PAD-1-GP PWR_VNN1D05_VIN2 10 VIN1 PW R_VNN1D05_LX1
1

t
5V_S5 VIN2 LX1 PW R_VNN1D05_LX2 1 2
4
LX2 PL5402
PC5403 1 2 SC10U6D3V3MX-DL-GP

ma

1
PWR_VNN1D05_VID13 5 PW R_VNN1D05_FB2 IND-10UH-271-GP
VID FB2
PR5408
16 PW R_VNN1D05V_VOUT1 7K5R2F-1-GP
PWR_VNN1D05_BOOT1RPC5404 1 2SCD1U25V2KX-1-DL-GP PWR_VNN1D05_BT1 2 VOUT1
BOOT1

he
PWR_VNN1D05_BOOT2RPC5405 1 2SCD1U25V2KX-1-DL-GP PWR_VNN1D05_BT2 3
BOOT2
17
AGND PC5410

12

21
PC5406 2 DY1 SCD1U16V2KX-3DLGPPWR_VNN1D05_POK114 9 2 PR5419 1 PW R_VNN SC10U6D3V3MX-DL-GP
POK1 PGND

c
PC5407 2 DY1 SCD1U16V2KX-3DLGPPWR_VNN1D05_POK27 12 0R0402-PAD-1-GP PR5407
POK2 PGND
10KR2F-2-GP

/s
APW8738AQBI-TRG-1-GP
PR5423 1 2 0R2J-2-GP PWR_VNN1D05_LX2
074.08738.0073

2
me
PR5401 1 2 0R2J-2-GP PWR_VNN1D05_LX1

B
t. B
//
s:
tp
ht

<CoreDesiiign>
A A

Wistron Corporation
21F, 88, Sec.1, HsiiinTaiiiWu Rd.,Hsiiichiiih,
TaiiipeiiiHsiiien221, Taiiiwan, R.O.C.

Tiiitllle

Eletro-XTechnical POWER(APW8738A_VNN1D05)
DocumentNumber
Siiize Rev
A3 Hellcat 14/15_ ICL SA
Date: Tuesday, September 17, 2019 Sheet 54 of 106
5 4 3 2 1
 5 4 3 2 1

Main Func = LCD INVERTER POWER

LCD1
43

From CPU 41

3D3V_S0 1

Eletro-XTechnical
[4] eDP_TX_CPU_N0 19V_DCBATOUT DCBATOUT_LCD_R DCBATOUT_LCD DCBATOUT_LCD
[4] eDP_TX_CPU_P0 2
[4] eDP_TX_CPU_N1 R5565 3
F5503
[4] eDP_TX_CPU_P1 12 2 1 4
Touch Panel 3D3V_HINGE_S0

1
5
[4] eDP_AUX_CPU_P
D01R6F-3-GP C5512 C5513 C5514 R5518
Sensor 3D3V_HINGE_S0 6
[4] eDP_AUX_CPU_N POLYSW-1D1A24V-GP-U
R5517 Camera 3D3V_HINGE_S0

1
4K7R2J-2-GP 4K7R2J-2-GP 7
DMIC 3D3V_HINGE_S0

SCD1U25V2KX-1-DL-GP

SC1KP50V2KX-1DLGP

SC10U25V5KX-DL-GP
69.50007.A31 TS_I2C CPU_I2C_SDA_TS 8
[4] eDP_HPD_CPU TS_I2C CPU_I2C_SCL_TS 9
2nd =69.50007.D31

2
TOUCH_REPORT_SW 10
[4] EDP_VDD_EN
CPU_I2C_SCL_TS Touch Panel TOUCH_PANEL_INTR#
TOUCH_PANEL_PD# 11
CPU_I2C_SDA_TS 12
[4] L_BKLT_CTRL 13
14
From EC DMIC_CLK_EDP 15
D R5544 DMIC_DATA_EDP D
16
DY100KR2J-1-GP 17
[24,55] PANEL_BKEN CCD& CAM CCD_USB20_CON_N 18
CCD_USB20_CON_P

12
19
20
[17,40,54,81]PM_SLP_S3# 21
SENSOR_I2C_SCL 22
SENSOR_I2C_SDA 23
Sensor Board GSEN_INT1_C 24
25
3D3V_LCDVDD_S0Trace width = 80mil 26

Hinge up cable protection

DBC_PANEL_EN R55041 2 100R2J-2-GP DBC_EN_R 27

1
C5558 C5546C5538 EDP_HPD_CONN 28
FOR TESTING DY
LCD_TST_C 29

SC22U6D3V3MX-1-DL-GP

SC1U10V2KX-1DLGP
D5502

SCD1U16V2KX-3DLGP
LCD_BRIGHTNESS 30
Display

2
EDP_VDD_EN A K LCDVDD_EN BLON_OUT_C 31
[20] DBC_PANEL_EN TOUCH_PANEL_DET# 32
RB520S30-GP 33
[24] LCD_VCC_TEST_EN 83.R2003.A8M eDP_TX_CPU_P0 C5524 1 2 SCD1U16V2KX-3DLGPeDP_TX_CON_P0 34
2ND =083.52030.008F eDP_TX_CPU_N0 C5525 1 2SCD1U16V2KX-3DLGP eDP_TX_CON_N0 35
[24] LCD_TST eDP_TX_CPU_P1C5522 1 2SCD1U16V2KX-3DLGP eDP_TX_CON_P1 36
eDP_TX_CPU_N1C55231 2SCD1U16V2KX-3DLGP eDP_TX_CON_N1 37
[24] CABLE2_OCP#
eDP_AUX_CPU_PC5526 1 2SCD1U16V2KX-3DLGPeDP_AUX_CON_P 38
D5506 eDP eDP_AUX_CPU_NC5521 12SCD1U16V2KX-3DLGP eDP_AUX_CON_N 39
LCD_VCC_TEST_EN A K 40
RB520S30-GP 42
[24] PANEL_MONITOR 3D3V_S5 83.R2003.A8M

p
44
2ND =083.52030.008F
[66] 3D3V_LCDVDD_R U5501
5V_S5 STAR-CON40-8-GP
020.F0847.0040

to
1 10 3D3V_LCDVDD_R
LCDVDD_EN 2 IN1 OUT1 9 CABLE1_OCP#
3 EN1 FLAG1 8 2nd =20.F2406.040
PM_SLP_S3# 4 VB GND 7 CABLE2_R_OCP#
[20,70] SENSOR_I2C_SDA C5505
3D3V_S5 5 EN2 FLAG2 6 3D3V_HINGE_R
IN2 OUT2
[20,70] SENSOR_I2C_SCL

SC1U25V3KX-1-DLGP
C5542
21

11
SC4D7U6D3V3KX-DLGP

THERMAL_PAD
21

ap
[20] GSEN_INT1_C

PANEL_PWRGD CIRCUIT
G2895ALK21U-GP

1
C5543
2

SC4D7U6D3V3KX-DLGP
CABLE1_OCP#R55271 2 0R2J-2-GPCABLE2_OCP#

sl
2 R5551 1 Q5503_E
[24,55] PANEL_BKEN 19V_DCBATOUT
CABLE2_R_OCP#R55281 2 0R2J-2-GP 0R2J-2-GP
3D3V_S5
Q5503_B B Q5502
3D3V_HINGE_S0 3D3V_LCDVDD_S0 MMBT3906-3-GP
C 84.03906.R11 R5547 C

ic
R5564 R5563 100KR2F-L1-GP
DCBATOUT_LCD Q5503_C
3D3V_HINGE_R1 2 3D3V_LCDVDD_R1 2 R5554 2
10KR2F-2-GP n R55d46 R5545
D01R6F-3-GP D01R6F-3-GP PANEL_PWRGD_R 2 1PANEL_MONITOR

2 1 CE
=4K7R2F-GP 0R2J-2-GP
D5504 R5549C5529
84
A KDCBATOUT_LCD_PWRGD .T3 Q5505 1MR2F-GP SCD1U16V2KX-3DLGP

t
Main Func = Touch panel DCBATOUT9_LCD_PGB

21
LMBT3904LT1G-GP

1 21 2
C5557 DY C5544 C5545 06

21
C5528 RB520S30-GP R5555 C5531 . 84.T3904.H11

2112

EC
21

83.R2003.A8M 200KR2F-L-GPSC2200P50V2KX-2DLGP
21

21

E1

SCD1U25V2KX-1-DL-GP
SC1U25V3KX-1-DLGP
SC22U6D3V3MX-1-DL-GP

2ND =083.52030.008F

ma
1 2nd =84.03904.K11
SCD1U16V2KX-3DLGP

21
[20] CPU_I2C_SDA_TS
[20] CPU_I2C_SCL_TS

he
2 R5550 1 Q5505_E
3D3V_S0
0R2J-2-GP
[3] TOUCH_PANEL_INTR# Gen 10 LCD-BIST

E
Q5504_B B Q5501 Check if 3V and B+ is power on before doing
[24] TOUCH_REPORT_SW MMBT3906-3-GP panel self-test.It’susingfor judgeMB or panel
84.03906.R11

c
damaged.
MIC POWER CAMERA POWER SENSOR POWER TOUCH PANEL POWER Q5504_C

1C
[3] TOUCH_PANEL_DET#

2
nR 5561 2
R5553 d

/s
3D3V_LCDVDD_S0 10KR2F-2-GP 4K7R2F-=GP
[20] TOUCH_PANEL_PD# 3D3V_HINGE_S0 3D3V_HINGE_S0
3D3V_HINGE_S0 3D3V_HINGE_S0 84
D5505 .
T3

2
A KLCDVDD_PWRGD Q5504
LCDVDD_P9G B LMBT3904LT1G-GP
06

1
R5552 C5535

1
C5556 C5552 C5530 RB520S30-GP .
1

84.T3904.H11
1

C5549 C5555
1
1

C5550
1

EC
C5551 200KR2F-L-GPSC2200P50V2KX-2DLGP

2 11
DY E1

me SC10U6D3V3MX-DL-GP
SCD1U16V2KX-3DLGP
C5548C5559

SCD1U16V2KX-3DLGP
83.R2003.A8M
SC4D7U6D3V3KX-DLGP

SC33P50V2JN-3GP

SC4D7U6D3V3KX-DLGP

1 2nd =84.03904.K11

2
SCD1U25V2KX-1-DL-GP

2
2ND =083.52030.008F
2

2
2

SC4D7U6D3V3KX-DLGP

DY

21
SCD1U16V2KX-3DLGP

t.
//
B B
s:

D5503
BAT54C-12-GP
Brightness L_BKLT_CTRL 1
tp

TOUCH_PANEL_INTR# 1 3
AFTP5502 AFTE14P-GP
CPU_I2C_SCL_TS 1 EC (BIST MODE) LCD_TST 2 PANEL_BKEN 1
RN5503
BLON_OUT_C
CPU_I2C_SDA_TS 1
AFTP5504AFTE14P-GP BKLT_CTRL 2 7 8LCD_BRIGHTNESS
AFTP5505 AFTE14P-GP 75.00054.A7D LCD_TST 3 6 LCD_TST_C
eDP_HPD_CPU 4 5 EDP_HPD_CONN
DMIC_DATA_EDP 1
ht

DMIC_CLK_EDP 1 AFTP5509AFTE14P-GP LCDVDD_EN

AFTP5510AFTE14P-GP SRN100KJ-5-GP
1
2
3
4

3D3V_HINGE_S0 1
AFTP5511AFTE14P-GP
RN5502
SRN100KJ-5-GP
TOUCH_REPORT_SW 1
AFTP5514AFTE14P-GP
8
7
6
5

EDP_HPD_CONN 1
DBC_EN_R 1 AFTP5521 AFTE14P-GP
3D3V_LCDVDD_S0 1 AFTP5522 AFTE14P-GP
DCBATOUT_LCD 1 AFTP5523 AFTE14P-GP
AFTP5525AFTE14P-GP

Main Func = CAMERA

EL5501 RN5505
A CCD_USB20_N CCD_USB20_CON_N A
4 3 SRN33J-5-GP-U
CCD_USB20_P
1 2
CCD_USB20_CON_P 2 3 DMIC_PCH_CLK_Q
[16] CCD_USB20_N 1 4 DMIC_PCH_DATA_Q
DLM0NSN900HY2D-GP
[16] CCD_USB20_P 068.09002.2001 ED5502 Hellcat
2nd = 68.02002.061 5V_S0
1 6
[27] DMIC_SCL_CODEC 3rd =068.MCF86.2001 I/O1 I/O4
[27] DMIC_SDA_CODEC 2 5 DMIC_CLK_EDP 2 3 DMIC_SCL_CODEC
GND VDD
DMIC_DATA_EDP 1 4 DMIC_SDA_CODEC
3 4

Eletro-XTechnical
[19] DMIC_PCH_CLK_Q I/O2 I/O3
DY <CoreDesiign>
RN5504SRN33J-
[19] DMIC_PCH_DATA_Q
5-GP-U
AZC099-04S-2-GP C5553 C5554
MKB
075.09904.0A7C WistronCorporation
SC33P50V2JN-3DLGP

SC33P50V2JN-3DLGP

21F,,, 88,,,Sec.1,,,HsiinTaii Wu Rd., Hsiichiih,,,

21

21

Taipei Hsiiien221,Taiwan,,,R...O...C...
Title
LCD&CAM&DMC&Touch
SiizeDocumenttt Number Rev
Custtt m
Hellcat 14/15_ ICL SA
Date: Tuesday,,,September 17, 2019 Sheettt 55 off 106
5 4 3 2 1
 5 4 3 2 1

SSID = HDMI Level Shifter/Connector

5V_HDMI
HDMI_DDI_TX_N3 HDMI_DDI_TX_CON_N3 5V_S0 F5701
C5701 1 2 SCD1U16V2KX-3DLGP
HDMI_DDI_TX_P 3 C5704 1 2 SCD1U16V2KX-3DLGP HDMI_DDI_TX_CON_P3 POLYSW -1D1A6V-9-GP-U
HDMI_DDI_TX_CON_N0

Eletro-XTechnical
69.48001.081
HDMI_DDI_TX_N0 C5705 1 2 SCD1U16V2KX-3DLGP HDMI_DDI_TX_CON_N0
[4] HDMI_DDI_TX_N0
HDMI_DDI_TX_P 0 HDMI_DDI_TX_CO N_P0 1 2
[4] HDMI_DDI_TX_P0 C5703 1 2 SCD1U16V2KX-3DLGP
[4] HDMI_DDI_TX_N1
[4] HDMI_DDI_TX_P1 2ND = 69.50011.081

1
[4] HDMI_DDI_TX_N2 ER5701 3RD = 69.50013.101
[4] HDMI_DDI_TX_P2 150R2J-L1-GP-U
[4] HDMI_DDI_TX_N3 HDMI_DDI_TX_N1 C5707 1 2 SCD1U16V2KX-3DLGP HDMI_DDI_TX_CON_N1
[4] HDMI_DDI_TX_P3 HDMI_DDI_TX_P 1 C5706 1 2 SCD1U16V2KX-3DLGP HDMI_DDI_TX_CO N_P1

2
HDMI_DDI_TX_N2 C5708 1 2 SCD1U16V2KX-3DLGP HDMI_DDI_TX_CON_N2
D HDMI_DDI_TX_P 2 HDMI_DDI_TX_CO N_P2 HDMI_DDI_TX_CON_P0 D
C5709 1 2 SCD1U16V2KX-3DLGP
[4] CPU_DPB_CTRL_CLK

[4] CPU_DPB_CTRL_DATA
0503
[4] CPU_DISP_HPDB 5V_S0 HDMI_DDI_TX_CON_N1

R57051 2 470R2F-GP
R5759 1 2 470R2F-GP
R5773 1 2 470R2F-GP
R5774 1 2 470R2F-GP

1
ER5702
HDMI CONN
R5775 1 2 470R2F-GP
R5776 1 2 470R2F-GP 150R2J-L1-GP-U
5V_HDMI
R5777 1 2 470R2F-GP

G
R5778 1 2 470R2F-GP HDMI1

2
S D HDMI_PLL_GND 18
SCL
15 HDMI_SCL_CON
HDMI_DDI_TX_CON_P1 +5V_POW ER 16 HDMI_SDA_CON
SDA
5V_S0
HDMI_DDI_TX_CO N_P 0 7

C5702
SCD1U16V2KX-3DLGP
Q5701 HDMI_DDI_TX_CON_N0 TMDS_DATA 0+
9 13
PJE8408 -R1-00001-GP

p
HDMI_DDI_TX_CON_P1 TMDS_DATA0- CEC
4 17
HDMI_DDI_TX_CON_N1 6 TMDS_DATA 1+ DDC/CEC_GROUNG

21
19
HDMI_DDI_TX_CON_N2 HDMI_DDI_TX_CO N_P2 TMDS_DATA1- HOT_PLUG_DETECT
1

to
HDMI_DDI_TX_CON_N2 3 TMDS_DATA 2+
14
TMDS_DATA2- RESERVED#14
8
TMDS_DATA 0_SHIELD
5

1
D5701 D5702 TMDS_DATA 1_SHIELD

A
ER5703 2
RB520S30-G P RB520S 30 -GP TMDS_DATA 2_SHIELD

ap
150R2J-L1-GP-U 20
G ND
83.R2003.A8M 83.R2003.A8M 11
TMDS_CLOCK_SHIELD G ND
21
HDMI_DDI_TX_CO N_P3 10 22

K
2ND =083.52030.008F 2ND = 083.52030.008F TMDS_CLOCK+ G ND

2
HDMI_DDI_TX_CON_N3 12 HDMI 23
TMDS_CLOCK- (A_Type) GND
HDMI_DDI_TX_CON_P2

sl
SKT-HDMI23-211-GP
0614 Layout HT 022.10025.0421

HDMI_SCL_R

3 HDMI_SDA_R
C C

ic
3D3V_S0
HDMI_DDI_TX_CON_N3

4
B HDMI_HPD_B R5710 1 2 150KR2F-L-GP HDMI_DET_CON

t
1
3D3V_S0 RN5702 ER5704

EC
SRN2K2J-1-GP 150R2J-L1-GP-U Q5703
LMB T3904LT1G-G P

ma
CPU_DISP_HPDB R57121 2 HDMI_HPD_E 84.T3904.H11 R5711
1
2

2
0R2J-2-G P 200KR2F-L-G P
Part Reference =Q5702
CPU_DPB_CTRL_CLK 4 3 HDMI_SCL_CON HDMI_DDI_TX_CON_P3

1
R5709

2
1
he
5 2 100KR2J-1-G P
No te : ZZ . 27 00 2 .F 7 C0

6 1

2
1

2N7002KDW -1-GP
CPU_DPB_CTRL_DATA

c
75.27002.F7C

2nd = 075.27002.0E7C HDMI_SDA_CON

/s
EMI Request:

me
HDMI_DDI_TX_CON_P0

HDMI_DDI_TX_CON_N0

HDMI_DDI_TX_CON_P1

HDMI_DDI_TX_CON_N1

HDMI_DDI_TX_CON_P2

HDMI_DDI_TX_CON_N2

HDMI_DDI_TX_CON_P3

HDMI_DDI_TX_CON_N3

HDMI_DET_CON

HDMI_SCL_CON

HDMI_SDA_CON
B
t. B
//
1

1
s:

ED5704 ED5705 ED5706 ED5707 ED5708 ED5709 ED5710 ED5711 ED5712 ED5713 ED5714
DY DY DY DY DY DY DY DY DY DY DY
PESD5V0H1BSFYL-GP-U1

PESD5V0H1BSFYL-GP-U1

PESD5V0H1BSFYL-GP-U1

PESD5V0H1BSFYL-GP-U1

PESD5V0H1BSFYL-GP-U1

PESD5V0H1BSFYL-GP-U1

PESD5V0H1BSFYL-GP-U1

PESD5V0H1BSFYL-GP-U1

PESD5V0H1BSFYL-GP-U1

PESD5V0H1BSFYL-GP-U1

PESD5V0H1BSFYL-GP-U1
2

2
083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF083.5V0H1.00AF 083.5V0H1.00AF
tp
ht

A A

<Core Desiiign>

Wistron Corporation
21F,,, 88,,, Sec...1,,, Hsiiin TaiiiW u Rd...,,,Hsiiichiiih,,,
TaiiipeiiiHsiiien221,,, Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiiitttlle

HDMI
Siiize DocumentttNumber Rev
Custt om
Hellcat 14/15_ ICL SA
Dattte::: Tuesday,,, Septttember 17,,, 2019 Sheettt 57 offf 106
5 4 3 2 1
 5 4 3 2 1

Main Func = WLAN 3D3V_S5 3D3V_WLAN

1 3D3V_WLAN
PCIE R6140 AFTE14P-GP AFTP6101
AFTE14P-GP AFTP6105
1 WLAN_CLKREQ_CPU_N

Eletro-XTechnical
1 2 1 WIFI_RF_EN_R
AFTE14P-GP AFTP6106 1 BLUETOOTH_EN_R
AFTE14P-GP AFTP6107
3D3V_WLAN D01R5F-GP 1 PLT_RST#
[16]
1.1A AFTE14P-GP AFTP6108
1 BT_USB20_CON_N
W LAN_PCIE_TX_N AFTE14P-GP AFTP6109 1 BT_USB20_CON_P
[16] W LAN_PCIE_TX_P AFTE14P-GP AFTP6110

1
1 JIO3_PCIE_WAKE#

1
C6110 C6106 C6109 AFTE14P-GP AFTP6111
R6145

SCD1U16V2KX-3DLGP

SC10U6D3V3MX-DL-GP

SCD1U16V2KX-3DLGP
[16] W LAN_PCIE_RX_N
[16] W LAN_PCIE_RX_P DY 10KR2J-3-GP

2
2

2
D D

PCIE_CLK

2
R6144
WIFI_RF_EN 2 1 WIFI_RF_EN_R
DY
0R2J-2-GP
[18] WLAN_CLK_CPU_N
[18] WLAN_CLK_CPU_P 3D3V_WLAN

[18] WLAN_CLKREQ_CPU_N

1
R6146
DY 10KR2J-3-GP
USB2.0

2
R6143

p
BLUETOOTH_EN 2 DY 1 BLUETOOTH_EN_R
[16] BT_USB20_P

to
[16] BT_USB20_N 0R2J-2-GP

Single end

ap
sl
[3] BLUETOOTH_EN

[21] WIFI_RF_EN
[17,63,66,76,91] PLT_RST#
C 3D3V_WLAN W LAN1 C

Debug

ic
[18,24] SUS_CLK
76 77
74 76 77 75
72 3_3VAUX GND 73 CNV_W T_CLKP

t
70 3_3VAUX RESERVED#73 71 CNV_W T_CLKN
68 RESERVED#70 RESERVED#71 69
66 RESERVED#68

ma
GND 67 CNV_WT_DP0
2 R6106 1 CLKIN_XTAL_LCP_R 64 RESERVED#66 RESERVED#67/2ND_LANE_PERN1 65 CNV_W T_DN0
10KR2J-3-GP 62 GPIO0_NFC_RESET#/MGPIO7 RESERVED#65/2ND_LANE_PERP1 63
60 NFC_I2C_IRQ/MGPIO5 GND 61 CNV_W T_DP1
58 NFC_I2C_SM_CLK RESERVED#61/2ND_LANE_PETN1 59

he
Power EN (Madesimo) WIFI_RF_EN_R 56 NFC_I2C_SM_DATA
54 W_DISABLE#1
RESERVED#59/2ND_LANE_PETP1 57
GND 55
CNV_W T_DN1

JIO3_PCIE_WAKE#
BLUETOOTH_EN_R
PLT_RST# 52 RESERVED#54/W_DISABLE#2 PEWAKE0# 53 W LAN_CLKREQ_CPU_N
50 PERST0# CLKREQ0# 51

c
SUS_CLK R61351 2 33R2J-2-GPSUSCLK_WLAN
48 SUSCLK_32KHZ GND 49 W LAN_CLK_CPU_N
46 COEX1 REFCLKN0 47

/s
W LAN_CLK_CPU_P
44 COEX2 REFCLKP0 45
42 COEX3 GND 43 W LAN_PCIE_RX_N
40 CLINK_CLK PERN0 41 W LAN_PCIE_RX_P
38 CLINK_DATA PERP0 39

me
[15,21] CNV_BRI_DT_R 36 CLINK_RESET GND 37
[15,21] CNV_RGI_DT CNV_BRI_DT_R W LAN_PCIE_TX_CON_N C6107 1 2 SCD1U16V2KX-3DLGP W LAN_PCIE_TX_N
CNV_RGI_RSPR61091 2 22R2J-2-GP CNV_RGI_RSP_R 34 UART_CTS PETN0 35 W LAN_PCIE_TX_CON_P C6108 1 2 SCD1U16V2KX-3DLGP W LAN_PCIE_TX_P
CNV_RGI_DT 32 UART_RTS PETP0 33
UART_TX GND
[19]
[19]
CLKREQ_CNV
CNV_RF_REST#
CNV_BRI_RSPR61181 2 22R2J-2-GP CNV_BRI_RSP_R
t. 22
20 UART_RX SDIO_RESET 21
23 CNV_WR_CLKP
CNV_W R_CLKN
B 18 UART_WAKE SDIO_WAKE 19 B
//
R6141 16 GND SDIO_DAT3 17 CNV_W R_DP0
CLKREQ_CNV 1 233R2J-2-GP BT_PCMOUT_CLKREQ0_R 14 LED#2 SDIO_DAT2 15 CNV_W R_DN0
R6142 12 PCM_OUT SDIO_DAT1 13
CNV_RF_REST# 1 233R2J-2-GP BT_PCMFRM_CRF_RST_N 10 PCM_IN SDIO_DAT0 11 CNV_W R_DP1
s:

[21] CNV_WT_DN0 3D3V_WLAN 8 PCM_SYNC SDIO_CMD 9 CNV_W R_DN1

[21] CNV_WT_DP0 6 PCM_CLK SDIO_CLK 7
[21] CNV_WT_DN1 4 LED#1 GND 5
1

[21] BT_USB20_CON_N
CNV_WT_DP1 2 3_3VAUX USB_D- 3 BT_USB20_CON_P
R6134 R6133
NGFF_KEY_E_75P
tp

[21] CNV_W T_CLKN 3_3VAUX USB_D+ 1

[21] CNV_W T_CLKP 75KR2F-GP 71K5R2F-1-GP
GND
NP2 NP2 NP1 NP1
2

[21]
ht

CNV_WR_DN0
[21] CNV_WR_DP0
[21] CNV_WR_DN1 SKT-NGFF75P-164-GP
[21] CNV_WR_DP1
[21]
062.10003.0B11
CNV_W R_CLKN
[21] CNV_W R_CLKP

BT_USB20_CON_P R61111 2 0R2J-2-GPBT_USB20_P

[21] CNV_BRI_RSP
[21] CNV_RGI_RSP
BT_USB20_CON_N R61101 2 0R2J-2-GPBT_USB20_N

A [24] JIO3_PCIE_WAKE# <CoreDesiiign> A

Wistron Corporation
21F, 88, Sec.1, HsiiinTaiiiWu Rd., Hsiiichiiih,
TaiiipeiiiHsiiien221, Taiiiwan,R.O.C.

Eletro-XTechnical
Tiiitllle

NGFF_WLAN CONN
Siiize DocumentNumber Rev
A3
Hellcat 14/15_ ICL SA
Date: Tuesday, September 17,2019 Sheet 61 of 106
5 4 3 2 1
 5 4 3 2 1

Main Func = M.2 SSD

3D3V_S0 3D3V_SSD1

R6355
1 2

D01R5F-1-GP Eletro-XTechnical

C6338

C6348
SCD047U25V2KX-4-GP
SC33P50V2JN-3DLGP
C6336

SC33P V2JN-3DLGP
C6347

SCD0 U25V2KX-4-GP

SCD1U16V2KX-3DLGP
C6334
[18] SSD_CLKREQ_CPU_N C6341C6340
47

2 1

2 1
50

21

21

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP
21

21

21
[17,61,63,66,76,91]PLT_RST#

[16]SSD_DEVSLP
D D
[18] SSD_CLK_CPU_P
[18] SSD_CLK_CPU_N SSD M.2 CONN 3D3V_SSD1
[16] SSD_PCIE_TX_P
[16] SSD_PCIE_TX_N
3D3V_SSD1 SSD1
[16] SSD_PCIE_RX_N
R6353
[16] SSD_PCIE_RX_P NP2 NP1 100KR2J-1-GP
PCIE:1 SATA:0
76 NP2 NP1 77
[16] SSD_PCIE_TX_P3 77 75
74 76
[16] SSD_PCIE_TX_N3

2
1
72 3_3VAUX GND 73
70 3_3VAUX GND 71
[16] SSD_PCIE_RX_P3 68 3_3VAUX GND 69 M2_SSD_PEDET
[16] SSD_PCIE_RX_N3 58 SUSCLK_32KHZ PEDET(OC_PCIE/GND_SATA) 67
56 NC#58 NC#67 57
[16] SSD_PCIE_TX_P2 54 NC#56 GND 55 SSD_CLK_CPU_P
[16] SSD_PCIE_TX_N2 52 PEWAKE#/NC#54 REFCLKP 53 SSD_CLK_CPU_N
SSD_CLKREQ_CPU_N
PLT_RST# 50 CLKREQ#/NC#52 REFCLKN 51
[16] SSD_PCIE_RX_P2 48 PERST#/NC#50 GND 49 SSD_SATA_TX_CON_P SSD_PCIE_TX_P
1 2 C6343 SCD22U10V2KX-2-GP
[16] SSD_PCIE_RX_N2 46 NC#48 D_PERP0/SATA_A+/H_PETP0 47 SSD_SATA_TX_CON_N SSD_PCIE_TX_N
1 2 C6345 SCD22U10V2KX-2-GP
44 NC#46 D_PERN0/SATA_A-/H_PETN0 45

p
[16] SSD_PCIE_TX_P1 GND 43
42 NC#44 SSD_PCIE_RX_N
[16] SSD_PCIE_TX_N1 R6352 D_PETP0/SATA_B-/H_PERP0 41
40 NC#42 SSD_PCIE_RX_P
SSD_DEVSLP 1 2 MSATA_DEVSLP_R D_PETN0/SATA_B+/H_PERN0 39

to
[16] SSD_PCIE_RX_P1 38 NC#40
0R2J-2-GP GND 37 SSD_PCIE_TX_CON_P3 1 2 C6344 SCD22U10V2KX-2-GP SSD_PCIE_TX_P3
[16] SSD_PCIE_RX_N1 36 DEVSLP D_PERP1/H_PETP1 35
34 NC#36 SSD_PCIE_TX_CON_N3 1 2 C6346 SCD22U10V2KX-2-GP SSD_PCIE_TX_N3
32 NC#34 D_PERN1/H_PETN1 33
30 NC#32 GND 31 SSD_PCIE_RX_P3
28 NC#30 D_PETP1/H_PERP1 29 SSD_PCIE_RX_N3
[16] M2_SSD_PEDET D_PETN1/H_PERN1 27

ap
26 NC#28
3D3V_SSD1 GND 25 SSD_PCIE_TX_CON_P2 1 2 C6339 SCD22U10V2KX-2-GP SSD_PCIE_TX_P2
24 NC#26 D_PERP2/H_PETP2 23 SSD_PCIE_TX_CON_N2 SSD_PCIE_TX_N2
[64] M2_PCIE_LED# 1 2 C6342 SCD22U10V2KX-2-GP
22 NC#24 D_PERN2/H_PETN2 21
20 NC#22 GND 19 SSD_PCIE_RX_P2
18 NC#20 D_PETN2/H_PERP2 17 SSD_PCIE_RX_N2

sl
16 3_3VAUX D_PETP2/H_PERN2 15
12 3_3VAUX GND 13 SSD_PCIE_TX_CON_P1 1 2 C6335 SCD22U10V2KX-2-GP SSD_PCIE_TX_P1
[24] SSD_SCP# 3D3V_SSD1 M2_PCIE_LED# R6354 1 2 0R2J-2-GP M2_PCIE_LED#_R 10 3_3VAUX D_PERP3/H_PETP3 11 SSD_PCIE_TX_CON_N1 1 2 C6337 SCD22U10V2KX-2-GP SSD_PCIE_TX_N1
SSD_SCP# R6356 1 2 0R2J-2-GP SSD_SCP1# 8 DAS/DSS# 6 D_PERN3/H_PETN3 9
C NC#8 GND 7 SSD_PCIE_RX_P1 C
4 NC#6 D_PETN3/H_PERP3 5 SSD_PCIE_RX_N1

ic
2 3_3VAUX D_PETP3/H_PERN3 3
3_3VAUX GND 1
NGFF_KEY_M 75P GND

SKT-NGFF75P-224-GP

t
062.10003.0F31
2nd =062.10003.0481

ma
3rd =062.10003.0F21

c he
/s
3D3V_S0 3D3V_SSD2

me
R6351
1 2

D01R5F-1-GP

C6332

C6319
SCD047U25V2KX-4-GP
MKB
SC33P50V2JN-3DLGP
C6320

SC33P V2JN-3DLGP
C6310

t.
SCD0 U25V2KX-4-GP

SCD1U16V2KX-3DLGP
C6309
M.2 SSD2
C6333C6323
47

21

21
50

21

21

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP
21

21

21
B B
//
[16] SSD_PCIE_TX_P9
[16] SSD_PCIE_TX_N9
[16] SSD_PCIE_RX_N9
[16] SSD_PCIE_RX_P9 MKB MKB
SSD M.2 CONN
MKB MKB MKB
3D3V_SSD2
[16] SSD_PCIE_TX_P10
s:

[16] MKB MKB

[16] SSD_PCIE_TX_N10
[16] SSD_PCIE_RX_P10

1
SSD_PCIE_RX_N10 3D3V_SSD2 SSD2
R6349
NP2 NP1
[16] SSD_PCIE_TX_P11
76 NP2 NP1 77
MKB 100KR2J-1-GP
tp

SSD_PCIE_TX_N11
PCIE:1 SATA:0
[16]
74 76 77 75
[16] SSD_PCIE_RX_P11 3_3VAUX GND
72 73

2
[16] SSD_PCIE_RX_N11 3_3VAUX GND
70 71
[16] SSD_PCIE_TX_P12 68 3_3VAUX GND 69 M2_SSD2_PEDET
[16] SSD_PCIE_TX_N12 58 SUSCLK_32KHZ PEDET(OC_PCIE/GND_SATA) 67
56 NC#58 NC#67 57
ht

[16] SSD_PCIE_RX_P12
[16] SSD_PCIE_RX_N12 54 NC#56 GND 55 SSD2_CLK_CPU_P
SSD2_CLKREQ_CPU_N 52 PEWAKE#/NC#54 REFCLKP 53 SSD2_CLK_CPU_N
PLT_RST# 50 CLKREQ#/NC#52 REFCLKN 51
48 PERST#/NC#50 GND 49 SSD_SATA_TX_CON_P12 1 2 C6324 MKB SCD22U10V2KX-2-GP SSD_PCIE_TX_P12
46 NC#48 D_PERP0/SATA_A+/H_PETP0 47 SSD_SATA_TX_CON_N12 SCD22U10V2KX-2-GP SSD_PCIE_TX_N12
[18] 1 2 C6325 MKB
SSD2_CLK_CPU_P 44 NC#46 D_PERN0/SATA_A-/H_PETN0 45
[18] SSD2_CLK_CPU_N
[18] 42 NC#44 GND 43 SSD_PCIE_RX_N12
SSD2_CLKREQ_CPU_N R6350 D_PETP0/SATA_B-/H_PERP0 41
40 NC#42 SSD_PCIE_RX_P12
SSD2_DEVSLP 1 2 MSATA_DEVSLP2_R D_PETN0/SATA_B+/H_PERN0 39
38 NC#40
0R2J-2-GP GND 37 SSD_PCIE_TX_CON_P11 1 2 C6326 MKB SCD22U10V2KX-2-GP SSD_PCIE_TX_P11
36 DEVSLP
34 NC#36 D_PERP1/H_PETP1 35 SSD_PCIE_TX_CON_N11 1 2 C6327 MKB SCD22U10V2KX-2-GP SSD_PCIE_TX_N11
MKB D_PERN1/H_PETN1 33
32 NC#34
30 NC#32 GND 31 SSD_PCIE_RX_P11
28 NC#30 D_PETP1/H_PERP1 29 SSD_PCIE_RX_N11
[16] SSD2_DEVSLP D_PETN1/H_PERN1 27
26 NC#28
GND 25 SSD_PCIE_TX_CON_P10 1 2 C6328 MKB SCD22U10V2KX-2-GP SSD_PCIE_TX_P10
3D3V_SSD2 24 NC#26 D_PERP2/H_PETP2 23 SSD_PCIE_TX_CON_N10 SCD22U10V2KX-2-GP SSD_PCIE_TX_N10
[16] M2_SSD2_PEDET 22 NC#24 D_PERN2/H_PETN2 21 1 2 C6329MKB
2180NCN#C2#022 GND 19 SSD_PCIE_RX_P10
16 3_3VAUX D_PETN2/H_PERP2 17 SSD_PCIE_RX_N10
14 3_3VAUX D_PETP2/H_PERN2 15
A 12 3_3VAUX GND 13 SSD_PCIE_TX_CON_P9 1 2 C6330 MKB SCD22U10V2KX-2-GP SSD_PCIE_TX_P9 A
M2_PCIE_LED# 10 3_3VAUX D_PERP3/H_PETP3 11 SSD_PCIE_TX_CON_N9 1 2 C6331MKB SCD22U10V2KX-2-GP SSD_PCIE_TX_N9
3D3V_SSD2
SSD_SCP# R6357 1 2 0R2J-2-GP SSD_SCP2# 8 DAS/DSS# D_PERN3/H_PETN3 9
6 NC#8 GND 7 SSD_PCIE_RX_P9
MKB 4 NC#6 D_PETN3/H_PERP3 5 SSD_PCIE_RX_N9
2 3_3VAUX D_PETP3/H_PERN3 3
3_3VAUX GND 1 <CorrreDesiiign>
NGFF_KEY_M 75P GND

SKT-NGFF75P-224-GP WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
062.10003.0F31 TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical 2nd =062.10003.0481

3rd=062.10003.0F21
Tiitttlle
mSATA
Rev
MKB Size DocumentttNumberrr
A2 SA
Hellcat 14/15_ ICL
Dattte:::Tuesday,,, Septemberrr 17,,,2019 Sheett 63 off 105
5 4 3 2
_CML
1
 5 4 3 2 1

NONE FINGER PRINT 才 才 才 才

Main Func = Power BTN Power button

R6419
Eletro-XTechnical
KBC_PWRBTN# 2 1 KBC_PWRBTN#_R

0R2J-2-GP

G6401
OPEN
GAP-
G6402
OPEN
GAP-
1

1
KBC_PWRBTN#_R

1
[24] KBC_PWRBTN# EC6403 DY
D D

2
SC1KP50V2KX-1DLGP

2
ED6401
[66] KBC_PW RBTN#_R
AZ5725-01FDR7G-GP

83.05725.0A0

21
Layout note:
G6401 place to buttom
G6402 place to top

Main Func = Battery LED

p
to
Low actived from KBC GPIO 5V_S5
Battery LED1 (AMBER_LED)
R6408 1 2 0R2J-2-GP

ap
Q6403
DY E
Q6406
R2
[24] LED_MASK# CHG_AMBER_LED# CHG_AMBER_LED#_Q
1 6 B

1
Note:ZZ.27002.F7 C0
R1 C AMBER_LED_BAT R6407 1 2 BAT_AMBER
LED_MASK# 2 5 LED_MASK# 499R2F-2-GP
LDTA144VLT1G-GP

sl
BATT_W HITE_LED#_Q 3 4 BATT_W HITE_LED# EC6402
084.00144.0B11 DY SCD1U25V2KX-1-DL-GP
[24] CHG_AMBER_LED#

2 1
2N7002KDW-1-GP
75.27002.F7C
C C

ic
[24] BATT_W HITE_LED# LED2
R6409 1 2 0R2J-2-GP
1 + Yellow

- 3
2 + White

t
LED-YW -5-GP

ma
5V_S5 083.1212A.0070
2nd =083.00327.0070
Q6404
R2
E
B
C W HITE_LED_BAT R6406 1 2 BAT_WHITE

he
R1
549R2F-GP
LDTA144VLT1G-GP

Battery LED2 (WHITE_LED)

084.00144.0B11 DY EC6404
SCD1U25V2KX-1-DL-GP

2 1

c
/s
SATA HDD LED 1D8V_S0

Main Func = HDD LED LOW actived from PCH GPIO

me
3D3V_S0 3D3V_S0
1

R6403
10KR2J-3-GP

[20,24] MASK_SATA_LED#

t.
1

R6411
DY R6415
10KR2J-3-GP
[18] SATA_LED# DY 10KR2J-3-GP MASK_SATA_LED#
B B
2

//
[63] M2_PCIE_LED# D6401
SATA_LED# K A SATA_LED#_D

83.R2003.A8M
[63] SATA_LED#_D RB520S30-GP 2ND = 083.52030.008F
s:

D6402
M2_PCIE_LED# K A
83.R2003.A8M
RB520S30-GP 2ND =083.52030.008F
tp

Main Func = M-BIST R6405

330R2J-3-GP
ht

1DY 2

3D3V_S5
Q6407
PM_RSMRST# R2 E CHG_AMBER_LED#_Q
Q6407_B B
R1 C Q6407_C
R6414 R6404
330KR2F-L-GP 1MR2F-GP LMUN5112T1G-GP-U
DY
Q6408 084.05112.001K R6413
1

2
1

LMBT3904LT1G-GP 2nd = 84.00024.01K 150R2F-1-GP

2

M_BIST B 84.T3904.H11 3rd =84.00124.K1K

E C

1
2

2nd = 84.039044.Kth11=84.02303.01K
D6403
[17,18] PM_RSMRST# HW_ACAV_IN K A
[24] M_BIST KBC_PWRBTN#
RB520S30-GP
[24,44] HW _ACAV_IN C6405
83.R2003.A8M SC2D2U6D3V2MX-DL-GP
2 1

A 2nd =083.52030.008F A

<CorrreDesiiign>

M-BIST(Mainboard Built-In Self Test)Check if Wistron Corporation

MB is damagewhile presspower button. 21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,, Hsiiichiih,,,
TaiiipeiiiHsiiien221,,,Taiiiwan,,,R...O...C...
There is a LEDwill lightup to indicatethe MB
Eletro-XTechnical is damageby Tiitttlle

LED Board&Power Button

Siize DocumentttNumberrr Rev
A2 Hellcat 14/15_ ICL SA
Dattte:::Tuesday,,, Septttemberrr17,,,2019 Sheettt 64 offf 106
5 4 3 2 1
 5 4 3 2 1

Main Func = KB
0513 Internal Keyboard Connector

[24] CAP_LED#_R Keyboard Backlight (Reserved) KB1

31

Eletro-XTechnical
5V_S0 +5V_KB_BL 1

KB_LED_DET_C KB_BL_CTRL# 2
F6502 3
1 KBBL 2 1 CAP_LED 4
AFTP6532 1 KSO10 5
EC6501 EC6503
POLYSW-1D1A6V-9-GP-U AFTP6503 1 KSO11 6
DY DY

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP
AFTP6504 7

21

21
69.48001.081 KBBL 1 KSO09
[4] KB_DET# AFTP6516

21
C6501 1 KSO14 8
AFTP6539
SCD1U16V2KX-3DLGP 1 KSO13 9
AFTP6535 1 KSO15 10
[20] KB_LED_BL_DET AFTP6515 1 KSO16 11
D D
KBBL1 AFTP6508 1 KSO12 12
5 AFTP6538 1 KSO00 13
1 AFTP6520 1 KSO02 14
[24] KB_LED_PWM
AFTP6510 15
R6503 1 KSO01
KB_LED_BL_DET 1 KBBL 2 KB_LED_DET_C 2 AFTP6517 1 KSO03
3
KBBL AFTP6518 1 KSO08
16
17
CAP LED Control
[24] KSO00

1
51KR2J-1-GP KB_BL_CTRL# 4 AFTP6505 1 KSO06 18
[24] KSO01 6 AFTP6512 19
KBBL 1 KSO07
[24] KSO02
[24] KSO03
R6507
100KR2J-1-GP ACES-CON4-90-GP-U
LOW actived from KBC GPIO AFTP6534 1 KSO04 20
AFTP6522 1 KSO05 21
[24] KSO04 020.K0298.0004 Q6502 AFTP6536 1 KSI0 22

2
[24] KSO05 1 5V_S0 1 KSI3 23
AFTP6507
[24] KSO06 1 KSI1 24
E AFTP6502 1 KSI5
AFTP6565
R2
[24] KSO07 CAP_LED#_R B 25
R6506 AFTP6540 1 KSI2 26
[24] KSO08 CAP_LED_Q
R1 C 1 2 CAP_LED AFTP6513 1 KSI4 1 27

D
[24] KSO09 Q6501
KB Backlight Power Consumption: 285mA max. AFTP6533 KSI6 28
[24] KSO10 PJA3402-R1-00001-GP 29
LDTA144VLT1G-GP 1KR2J-1-GP AFTP6521 1 KSI7
[24] KSO11 KB_LED_PW M G 1 KB_DET# 1 30
[24] KSO12
084.00144.0B11 AFTP6511
084.03402.0031 AFTP6523 32

1
[24] KSO13
+5V_KB_BL 1 AFTP6519

p
[24] KSO14 DY R6505 ACES-CON30-29-GP
100KR2J-1-GP KBBL AFTP6537
[24] KSO15

S
[24] KSO16 AFTP6506 020.K0254.0030

to
2
KB_LED_DET_C 1
[24] KSI[0..7]
KSI0
KSI1 AFTP6566
KSI2

ap
KSI3
KB_BL_CTRL# 1
KSI4
KSI5 AFTP6567
KSI6
KSI7

sl
C Main Func = TPAD 3D3V_S0 TP_VDD
C

ic
R6502
1 2
0R2J-2-GP

t
Need to check if it is Active High or Active Low

ma
and check if there is PH on TPAD side.

TP_VDD

he
TP side has pull high

R6511
TOUCHPAD_INTR# 1 2

c
10KR2J-3-GP

/s
me
Support PTP
RN6502
SRN0J-6-GP

B
PS2
DAT_TP_SIO_I2C_CLK
CLK_TP_SIO_I2C_DAT

CPU_I2C_SCL_P0 R6513 1
t.
1
2 3
4

2 0R2J-2-GP I2C1_SCL_R
TP_VDD Precision Touch Pad Connector
B

I2C
//
CPU_I2C_SDA_P0 R6512 1 2 0R2J-2-GP I2C1_SDA_R
TP1
10 Pin number Pin name
EC6504
SC33P50V2JN-3GP

EC6502
SC33P50V2JN-3GP

8
1 VDD
0513 I2C1_SDA_R 7
21

21

I2C1_SCL_R 6 2 DAT(I2C)
s:

5
[24] CLK_TP_SIO_I2C_DAT C6505 TOUCHPAD_INTR# 4 3 CLK(I2C)
DAT_TP_SIO_I2C_CLK PTP_DIS# 3

SCD1U16V2KX-3DLGP
[24]
2 4 GND

21
DY DY
1 5 ATTN
tp

1 9
[20,66] CPU_I2C_SCL_P0
[20,66] CPU_I2C_SDA_P0 TP_VDD AFTP6531 6 GPIO
PTWO-CON8-16-GP 7 DAT(PS2)
020.K0255.0008
8 CLK(PS2)
ht

2nd =020.K0151.0008
2
1

RN6503
SRN2K2J-1-GP
TP_VDD 1 AFTP6529
3
4

I2C1_SCL_R
I2C1_SCL_R 1 AFTP6528
I2C1_SDA_R 1 AFTP6527
TOUCHPAD_INTR# 1 AFTP6525
PTP_DIS# 1 AFTP6526
[3,24] TOUCHPAD_INTR#
[24] PTP_DIS#

I2C1_SDA_R

A A

<CoreDesiiign>

WistronCorporation
21F,,, 88,,, Sec.1,,, HsiiinTaiiiW u Rd., Hsiiichiih,,,
Taipei Hsiiien221, Taiwan, R...O...C...

Eletro-XTechnical Tiittlle

Key Board&Touch Pad Rev

Size DocumentNumber
A2 SA
Hellcat 14/15_ ICL
Dattte::: Tuesday,,, Septttember17, 2019 Sheet 65 offf 106
5 4 3 2 1
 5 4 3 2 1

Main Func = IO Connector

USB2.0 Power Pin define by follow layout routing
5V_S5 USB30_VCCC
U6601

5 1
C6601 IN OUT 2

Eletro-XTechnical
USB_PWR_EN# 4 GND 3 USB_OC1#
C6602 EN# OC#
Active Low
DY

SC1U10V2KX-1DLGP

SCD1U16V2KX-3DLGP
21

21
SY6288DAAC-GP
074.06288.009B
AUDIO

[27,29] AUD_RING

[27,29] AUD_SLEEVE

D
[29] AUD_HP1_JACK_L1

[29] AUD_HP1_JACK_R1
LID sensor C6604 D
[27] AUD_SENSE 12
R6633 1 20R2J-2-GP
Q6601
NON_GMR SCD1U16V2KX-3DLGP
LID_POWER_ON# 3 4
D6601
LID_CL_SIO# A K LID_CL_NB# R6627 1 2 680KR2F-GP Q6701_G

N o t e: Z Z . 2 70 0 2
2 5
CRD 21
R6628

.F7 C0 1
1 6
RB520S30-GP 3D3V_AUX_S5
C6605
2N7002KDW-1-GP 680KR2F-GP
[16] CARD1_USB20_N 83.R2003.A8M 75.27002.F7C

21
[16] CARD1_USB20_P

SC1U10V2KX-1DLGP
2ND = 083.52030.008F 2nd = 075.27002.0E7C
[19] SD_READ_MODE#

USB3.0
C6603 1 2 SC1U10V2KX-1DLGP

PORT1 D6602 K ARB520S30-GP Q6701_G_D

[16] USB2_USB30_RX_N
83.R2003.A8M
[16] USB2_USB30_RX_P 2ND = 083.52030.008F
[16] USB2_USB30_TX_N
[16] USB2_USB30_TX_P

[16] USB2_USB20_N
[16] USB2_USB20_P

p
USB CONTROL CRD

to
R6604 1 2 0R2J-2-GP

EL6601
[4] USB_OC1#
CARD1_USB20_N
DLM0NSN900HY2D-GP
1 2 CARD1_USB20_CON_N I/O Board Connector
[24,35]USB_PWR_EN#
CARD1_USB20_P 4 DY 3 CARD1_USB20_CON_P
IOBD1

ap
068.09002.2001 52
54
2nd = 68.02002.061 50
3rd = 068.MCF86.2001 AUD_HP1_JACK_R1 AUD_AGND 49
AUD_RING 48
R6605 1 2 0R2J-2-GP AUD_RING 47
AUD_RING 46
AUDIO AUD_SLEEVE 45
USB3.0 PORT1 44

sl
R6608 1 2 0R2J-2-GP AUD_SLEEVE
AUD_SLEEVE 43
AUD_SENSE 42
AUD_HP1_JACK_L1 41
EL6603 40
USB2_USB20_N 4 3 USB2_USB20_CON_N
AUD_AGND 39
USB2_USB20_P 12
DY USB2_USB20_CON_P USB30_VCCC 38
37
C C
36
LAN
3D3V_S5

ic
DLM0NSN900HY2D-GP 35
068.09002.2001 3D3V_AUX_S5 34
[16] LAN_PCIE_RX_N 2nd = 68.02002.061 3D3V_S5 33
32
[16] LAN_PCIE_RX_P 3rd = 068.MCF86.2001 3D3V_S0
[16] LAN_PCIE_TX_N
R6610 1 2 0R2J-2-GP R6615 LID_CL_NB# RTC +RTC_VCC FPR_LID_SW_R#
2 0R2J-2-GP
31
30
[16] LAN_PCIE_TX_P
100KR2J-1-GP FINGER PRINTER R6614 1 2 0R2J-2-GP FPR_SSO_SW# 29
[18] LAN_CLK_CPU_N FP KBC_PWRBTN#_R R6613 1
PM_SLP_S4#
28
27

12

t
[18] LAN_CLK_CPU_P R6606 1 2 0R2J-2-GP
FPR_SCAN# 26
LID_CL_SIO_TAB# SD_READ_MODE# 25
[18] LAN_CLKREQ_CPU_N
EL6602 24
FP1_USB20_N 4 3 FP1_USB20_CON_N LID_CL_SIO_TAB# R6611 1 PLT_RST# 23
[24] PM_LAN_ENABLE 2IN 1 2 0R2J-2-GP

ma
LAN_CLKREQ_CPU_N 22
[24] PCIE_LAN_WAKE# FP1_USB20_P 1
DY 2 FP1_USB20_CON_P PCIE_LAN_WAKE# R6617 1 PCIE_LAN_WAKE#_R 21
LAN 2 0R2J-2-GP PM_LAN_ENABLE 20
FP1_USB20_CON_P 19
DLM0NSN900HY2D-GP 18
FP1_USB20_CON_N
068.09002.2001 17
2nd = 68.02002.061 USB2_USB20_CON_P
16
3rd = 068.MCF86.2001 15
USB2_USB20_CON_N
14

he
FP R6607 1 2 0R2J-2-GP
CARD1_USB20_CON_N
13
12
Card Reader CARD1_USB20_CON_P 11
10
[16] FP1_USB20_N 9
[16] FP1_USB20_P LAN_PCIE_RX_N 8
[24] FPR_SCAN# LAN LAN_PCIE_RX_P
LAN_PCIE_TX_N
7
6

c
LAN_PCIE_TX_P 5
LAN_CLK_CPU_N 4
LAN_CLK_CPU_P 3
[64] KBC_PWRBTN#_R
USB2_USB30_TX_P 2

/s
[17,40,51] PM_SLP_S4# USB2_USB30_TX_N
USB3.1 PORT1 USB2_USB30_RX_P

USB2_USB30_RX_N 1
53
51

020.F1253.0050

me
[20,24] LID_CL_SIO# STM-CON50-GP

[24] LID_POWER_ON#
2nd = 020.F0688.0050
3rd =020.F0574.0050
[24] LID_CL_SIO_TAB#

[17,61,63,76,91] PLT_RST#

B
[20,65] CPU_I2C_SCL_P0
[20,65] CPU_I2C_SDA_P0

[44] PWR_CHG_VBATIN

[55] 3D3V_LCDVDD_R
3D3V_LCDVDD_S0 3D3V_S0
t.
3D3V_SSD1 3D3V_S0 3D3V_SSD2 B
//
19V_DCBATOUT DCBATOUT_LCD_R
1 3D3V_LCDVDD_R

R6655
1
s:

0R2J-2-GP DY
1

1
1

R6654
1

R6652
R6638 R6649 R6653
R6650 R6651 0R2J-2-GP DY 0R2J-2-GP DY
0R2J-2-GP DY 0R2J-2-GP DY 0R2J-2-GP DY

21
0R2J-2-GP DY 0R2J-2-GP DY
2
2
2

2
2

2
2

tp

19V_DCBATOUT_E3 DCBATOUT_LCD_R_E3 3D3V_SSD2_E3_R

3D3V_LCDVDD_R_E3 3D3V_LCDVDD_S0_E3 3D3V_SSD1_E3_R 3D3V_SSD1_E3 3D3V_SSD2_E3
ht

19V_DCBATOUT 19V_DCBATOUT PWR_DCBATOUT_VDDQ

19V_DCBATOUT PWR_VCCIN_AUX_IN 19V_DCBATOUT 19V_DCBATOUT
19V_DCBATOUT PWR_DCBATOUT_VCOREA
1PWR_CHG_VBATIN

2
2

2
2

R6640 R6641 R6642 R6647 R6648

DY R6639 R6643 R6644 R6645 R6646
0R2J-2-GP
DY 0R2J-2-GP DY 0R2J-2-GP DY 0R2J-2-GP DY 0R2J-2-GP DY 0R2J-2-GP DY 0R2J-2-GP
DY 0R2J-2-GP DY 0R2J-2-GP DY 0R2J-2-GP
21

12
1

1
1

1
1

1
PWR_CHG_VBATIN_E3 2

19V_CHARGER_E3 19V_VCOREA_E3 PW R_VCOREA_E3

19V_VCCIN_AUX_E3 19V_VCCSA_E3 PWR_VCCSA_E3 19V_VDDQ_E3 PW R_VDDQ_E3
PWR_VCCIN_AUX_E3

A A

E3

3D3V_SSD1 VCCIN_AUX input IN1+ 19V_VCCIN_AUX_E3

1 2 19V_DCBATOUT_E3 IN4+ LCD BACKLIGHT

R6632 1 2 0R2J-2-GP IN1- PWR_VCCIN_AUX_E3 3 4 DCBATOUT_LCD_R_E3 IN4-

SSD IN2+ 3D3V_SSD2_E3_R
3D3V_SSD1_E3_R
R6631 1 2 0R2J-2-GP 3D3V_S0 5 6 E
3
R
_
D
VD
C_V
L3D
3 IN3+ Panel logic power
3D3V_SSD 7
IN2- 3D3V_SSD2 3D3V_SSD1_E3
R6656 1 2 0R2J-2-GP 3D3V_SSD1
CPU_I2C_SCL_P0
8
U
P
0C
A
I2
_
D
S
C
__
3D3V_LCDVDD_S0_E3 IN3-
R6657 12 0R2J-2-GP 3D3V_SSD2 9 10
3D3V_SSD2_E3
11 12
VDDQ input IN7- 13 14
PW R_VCOREA_E3
IN6- 3D3V_S0
PWR_VDDQ_E3
IN7+ 15 16 IN6+ CPU Core input

Eletro-XTechnical
19V_VDDQ_E3 19V_VCOREA_E3
17 18
VCCSA input IN8- PW R_VCCSA_E3
19V_VCCSA_E3 19 20
19V_CHARGER_E3 IN5- <CorrreDesiiign>
IN8+ PWR_CHG_VBATIN_E3 IN5+ System power source

HRS-CONN20A-2-GP WistronCorporation
21F,,,88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiichiiih,,,
20.F1450.020 Taiiipeiii Hsiiien 221,,,Taiiiwan,,,R...O...C...

Tiittle

IO BoardConnector
Wistron Confidential document, Anyone can not Siiize Documenttt Numberrr Rev
Duplicate, Modify, Forward or any other
purpose application without get Wistron
permission
A1
Hellcat 14/15_ ICL SA
Datte::: Tuesday,,, Septttemberrr 17,,, 2019 Sheettt 66 offf 106
5 4 3 2 1
 5 4 3 2 1

Main Func = Debug ESPI Debug Connector

Eletro-XTechnical
DBG1
ESPI 15
1

ESPI_CLK ESPI_CLK 2
D [18,24] 3 D
3D3V_S0
ESPI_RESET# 4
[18,24] ESPI_RESET# ESPI_CS# 5
ESPI_IO3 6
[18,24] ESPI_CS# ESPI_IO2 7 DEBUG
ESPI_IO1 8
ESPI_IO0 9
10
HOST_DEBUG_TX R6801 1 2 0R2J-2-GP HOST_DEBUG_TX_CON 11
DY 12
[18,24] ESPI_IO[3..0] UART_2_CTXD_DRXD R6802 1DEBUG2 0R2J-2-GP UART_2_CTXD_DRXD_CON 13

p
ESPI_IO3
ESPI_IO2 UART_2_CRXD_DTXD R6803 1 2 0R2J-2-GP UART_2_CRXD_DTXD_CON 14

to
ESPI_IO1 DEBUG 16
ESPI_IO0
ACES-CON14-5-GP

ap
20.F0765.014

sl
ic
C C

UART

t
ma
[24] HOST_DEBUG_TX

[20] UART_2_CTXD_DRXD

he
[20] UART_2_CRXD_DTXD

c
/s
me
t.
//
B B
s:
tp
ht

<CoreDesign>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan,R.O.C.

Title

Eletro-XTechnical Dubug connector

Size Document Number Rev
A4
Hellcat 14/15_ ICL SA
Date: Tuesday, September 17, 2019 Sheet 68 of 106
5 4 3 2 1
 5 4 3 2 1

SSID = User.interface
Mantis Accelerometer for adaptive thermal and HDD protection
Eletro-XTechnical

D D

3D3V_GSEN2
3D3V_S0

[20,55]
[20] GSEN2_INT1_C

SENSOR_I2C_SCL
1
R7004
2
11uA Free Fall Sensor + G Sensor
0R2J-2-GP C7003 C7004
[20,55] SENSOR_I2C_SDA

SC10U6D3V3MX-DL-GP

C7004 near pin9

SCD1U16V2KX-3DLGP
[20] FFS_INT1

21

21
[19] FFS_INT2 3D3V_GSEN2

U7001
R7006
9 2 GSENSOR_CS 2 1
VDD CS

p
5
10 RES 10KR2J-3-GP
VDD_IO 12 GSEN2_INT1_C

to
INT1 11 GSEN2_INT2_C
INT2
SENSOR_I2C_SCL 1
SENSOR_I2C_SDA 4 SCL/SPC 6
R7005 1 DY 2 10KR2J-3-GP 3 SDA/SDI/SDO GND 7
3D3V_GSEN2 SDO/SA0 GND 8 Note:

ap
R7007 2 1 GSENSOR_SDO GND

0R2J-2-GP LNG2DMTR-GP

074.LNG2D.00BZ - no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints

sl
- design PCB pad based on our sensor LGA pad size (add 0.1mm)
- solder stencil opening to 90% of the PCB pad size
C - mount the sensor near the center of mass of the NB as possible as you can C
GSEN2_INT1_C

ic
GSEN2_INT2_C

t
FFS_INT1 R7011 1 2 0R2J-2-GP

FFS_INT2 R70121 2 0R2J-2-GP

ma
1
R7001 DY
1MR2J-1-GP

he
2

c
/s
me
B
t. B
//
Note:
(1) Keep all signals are the same trace width. (included VDD, GND).
(2) No VIA under IC bottom.
s:
tp
ht

A A

<CorrreDesiiign>

WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle

Free FallSensor
Siize DocumentttNumberrr Rev
A2 SA
Hellcat 14/15_ ICL
Date:: Tuesday,, Septtemberr 17,, 2019 Sheett 70 off 106
5 4 3 2 1
 Main Func =TI
5 4 3 2 1

VCC3PD_1 VCC3PD_1

1
R7217 R7223

1
100KR2J-1-GP 100KR2J-1-GP Q7201 R7218 R7222

Eletro-XTechnical
100KR2J-1-GP 100KR2J-1-GP
PD_VBUS_C_CTRL1 3 4

2
VBUS_P_CTRL_C 2 5 PD_VBUS_C_CTRL1_C

Note:ZZ.27002.F7 C0
1 6 VBUS_P_CTRL

1
2N7002KDW-1-GP
2nd =075.27002.0E7C
75.27002.F7C
D
From System Power U7201
D

3D3V_S5
31 11 VBUS_P_CTRL_C
VDDD VDDD VBUS_P_CTRL
VCC3PD_1 12 PD_VBUS_C_CTRL1_C
32 VBUS_C_CTRL
VDDIO 9 USB1_CC1
C7221 1 2 SC330P50V2KX-3-DL-GP C7220
D7202 VDDD 19 CC1 7 USB1_CC2
VCC3PD_1 VSYS CC2 1 2 SC330P50V2KX-3-DL-GP
K A
SCD1U16V2KX-3DLGP 2 1 C7218 PD_VCCD 33 VCCD 23 USB4_USB20_P
[74] PD_VBUS_C_CTRL1 SBA0520Q-R1-00001-GP-U DPLUS_SYS USB4_USB20_N
24
8 DMINUS_SYS
5V_S5 V5V

1
C7203 C7204 C7207 29 UPD1_SMBCLK
22 UART_TX 30 UPD1_SMBDAT

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP
20V_VCCPD_VBUS VBUS UART_RX

SC1U10V2KX-1DLGP
EC 28 TOP_MUX_P_L

2
1 DPLUS_TOP 27 TOP_MUX_N_L
40 CSP DMINUS_TOP
CSN 26 BOT_MUX_P_L
[24] UPD1_SMBCLK CCG5C_I2C_INT# 15 DPLUS_BOT 25 BOT_MUX_N_L
[24] UPD1_SMBDAT UPD1_SMBCLK 17 I2C_INT_EC DMINUS_BOT VDDD
For debattery UPD1_SMBDAT 16 I2C_SCL_SCB1_EC USB1_SBU1

p
35
I2C_SDA_SCB1_EC SBU1 34 USB1_SBU2
CCG5_MOD_ID2 5 SBU2
[74] VBUS_P_CTRL VCC3PD_1 4 I2C_INT_AR 36 CCG5_SBU1 R7207

to
I2C_CLK_PD
3D3V_S5 VCC3PD VDDD 3D3V_S5 I2C_DATA_PD 3 I2C_SCL_SCB2_AR AUX_P 37 CCG5_SBU2
I2C_SDA_SCB2_AR AUX_N DY 10KR2J-3-GP
D7203 R7211
[24]CCG5C_I2C_INT# A K 1 2 CCG5_MOD_ID1 21 38

2
1
R7225 1 DY 2 CCG5_ILIM 20 SCL3/VSEL_1 LSTX 39
SBA0520Q-R1-00001-GP-U 0R2J-2-GP 10KR2J-3-GP SDA3/VSEL_2 LSRX
0513 083.00520.0F8F 10 PD_XRES

ap
1

1
C7210 C7212 NX5P3363_FO 13
90 8 29 - S A_ J am e s ad d R 72 1 0
R7226 1 DY 2 CCG5_PROCHOT# 14 UV_OCP_TRIP/SCL_4 XRES# 18 CPU_DP_HPD_MUX R72081 2 0R2J-2-GP DP1_HPD_CPU

SCD1U16V2KX-3DLGP
R7216 OVP_TRIP/SDA_4 HPD
2nd =083.05S40.001F 10KR2J-3-GP

SC1U10V2KX-1DLGP
2 1 NX5P3363_FO

2
CCG5_SW D_CLK/CCG5_I2C_CFG_EC2
2 1 R7224 CCG5_SWD_IO 6 SW D_CLK/I2C_CFG 41
10KR2J-3-GP SW D_IO/AR_RST GND R7209
0R2J-2-GP

sl
100KR2J-1-GP
CYPD5126-40LQXIT-12-GP
90 8 29 - S A_ J am e s ad d D 7 20 3 071.05126.0P03

2
1
90 8 29 - S A_ J am e s ad d R7 2 11
C C

ic
MUX TUSB546 R7221
PD_XRES 2 1
[73] I2C_DATA_PD VDDD
[73] I2C_CLK_PD
4K7R2J-2-GP
C7219

t
[4,73] DP1_HPD_CPU
DY

SCD1U16V2KX-3DLGP
21
ma
he
MOD ID Settings MOD ID Settings VDDD

VDDD VDDD VDDD

2
R7219

c
RN7202 1KR2F-3-GPDY
2 3 I2C_CLK_PD
1

1
1 4 I2C_DATA_PD R7201 R7212

1
/s
SRN2K2J-1-GP
51KR2J-1-GP DY 100KR2J-1-GP CCG5_SWD_CLK/CCG5_I2C_CFG_EC

3D3V_S5 CCG5_MOD_ID1 CCG5_MOD_ID2

12

12

2
[73] CCG5_SBU1
R7220

me
R7213 1KR2F-3-GPDY
[73] CCG5_SBU2 R7214
1

150KR2J-GP 100KR2J-1-GP
R7202

1
100KR2J-1-GP
2

2
2

B
CCG5C_I2C_INT#

t. B
//
[74] NX5P3363_FO
s:
tp

TYPE-CCONNECTOR
[73] USB1_CC1
[73] USB1_CC2
ht

[73] TOP_MUX_P_L

[73] TOP_MUX_N_L

[73] BOT_MUX_P_L

[73] BOT_MUX_N_L

[73] USB1_SBU1

[73] USB1_SBU2

A A

PCH
[16] USB4_USB20_P
[16] USB4_USB20_N
<CorrreDesiiign>

Wistron Corporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,, Hsiiichiih,,,
TaiiipeiiiHsiiien221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle
USB PD(CYPD5126)
Siiize DocumentttNumberrr Rev
A2 Hellcat 14/15_ ICL SA
Dattte:::Tuesday,,, Septttemberrr 17,,, 2019 Sheettt 72 offf 106
5 4 3 2 1
 5 4 3 2 1

Main Func = TYPEC MUX For displayport function at dead batterycondition

20V_VCCPD_VBUS
3A
3D3V_MUX
3D3V_S5
3D3V_MUX 20V_VCCPD_VBUS 20V_VCCPD_VBUS_R

R73031 2 0R2J-2-GP C7329 C7330

C7325 C7326 C7327 C7328

1
DY

SC1U25V3KX-1-DLGP

SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP
R7306

SC10U25V5KX-DL-GP
1

1
Eletro-XTechnical
10KR2J-3-GP R7307 R73471 2 0R2J-2-GP

C7315
SCD1U16V2KX-3DLGP

C7316
SCD1U16V2KX-3DLGP

C7317
SCD1U16V2KX-3DLGP

C7318
SCD1U16V2KX-3DLGP

GP C7319
SC10U6D3V3MX-DL-

2
1

1
DY DY 4K7R2J-2-GP
USB1
A1 GND B1
A2 GND

2
2

2
CAD_SNK ED7308 ED7309 USB1_SSTX_CON_P1 B2 USB1_SSTX_CON_P2
USB1_SSTX_CON_N1 SSTXP1 SSTXP2 USB1_SSTX_CON_N2
A3 SSTXN1 SSTXN2 B3
A4 VBUS#A4 B4
VBUS#B4

NSR20F30NXT5G-GP

NSR20F30NXT5G-GP
HPDIN USB1_CC1 A5 CC1 B5 USB1_CC2
TOP_MUX_P A6 CC2 B6 BOT_MUX_P

AK

AK
A7 DP1 DP2
TOP_MUX_N B7 BOT_MUX_N
USB1_SBU1 DN1 DN2 USB1_SBU2
A8 RFU1 RFU2 B8
3D3V_MUX A9 B9
VBUS#A9 VBUS#B9
U7301 Slave address : 0X44 USB1_SSRX_CON_N2
USB1_SSRX_CON_P2
A10
A11 SSRXN2 SSRXN1
B10
B11
USB1_SSRX_CON_N1
USB1_SSRX_CON_P1
D
DisplayPortSource A12 SSRXP2 SSRXP1 B12 GND
D

1
1 38 EQ0 GND
[4] DP2_DDI_TX_P0 R7346
6 VCC EQ0 35 EQ1 R7345 2MR2F-GP
[4] DP2_DDI_TX_N0 EQ1
[4] DP2_DDI_TX_P1 20 VCC 2MR2F-GP
28 VCC 32 HPDIN
[4] DP2_DDI_TX_N1 HPDIN/DCI_CLK

2
VCC 29 CAD_SNK 13
DisplayPortSource

21
[4] DP2_DDI_TX_P2 CAD_SNK/DCI_DAT CHASSIS#13 14
[4] DP2_DDI_TX_N2 DP2_DDI_TX_P0 C7312 1 2 SCD1U16V2KX-3DLGPDP2_DDI_TX_RE_C_P0 9 17 I2CEN CHASSIS#14 15
[4] DP2_DDI_TX_P3 DP2_DDI_TX_N0 C7313 1 2 SCD1U16V2KX-3DLGPDP2_DDI_TX_RE_C_N0 10 DP0P I2C_EN CHASSIS#15
16
[4] DP2_DDI_TX_N3 DP2_DDI_TX_P2 C7309 1 2 SCD1U16V2KX-3DLGP DP2_DDI_TX_RE_C_P2 12 DP0N CHASSIS#16
DP2_DDI_TX_N2 C7308 1 2 SCD1U16V2KX-3DLGPDP2_DDI_TX_RE_C_N2 13 DP1P 27 CCG5_SBU1
DP1N SBU1 26 CCG5_SBU2 SKT-USB28-1-GP
USB HOST DP2_DDI_TX_P1 C7314 1 2 SCD1U16V2KX-3DLGP DP2_DDI_TX_RE_C_P1 15
DP2_DDI_TX_N1 C7307 1 2 SCD1U16V2KX-3DLGPDP2_DDI_TX_RE_C_N1 16
DP2P SBU2

[16] USB4_USB30_RX_P DP2_DDI_TX_P3 C7311 1 2 SCD1U16V2KX-3DLGP DP2_DDI_TX_RE_C_P3 18 DP2_DDI_TX_N3

DP2N
DP3P
24 DP2_AUX_C_P C7301 1 2SCD1U16V2KX-3DLGP DP2_AUX_CPU_P C7302 1 062.10009.0681
AUXP 25 DP2_AUX_C_N 2SCD1U16V2KX-3DLGP DP2_AUX_CPU_N
[16] USB4_USB30_RX_N C7310 12 SCD1U16V2KX-3DLGP DP2_DDI_TX_RE_C_N3 19 DP3N
AUXN
USB1_SSRX_C_P1 30
[16] USB4_USB30_TX_P USB1_SSRX_C_N131 14 DPEQ0_A1
RX1P
[16] USB4_USB30_TX_N USB1_SSRX_C_P2 40 DPEQ0/A1 2 DPEQ1
RX1N
USB1_SSRX_C_N239 DPEQ1
RX2P
RX2N 11 SSEQ0_A0
USB1_SSTX_C_P1 33 SSEQ0/A0
DisplayPortAUX USB1_SSTX_C_N134 SSEQ1
3 SSEQ1

USB1_SSTX_C_P2 37 TX1P
USB1_SSTX_C_N236 TX1N I2C_CLK_PD_MUXR73041 I2C_CLK_PD
[4] DP2_AUX_CPU_P USBHOST TX2P FLIP/SCL
21 2 0R2J-2-GP
USB1_SSTX_C_P1 C73241 2 USB1_SSTX_CMC_P1 R7310 1 2 0R2J-2-GPUSB1_SSTX_CON_P1
[4] DP2_AUX_CPU_N
USB4_USB30_RX_P C7305 1 2 SCD1U16V2KX-3DLGP USB4_USB30_RX_C_P 5 USB4_USB30_RX_N TX2N 22 I2C_DATA_PD_MUX R73051 2 0R2J-2-GP I2C_DATA_PD
C7306 1 2 SCD1U16V2KX-3DLGPUSB4_USB30_RX_C_N4 SSRXP CTL0/SDA 23 MUX_HPD_PD R73261 2 0R2J-2-GP DP1_HPD_CPU SCD1U16V2KX-3DLGP
SSRXN CTL1/HPDIN

p
USB4_USB30_TX_P C7303 1 2 SCD1U16V2KX-3DLGP USB4_USB30_TX_C_P 8 USB4_USB30_TX_N FILTER-4P-201-GP ED7302
41 4 3
MUXI2C C7304 1 2 SCD1U16V2KX-3DLGPUSB4_USB30_TX_C_N7 SSTXP
GND 068.10129.2021 8
SSTXN 1 DY 2 3rd = 68.24500.201 3

to
USB1_SSTX_CON_N2 1 10 O
_
N
2
C
X
_S
T
B
1U
[72] I2C_CLK_PD 2nd = 068.01210.2031
TUSB546-DCIRNQR-1-GP
3D3V_MUX EL7303 USB1_SSTX_CON_P2 2 9 USB1_SSTX_CON_P2
[72] I2C_DATA_PD 071.00546.M001
R7301 1 2 100KR2J-1-GPDP2_AUX_C_N USB1_SSRX_CON_N2 4 7 USB1_SSRX_CON_N2
USB1_SSTX_C_N1C73231 2 USB1_SSTX_CMC_N1 1 2 USB1_SSTX_CON_N1
DisplayPortHPD R7302 1 2 100KR2J-1-GPDP2_AUX_C_P R7311 0R2J-2-GP USB1_SSRX_CON_P2 5 6 USB1_SSRX_CON_P2
SCD1U16V2KX-3DLGP

ap
[4,72] DP1_HPD_CPU
AZ1043-04F-R7G-GP
075.01043.0073
3D3V_MUX 3D3V_MUX 3D3V_MUX 3D3V_MUX 3D3V_MUX 3D3V_MUX 3D3V_MUX 2nd =075.08810.0A73
I2C/USBMUX

sl
3rd = 075.73044.0003
C C

1
1

1
R7320 R7318 R7344 R7325 R7341 R7327 R7323
DY 1KR2J-1-GP DY 1KR2J-1-GP 1KR2J-1-GP DY 1KR2J-1-GP DY 1KR2J-1-GP DY 1KR2J-1-GP DY 1KR2J-1-GP

[72] CCG5_SBU1

ic
EQ0 EQ1 I2CEN DPEQ1 DPEQ0_A1 SSEQ1 SSEQ0_A0 USB1_SSRX_C_P1C73311 2 USB1_SSRX_CMC_P1 R73121 2 0R2J-2-GPUSB1_SSRX_CON_P1
[72] CCG5_SBU2 ED7301
1

1
8
SCD1U16V2KX-3DLGP
2

2
R7321 R7319 R7343 R7322 R7324 3
R7340 R7342 USB1_SSRX_CON_P1
1KR2J-1-GP 1KR2J-1-GP DY 1KR2J-1-GP FILTER-4P-201-GP 1 10 P
1
O
N
_
CX
_
R
_
S
B
U
1
1KR2J-1-GP 1KR2J-1-GP 1KR2J-1-GP 1KR2J-1-GP
4 3 068.10129.2021 USB1_SSRX_CON_N1 2 9 USB1_SSRX_CON_N1
1 DY 2 3rd = 68.24500.201
2

t
USB1_SSTX_CON_P1 4 7 USB1_SSTX_CON_P1
2nd = 068.01210.2031
EL7304
USB1_SSTX_CON_N1 5 6 USB1_SSTX_CON_N1

ma
USB1_SSRX_C_N1 C7332 1 2 USB1_SSRX_CMC_N1 1 2 USB1_SSRX_CON_N1
R7313 0R2J-2-GP
SCD1U16V2KX-3DLGP AZ1043-04F-R7G-GP

075.01043.0073
TypeCCC 2nd =075.08810.0A73

he
3rd = 075.73044.0003

[72] USB1_SBU1
[72] USB1_SBU2

c
[72] USB1_CC1
[72] USB1_CC2
0614 Layout HT

/s
USB1_SSRX_C_P2 C7333 1 2 USB1_SSRX_CMC_P2 R7314 1 2 0R2J-2-GP USB1_SSRX_CON_P2
[72] TOP_MUX_P_L ED7304
SCD1U16V2KX-3DLGP
2 BOT_MUX_P
[72] TOP_MUX_N_L
EL7305
1 2 2nd = 068.01210.2031 3
[72] BOT_MUX_P_L DY 3rd =68.24500.201

me
4 3
1 BOT_MUX_N
068.10129.2021
[72] BOT_MUX_N_L FILTER-4P-201-GP
AZ5315-02F-GP

B
USB1_SSRX_C_N2 C7334 1 2 USB1_SSRX_CMC_N2 1 2 USB1_SSRX_CON_N2 83.05315.0A0 B
R7315 0R2J-2-GP

t. SCD1U16V2KX-3DLGP

ED7305

2 USB1_SBU1
//
3

1 USB1_SBU2

AZ5315-02F-GP
83.05315.0A0
s:

USB1_SSTX_C_P2 C73211 2 USB1_SSTX_CMC_P2 R7316 1 2 0R2J-2-GPUSB1_SSTX_CON_P2

SCD1U16V2KX-3DLGP

EL7306 ED7306
1 2 2nd = 068.01210.2031
DY 3rd =68.24500.201 2 TOP_MUX_P
4 3
tp

068.10129.2021 3
FILTER-4P-201-GP
1 TOP_MUX_N

USB1_SSTX_C_N2 C7322 1 2 USB1_SSTX_CMC_N2 1 2 USB1_SSTX_CON_N2

R7317 0R2J-2-GP AZ5315-02F-GP
SCD1U16V2KX-3DLGP
ht

83.05315.0A0

ED7307

2 USB1_CC1

1 USB1_CC2
EL7301
TOP_MUX_N_L 1 2 TOP_MUX_N AZ5315-02F-GP
TOP_MUX_P_L 4 3 TOP_MUX_P 83.05315.0A0

A A
068.09002.2001
DLM0NSN900HY2D-GP

EL7302 <Corrre Desiiign>

BOT_MUX_P_L 1 2 P
_
XU
M_
T
B
O

BOT_MUX_N_L BOT_MUX_N
4 3
Wistron Corporation
DLM0NSN900HY2D-GP 21F,,,88,,, Sec...1,,,HsiiinTaii WuRd...,,,Hsiichiih,,,
TaiiipeiiHsiien221,,,Taiiwan,,,R...O...C...
068.09002.2001
Tiittle
USB Type-C&MUX(TUSB546)
SiiizeDo umenttt Numberrr Rev
Custttom SA
Hellcat 14/15_ ICL
Dattte:::Tuesday,,, Septttemberrr 17,,, 2019 Sheettt73 off 105

Eletro-XTechnical
5 4 3 2 1
 5 4 3 2 1

[72] PD_VBUS_C_CTRL1

Eletro-XTechnical
[72] VBUS_P_CTRL

[24] TYPEC_DCIN1_EN#

[44] VCCPD_VBUS_ACK

[72] NX5P3363_FO

D D

5V_S5

C7403 C7404

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP
21

21

p
to
20V_VCCPD_VBUS
U7403

C2 A1
VBUS#C 2 VIN#A1
D1 A2
VBUS#D 1 VIN#A2 D7401
D2

ap
VBUS#D 2 B1 VCP_VBUS AK SBA330AH-R1-00001-GP 20V_VCCPD_VBUS
VCP#B1 B2
D4 VCP#B2 C1 083.00330.008H
NX5P3363CAP 2nd = 083.03040.008H
C AP VCP# C1
C7405 A3 NX5P3363_ILIM R7418 1 2 14K3R2F-GP
B3 ILIM B4 VBUS_P_CTRL

SC1KP50V2KX-1DLGP
C3 GND EN C4 NX5P3363_FO R7410 2 DY 1 10KR2J-3-GP
VDDD
D3 GND FO A4 FLT_NX5P3363 R7414 2
DY 1 47KR2J-2-GP

21

sl
GND FLT#

NX5P3363UKZ-1-GP
074.53363.M001

C C

t ic
ma
USB_ADT

he
+SDC_IN

U7418
8 D S 1
7D S 2
6D S 3

100KR2F-L1-GP
5D R7430

R7406
R7401 G 1MR2J-1-GP

c
100KR2J-1-GP AONR21321-GP

SC1500P50V2KX-2-DL-GP
C7401
4

S
2

21

21
084.21321.0037 R7404 G

21
C2
2nd = 084.03307.0037 1MR2J-1-GP

C1

/s
VIINT B1
Q7408

12
D1 VI
VBUS
VBUS

VINT
3D3V_S5 PJA3413-1-GP

1
D2
E1
084.03413.0031

D
2nd = 084.02301.0031

E2
R7403

B2
LPS_SW_B

EN# VBUS
1 2

OVLO VBUS
ACK VBUS
U7419
R7424

C3 GND
0R2J-2-GP
NX20P5090UK-GP

LPS_SW
me
GND
GND
100KR2J-1-GP
A2
074.20509.007Z

D3
E3
A1

NT
A3

B3
21

VCCPD_VBUS_ACK
LPS_SW_C
R7402

t. 200KR2F-L-GP

100KR2F-L1-GP
3D3V_S5

R7405
12

21
1

LPS_SW_A
R7427
Q7406
B 100KR2F-L1-GP B
//
3 4
2

D2 S2

TYPEC_DCIN1_EN# 2 5 PD_VBUS_C_CTRL1
G2 G1
PD_VBUS_C_EN 1 R7422 2
1 6 LPS_SW_D
D1 S1
1MR2J-1-GP

Form EC (CY18 add) Q7407 PJT138KA-GP

s:

075.00138.0A7C
3 4 2nd = 075.00138.0F7C
S2 D2

TYPEC_DCIN1_EN# 2 5
G2 G1
1

1 D1 S1 6
R7428
tp

100KR2F-L1-GP PJT138KA-GP 1 R7407 2

075.00138.0A7C 200KR2F-L-GP
2

2nd = 075.00138.0F7C

20V_VCCPD_VBUS
ht

Q7405 R7426
R7425
1 2 PD_VBUS_C_EN_A 3 4 100KR2F-L1-GP
20V_VCCPD_VBUS
100KR2F-L1-GP PD_VBUS_C_CTRL1
5 PD_VBUS_C_CTRL1_R
N o t e: Z Z . 2 70 0 2

Form PD control
.F7 C0 1

1 6
2N7002KDW-1-GP
2nd = 075.27002.0E7C R7408
75.27002.F7C 200KR2F-L-GP
212 1

PD_VBUS_C_CTRL1_A

20V_VCCPD_VBUS

Q7404 R7423
100KR2F-L1-GP
3 4

VBUS_P_CTRL
N o t e: Z Z . 2 70 0 2

2 5

VBUS_P_CTRL_R
.F7 C0 1

Form PD control 1 6

2N7002KDW-1-GP
A 2nd = 075.27002.0E7C R7409 A

75.27002.F7C 200KR2F-L-GP
2121

Eletro-XTechnical
<CoreDesiiign>

Wistron Corporation
21F,,,88,,,Sec.1,,,Hsiiin Taiii W u Rd., Hsiiichiiih,,,
Taiiipeiii Hsiiien 221,,,Taiiiwan,,,R.O.C...

Title

GPU(2/5)DIGITALOUT
Document Number Rev
Siiize
A1 Hellcat 14/15_ ICL _CML SA
Date: Tuesday,,, September 17, 2019 Sheet 74 offf 105

5 4 3 2 1
 5 4 3 2 1

Main Func = dGPU

1.05V+/-30mV
3.3A
Eletro-XTechnical
dGPUReset
1D8V_AON_S0
U7601 1V_VGA_S0
DGPU_HOLD_RST# 1 5
A VCC
PLT_RST# 2 U74LVC1G08G-AL5-R-GP-U
B OPS
3 4 SYS_PEX_RST_MON#
GND Y
D D

1
73.01G08.EHG C7613 C7611 C7612 C7610 C7625 C7623
2ND = 073.7SZ08.000G C7626

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP
2
R7606 OPS
3RD = 73.01G08.L04

SC1U10V2KX-1DLGP

SC22U6D3V3MX-1-DL-GP
[18] GFX_CLK_CPU_P

2
[18] GFX_CLK_CPU_N OPS 10KR2J-3-GP OPS OPS OPS OPS OPS

1
[4] DGPU_HOLD_RST#

[17,61,63,66,91] PLT_RST# 1D8V_VGA_S0

[85] VGACORE_VDD_SENSE_1 1D8V_AON_S0
OPS
1 OF14
[85] VGACORE_GND_SENSE_1 GPU1A
Place close VDD ball Place close Chip
1/14PCI_EXPRESS

AB6

2
[18] CLK_PCIE_PEG_REQ# R7603 NC#AB6
OPS 10KR2J-3-GP AA22
R7613

G
[16] GFX_PCIE_RX_P0 SYS_PEX_RST_MON# GPU_PEX_RST# PEX_DVDD AB23
1 OPS 2 AC7 PEX_DVDD AC24
[16] GFX_PCIE_RX_N0 PEX_RST_N

1
0R2J-2-GP PEX_DVDD AD25
CLK_PCIE_PEG_REQ# D S GPU_CLKREQ# AC6
[16] GFX_PCIE_TX_P0 OPS PEX_CLKREQ# PEX_DVDD AE26
PEX_DVDD
[16] GFX_PCIE_TX_N0 GFX_CLK_CPU_P AE8 AE27
[16] GFX_PCIE_RX_P1 Q7601 GFX_CLK_CPU_N AD8 PEX_REFCLK PEX_DVDD
PEX_REFCLK_N 1D8V_VGA_S0
[16] GFX_PCIE_RX_N1 PJE8408-R1-00001-GP
GFX_PCIE_RX_P0 C7601 1 OP2S SCD22U10V2KX-2-GPGFX_PCIE_RX_CON_P0 AC9 PEX_TX0
GFX_PCIE_RX_N0 C7602 1 OP2S SCD22U10V2KX-2-GPGFX_PCIE_RX_CON_N0 AB9
[16] GFX_PCIE_TX_P1 084.08408.0031 PEX_TX0_N
[16] GFX_PCIE_TX_N1 GFX_PCIE_TX_P0 AG6
GFX_PCIE_TX_N0 AG7 PEX_RX0 AA10

p
PEX_RX0_N PEX_HVDD AA12
GFX_PCIE_RX_P1 SCD22U10V2KX-2-GP GFX_PCIE_RX_CON_P1 AB10 PEX_HVDD AA13
C7603 1OPS2 PEX_TX1
GFX_PCIE_RX_N1 SCD22U10V2KX-2-GP GFX_PCIE_RX_CON_N1AC10 PEX_HVDD AA16
C7604 1OPS2
PEX_TX1_N PEX_HVDD AA18

to
GFX_PCIE_TX_P1 AF7 PEX_HVDD AA19 C7614 C7622 C7630C7631C7621 C7620 C7629 C7627
GFX_PCIE_TX_N1 AE7 PEX_RX1 PEX_HVDD AA20 C7628

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP
PEX_RX1_N PEX_HVDD AA21

21
21

21

21

21

21

21

21

21
OPS

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

SC22U6D3V3MX-1-DL-GP
AD11 PEX_HVDD AB22
C
PEX_HVDD AC23 OPS OPS OPS OPS OPS OPS OPS OPS C
AC11 PEX_TX2
PEX_TX2_N PEX_HVDD AD24
AE9
OPS PEX_HVDD AE25

ap
AF9 PEX_RX2 PEX_HVDD AF26
PEX_RX2_N PEX_HVDD AF27
0508 AC12 PEX_HVDD
AB12 PEX_TX3
PEX_TX3_N
AG9
AG10 PEX_RX3
Place close VDD ball Place close Chip

sl
PEX_RX3_N
AB13
AC13 PEX_TX4
PEX_TX4_N
AF10
AE10 PEX_RX4
PEX_RX4_N 3.3V+/-5%
210mA

ic
AD14 NC FOR GF119 1D8V_VGA_S0
AC14 PEX_TX5 AA8
PEX_TX5_N PEX_PLL_HVDD AA9
AE12 PEX_PLL_HVDD
AF12 PEX_RX5
PEX_RX5_N AB8
AC15 NC#AB8

NC FOR GM108
AB15 PEX_TX6

t
PEX_TX6_N

1
C7616C7615C7624
AG12
Place close Chip

SCD1U16V2KX-3DLGP

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP
PEX_RX6
AG13 PEX_RX6_N

2
ma
AB16
OPS DY DY
AC16 PEX_TX7
PEX_TX7_N
AF13
AE13 PEX_RX7
PEX_RX7_N
AD17

he
AC17 PEX_TX8
PEX_TX8_N
AE15
AF15 PEX_RX8
B PEX_RX8_N B
AC18 F2 VGACORE_VDD_SENSE_1
AB18 PEX_TX9 VDD_SENSE
POWER IC

c
PEX_TX9_N
AG15 F1 VGACORE_GND_SENSE_1
AG16 PEX_RX9 GND_SENSE
PEX_RX9_N

/s
AB19
AC19 PEX_TX10
PEX_TX10_N
AF16
AE16 PEX_RX10
PEX_RX10_N
AD20

me
AC20 PEX_TX11
PEX_TX11_N
AE18
AF18 PEX_RX11
PEX_RX11_N
AC21
AB21 PEX_TX12

NC FOR GF117/GK208/GM108
PEX_TX12_N

t. AG18
AG19 PEX_RX12

AD23
AE23

AF19
PEX_RX12_N

PEX_TX13
PEX_TX13_N
NC#AE22
AF22
NC#AF22 AE22

AA14
//
AE19 PEX_RX13 NC#AA14 AA15
PEX_RX13_N NC#AA15
AF24
AE24 PEX_TX14
PEX_TX14_N
AE21
AF21 PEX_RX14 R7602
s:

PEX_RX14_N AD9 TESTMODE 1 OPS 2

AG24 NVJTAG_SEL 10KR2F-2-GP
AG25 PEX_TX15
PEX_TX15_N
AG21
A AG22 PEX_RX15 A
PEX_RX15_N
tp

R7601
AF25 PEX_TERMP 1 OPS 2
PEX_TERMP
<Corrre Desiiign>
2K49R2F-GP
N17S-G1-A1-GP
Wistron Corporation
071.0N17S.0000 21F,,,88,,, Sec...1,,,HsiiinTaiiiWuRd...,,,Hsiichiih,,,
ht

TaiiipeiiHsiien221,,,Taiiwan,,,R...O...C...

Tiittle
GPU(1/5)PEG
Siiize Documenttt Numberrr Rev
Custtom Hellcat 14/15_ ICL SA
Dattte:::Tuesday,,, Septttemberrr17,,,2019 Sheettt 76 offf 106

5 4 3 2 1

Eletro-XTechnical
 5 4 3 2 1

Main Func = dGPU

Eletro-XTechnical
1V_VGACORE1_S0 GPU1H 5 OF 14
5/14 IFPC
IFPC
T6 1V_VGACORE1_S0
XVDD GF119/GK208
GPU1G 4 OF 14
D 4/14 IFPAB DVI/HDMI DP D

M7
I2CW _SDA
N5 GPU1J 7 OF 14
AC4 N7 XVDD I2CW _SCL
XVDD N4
IFPA_L3_N XVDD XVDD 7/14 IFPEF 1V_VGACORE1_S0
IFPA_L3 AC3
GF119/GK208
AA6 N3 1V_VGACORE1_S0
TXC DVI-DL DVI-SL/HDMI DP
IFPAB_RSET Y3 TXC
XVDD N2
XVDD J3
IFPA_L2_N I2CY_SDA I2CY_SDA
Y4 R3 XVDD J2
IFPA_L2 TXD0 XVDD R2
I2CY_SCL I2CY_SCL
J7 XVDD
TXD0 XVDD XVDD
V7 XVDD
AA2 R1 J1
IFPA_L1_N TXD1
XVDD T1 TXC TXC XVDD K1
W7 IFPAB_PLLVDD IFPA_L1 AA3 TXD1
XVDD TXC TXC XVDD
K7
T3 XVDD K3

NC FOR GF117/GM108
TXD2 XVDD T2 TXD0 TXD0 XVDD K2
AA1 TXD2 XVDD TXD0 TXD0 XVDD
IFPA_L0_N AB1
K6 M3

NC FOR GF117/GM108
IFPA_L0 TXD1 TXD1
GF117 XVDD XVDD M2
TXD1 TXD1 XVDD
AA5 P6 C3
XVDD NC GPIO15
IFPA_AUX_SDA_N AA4 M1
TXD2 TXD2 XVDD N1

p
IFPA_AUX_SCL TXD2 TXD2 XVDD
GPU
NC FOR GF117/GM108

AB4 IFPE NC FOR GK208

to
IFPB_L3_N AB5

NC FOR GF117/GM108
IFPB_L3
AB2 C2
IFP_IOVDD HPD_E HPD_E GPIO18
W6
AB3
6 OF 14

ap
Y6 1V_VGACORE1_S0 GPU1I NC FOR GF117
NC FOR GF117/GM108

IFPB_L2_N
IFP_IOVDD IFPB_L2 6/14 IFPD
H6
AD2 XVDD
GF119/GK208
U6 GF119/GK208 1V_VGACORE1_S0 J6
IFPB_L1_N AD3 XVDD XVDD DVI-DL DVI-SL/HDMI DP

sl
IFPB_L1 DVI/HDMI DP H4

NC FOR GF117/GK208/GM108
I2CZ_SDA XVDD H3
AD1 I2CZ_SCL
T7 P4 XVDD
AE1 XVDD
I2CX_SDA
XVDD P3
IFPB_L0_N I2CX_SCL XVDD
C IFPB_L0 R7 TXC
J5 C
XVDD XVDD J4
AD5 TXC

ic
R5 XVDD
AD4 TXC XVDD R4
1D8V_AON_S0 TXD3 TXD0 K5
IFPB_AUX_SDA_N TXC XVDD XVDD K4
IFPB_AUX_SCL TXD3 TXD0 XVDD
T5
TXD0 XVDD T4
TXD0 TXD4 TXD1 L4
XVDD IFPF XVDD L3

NC FORGF117/GM108
TXD1

t
TXD4
U4 XVDD
TXD1

NC FORGF117/GM108
GF117
B3 R7701 IFPD TXD1
XVDD U3
XVDD TXD5 TXD2
M5
IFPAB OPS 10KR2J-3-GP XVDD M4

ma
GPU NC GPIO14 TXD5 TXD2
3 OF 14 V4 XVDD
GPU1K TXD2
3/14 DACA
XVDD V3
TXD2

NC FOR GF117/GM108
XVDD
1
2

NC FOR GK208
GF117/GM108 GF117 GM108/GK208
W5 B7 VGA_B7 GF117 F7
NC#W 5 NC NC HPD_F GPIO19
GPIO23 A7 R6 D4

he
NC GPIO22 XVDD NC GPIO17
AE2
TS_VREF TSEN_VREF NC FOR GF117
AF2 AE3
NC#AF2 NC NC
NC#AE3 AE4
NC NC#AE4 GPU

c
AG3 GPU
NC NC#AG3

/s
AF4
NC NC#AF4
AF3
NC NC#AF3
GM108
GK208
GF117

me
GPU

B
t. B
//
s:
tp
ht

A A

<CorrreDesiiign>

WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle

GPU(2/5)DIGITALOUT
Siize DocumentttNumberrr Rev
A2
Hellcat 14/15_ ICL SA
Dattte::: Tuesday,,, Septttemberrr17,,, 2019 Sheettt 77 offf 106
5 4 3 2 1
 Main Func = dGPU
5 4 3 2 1

1.35V +/- 3%
4.88A
[81] FBA_DQM0
[81] FBA_D[0..31] [81] FBA_DQM1
[81] FBA_DQM2 GPU1D
81 FBA_DQM3 2 OF 14 12 OF 14 1D35V_VGA_S0
82 FBA_DQM4 GPU1B
[82] FBA_DQM5
2/14FBA
12/14FBVDDQ UnderGPU NearGPU

Eletro-XTechnical
[82] FBA_DQM6 FBA_D0 E18 F3 B26
[82] FBA_DQM7 NC
FBA_D1 F18 FBA_ D 0 GNDS_SENSE FBVDDQ C25
FBA_D2 E16 FBA_ D 1 FBVDDQ E23
GF119 FBVDDQ
FBA_D3 F17 FBA_ D 2 E26
[81] FBA_EDC0 FBA_D4 D20 FBA_ D 3 FBVDDQ F14 C7801 C7802 C7817
[81] FBA_EDC1 D21 FBA_ D 4 FBVDDQ

1
FBA_D5 F21 C7825 C7807 C7813 C7814 C7823 C7819 C7820 C7821 C7822

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP
[81] FBA_EDC2 FBA_D6 F20 FBA_ D 5 FBVDDQ G13 DY DY
81 FBA_EDC3 DY DY OPS OPS OPS OPS OPS OPS

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC22U6D3V3MX-1-DL- GP

SC22U6D3V3MX-1-DL- GP

SC22U6D3V3MX-1-DL- GP
FBA_D7 E21 FBA_ D 6 FBVDDQ G14
82 FBA_EDC4

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP
E15 FBA_ D 7 FBVDDQ

2
2
FBA_D8 G15
[82] FBA_EDC5 FBA_D9 D15 FBA_ D 8 FBVDDQ G16
OPS OPS
[82] FBA_EDC6
[82] FBA_EDC7
FBA_D10 F15 FBA_ D 9 FBVDDQ G18
FBA_D11 F13 FBA_D10 FBVDDQ G19
FBA_D12 C13 FBA_D11 FBVDDQ G20
[81] FBA_CMD0
FBA_D13 B13 FBA_D12 FBVDDQ G21
[81] FBA_CMD1
[81] FBA_CMD2 FBA_D14 E13 FBA_D13 FBVDDQ L22
[81] FBA_CMD3 FBA_D15 D13 FBA_D14 FBVDDQ L24
D [81] FBA_CMD4 FBA_D16 B15 FBA_D15 FBVDDQ L26 D
[81] FBA_CMD5 FBA_D17 C16 FBA_D16 FBVDDQ M21
[81] FBA_CMD6 FBA_D18 A13 FBA_D17 FBVDDQ N21
[81] FBA_CMD7 FBA_D19 A15 FBA_D18 FBVDDQ R21
[81] FBA_CMD8 FBA_D20 B18 FBA_D19 FBVDDQ T21
[81] FBA_CMD9 FBA_D21 A18 FBA_D20 FBVDDQ V21 C7829 C7824
[81] FBA_CMD10 FBA_D22 A19 FBA_D21 FBVDDQ W 21
[81] FBA_CMD11

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP
C19 FBA_D22 FBVD D Q

1
FBA_D23

21

21
C7826 C7812 C7816 C7811 C7815C7810
[81] FBA_CMD12 FBA_D24 B24 FBA_D23 DY DY
[81] FBA_CMD13 GF117
FBA_D25 C23 FBA_D24
[81] FBA_CMD14 GF119

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP
A25 FBA_D25

2
FBA_D26
81 FBA_CMD15 GK208 OPS OPS OPS OPS OPS OPS
82 FBA_CMD16
FBA_D27 A24 FBA_D26
[82] FBA_CMD17
FBA_D28 A21 FBA_D27 FBVDDQ H24
[82] FBA_D[32..63] FBVD D Q
[82] FBA_CMD18
FBA_D29 B21 FBA_D28
FBA_D30 C20 FBA_D29
FBVDDQ FBVDDQ H26J21
[82] FBA_CMD19 FBVDDQ
[82] FBA_CMD20 FBA_D31 C21 FBA_D30 FBVD D Q K21
FBVDDQ
[82] FBA_CMD21 FBA_D32 R22 FBA_D31 FBVDDQ
[82] FBA_CMD22 FBA_D33 R24 FBA_D32 C27 FBA_CMD0
[82] FBA_CMD23 FBA_D34 T22 FBA_D33 FBA_CMD0 C26 FBA_CMD1
[82] FBA_CMD24 FBA_D35 R23 FBA_D34 FBA_CMD1 E24 FBA_CMD2
[82] FBA_CMD25 FBA_D36 N25 FBA_D35 FBA_CMD2 F24 FBA_CMD3
[82] FBA_CMD26 FBA_D37 N26 FBA_D36 FBA_CMD3 D27 FBA_CMD4
[82] FBA_CMD27 FBA_D38 N23 FBA_D37 FBA_CMD4 D26 FBA_CMD5
[82] FBA_CMD28 FBA_D39 N24 FBA_D38 FBA_CMD5 F25 FBA_CMD6
[82] FBA_CMD29 FBA_D40 V23 FBA_D39 FBA_CMD6 F26 FBA_CMD7
[82] FBA_CMD30 FBA_D41 V22 FBA_D40 FBA_CMD7 F23 FBA_CMD8
[82] FBA_CMD31 FBA_CMD8
FBA_D42 T23 FBA_D41 G22 FBA_CMD9
FBA_D43 U22 FBA_D42 FBA_CMD9 G23 FBA_CMD10
FBA_D44 Y24 FBA_D43 FBA_CMD10 G24 FBA_CMD11
FBA_D45 AA24 FBA_D44 FBA_CMD11 F27 FBA_CMD12
[81] FBA_CLK0P FBA_D46 Y22 FBA_D45 FBA_CMD12 G25 FBA_CMD13

p
81 FBA_CLK0N FBA_CMD13
82 FBA_CLK1P
FBA_D47 AA23 FBA_D46 G27 FBA_CMD14
FBA_CMD14 1D35V_VGA_S0
[82] FBA_CLK1N
FBA_D48 AD27 FBA_D47 G26 FBA_CMD15
FBA_D49 AB25 FBA_D48 FBA_CMD15 M24 FBA_CMD16
FBA_D50 AD26 FBA_D49 FBA_CMD16 M23 FBA_CMD17
UnderGPU

to
FBA_D51 AC25 FBA_D50 FBA_CMD17 K24 FBA_CMD18 R7805
FBA_D52 AA27 FBA_D51 FBA_CMD18 K23 FBA_CMD19 2 1 FB_CAL_PD_VDDQ D 22
FBA_D53 AA26 FBA_D52 FBA_CMD19 M27 FBA_CMD20 FB_CAL_ PD_VDDQ
[81] FBA_WCK01 FBA_D54 W 26 FBA_D53 FBA_CMD20 OPS
[81] FBA_WCK01# M26 FBA_CMD21 40D2R2F-GP
[81] FBA_WCK23
FBA_D55 Y25 FBA_D54 FBA_CMD21 M25 FBA_CMD22 FB_CAL_PU_GND C 24
FBA_D56 R26 FBA_D55 FBA_CMD22 K26 FBA_CMD23 FB_CAL_PU_ GND
81 FBA_WCK23# FBA_CMD23
82 FBA_WCK45
FBA_D57 T25 FBA_D56 K22 FBA_CMD24
[82] FBA_WCK45# FBA_D58 N27 FBA_D57 FBA_CMD24 J23 FBA_CMD25 FB_CAL_TERM_GND B25

ap
[82] FBA_WCK67 FBA_D59 R27 FBA_D58 FBA_CMD25 J25 FBA_CMD26 FB_CAL_ TERM_ GND
[82] FBA_WCK67# FBA_D60 V26 FBA_D59 FBA_CMD26 J24 FBA_CMD27
FBA_D61 V27 FBA_D60 FBA_CMD27 K27 FBA_CMD28 N17S-G1-A1-GP
FBA_D62 W 27 FBA_D61 FBA_CMD28 K25 FBA_CMD29
FBA_D63 W 25 FBA_D62 FBA_CMD29 J27 FBA_CMD30
FBA_D63 FBA_CMD30 J26 FBA_CMD31 GDDR5:60.4R 071.0N17S.0000

1
FBA_CMD 31
FBA_DQM0
R7807 OPS R7806
D19 40D2R2F-GP OPS 60D4R2F-GP
GDDR3:51.1R

sl
FBA_DQM1 FBA_DQM0
D14
FBA_DQM2 FBA_DQM1
C17 GF117/GF119

2
FBA_DQM3 FBA_DQM2
C22 GK208
FBA_DQM4 P24 FBA_DQM3
FBA_DQM5 W 24 FBA_DQM4 B19
NC FBA_CMD 32
FBA_DQM6 AA25 FBA_DQM5
FBA_DQM7 U25 FBA_DQM6 FBA_DEBUG0 F22
C FBA_DQM7 FBA_CMD34 J22 C
FBA_DEBUG1 FBA_CMD 35

ic
FBA_EDC0 E19
FBA_EDC1 C15 FBA_ DQS_ W P0
FBA_EDC2 B16 FBA_ DQS_ W P1 D24 FBA_CLK0P
FBA_EDC3 B22 FBA_ DQS_ W P2 FBA_CLK0 D25 FBA_CLK0N
FBA_EDC4 R25 FBA_ DQS_ W P3 FBA_CLK0 _ N N22 FBA_CLK1P
FBA_EDC5 W 23 FBA_ DQS_ W P4 FBA_CLK1 M22 FBA_CLK1N
FBA_EDC6 AB26 FBA_ DQS_ W P5 FBA_CLK1 _N
FBA_EDC7 T26 FBA_ DQS_ W P6

t
FBA_DQS_ W P7

F19 D18 FBA_WCK01

C14 FBA_D QS_ RN0 FBA_W CK 01 C18 FBA_WCK01#

ma
A16 FBA_D QS_ RN1 FBA_W CK 01_N D17 FBA_WCK23
A22 FBA_DQS_ RN 2 FBA_W CK 23 D16 FBA_WCK23#
P25 FBA_ DQS_ RN3 W FBA_W CK 23_N T24 FBA_WCK45
22 FBA_ DQS_ RN 4 AB27 FBA_W CK 45 U24 FBA_WCK45#
FBA_DQS_ RN 5 FBA_W CK 45_N V24 FBA_WCK67
T27 FBA_DQS_ RN6 FBA_W CK 67 V25 FBA_WCK67#
FBA_DQS_ RN 7 FBA_W CK67_N

he
Modify by change to GDDR5 GF119
62mA
1D8V_VGA_S0
F16
FB_PLL_ AVDD
NC
P22
Under GPU Near GPU
FB_PLL_ AVDD L7801

FB_PLLAVDD
H22 35mA 1D8V_FBA_PLL_AVDD 1 2
FB_REFPLL_ AVDD
OPS
GF117

c
C7808 C7809 C7805 C7806 C7818 MHC1608S300QBP-GP

1
1

1
O 68.00335.051

SCD1U 6V2KX-3DLGP

SCD1U 6V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP
OPS OPS OPS OPS P
11 S 2nd = 68.00334.051

SC22U6D3V3MX-1-DL-GP
/s
2

2
2

2
30ohm@100MHZ(ESR=0.01ohm)
D 23
FB_VREF
Sourcer suggest to change to
N17S-G1-A1-GP 68.00335.051 from 68.00084.H41.

071.0N17S.0000

me
1D35V_VGA_S0
Note:
Reference NV-DDR5 CRB and DOH70 by GDDR5

t.
2

R7816 R7824
10KR2F-2-GP

10KR2F-2-GP

OPS OPS
1

B FBA_CMD14 B
//
FBA_CMD30

FBA_CMD29
FBA_CMD13
2

s:

R7820 R7821
10KR2F-2-GP

10KR2F-2-GP

OPS OPS
1

tp
ht

A A

Eletro-XTechnical
<CoreDesiiign>

WistronCorporation
21F,,,88,,,Sec.1,,,Hsiiin Taiii W u Rd., Hsiiichiiih,,,
Taiiipeiii Hsiiien 221,,,Taiiiwan,,,R.O.C...

Tiittle

GPU(3/5)VRAMI/F Rev
Siiize DocumentNumber
A1
Hellcat 14/15_ ICL SA
Datte::: Tuesday,,, September 17, 2019 Sheet 78 offf 106
5 4 3 2 1
 Main Func = dGPU
5 4 3 2 1

1D8V_AON_S0 1D8V_VGA_S0 1D8V_VGA_PLL

UnderGPU
L7901
RN7910

Eletro-XTechnical
1 OPS 2
OVERT_GPU# 1 4 C7905 C7906
GPIO9_ALERT 2 3 MHC1608S300QBP-GP C7934
68.00335.051

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP
C7935 GPU1M 9 OF 14

SC4D7U6D3V3KX-DLGP
SRN10KJ-5-GP 2nd = 68.00334.051 OPS OPS OPS OPS 9/14XTAL_PLL

SC22U6D3V3MX-1-DL-GP
21

21

21
21
OPS 30ohm@100MHZ L6
M6 XS_PLLVDD
8 OF 14 1D8V_AON_S0
(ESR=0.01ohm) SP_PLLVDD
GPU1N
N6
8/14MISC1 VID_PLLVDD NC
D9 M
_
N
V
R
EH
_C
TB
M
S
I2CS_SCL D8 SMBD_THERM_NV
I2CS_SDA GF119/GK208 GF117/GM108
RN7904 C7902
A9 I2CC_SCL 4 1
D D

SCD1U16V2KX-3DLGP
I2CC_SCL B9 I2CC_SDA 3 OPS 2
I2CC_SDA OPS VIDEO_CLK_XTAL_SS A10
1D8V_AON_S0 C10 N12P_XTAL_OUTBUFF

21
SRN2K2J-1-GP XTAL_SSIN XTAL_OUTBUFF
E12 GF117 PDP-06877-006
RN7905
THERMDN C9 I2CB_SCL 4 1 C11 B10
NC I2CB_SCL C8 I2CB_SDA 3 OPS 2 XTAL_IN XTAL_OUT
F12
THERMDP NC I2CB_SDA

1
R7933 N17S-G1-A1-GP R7902
SRN2K2J-1-GP GC6_20 10KR2J-3-GP 20PF 5% 50V +/-0.25PF0402 10KR2J-3-GP
AE5
OPS
AD6 JTAG_TCK R7903

21
AE6 JTAG_TMS
OPS R7901
10KR2J-3-GP 1MR2J-1-GP
AF6 JTAG_TDI GPIO5_GC6_PWR_EN

2
XTL_27M_IN_GPU DY 2 XTL_27M_OUT_GPU

21
1
N12P_JTAG_TRST AG4 JTAG_TDO C6 VGA_CORE_VID 3V3_MAIN_EN is an open-drain GPIO.
JTAG_TRST_N GPIO0 B2 GC6_FB_EN_GPU
GPIO1 D6 GPU_EVENT_GPU#

2
GPIO2 C7

2
R7936 1D8V_AON_S0 R7904
GPIO3 F9 GPIO5_GC6_PWR_EN_GPU 1 X7901
[19] GPU_EVENT#
R7912
GPIO4 A3 GC6_202 GPIO5_GC6_PWR_EN OPS1KR2J-1-GP
0R2J-2-GP
OPS10KR2J-3-GP GK208
GPIO5 A4 VGA_CORE_PSI 1 4
[85,86] GPIO5_GC6_PWR_EN

1
GPIO6 B6

1
GM108

1
GPIO7 A6OVERT_GPU# R7905
[24,44] DGPUHOT# OVERT OVERT F8 GPIO9_ALERT
GPIO9 C5 GPIO10_FBVREF
OPS 100KR2J-1-GP
XTL_27M_X2
2 3
[81] GPIO10_FBVREF GPIO10 E7 D7902
GPIO11 D7 PWR_LEVEL OPS

2
A K DGPUHOT#
[85] VGA_CORE_PSI GPIO12 B4
GPIO13 OPS XTAL-27MHZ-192-GP
[85] VGA_CORE_VID L1SS355T1G-GP OPS 082.30008.0421
83.00355.G1F C7907 OPS
GM108 GK208 GF117 GF119 2ND=082.30008.0441

12

12
SC20P50V2JN-1-DL-GP C7908
[20,86] GC6_FB_EN D5 2nd = 83.00355.D1F SC20P50V2JN-1-DL-GP
GPIO16 GPIO16 NC GPIO16 E6
[18,24,26] SML0_SMBDATA GPIO20 GPIO20 NC GPIO20 C4
GPIO21 GPIO8 NC GPIO21
[18,24,26] SML0_SMBCLK
GPIO8 NC NC E9
GPIO8

p
N17S-G1-A1-GP

to
1D8V_AON_S0

1D8V_VGA_S0

DA-05691-001_V05 P15 GPIO10_FBVREF

4
3
GPIO20/21 NC : for ALL

ap
1
RN7901
R7910
OPSSRN4K7J-8-GP
OPS 100KR2J-1-GP
Q7901

1
2
C C

2
SML0_SMBDATA 6 D1 S1 1 SMBD_THERM_NV

5 G2 OPS G1 2

sl
4 S2 D2 3

PJT138KA-GP
075.00138.0A7C
2nd = 075.00138.0F7C SMBC_THERM_NV

ic
SML0_SMBCLK

1D8V_AON_S0
1D8V_AON_S0 1D8V_AON_S0

t
Hynix/Samsung

ma
GPU1L 10 OF14
Micron/Hynix/Samsung
R7938 R7925 R7928 10/14MISC2
R7918 R7920 R7935
1

1
R7919 R7909 R7914
100KR2F-L1-GP

100KR2F-L1-GP

100KR2F-L1-GP

100KR2F-L1-GP

100KR2F-L1-GP

100KR2F-L1-GP
DY DY DY OPS OPS OPS
100KR2F-L1-GP

100KR2F-L1-GP

100KR2F-L1-GP

E10
F10 NC#E10 D12

he
2

2
NC#F10 ROM_CS#
B12GPU_ROM_SI
ROM_SI A12 GPU_ROM_SO
STRAP0 D1 ROM_SO C12 GPU_ROM_SCLK
STRAP1 D2 STRAP0 ROM_SCLK
STRAP2 E4 STRAP1 NC FOR
STRAP3 E3 STRAP2 GM108
STRAP4 D3 STRAP3
STRAP4

c
R7921

1
Micron Micron/Hynix/Samsung

100KR2F-L1-GP
Micron/Hynix STRAP5 C1 STRAP5 OPS
R7939 R7926 R7929 D11

/s
BUFRST_N
1

R7908 R7911 R7915

100KR2F-L1-GP

100KR2F-L1-GP

100KR2F-L1-GP

2
F6
NC#F6 NC NC#D10 D10
OPS OPS OPS GF117
100KR2F-L1-GP

100KR2F-L1-GP

100KR2F-L1-GP

GK208 GF117 GF119

GM108 GK208
2

F4
VDDS_SENSE NC GM108
B F5 B

me
NC#F5 NC

N17S-G1-A1-GP

20161215 N17

1D8V_AON_S0 3D3V_S0
t.
2

1D8V_AON_S0
//
R7948
R7949 DY 10KR2J-3-GP
10KR2J-3-GP G
1

GC6_20 GPU_EVENT#
12

GC6_20 D
GPU_EVENT_GPU# S
Q7906
s:

PJA138KA-GP
084.00138.0A31
2nd = 084.00138.0C31
tp
ht

3D3V_AUX_S5

A A
2

GC6_20R7952
10KR2J-3-GP
Q7907
1

1 S1 D1 6 GC6_FB_EN_GPU_L

GC6_FB_EN_GPU 2 G1 OPS G2 5
3 D2 S2 4
1

<CorrreDesiiign>
R7927 3D3V_S0 R7953 1 2
PJT138KA-GP
10KR2J-3-GP GC6_20 10KR2J-3-GP
075.00138.0A7C WistronCorporation
2nd = 075.00138.0F7C 21F,,,88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiichiiih,,,
2

Taiiipeiii Hsiiien 221,,,Taiiiwan,,,R...O...C...

OPS
Tiittle
GC6_FB_EN
GPU(4/5)GPIO/STRAP
Siiize Do umenttt Numberrr Rev
Custttom Hellcat 14/15_ ICL SA
Dattte:::Tuesday,,, Septttemberrr 17,,,2019 Sheettt 79 offf 106
5 4 3 2 1

Eletro-XTechnical
 5 4 3 2 1

Main Func = dGPU GPU1F 13 OF14

13/14 GND

1V_VGACORE1_S0 A2 GND GND M13

AB17 GND GND M15
AB20 GND GND M17
AB24 GND GND N10
UnderGPU GND N12
Eletro-XTechnical
AC2 GND
11 OF14 AC22 GND
GPU1E GND N14
11/14 NVVDD AC26 GND GND N16
K10
K12 VDD
AC5 GND GND N18
AC8 GND GND P11
K14 VDD AD12 GND GND P13
K16 VDD AD13 GND GND P15
K18 VDD
1

1
C8022 C8008 C8023 C8002 C8001 A26 GND GND P17
OPS OPS OPS OPS OPS L11 VDD AD15 GND
GND P2
SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP
L13 VDDS AD16 GND GND P23
L15 VDD
2

2
D
AD18 GND GND P26 D
L17 VDD AD19 GND
M10 VDDS AD21 GND GND P5
GND R10
M12 VDD AD22 GND GND R12
M14 VDD AE11 GND GND R14
M16 VDDS AE14 GND GND R16
M18 VDD AE17 GND GND R18
N11 VDD AE20 GND GND T11
N13 VDD AB11 GND GND T13
N15 VDD AF1 GND GND T15
N17 VDD AF11 GND GND T17
P10 VDD AF14 GND GND U10
P12 VDDS AF17 GND GND U12
P14 VDDS
1

1
C8009 C8025 C8021 C8020 C8019 AF20 GND GND U14
OPS OPS OPS OPS OPS P16 VDD AF23 GND GND U16
SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP P18 VDDS AF5 GND GND U18

2

2 R11 VDDS AF8 GND

R13 VDD AG2 GND GND U2
GND U23
R15 VDD AG26 GND GND U26
R17 VDD AB14 GND U5

p
T10 VDD B1
GND V11
GND
T12 VDD B11 GND
GND GND V13
T14 VDD

to
B14 GND GND V15
T16 VDDS B17 GND GND V17
T18 VDD B20 GND Y2
U11 VDD B23 GND GND Y23
GND Y26
U13 VDDS B27 GND GND
U15 VDD
GND Y5

ap
B5 GND
U17 VDD B8
V10 VDDS E11 GND
1

C8016 C8015 C8018 C8014 C8013 C8012 C8011 GND

V12 VDD E14 GND
SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

V14 VDD E17 GND

OPS OPS OPS OPS OPS OPS OPS
SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP
2

V16 VDD E2 GND

sl
V18 VDD E20 GND
VDD E22 GND
E25 GND
N17S-G1-A1-GP E5 GND
C E8 GND C

ic
H2 GND
H23 GND
H25 GND
H5
K11 GND
NearGPU GND

t
K13 GND
K15 GND
K17 GND

ma
L10 GND
L12 GND
L14 GND
C8017 C8010 L16 GND
1

1
C8032 C8031 C8030 C8026 C8024 C8038 C8039 C8040 C8041 C8042 C8043 C8045 C8047 C8046 L18 GND

he
OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS L2
SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

L23 GND
SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP
GND
2

2
L25 GND
L5 GND GND AA7
M11 GND GND AB7

c
/s
N17S-G1-A1-GP

me
1D8V_VGA_S0

UnderGPU NearGPU

C8034 C8029
C8003
t. 3.3V +/-5%
85mA
SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP
1

// 1

C8028
SC4D7U6D3V3KX-DLGP

B B

OPS OPS
SC1U10V2KX-1DLGP
2

OPS OPS
s:

GPU1C 14 OF14
14/14 XVDD/VDD33

1D8V_VGA_PLL UnderGPU AD10 NC#AD10

AD7 VDD18 G8G9
tp

NC#AD7 GM108 VDD18 G10

3V3_AON 1V8_AON G12
3V3_AON 1V8_AON

F11 GPCPLL_AVDD
1D8V_AON_S0
ht

V5 XVDD

C8037
V6 XVDD UnderGPU NearGPU
SCD1U16V2KX-3DLGP
1

OPS
CONFIGURABLE C8035
2

C8044 C8004
SCD1U16V2KX-3DLGP

POW ER CHANNEL S
1

C8036
SCD1U16V2KX-3DLGP

SC4D7U6D3V3KX-DLGP

* nc onsubstrate
OPS OPS OPS
G1
SC1U10V2KX-1DLGP

G2 XVDD
2

G3 XVDD OPS
G4 XVDD
G5 XVDD
G6 XVDD
G7 XVDD
XVDD

V1 XVDD
V2 XVDD
A A

W1 <CoreDesiiign>
XVDD
W2 XVDD
W3 XVDD
1V_VGACORE1_S0 W4 XVDD WistronCorporation
Eletro-XTechnical
21F,,, 88,,, Sec.1,,, Hsiiin TaiiiWu Rd., Hsiiichiiih,,,
N17S-G1-A1-GP Taipei Hsiiien 221, Taiwan, R...O...C...

Tiiitttlle

GPU(5/5)PWR/GND
Siiize DocumentNumber Rev
Custom Hellcat 14/15_ ICL SA
Dattte::: Tuesday,,, September17, 2019 Sheet 80 offf 106
5 4 3 2 1
 SSID = VRAM
5 4 3 2 1

Place close VDD ball Place close VDD ball

[78,81]
[78,81]
[78,81]
FBA_CMD6
FBA_CMD11
FBA_CMD10 1D35V_VGA_S0 VRAM1A 1 OF 2 Frame Buffer Patition A-Lower Half
1D35V_VGA_S0
Eletro-XTechnical 1D35V_VGA_S0

[78,81] FBA_CMD7
[78,81] FBA_CMD9 C5
C10
VDD OPS VSS B5
B 10 1D35V_VGA_S0 C8104

C8108

C8115
VDD VSS

1
[78,81] FBA_CMD2 D11 D10 C8105 C8106 C8107 C8109

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP
SC10U6D3V3MX-DL-GP

1
VDD VSS G5
[78,81] FBA_CMD4 G1 OPS OPS OPS
VDD VSS G 10
[78,81] FBA_CMD3 G4
OPS OPS OPS OPS

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP
VDD VSS

2
[78,81] FBA_CMD1 G11 H1
D VDD VSS D

1
G14 H14 R8106
VDD VSS

2
[78,81] FBA_CMD8 L1 VDD VSS K1 549R2F-GP
K14
[78,81]
[78,81]
FBA_CMD12
FBA_CMD0
L4
L11
VDD
VDD
VSS
VSS L5 OPS

2
[78,81] FBA_CMD15 L14 VDD VSS L10 FBA_VREFC0
[78,81] FBA_CMD5 P11 VDD VSS P10
VDD VSS T5
R5
Place close VDD ball

1K33R2F-GP
R8107

931R2F-1-GP
R8104
1

1
[78] FBA_CLK0P 1D35V_VGA_S0 R10 VDD VSS T10
[78] FBA_CLK0N
[78,81] FBA_CMD14 B1 A1 1D35V_VGA_S0
B3
VDDQ VSSQ A3 OPS OPS Q8101
VDDQ VSSQ

2
B12 A12
B14 VDDQ VSSQ
[82] FBA_VREFC0 A14 1 6 FBA_VREF_FET_L
D1 VDDQ VSSQ

1
Note:ZZ.27002.F7 C0
C1
D3 VDDQ VSSQ OPS
C3 FBA_VREF_FET_L GPIO10_FBVREF 2 5 PM_SLP_S3#
[79] GPIO10_FBVREF

C8120

C8121

C8122

C8123

C8124

C8125
D12 VDDQ VSSQ C4

1
SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP
D14 VDDQ VSSQ C11 1D8V_EN# 3 4
[78,81] FBA_CMD13 E5 VDDQ VSSQ C12 OPS OPS OPS OPS OPS DY
E10 VDDQ VSSQ

2
C14 2N7002KDW-1-GP
F1 VDDQ VSSQ E1
F3 VDDQ VSSQ

2
E3
F 12 VDDQ VSSQ E12 75.27002.F7C
F 14 VDDQ VSSQ E14
FBA_D[0..31] [78,81] G2 VDDQ VSSQ F5
G 13 VDDQ VSSQ F 10
H3 VDDQ VSSQ H2 0614 Layout HT

p
H12
K3
VDDQ
VDDQ
VSSQ
VSSQ
H13
K2
Place close VDDQ ball Place close VDDQ ball
K12 VDDQ VSSQ K13
0614 Layout HT 1D35V_VGA_S0 1D35V_VGA_S0

to
L2 VDDQ VSSQ M5
L13 VDDQ VSSQ M10
M1 VDDQ VSSQ N1
M3 VDDQ VSSQ N3
M12 VDDQ VSSQ N12
M14 FBVREF Termination C8113

C8116

C8117

C8118

C8119
VDDQ VSSQ N14

1
N5 C8114 C8110 C8111 C8112

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP
ap
VDDQ R1

SC10U6D3V3MX-DL-GP
VSSQ

1
N10 VDDQ VSSQ R3 OPS OPS OPS OPS OPS
P1 VDDQ R4 Type FBVREF% Voltage GPU_GPIO1

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP
VSSQ

2
P3
P12
VDDQ VSSQ R11 0 OPS OPS OPS OPS
FBA_D[0..31] [78,81] VDDQ VSSQ R12
P14
C T1
VDDQ VSSQ R14
Un-termination 50% 0.749V High C
VDDQ VSSQ U1

sl
T3 U3
VDDQ VSSQ
T12
T14
VDDQ VSSQ U12
Termination 70% 1.0617V Low
VDDQ VSSQ U14
VDDQ VSSQ
FBA_VREFC0 J14 A5
VREF C VPP/NC#A5 U5

ic
VPP/NC#U5
A10
U10 VREF D
C8126
1

VREF D
SC820P50V2KX-1-DL-GP
2

H5GQ2H24AFR-T2C-GP
[78,81] FBA_CMD10 OPS 72.05224.A0U

t
[78,81] FBA_CMD7
[78,81] FBA_CMD6
[78,81] FBA_CMD11

ma
[78,81] FBA_CMD9

[78,81] FBA_CMD3
[78,81] FBA_CMD1
[78,81] FBA_CMD2
[78,81] FBA_CMD4

he
[78,81] FBA_CMD8
[78,81] FBA_CMD15
[78,81] FBA_CMD5
[78,81] FBA_CMD12
[78,81] FBA_CMD0

c
Normal(MF=0)

/s
FBA_D[0..31] [78,81]

VRAM1B 2 OF 2

FBA_CMD6 K4 A4 FBA_D0
FBA_CMD11 H5 A8/A7 OPS DQ0 A2 FBA_D1
FBA_CMD10 H4 A9/A1 DQ1 B4 FBA_D2

me
B
FBA_CMD7 K5 A10/A0
FBA_CMD9 J5 A11/A6
DQ2 B2
DQ3 E4
FBA_D3
FBA_D4 Byte 0 B

FBA_CMD2 H11
A12/RFU#J5/NC#J5 DQ4 E2
DQ5 F4
FBA_D5
FBA_D6
0~7
FBA_CMD4 K10 BA0/A2 DQ6 F2 FBA_D7
FBA_CMD3 K11 BA1/A5 DQ7 A11 FBA_D8

FBA_D[0..31] [78,81]
FBA_CMD1 H10 BA2/A4

FBA_CMD8 J4
FBA_CMD12 G3 ABI#
FBA_CMD0 G12 RAS#
FBA_CMD15 L3 CS#
BA3/A3
DQ8 A13 FBA_D9
DQ9 B 11 FBA_D10
DQ10 B 13 FBA_D11
DQ11 E 11 FBA_D12
DQ12 E 13 FBA_D13
DQ13 F 11 FBA_D14
t. Byte 1
8~15
//
FBA_CMD5 L12 CAS# DQ14 F 13 FBA_D15
W E# DQ15 U11 FBA_D16
FBA_CLK0P J12 DQ16 U13 FBA_D17
FBA_CLK0N J11 CK DQ17 T11 FBA_D18
FBA_CMD14 J3 CK#
CKE#
DQ18 T13 FBA_D19
DQ19 N11 FBA_D20 Byte 2
FBA_DQM0 DQ20 N13 FBA_D21
16~23
s:

D2
FBA_DQM1 D13 DBI0# DQ21 M11 FBA_D22
FBA_DQM2 P 13 DBI1# DQ22 M13 FBA_D23
FBA_DQM3 P2 DBI2# DQ23 U4 FBA_D24
DBI3# DQ24 U2 FBA_D25
[78] FBA_DQM0
FBA_CMD13 J2 DQ25 T4 FBA_D26
[78] FBA_DQM1
Byte 3
RESET# DQ26 T2 FBA_D27
[78] FBA_DQM2
tp

[78] FBA_SEN0 J10 DQ27 N4 FBA_D28

FBA_DQM3
FBA_ZQ0 J13 SEN
FBA_MF1 J1 ZQ
DQ28 N2
DQ29 M4 FBA_D30
FBA_D29
24~31
[78] FBA_EDC0 MF DQ30 M2 FBA_D31
121R2F-GP
R8108

[78] FBA_EDC1 FBA_W CK01 D4 DQ31

1KR2J-1-GP
R8111

[78] FBA_EDC2
2

[78] R8110 FBA_WCK01# D5 W CK 01 C2 FBA_EDC0

FBA_EDC3 W CK01# EDC0 C13 FBA_EDC1
ht

OPS
0R2J-2-GP
OPS OPS FBA_W CK23 P4 EDC1 R13 FBA_EDC2
FBA_WCK23# P5 W CK 23 EDC2 R2 FBA_EDC3
W CK23# EDC3
1

1
2

[78] FBA_W CK23

[78] FBA_W CK23# H5GQ2H24AFR-T2C-GP
[78] FBA_W CK01
[78] FBA_W CK01#

FBA_CLK0P
[78,81] FBA_CMD14
FBA_CLK0N
A A
[78,81] FBA_CMD13
1

R8102 R8101
40D2R2F-GP 40D2R2F-GP
[17,40,54,55] PM_SLP_S3#
OPS OPS
2

FBA_CLK0_MIDPT <Corrre Desiiign>

[27] 1D8V_EN#
1

C8101
OPS SCD01U25V2KX-3DLGP WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiii W u Rd...,,, Hsiiichiiih,,,
2

TaiiipeiiiHsiiien221,,, Taiiiwan,,,R...O...C...

Tiittle

Siiize Doc menttt Numberrr

GPU-VRAM1,2 (1/4)
Rev
Custtt m
Hellcat 14/15_ ICL SA
Dattte::: Tuesday,,, Septttemberrr 17,,,2019 Sheettt81 off 106
5 4 3 2 1

Eletro-XTechnical
 SSID = VRAM
5 4 3 2 1

FBA_D[32..63] [78,82]

Eletro-XTechnical 1D35V_VGA_S0
Place close VDD ball
Frame Buffer Patition A-Upper Half
1D35V_VGA_S0 VRAM4A 1 OF 2

C5
OPS VSS B5

C8207
C10 VDD
VDD B10 C8224 C8204 C8205 C8206
VSS

SC10U6D3V3MX-DL-GP
1

1
D11 VDD D10
VSS
G1 VDD G5

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP
D FBA_D[32..63] [78,82] D

2
VSS G10
G4 VDD
G11 VDD VSS OPS OPS OPS OPS OPS
H1
G14 VDD VSS H14
L1 VDD VSS K1
L4 VDD VSS K14
L11 VDD VSS L5
L14 VDD VSS L10
P11 VDD VSS P10
R5 VDD VSS T5

Place close VDD ball

1D35V_VGA_S0 R10 VDD T10 1D35V_VGA_S0
VSS
VSS
[78,82] FBA_CMD22 B1 VDDQ A1
VSSQ
[78,82] FBA_CMD27 B3 VDDQ A3
VSSQ
[78,82] FBA_CMD26 A12

C8211

C8212

C8213

C8214

C8220

C8226
B 12 VDDQ VSSQ

1
1

1
[78,82] FBA_CMD23 B14 VDDQ A14

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP
[78,82] VSSQ
FBA_CMD25 D1 VDDQ C1 OPS OPS OPS OPS OPS OPS
VSSQ
D3 VDDQ C3
VSSQ

2
[78,82] FBA_CMD18 D12 VDDQ C4
D14 VDDQ VSSQ
[78,82] FBA_CMD20 C11
E5 VDDQ E VSSQ
[78,82] FBA_CMD19 C12
10 VDDQ VSSQ
[78,82] FBA_CMD17 C14
F1 VDDQ VSSQ
E1
F3 VDDQ F VSSQ
[78,82] FBA_CMD24 E3
12 VDDQ VSSQ
[78,82] FBA_CMD28 E12
F 14 VDDQ VSSQ
[78,82] FBA_CMD16 E14
VSSQ

p
[78,82] FBA_CMD31 G2 VDDQ F5
VSSQ
Place close VDDQ ball
[78,82] FBA_CMD21 G1 3 F 10 1D35V_VGA_S0
VSSQ
H3 VDDQ H2
H12 VDDQ VSSQ

to
[78] FBA_CLK1P H13
[78] FBA_CLK1N K3 VDDQ K VSSQ
K2
[78,82] FBA_CMD30 12 VDDQ VSSQ
K13

C8218
L2 VDDQ VSSQ
M5 C8219 C8215 C8216 C8217

SC10U6D3V3MX-DL-GP
1

1
L13 VDDQ VSSQ
M10
[81] FBA_VREFC0 M1 VDDQ VSSQ
N1

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP
M3 VDDQ VSSQ

2
N3 OPS OPS OPS OPS OPS

ap
FBVREF Termination M12 VDDQ VSSQ
N12
M14 VDDQ VSSQ
N14
[78,82] FBA_CMD29 N5 VDDQ VSSQ
R1
Type FBVREF% Voltage GPU_GPIO10 N10 VDDQ VSSQ
R3
P1 VDDQ VSSQ
R4
C P3 VDDQ P VSSQ
R11 C
FBA_D[32..63] [78,82] 12 VDDQ VSSQ

sl
Un-termination 50% 0.749V High R12
P14 VDDQ VSSQ
T1 VDDQ VSSQ
R14
U1 Place close VDD ball Place close VDDQ ball
Termination 70% 1.0617V Low T3 VDDQ VSSQ
U3 1D35V_VGA_S0 1D35V_VGA_S0
T12 VDDQ VSSQ
U12
VSSQ
T14 VDDQ U14
VDDQ VSSQ

ic
FBA_VREFC0 J14 A5
VREF C VPP/NC#A5 U5

C8210

C8209

C8221

C8222

C8223

C8225
VPP/NC#U5

1
A10

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP
C8202 U10 VREFD
VREF D OPS OPS OPS OPS OPS OPS

2
SC820P50V2KX-1-DL-GP
21
t
H5GQ2H24AFR-T2C-GP
OPS
72.05224.A0U
FBA_D[32..63] [78,82]

ma
he
[78,82] FBA_CMD26
[78,82] FBA_CMD23

c
[78,82] FBA_CMD22
[78,82] FBA_CMD27
[78,82] FBA_CMD25

/s
[78,82] FBA_CMD19
[78,82]
[78,82]
FBA_CMD17
FBA_CMD18 Mirrored(MF=1)
[78,82] FBA_CMD20 VRAM4B 2 OF 2

FBA_D56

me
[78,82] FBA_CMD24 FBA_CMD26 K4 A4
FBA_CMD23 H5 FBA_D57
B
[78,82]
[78,82]
FBA_CMD31
FBA_CMD21 FBA_CMD22 H4
A8/A7
A9/A1 OPS DQ0 A2
DQ1 B4 FBA_D58 B
[78,82]
[78,82]
FBA_CMD28
FBA_CMD16
FBA_CMD27 K5
FBA_CMD25
A10/A0
J5 A11/A6
DQ2
DQ3
E4
B2 FBA_D59
FBA_D60 Byte 7
FBA_CMD19 H11
A12/RFU#J5/NC#J5 DQ4
DQ5 F4
E2 FBA_D61
FBA_D62 56~63
[78,82]

[78,82]

[78]
FBA_CMD30

FBA_CMD29

FBA_W CK67
t. FBA_CMD17 K10 BA0/A2
FBA_CMD18 K11 BA1/A5
FBA_CMD20 H10 BA2/A4

FBA_CMD24
FBA_CMD31
J4
G3 ABI#
BA3/A3
DQ6 F2
DQ7 A11 FBA_D54
DQ8 A13 FBA_D55
DQ9 B 11 FBA_D52
DQ10 B 13 FBA_D50
DQ11 E 11 FBA_D48
FBA_D63

Byte 6
48~55
//
FBA_W CK67# FBA_CMD21 G12 RAS# DQ12 E 13 FBA_D49
[78]
FBA_CMD28 L3 CS# DQ13 F 11 FBA_D51
[78] FBA_W CK45
[78] FBA_W CK45# FBA_CMD16 L12 CAS# DQ14 F 13 FBA_D53
W E# DQ15 U11 FBA_D40
FBA_CLK1P J12 DQ16 U13 FBA_D41
FBA_CLK1N J11 CK DQ17 T11 FBA_D42
[78] FBA_DQM4
FBA_CMD30 J3 CK# DQ18 T13 FBA_D43
Byte 5
s:

[78] FBA_DQM5 CKE# DQ19 N11 FBA_D44

[78] FBA_DQM6

1
[78] FBA_DQM7 R8206
40D2R2F-GP
R8208
40D2R2F-GP
FBA_DQM7 D2
FBA_DQM6 D13 DBI0#
DQ20 N13
DQ21 M11
FBA_D45
FBA_D46 40~47
FBA_DQM5 P 13 DBI1# DQ22 M13 FBA_D47
[78] FBA_EDC4 OPS 2
OPS FBA_DQM4 P2 DBI2# DQ23 U4 FBA_D35
[78] FBA_EDC5 DBI3#

2
FBA_CLK1_MIDPT DQ24 U2 FBA_D33
tp

[78] FBA_EDC6
[78] FBA_EDC7
FBA_CMD29 J2
RESET#
DQ25 T4 FBA_D34
DQ26 T2 Byte 4

1
C8201 OPS FBA_D32
SCD01U25V2KX-3DLGP FBA_SEN2 J10
FBA_ZQ3 J13 SEN
DQ27 N4
DQ28 N2
FBA_D36
FBA_D37 32~39

2
1 FBA_MF4 J1 ZQ DQ29 M4 FBA_D38
1D35V_VGA_S0 2 O210PS
R8 1KR2J-1-GP MF DQ30 M2 FBA_D39
ht

FBA_W CK67 D4 DQ 31

121R2F-GP
R8213
2

1
R8209 FBA_W CK67# D5 W CK 01 C2 FBA_EDC7
W CK01# EDC0 C13 FBA_EDC6
0R2J-2-GP
OPS OPS FBA_W CK45 P4 EDC1 R13 FBA_EDC5
FBA_W CK45# P5 W CK 23 EDC2 R2 FBA_EDC4
W CK23# EDC3

2
H5GQ2H24AFR-T2C-GP

A A

<Corrre Desiiign>

WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiii W u Rd...,,, Hsiiichiiih,,,
TaiiipeiiiHsiiien221,,, Taiiiwan,,,R...O...C...

Tiittle

Siiize Doc menttt Numberrr

GPU-VRAM3,4 (2/4)
Rev
Custtt m
Hellcat 14/15_ ICL SA
Dattte::: Tuesday,,, Septttemberrr 17,,,2019 Sheettt82 off 106
5 4 3 2 1

Eletro-XTechnical
 5 4 3 2 1

OFFPAGE-Signal OFFPAGE-GAP

[79] VGA_CORE_PSI

PH on EE side
2 OPS
R8544
1 PWR_VGA_NVVDDS_PSI

0R2J-2-GP

R8545
19V_DCBATOUT PWR_DCBATOUT_DGPUA
PG8552
GAP-CLOSE-PWR-3-GP
21
RT8816B For NVVDDS Eletro-XTechnical
[79] VGA_CORE_VID 2 OPS 1 PWR_VGA_NVVDDS_VID

0R2J-2-GP
PG8553
GAP-CLOSE-PWR-3-GP
VGA : N17S-G1
EDP-Continuous : 30A
1. Check EE side 21
2. Modify DAT

[76] VGACORE_VDD_SENSE_1
R8542
2 OPS 1 PWR_VGA_NVVDDS_VSEN1_P
PG8551
GAP-CLOSE-PWR-3-GP
EDP-Peak : 60.1A
21
0R2J-2-GP 1D8V_AON_S0

D R8543 D
2 OPS 1 PWR_VGA_NVVDDS_VSEN1_N PG8554
[76] VGACORE_GND_SENSE_1
GAP-CLOSE-PWR-3-GP

1
0R2J-2-GP 21
PR8557 1D8V_AON_S0
OPS 100KR2J-1-GP
PH on EE side
PG8555

1
PWR_VGA_NVVDDS_PG GAP-CLOSE-PWR-3-GP
[85,86] PWR_VGA_NVVDDS_PG 21 PWR_VGA_NVVDDS_PG PR8559
PWR_VGA_NVVDDS_PG [85,86]
OPS 6K04R2F-GP

2
PG8556
GAP-CLOSE-PWR-3-GP PWR_DCBATOUT_DGPUA
21 PWR_VGA_NVVDDS_PSI

1
19V_DCBATOUT PWR_DCBATOUT_DGPUB PC8557 PR8563
EE need check SCD01U25V2KX-3DLGP DY OPS 12K1R2F-L1-GP PC8552 PC8553
PG8557 TC8501

21

SC10U25V5KX-DL-GP

SC10U25V5KX-DL-GP
GAP-CLOSE-PWR-3-GP 5V_S0 DY OPS OPS

ST22U25VBM-GP
2
21

21

21
21
1
PG8558
GAP-CLOSE-PWR-3-GP PR8556
21 OPS 2D2R3-1-U-GP PU8552 2

p
3
1 4

2
VGA : N17S-G0/G2
10
PG8559 PC8554 PWR_VGA_NVVDDS_PVCC 9

to
GAP-CLOSE-PWR-3-GP SCD1U25V2KX-1-DL-GP 7

EDP-Continuous : 28.6A
21 1 2 PWR_VGA_NVVDDS_TON_1 8 6 ID:31/54A ,

1
PC8555 5 Rdson: 6.8~8.6/2.8~3.5m (Q1/Q2)
OPS OPS
EDP-Peak : 60.3A

SC1U10V2KX-1DLGP
2
PG8560 PR8562
19V_DCBATOUT PR8561 499KR2F-1-GP
OPS FDMS3600-02-RJK0215-COLAY-GP
GAP-CLOSE-PWR-3-GP
21 2D2R3-1-U-GP 1st = 075.07321.0073

ap
12 12 Cyntec 6.8mmx7.6mmx3.0mm
OPS OPS 1V_VGACORE1_S0
PR8551 PC8556 DCR: 0.9m ohm +/-7%
PG8561 PU8551 2D2R3-1-U-GP SCD1U25V2KX-1-DL-GP Idc : 37A , Isat : 41A
PWR_VGA_NVVDDS_BOOT11 2 PWR_VGA_NVVDDS_BOOT1_A 1 2
GAP-CLOSE-PWR-3-GP 18 BOOT1 1 PL8552
21 PVCC
OPS OPS
PWR_VGA_NVVDDS_HG1
UGATE 1 2 1 OPS 2

sl
PWR_VGA_NVVDDS_TON 9
3D3V_S0 PG8562 TON 20 PWR_VGA_NVVDDS_PHASE1 COIL-D15UH-7-GP
GAP-CLOSE-PWR-3-GP PHASE 1 PC8558 PC8559
R8531 U8502
1 OPS 2 DGPU_PWROK_L 1 21 PWR_VGA_NVVDDS_LGATE1
LGATE1 19
[86]1V_VGA_S0_PG
0R2J-2-GP B 5 PWR_VGA_NVVDDS_PG 13 PGOOD DY DY

21

21
1 OPS 2 1D35V_PGOOD_L 2 VCC 12 PWR_VGA_NVVDDS_OCSET
[86] 1D35V_PGOOD A PWR_VGA_NVVDDS_PSI OCSET/SS
R8530 4 PC8560 4
C 0R2J-2-GP
OPS Y DGPU_PWROK [19,24]
SC1KP50V2KX-1DLGP PSI 1V_VGACORE1_S0 C
3
GND PWR_VGA_NVVDDS_VID

ic
1 2 5 PR8564 PC8561 SC22U6D3V3MX-1-DL-GP
74LVC1G08GW-1-GP VID OPS 160KR2F-GP OPS SC22U6D3V3MX-1-DL-GP
PWR_VGA_NVVDDS_EN 3 15 PW SC33P50V2JN-3DLGP
73.01G08.L04 PC8562

21
SCD1U25V2KX-1-DL-GP
DY EN O
T
2
D
S
_
B
VN
A
_
G
_R
V

21
2nd =73.7SZ08.DAH PWR_VGA_NVVDDS_VREF BOOT2 PWR_VGA_NVVDDS_HG2 DY
1 2 8 14
3RD =73.01G08.DHG VREF UGATE2
SS setting

1
PWR_VGA_NVVDDS_PHASE2
OPS PHASE2 16
PR8566
17 PW R_VGA_NVVDDS_LGATE2
OCP setting OPS PT8551 OPS PT8553 OPS PT8554

t
OPS 20K5R2F-GP

21

21

21
PWR_VGA_NVVDDS_REFADJ 6 LGATE 2
160K ohm for OCP around 96.2A setting

SE330U2VDM-4-GP

SE330U2VDM-4-GP

SE330U2VDM-4-GP
PR8567 REFADJ
6K19R2F-GP 10 PWR_VGA_NVVDDS_VSEN1_N
PWR_VGA_NVVDDS_REFADJ_R 1 2 RGND

ma
PWR_VGA_NVVDDS_REFIN 7 PWR_VGA_NVVDDS_VSEN1_P
For VGA_CORE sequence OPS REFIN VSNS 11

GND
PR8569
EE need check PR8568 RT8816BGQW-GP 100R2F-L1-GP-U

21
OPS 4K32R2F-GP 074.08816.0A73 12
3D3V_S0
PC8564
OPS
PWR_VGA_NVVDDS_REFIN PC8563 SC33P50V2JN-3DLGP Place Near GPU (NVVDDS)
1

DY 1X330uF(Poscap) - PT8511 (Page85)

21 2 2

21
SC33P50V2JN-3DLGP

he
R8541
DY

21
OPS 10KR2J-3-GP PR8577
PR8570 100R2F-L1-GP-U
Q8509 1 2
OPS 16K5R2F-2-GP
2

OPS
PWR_VGA_NVVDD_OR# 6 D1 1 PWR_DCBATOUT_DGPUB
S1 OPS

1
PC8566
5 G2 2 PC8565 SC33P50V2JN-3DLGP 1V_VGACORE1_S0
G1

c
[79,86] GPIO5_GC6_PWR_EN 1V_VGA_EN_R [86] PWR_VGA_NVVDDS_REFIN_R SC4700P50V2KX-1DLGP
PC8567 DY

21
4 S2
OPS
D2 3 PWR_VGA_NVVDD_OR# SCD01U25V2KX-3DLGP DY

21
PWR_VGA_NVVDD_OR# [86]

21

/s
2
PJT138KA-GP PC8568 PC8551
075.00138.0A7C 1D8V_VGA_S0 PR8572

SC10U25V5KX-DL-GP

SC10U25V5KX-DL-GP
2nd =075.00138.0F7C OPS 309R2F-GP OPS OPS

2 1

21
1
2

PWR_VGA_NVVDDS_VSEN1_N

me
R8529
OPS10KR2J-3-GP PU8554 2
3
Q8504 1 4
1

PWR_VGA_NVVDD_OR# G 10
9
PWR_VGA_NVVDDS_EN
OPS D 8
7
6 ID:31/54A ,
S Rdson: 6.8~8.6/2.8~3.5m (Q1/Q2)

B
2N7002K-2-GP
84.2N702.J31
2nd = 084.27002.0N31
t. PR8573 PC8569
OPS
5

FDMS3600-02-RJK0215-COLAY-GP
1st = 075.07321.0073

B
Cyntec 6.8mmx7.6mmx3.0mm
//
2D2R3-1-U-GP SCD1U25V2KX-1-DL-GP 1V_VGACORE1_S0
PWR_VGA_NVVDDS_BOOT2
1 2 PWR_VGA_NVVDDS_BOOT2_A 1 2
DCR: 0.9m ohm +/-7%
Idc : 37A , Isat : 41A
OPS OPS
PWR_VGA_NVVDDS_HG2 PL8551

PWR_VGA_NVVDDS_PHASE2 1 OPS 2
s:

PWR_VGA_NVVDDS_LGATE2 COIL-D15UH-7-GP
PC8570 PC8571

DY DY

21

21
SC22U6D3V3MX-1-DL-GP
tp

SC22U6D3V3MX-1-DL-GP
ht

A A

Eletro-XTechnical
<CoreDesign>

Wistron Corporation
21F, 88,,,Sec.1,,,Hsin Taiii W u Rd., Hsichih,,,
Taipeiii Hsien 221,,,Taiwan,,, R.O.C.

Title

GPU (RT8816A_VGA)
Size Documenttt Numberrr Rev
A1 Hellcat 14/15_ ICL SA
Date::: Tuesday, Septemberrr 17,,,2019 Sheettt 85 offf 105

5 4 3 2 1
 5 4 3 2 1

Main Func = dGPU

Eletro-XTechnical
Main Func = dGPU dGPU Power DischargeCircuit
3D3V_AUX_S5
[DG-07158- 001 Rev03]Power up s eque nce:
OPS 2 PWR_VGA_NVVDD_PG#
3.3V = => NVVDD (VGA_CORE) ==> PEX_ VDD (1.05V) ==> FBVDD/Q (1 .35V) 1 1V_VGA_S0
R8612 D G S 1V_VGA_S0
100KR2J-1-GP
3D3V_S0 to 3V3_AON_S0 and 3D3V_VGA_S0

S2
G2
Q8615

4
D D

5
R8602 1 3D3V_VGA_S0: 3A @ 3.3V PJT138KA-GP
3D3V_1D8V_S0 U8601 075.00138.0A7C OPS
1D8V_S5 OPS 2
12 VGA_CT_1 C8610 1 2 SC470P50V2KX-3DLGP 2nd = 075.00138.0F7C

D1
C8611 4 R8618
5V_S0 SPO

D2
G1
CT1 10 AON_CT_2

SC1U10V2KX-1DLGP
0R3J-0-U-GP VBIAS OPS 10R2J-2-GP

S1
C8612 1OPS 2 SC1500P50V2KX-2-DL-GP
OPS CT2

1
2
3
21

21
DY 1 13
1D8V_VGA_S0
2 VIN1#1 VOUT1#13 14 S GD
6 VIN1#2 VOUT1#14 8
7 VIN2#6 VOUT2#8 9
VIN2#7 VOUT2#9 1D8V_AON_S0
1D8V_VGA_EN 3 1V_VGA_EN_R 1V_VGA_S0_DISCHG
C8609 C8605 5 ON1 11
ON2 GND 15

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP
THERMAL_PAD

21

21
DY DY TPS22976DPUR-GP 1D8V_VGA_S0 1D8V_AON_S0
074.22976.0091 VGA_CORE 1V_VGACORE1_S0
Need to fine tune.
2nd = 074.02898.0093 C8606 C8607
PR8621 OPS

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP
1 DGPU_PWR_EN_R OPS
OPS 2

21

21
[20,86]DGPU_PWR_EN C8608 R8624
0R2J-2-GP 100R2J-2-GP

SC1U10V2KX-1DLGP
OPS

21
21
Q8605
DY 3D3V_AUX_S5
G
[85] PWR_VGA_NVVDD_OR#
D VGA_CORE_DISCHG
R8616 1D35V_VGA_S0
OPS 2 OPS 1 1D35V_VGA_EN#

S 1D35V_VGA_S0
100KR2J-1-GP Need to fine tune.
2N7002K-2-GP
84.2N702.J31

S2
Q8616

4
6

5
2nd = 084.27002.0N31 PJT138KA-GP R8622
075.00138.0A7C OPS 100R2J-2-GP

D1

G2
2nd = 075.00138.0F7C OPS

21
3D3V_AUX_S5
1D8V_AON_S0

S1

D2
G1
R8613

3
2
2 OPS 1 DGPU_PWR_EN#
3D3V_S0 1D8V_AON_S0
Need to fine tune. 1D35V_VGA_S0_DISCHG
1D8V_AON_S0 to 1D8V_VGA_S0

p
100KR2J-1-GP

1
1

6
5

4
1D35V_VGA_EN
R8634 Q8614 R8625
OPS 10KR2J-3-GP 2N7002KDW-1-GP OPS 100R2J-2-GP
OPS

to
Q8612 75.27002.F7C

2
1
2

3
2

1D8V_VGA_EN_OR# 6 D1 1
2nd = 075.27002.0E7C
S1

5 G1G2 2 1D8V_AON_S0_DISCHG
[79,85,86] GPIO5_GC6_PWR_EN S OP PWR_VGA_NVVDDS_PG[85,86]
4 S21D8V_VGA_EN_OR#
D2 3
[20,86]DGPU_PWR_EN

PJT138KA-GP
075.00138.0A7C
2nd = 075.00138.0F7C
1D8V_VGA_S0

ap
1D8V_VGA_S0
Need to fine tune.
1D8V_AON_S0

R8623
R8637 Q8603 100R2J-2-GP
Q8602 OPS 10KR2J-3-GP 1D8V_VGA_EN_OR# OPS

21
G
1D8V_VGA_EN_OR# G
21

PR8603 OPS D 1D8V_VGA_S0_DISCHG

1D8V_VGA_EN_OR 1 1D8V_VGA_EN

sl
2
OPS D OPS
S
S 0R2J-2-GP
2N7002K-2-GP
2N7002K-2-GP 84.2N702.J31
84.2N702.J31
C 2nd = 084.27002.0N31 C

RT5797 for 1V_VGA_S0 PWR_1V_PVDD 3D3V_S0

ic
PG8605
2 1

PC8630 PC8627 PC8629 GAP-CLOSE-PWR-3-GP

PG8606

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP
OPS DY

21

21

21
3D3V_S0 2 1

SC1U10V2KX-1DLGP
OPS
For tuning VGA_CORE sequence. GAP-CLOSE-PWR-3-GP

3D3V_S0
1V_VGA_S0
2

U8605

t
R8635 1
[20,86]DGPU_PWR_EN B5
OP S 10KR2J-3-GP PU8603
2 VCC PWR_1V 1V_VGA_S0
S A OPS 4 GPIO5_GC6_PWR_1V PWR_1V_FB1
8
3Y PL8602
1

[79,85,86]GPIO5_GC6_PWR_EN PWR_VGA_S0_PG2 FB SGND 7 1V_VGA_EN_R

GND PG8608
D GPIO5_GC6_PWR_B 3 PG EN 6 PWR_1V_PHASE 1 2
OPS

ma
OPS 74LVC1G08GW-1-GP 4 VIN LX 5 12
G 73.01G08.L04 3D3V_S0 PGND NC#5 IND-1UH-344-GP GAP-CLOSE-PWR-3-GP
1D8V_AON_S0 Q8601 084.00138.0A31 2nd=73.7SZ08.DAH U8604 OPS PGND 9 068.1R010.1661 R1 PG8607
PJA138KA-GP 3RD = 73.01G08.DHG 1B PC8632 12
2nd = 084.00138.0C31 5 Vo=0.6x(1+R1/R2) 34K8R2F-1-GPOPS
PR8613
2

21
RT5797ALGQW-GP

SC22P50V2JN-4DLGP
=0.6x(1+34.8/51)
A
4 VCC
[85,86]PWR_VGA_NVVDDS_PG OPS GAP-CLOSE-PWR-3-GP

2 1
3 Y
1V_VGA_EN_Y 1
R8615
2 074.05797.0073 =1.009 OPS
GND OPS
C8603 1V_VGA_EN_R[85] PC8628PC8631
74LVC1G08GW-1-GP 0R2J-2-GP 3D3V_S0 Close Pin1 PWR_1V_FB

SCD1U16V2KX-3DLGP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP
73.01G08.L04 OPS OPS
2nd = 73.7SZ08.DAH DY R2

21

21
he
3RD =73.01G08.DHG

21
PR8625
OPS 10KR2J-3-GP

1
PR8620
51KR2F-L-GP OPS

21
PR8623
PWR_VGA_S0_PG 1 OPS 2 1V_VGA_S0_PG

2
1V_VGA_S0_PG[85]
0R2J-2-GP

c
19V_DCBATOUTPWR_DCBATOUT_1D35VPG8614
1D35V_VGA_S0 1D35V_PWR1D35V_VGA_S0

1 2

/s
PG8621
GAP-CLOSE-PWR-3-GP 12
PG8615
1 2 GAP-CLOSE-PWR-3-GP

PG8610
GAP-CLOSE-PWR-3-GP 12

GAP-CLOSE-PWR-3-GP
PG8609
1 2

me
GAP-CLOSE-PWR-3-GP

PG8611
12

PWR_DCBATOUT_1D35V
SY8288RAC for1D35V GAP-CLOSE-PWR-3-GP

3D3V_S0

OPS OPS DY
PC8610 PC8609PC8612

t. Cyntec 5x 5 x
GP
SC10U25V5KX-DL-

SCD01U25V2KX-3DLGP

GP
SC10U25V5KX-DL-

3.0mm Design Current=3.2A

21

21

21

PR8611 PC8617 DCR: 13~14mOhm

OPS 100KR2F-L1-GP SC2D2U10V3KX-1DLGP-U Idc :7A , Isat: 11A
PWR_1D35V_LDO_P5

B B

PL8603 1D35V_PWR
21
21

0R3F-1-GP-U
OPS PR8633 PC8619 OPS
PWR_1D35V_BOOT1 2 PPWRR__11DD3355VV__BBOOTT__RR 1 2SCD1U25V2KX-1-DL-GP 1 2
COIL-1UH-73-GP
VENH:3.3V OPS OPS 68.1R010.20R
PR8630
//
PC8620 PC8621 PC8611 PC8613 PC8614

GAP-CLOSE-PWR-3-
GP
1D35V_PGOOD 1 OPS 2 PWR_1D35V_PGOOD PU8602 2nd = 068.1R010.1621

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SCD1U16V2KX-3DLGP
D8601 [85] 1D35V_PGOOD
17 PWR_1D35V_PHASE OPS OPS OPS OPS OPS

PG8613
6

21

21

21

21

21
1 0R2J-2-GP VCC LX#6 19
[20,79]GC6_FB_EN PR8631 LX#19 20
1D35V_VGA_EN 1 PWR_1D35V_EN
GC6_20 3 OPS 2 2 LX#20
3 IN#2 10 PWR_1D35V_PGOOD
2 VENH:0.8V 0R2J-2-GP PC8616 4 IN#3 NC#10 12
PWR_1D35V_VFB1
5 IN#4 NC#12 16 PWR_1D35V_LDO_P5
SCD1U16V2KX-3DLGP

BAT54C-12-GP DY IN#5 NC#16

21

PWR_1D35V_BOOT1
75.00054.A7D 9 BS OPS
PR8627 OPS
11 PG
s:

PC8602

21 2 1
2nd =75.00054.T7D 7
VENH:3.3V 1 2 PWR_1D35V_IMAX 13 EN GND 8 15KR2F-GP OPS SC330P50V2KX-3-DL-GP
14 ILMT GND 18

21
1V_VGA_S0_PG
R8604
1MR2J-1-GP
PR8632
0R2J-2-GP
15 FB GND 21
BYP GND 3D3V_S0
R1
GC6_20 PR8634
Vo=0.6x(1+R1/R2)
1
OPS 2
21

SY8288RAC-GP
=0.6x(1+150/120)
074.08288.0043 PC8618 0R2J-2-GP
=1.35V
OCP setting OPS SC1U10V2KX-1DLGP
21

PWR_1D35V_BYP
High 16A
tp

PWR_1D35V_VFB
Float 12A
Low 8A R2
PR8626
12KR2F-L-GPOPS

21
ht

A A

<<<CCCoooreeeDDDeeesssigggnnn>>>

Eletro-XTechnical
Wiiistron Corporation
222111FFF, 888888,SSSeeeccc.111, HHHsssinnnTTTaaai WuuuRRRddd.,
HsscchhhTTappeieepiaaT,hihhcisHH
HseennneissHH 222222111, Tawwwan,nnaaiaaTTRRROCCC.

TTTitleee
DIIISCRETE VGA POWER
SSSizzzeee DDDooocccuuumeeennntNNNuuumbbbeeer RRReevv
AA0
MOCKIIINGBIIIRD_IIICL SA
DDDaaateee: TTTuuueeesssdddaaayyy,SSSeeepppteeembbbeeer 111777,222000111999
SSShhheeeeeet 888666 ooof110055
5 4 3 2 1
 5 4 3 2 1

Main Func = TPM 3D3V_S5 R9149

0R2J-2-GP
1 2
DYST_TPM 3D3V_TPM
[17,61,63,66,76] PLT_RST#
3D3V_S0 3D3V_TPM Eletro-XTechnical
[18,24,25] R9150 1 TPM2 D01R2J-L-GP

GP C9109
SC10U6D3V3MX-DL-

3DLGP C9112
SCD1U16V2KX-

3DLGP C9113
SCD1U16V2KX-
SPI_CLK_ROM

1
[18,24,25] SPI_SI_ROM TPM TPM TPM
[18,24,25] SPI_SO_ROM

2
D D

[18] TPM_SPI_IRQ#

[20] TPM_PIRQ#

[18] SPI_CS_CPU_N2
3D3V_TPM

1
3D3V_S5_PCH
R9151
10KR2J-3-GP

p
TPM
R9148

2
10KR2J-3-GP

to
TPM R9124 1 DY 2 0R2J-2-GP TPM_SPI_IRQ#

2
3D3V_TPM
5mA SPI_CS2#_IC SPI_IRQ#_TPM2 R9123 1 TPM2 0R2J-2-GP TPM_PIRQ#

ap
TPM C9104
SCD1U16V2KX-3DLGP U9101

sl
21

TPM_GPIO0 1 TP9101
3D3V_S5
8 VHIO SDA/GPIO0 29 TPM_GPIO1 1 TP9102
C 40mA
22 VHIO SCL/GPIO1 30 SPI_IRQ#_TPM2 C
18

ic
PIRQ#/GPIO2 TPM_GPIO3 1 TP9103
1 VSB GPIO3 6 TPM_GPIO4 R9118 1 DY 2 2K2R2F-GPSPI_CS_CPU_N2
GPIO4 13
TPM_GPIO6_PP 1 TP9104
PP/GPIO6 4
GP C9106
SC10U6D3V3MX-DL-

3DLGP C9108
SCD1U16V2KX-
1

SPI_SI_ROM R9133 1 TPM2 33R2J-2-GP SPI_SI_ROM_TPM

TPM TPM 3 21 MOSI/GPIO7

t
SPI_SO_ROM R9132 1 TP 2 R2J-2-GP
M3 SPI_SO_ROM_TPM 24
MISO
SPI_CS_CPU_N2 R91301 TPM22 0R2J-2-GP SPI_CS2#_IC 20 SCS#/GPIO5 NC#7 7

ma
2

SPI_CLK_ROM R9138 1 TPM 33R2J-2-GP SPI_CLK_ROM_TPM 19 SCLK

NC#9 9
PLT_RST# 17 TPM NC#10 10
PLTRST# NC#11 11
NC#12 12
Close to U2501

he
16 NC#14 14
23 GND NC#15 15
33 GND NC#25 25
GND NC#26 26

c
NC#27 27
NC#28 28

/s
U9101_2_GND 2
3 NC#2 NC#31 31
5 NC#3 NC#32 32
2

NC#5
R9152

me
0R2J-2-GP
DYST_TPM NPCT750JABYX-GP
071.00750.0E03
1

B
t. B
//
s:
tp
ht

A <CoreDesiiign> A

Wistron Corporation
21F, 88, Sec.1, HsiiinTaiiiWu Rd., Hsiiichiiih,
TaiiipeiiiHsiiien221, Taiiiwan,R.O.C.

Eletro-XTechnical
Tiiitllle
INT IO(TPM)
Siiize DocumentNumber Rev
A3
Hellcat 14/15_ ICL SA
Date: Tuesday, September17, 2019 Sheet 91 of 106
5 4 3 2 1
 5 4 3 2 1

Main Func = Firmware SW

Eletro-XTechnical
[19] ME_FWP_SW

[24] ME_FW P

Firmware SW
D

R9806
0R2J-2-GP
ME_FWP 2 1 ME_FWP_SW

SA 1026
MESW 1

7
SW-SLIDE3P-11-GP

ME_FWP 3 NP2
ME_FWP_SW 2

p
R9801
2 1MESW 1_B
MESW
1 NP1

to
3D3V_S5_PCH MESW
1KR2J-1-GP
62.40018.641

5
R9802

ap
SA 1026 4K7R2F-GP DY

sl
A B
C C

ic
Low High
ME_FWP
Normal Operation Override
(Default)

t
ma
c he
/s
3 1

me
LOW HIGH
ME_FWP
Normal Operation Override
(Default)

B
t. B
//
s:
tp
ht

<CoreDesiiign>
A A

Wistron Corporation
21F, 88, Sec.1, HsiiinTaiiiWu Rd.,Hsiiichiiih,
TaiiipeiiiHsiiien221, Taiiiwan, R.O.C.

Tiiitllle

Eletro-XTechnical Siize DocumentNumber

CRT_Switch
Rev
A3
Hellcat 14/15_ ICL SA
Date: Tuesday, September 17, 2019 Sheet 98 of 106

5 4 3 2 1
 5 4 3 2 1

Eletro-XTechnical

1
[3] CPU_JTAG_TCK TP9901
D 1 TP9902
D
[3] CPU_JTAG_TDI 1 TP9903
[3] CPU_JTAG_TDO
1 TP9904
[3] CPU_JTAG_TMS
1 TP9905
[3] CPU_JTAG_TRST#
[3] 1 TP9906
PCH_JTAG_TCK
[3] 1 TP9907
CPU_JTAG_PRDY#
[3] CPU_JTAG_PREQ# 1 TP9908
[3,15] DBG_PMODE 1 TP9909

p
to
ap
sl
ic
C C

t
ma
che
/s
me
t.
//
B B
s:
tp
ht

<CoreDesign>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan,R.O.C.

Title
Debug (XDPdebug)
Eletro-XTechnical
Size Document Number Rev
A4
Hellcat 14/15_ ICL SA
Date: Tuesday, September 17, 2019 Sheet 99 of 106
5 4 3 2 1
 5 4 3 2 1

Main Func = CPU

1D2V_S3
1D8V_PCH_C10 Eletro-XTechnical

1
C1102 C1103 C1104 C1105 C1106 C1107
SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGPSC1U10V2KX-1DLGPSC1U10V2KX-1DLGP SC1U10V2KX-1DLGP
1

2
C1101 C1108 SC10U6D3V3MX-
D DL-GP DY SC47U4V3MX-3-GP D
2

1
1

1
1
C1109 C1110 C1123 C1124 C1128
SC12P50V2JN-DL-GP

21
SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC12P50V2JN-DL-GP SC12P50V2JN-DL-GP

2
2

2
2
1D2V_VCCPLL_OC

1
1
C1130 C1131

1
C1129
C1111 C1112 C1113 SC10U6D3V2MX-6- SC4D7P50V2BN-2-GPSC4D7P50V2BN-2-GPSC4D7P50V2BN-2-GP
GP SC10U6D3V2MX-6-GP SC10U6D3V2MX-6-GP

2
2
2

2
1

C1114 C1115
SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP DY DY DY

to
2

DY Decoupling capacitors of 12 pF (0402) and 2.2 pF (0402)

ap
are required to suppress the broadband noise at RF frequency

1
C1116 C1117
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP

sl
C 1D05V_VCCP_OUT_SFR C

ic
1
C1118
DY SC22U6D3V3MX-1-DL-GP

t
1

C1119 C1120

2
SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP

ma
2

DY

c he
/s
1D05V_VCCST

1D05V_VCCSTG_OUT_FUSE_R

me
1

C1121 C1122
SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP
C1125
t.
2

SC1U10V2KX-1DLGP
DY

21
B B
//
s:

1D05V_VCCSTG
tp
1

C1126 C1127
SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP
ht
2

DY

A <CoreDesiiign> A

Wistron Corporation
21F, 88, Sec.1, HsiiinTaiiiWu Rd., Hsiiichiiih,
TaiiipeiiiHsiiien221, Taiiiwan,R.O.C.

Eletro-XTechnical
Tiiitllle
CPU (Power Cap2)
Siiize DocumentNumber Rev
A3
Hellcat 14/15_ ICL SA
Date: Tuesday, September17, 2019 Sheet 11 of 106
5 4 3 2 1
 5 4 3 2 1

Main Func = PCH Description Top Swap

No Reboot
TLS Confi- eSPI
Disable Reserved
DDP3 I2C/TBT LSX #2/ DDP4 I2C/TBT LSX #3/
Override dentiality BSSB-LS #2 pins VCC configuration BSSB-LS #3 pins VCC configuration

GPP_B14 / SPKR /
GPIO TIME_SYNC1 / GPP_B18 GPP_C2 GPP_C5 SPI0_MOSI GPP_D10 GPP_D12
Eletro-XTechnical
[20,27] SPKR GSPI0_CS#
[20] NRB_BIT 3D3V_S5_PCH 3D3V_SPI
3D3V_S5_PCH 3D3V_S5_PCH
3D3V_S5_PCH
[18] GPP_C2
3D3V_S5_PCH 3D3V_S5_PCH

1
[18] GPP_C5

1
R1553 R1556

1
R1551 150KR2J-GP R1575 R1585
[18] SPI_SI_CPU 100KR2J-1-GP

1
R1547 R1549 150KR2J-GP DY4K7R2J-2-GP DY 4K7R2J-2-GP
DY 4K7R2J-2-GP DY4K7R2J-2-GP

2
2
GPP_C5 SPI_SI_CPU
D D
GPP_C2 GPP_D10 GPP_D12

2
SPKR NRB_BIT

12

12
[20] GPP_B23

1
1

1
R1550 R1552 R1554 R1555 R1576 R1586
[18] SPI_W P_CPU R1548
DY 20KR2J-L2-GP DY20KR2J-L2-GP DY 20KR2J-L2-GP DY20KR2J-L2-GP DY 4K7R2J-2-GP DY20KR2J-L2-GP DY 20KR2J-L2-GP
[18] SPI_HOLD_CPU

2
2

2
[19] HDA_SDO

[3] GPP_E6

[4] TBT_LSX0_RXD

TBT_LSX1_RXD
LOW Disable (Default) Disable (Default) Disable Intel ME Crypto Transport Layer Security Enable eSPI. (Default) DDP3 I2C/TBT LSX #2/BSSB_LS #2 pins at 1.8V DDP4 I2C/TBT LSX #3/BSSB_LS #3 pins at 1.8V
[4] (TLS) cipher suite (no confidentiality). (Default)

[17] GPD7 HIGH Enable Enable

Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). Must be Disable eSPI. This strap should sample HIGH. DDP3 I2C/TBT LSX #2/BSSB_LS #2 pins at 3.3V DDP4 I2C/TBT LSX #3/BSSB_LS #3 pins at 3.3V
[21,61]CNV_BRI_DT_R pulled up to support Intel AMT with TLS.

p
[21,61]CNV_RGI_DT 20 K± 30% internal pull-down.
[3] GPP_H2

to
[4] GPP_D10
DDP1 I2C /TBT LSX #0 /
[4] GPP_D12 CPUNSSC Clock Reserved Reserved Flash Descriptor Reserved BSSB-LS #0 pins VCC configuration DDP2 I2C/TBT LSX #1/
Description Frequency Security Override BSSB-LS #1 pins VCC configuration

ap
GPP_B23 / SML1ALERT# / SPI0_IO2 SPI0_IO3 GPP_R2 / HDA_SDO / GPP_E19 / DDP1_CTRLDATA / GPP_E21 / D DP2_CTRLDATA /
GPIO PCHHOT# / GSPI1_CS1#
I2S0_TXD / HDACPU_SDO GPP_E6 CNV_BT_IF_SELECT / BSSB_LS0_RX BSSB_LS1_TX

sl
3D3V_S5_PCH 3D3V_SPI 3D3V_SPI 3D3V_S5_PCH 3D3V_S5_PCH 3D3V_S5_PCH

3D3V_S5_PCH
C C
1

1
R1561 R1503 R1570 R1571 R1573

ic
1
DY 150KR2J-GP R1564 100KR2J-1-GP
R1567
100KR2J-1-GP DY 4K7R2J-2-GP DY 4K7R2J-2-GP
100KR2J-1-GP
DY 4K7R2J-2-GP
2

2
2
GPP_B23 SPI_HOLD_CPU GPP_E6 TBT_LSX0_RXD TBT_LSX1_RXD

2
1
SPI_W P_CPU

t
HDA_SDO
1

1
R1562 R1563 R1502 R1569 R1572 R1574

ma
DY 20KR2J-L2-GP DY 4K7R2J-2-GP DY 100KR2J-1-GP DY 4K7R2J-2-GP DY 20KR2J-L2-GP DY 20KR2J-L2-GP
2

2
he
38.4 MHz clock Enable security measures defined in the Flash
LOW (direct from crystal) (default) Descriptor. (Def ault) 1.8V 1.8V

c
19.2 MHz clock Disable Flash Descriptor Security (override). This
HIGH (from internal divider) This strap should sample HIGH This strap should sample HIGH strap should only be asserted high using external This strap should sample HIGH. 3.3V 3.3V
Pull-up in manufacturing/debug environments

/s
ONLY.
20 K± 30% internal pull-down. 20 K± 30% internal pull-down.
20 K± 30% internal pull-down.

me
XTAL eSPI Flash
Description M.2 CNVi
Reserved Reserved Frequency Mode Sharing
Selection Mode
ITP_PMODE
Select

B
GPIO ITP_PMODE GPD7 GPP_F0 /
CNV_BRI_DT /
UART0_RTS#
t. GPP_F2 /
CNV_RGI_DT / UART0_TXD
GPP_H2 /
CNV_BT_I2S_SDI/
MODEM_CLKREQ B
//
3D3V_S5_PCH 1D8V_S5 1D8V_S5 3D3V_S5_PCH
1

1
1

R1577 R1579 R1583

R1505 DBG_PMODE [3,99]
DY 4K7R2J-2-GP 20KR2F-L-GP 20KR2F-L-GP DY 100KR2J-1-GP
s:
2

2
2

GPD7 CNV_RGI_DT GPP_H2

CNV_BRI_DT_R

1
R1533
1

1
R1578 R1581 R1584
DY 2K2R1J-GP
tp

DY 20KR2J-L2-GP R1580
DY 4K7R2J-2-GP DY 20KR2F-L-GP

2
DY 20KR2J-L2-GP
2
1

2
2
1
ht

LOW This strap should sample LOW. 38.4 MHz (default)

Integrated CNVi enabled. Master Attached Flash Sharing (MAFS) is enabled. Reserved
(Default)

HIGH This strap should sample high. 24MHz Integrated CNVi disabled. Slave Attached Flash Sharing (SAFS) is enabled. Reserved
20 K± 30% internal pull-up 20 K± 30% internal pull-down. 20 K± 30% internal pull-down. 20 K± 30% internal pull-down.

A A

<CorrreDesiiign>

WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle
CPU (STRAP)
SiiizeDocumenttt NumberrrA2 Rev
SA
Hellcat 14/15_ ICL
Dattte:::Tuesday,,, Septttemberrr17,,,2019 Sheettt 15 off 106
5 4 3 2 1
 5 4 3 2 1

Main Func = CPU

1V_CPU_CORE

Eletro-XTechnical
1

1
C1001 C1002 C1003 C1004
SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP
2

2
C1005 C1006
SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP
21

21

D D

C1007 C1008 C1009 C1010

SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
2 1

2 1

2 1

2 1
C1011 C1012 C1013 C1014 C1015 C1016
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
2 1

21

21

21

21

21

p
C1017 C1018 C1019
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
2 1
21

21

to
Change to 0603 (0805 acoustic noise is bad )

ap
sl
C 1D8V_CPU_AUX C

ic
C1020 C1021 C1022 C1023 C1024 C1025
SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP
2 1

2 1

2 1

2 1

2 1

2 1

t
ma
C1026 C1027 C1028 C1029 C1030 C1031
SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP
21

21

21

21

21

21

he
C1032 C1033 C1034 C1035 C1036 C1037 SC10U6D3V2MX-6-GP C1038
SC10U6D3V2MX-6-GP SC10U6D3V2MX-6-GP SC10U6D3V2MX-6-GP SC10U6D3V2MX-6-GP
21

21

21

21

21

SC10U6D3V2MX-6-GP
21

SC10U6D3V2MX-6-GP

c
21

DY DY DY DY DY DY DY

/s
C1039 C1040 C1041 C1042 C1043 C1044
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
21

21

21

21

21

21

me
C1045 C1046 C1047 C1048
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
t.
2 1

2 1

2 1

2 1

DY DY DY DY
B B
//
C1049
SC22U6D3V3MX-1-DL-GP
2 1

s:

C1050 C1051 C1052 C1053 C1054

SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
21

21

21

21

21

tp

DY DY DY DY DY
ht

C1055 C1056 C1057 C1058 C1059 C1060

SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP
2 1

2 1

2 1

2 1

2 1

2 1

C1061 C1062 C1063 C1064 C1065 C1066

SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP
21

21

21

21

21

21

A A

C1067 C1068 C1069 C1070 C1071 C1072 SC10U6D3V2MX-6-GP C1073

21

21

21

21

21

SC10U6D3V2MX-6-GP SC10U6D3V2MX-6-GP SC10U6D3V2MX-6-GP SC10U6D3V2MX-6-GP

21

SC10U6D3V2MX-6-GP SC10U6D3V2MX-6-GP
21

<CorrreDesiiign>
DY DY DY DY DY DY DY
WistronCorporation
21F,,, 88,,,Sec...1,,,HsiiinTaiiiW u Rd...,,,Hsiiichiih,,,
TaiiipeiiiHsiiien 221,,,Taiiiwan,,,R...O...C...

Eletro-XTechnical Tiitttlle
CPU (CORE Power Cap1)
Size DocumentttNumberrr Rev
A2 SA
Hellcat 14/15_ ICL
Date::: Tuesday,,, Septttemberrr 17,,, 2019 Sheett 10 off 106
5 4 3 2 1
 5 4 3 2 1

Main Func = UnusedParts

HS1
H1 H5 STF237R113H86-GP
HOLE335R178-GP

Eletro-XTechnical
HOLE256R142-1-GP
1

1
ZZ.00PAD.7F1 434.07K0E.0001
ZZ.PAD01.V91

1
D D

GPU/CPU SKREW HOLE TYPEC SKREW HOLE HDMI SKREW HOLE

H7 H8 H9 H10 H11 H12 H13 H14 H15
HOLE276R150-GP HOLE276R150-GP HOLE276R150-GP HOLE276R150-GP HOLE276R154-GP HOLE276R154-GP HOLE276R154-GP HOLE256R142-1-GP HOLE256R142-1-GP
1

1
ZZ.00PAD.H91ZZ.00PAD.H91 ZZ.00PAD.H91 ZZ.00PAD.H91 ZZ.00PAD.2T1 ZZ.00PAD.2T1ZZ.00PAD.2T1 ZZ.PAD01.V91 ZZ.PAD01.V91

p
to
Main Func = EMI Capacitors 1D2V_S3 3D3V_S0 PW R_DCBATOUT_VCOREA

Mind the voltage rating of the caps.

ap
EC8950 EC8951 EC8952EC8953 EC8954 EC8955EC8956 EC8959 EC8960 EC8964 EC8909 EC8910EC8911 EC8912
[43,44] +DC_IN_C

1
19V_DCBATOUT

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP
EC8958
EC8901 EC8902 EC8903EC8904 EC8905 EC8906 EC8907 EC8908 DY DY DY DY DY DY DY DY

21

21

21

21
SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP

SCD1U16V2KX-3DLGP

2
EC8917 EC8919 DY DY DY DY DY
SCD1U25V2KX-1-DL-GP

sl
1

2 1
SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP

2
1

EC8925
SC1KP50V2KX-1DLGP
2

C C

ic
1V_VGACORE1_S0
5V_S0 5V_S5
EC8915 EC8928 EC8929

t
1

1
SCD1U25V2KX-1-DL-GP

SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP

EC8933 EC8934 EC8935EC8936 EC8937 EC8938 EC8939 EC8947 EC8948EC8949 EC8961 EC8965 EC8966EC8967 EC8968

1
21

ma
SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP
2

DY DY DY DY DY

2
2

2
DY DY DY DY DY DY DY DY DY DY

he
1V_CPU_CORE
+SDC_IN

19V_DCBATOUT
PW R_DCBATOUT_VDDQ
PW R_DCBATOUT_VCOREA 20V_DCBATOUT
PW R_DCBATOUT_1D35V

c
EC8975EC8976 EC8977
1

DY
SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

EC8969 EC8970 EC8971 EC8972 EC8973 EC8974 EC8963

EC8957 DY DY DY
SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP

DY DY DY DY DY EC8985
1

/s
21

21

21

21

21
21

EC8962
SC1KP50V2KX-1DLGP

EC8982EC8983 EC8987
2

DY EC8986

SCD1U25V2KX-1-DL-GP
DY
SCD1U25V2KX-1-DL-GP

SC1KP50V2KX-1DLGP

SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP
21

SCD1U25V2KX-1-DL-GP
21

SCD1U25V2KX-1-DL-GP
2 1
2

21

21

21

21
me
優 優 優 優 PC4717旁 旁
優 優 優 優 PC4705旁 旁 或 或 或 PC4717的 Top層
或 或 或 PC4705的 Top層

B Main Func = RF Capacitors

t. B
//
Mind the voltage rating of the caps.
0.1uF 0402 x 8 5V_S5 0.1uF 0402 x 8 19V_DCBATOUT 0.1uF 0402 x 8
3D3V_S5
s:

FC8901 FC8903 FC8904 FC8905 FC8936 FC8937 FC8938 FC8939 FC8906 FC8907 FC8908 FC8909 FC8940 FC8941 FC8942 FC8943
FC8916 FC8917 FC8918 FC8920 FC8921 FC8922 FC8923 FC8924 FC8957 FC8959 FC8960 FC8961 FC8962 FC8963 FC8964
1

1
SCD1U16V2KX-3DLGP

SCD1U 6V2KX-3DLGP

SCD1U 6V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U 6V2KX-3DLGP

SCD1U 6V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U 6V2KX-3DLGP

SCD1U 6V2KX-3DLGP

SCD1U 6V2KX-3DLGP

SCD1U 6V2KX-3DLGP

SCD1U16V2KX-3DLGP

SCD1U 6V2KX-3DLGP

SCD1U 6V2KX-3DLGP

SCD1U16V2KX-3DLGP

DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DYDY
SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP

SCD1U25V2KX-1-DL-GP