Edc Lab Expts 16.10
Edc Lab Expts 16.10
Edc Lab Expts 16.10
AUR 2021
CIRCUIT DIAGRAM:
B) Forward bias:
C) Reverse Bias:
1 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
APPARATUS REQUIRED:
THEORY:
A P-N junction diode conducts only in one direction. The V-I characteristics of the diode
are curve between voltage across the diode and current flowing through the diode. When external
voltage is zero, circuit is open and the potential barrier does not allow the current to flow.
Therefore, the circuit current is zero. When Ptype (Anode) is connected to +ve terminal and n- type
(cathode) is connected to –ve terminal of the supply voltage is known as forward bias.
The potential barrier is reduced when diode is in the forward biased condition. At some forward
voltage, the potential barrier altogether eliminated and current starts flowing through the diode and
also in the circuit. Then diode is said to be in ON state. The current increases with increasing Vf.
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
MODEL GRAPH:
1. Take a graph sheet and divide it into 4 equal parts. Mark origin at the center of the graph sheet.
2. Now mark +ve X-axis as Vf, -ve X-axis as Vr, +ve Y-axis as If and –ve Y-axis as Ir.
3. Mark the readings tabulated for Si forward biased condition in first Quadrant and Si reverse
biased condition in third Quadrant.
OBSERVATIONS:
A) FORWARD BIAS:
B) REVERSE BIAS:
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Calculations:
In forward bias condition:
Static Resistance, Rs = Vf/If =
Dynamic Resistance, RD = ΔVf/ ΔIf =
In Reverse bias condition:
Static Resistance, Rs = VR/IR = Dynamic Resistance, RD
= ΔVR/ ΔIR =
When N-type (cathode) is connected to +ve terminal and P-type (Anode) is connected -ve
terminal of the supply voltage is known as reverse bias and the potential barrier across the
junction increases. Therefore, the junction resistance becomes very high and a very small current
(reverse saturation current) flows in the circuit. Then diode is said to be in OFF state. The reverse
bias current is due to minority charge carriers.
PROCEDURE:
A) FORWARD BIAS:
1. Connections are made as per the circuit diagram.
2. For forward bias, the RPS +ve is connected to the anode of the diode and RPS –ve is connected
to the cathode of the diode
3. Switch on the power supply and increase the input voltage (supply voltage) in steps of 0.1V.
4. Note down the corresponding current flowing through the diode and voltage across the diode for
each and every step of the input voltage.
5. The reading of voltage and current are tabulated.
6. Graph is plotted between voltage (Vf) on X-axis and current (If) on Y-axis.
B) REVERSE BIAS:
1. Connections are made as per the circuit diagram
2. For reverse bias, the RPS +ve is connected to the cathode of the diode and RPS –ve is connected
to the anode of the diode.
3. Switch on the power supply and increase the input voltage (supply voltage) in steps of 1V.
4. Note down the corresponding current flowing through the diode voltage across the diode for
each and every step of the input voltage.
5. The readings of voltage and current are tabulated
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
RESULT:
Thus the V-I characteristics of PN junction diode in forward and reverse bias condition was
plotted.
VIVA QUESTIONS:
1. Define depletion region of a diode.
2. What is meant by transition & space charge capacitance of a diode?
3. Is the V-I relationship of a diode Linear or Exponential?
4. Define cut-in voltage of a diode and specify the values for Si and Ge diodes.
5. What are the applications of a p-n diode?
6. Draw the ideal characteristics of P-N junction diode.
7. What is the diode equation?
8. What is PIV?
9. What is the break down voltage?
10. What is the effect of temperature on PN junction diodes?
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
CIRCUIT DIAGRAM
A) FORWARD BIAS CHARACTERISTICS:
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
9 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
AIM:
To plot the volt ampere characteristics of a zener diode.
To determine its knee voltage, breakdown voltage also its static and
dynamic resistances in forward and reverse bias.
To determine the line and load regulation characteristics of a zener diode.
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
APPARATUS REQUIRED:
THEORY:
A zener diode is heavily doped p-n junction diode, specially made to operate in the break
down region. A p-n junction diode normally does not conduct when reverse biased. But if the
reverse bias is increased, at a particular voltage it starts conducting heavily.
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
MODEL GRAPH:
OBSERVATIONS:
A) FORWARD BIAS:
B) REVERSE BIAS:
CALCULATIONS:
Forward bias
Static forward resistance Rdc = Vf / If Ω
Dynamic forward resistance rac = ΔVf/ΔIf
Ω Reverse bias
Static reverse resistance Rdc = Vr/ Ir Ω
Dynamic reverse resistance rac = ΔVf/ΔIf
Ω
For Load Regulation, % Voltage Regulation = (𝑉𝑁𝐿−𝑉𝐹𝐿) X 100
𝑉𝐹𝐿
This voltage is called Break down Voltage. High current through the diode can
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permanently damage the device. Applying a positive potential to the anode and a negative potential
to the cathode of the zener diode establishes a forward bias condition. The forward characteristic of
the zener diode is same as that of a pn junction diode i.e. as the applied potential increases the
current increases exponentially. Applying a negative potential to the anode and positive potential to
the cathode reverse biases the zener diode As the reverse bias increases the current increases
rapidly in a direction opposite to that of the positive voltage region. Thus under reverse bias
condition breakdown occurs.
Basically there are two types of regulations such as:
Line Regulation: In this type of regulation, series resistance and load resistance are fixed,
only input voltage is changing. Output voltage remains the same as long as the input
voltage is maintained above a minimum value.
Load Regulation: In this type of regulation, input voltage is fixed and the load resistance
is varying. Output volt remains same, as long as the load resistance is maintained above a
minimum value.
PROCEDURE:
1) V- I CHARACTERISTICS:
a) Forward Bias Condition:
1. Connect the circuit as shown in figure .
2. Initially vary Vs in steps of 0.1V. Once the current starts increasing vary Vs in steps of 1V
up to 12V. Note down the corresponding readings of Vzf and Izf.
b) Reverse Bias Condition:
1. Connect the circuit as shown in figure (2).
2. Vary Vs gradually in steps of 1V up to 12V and note down the corresponding readings of
Vzr and Izr.
3. Tabulate different reverse currents obtained for different reverse voltages.
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
MODEL GRAPH:
TABULATION:
Load resistance RL = KΩ
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
Regulation characteristics:
c) Line Regulation
LOAD REGULATION:
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
TABULATION:
MODEL GRAPH
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
RESULT:
Thus plotted the VI characteristics of Zener diode and determined its parameters:
VIVAQUESTIONS:
1. What type of temp coefficient does the zener diode have?
2. If the impurity concentration is increased, how does the depletion width get effected?
3. Does the dynamic impendence of a zener diode vary?
4. Explain briefly about avalanche and zener breakdowns.
5. Draw the zener equivalent circuit.
6. Differentiate between line regulation & load regulation.
7. Which region zener diode can be used as a regulator?
8. How the breakdown voltage of a particular diode can be controlled?
9. What type of temperature coefficient does the Avalanche breakdown has?
10. By what type of charge carriers the current flows in zener and avalanche breakdown diodes?
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
CIRCUIT DIAGRAM:
INPUT
CHARACTERISTICS
OUTPUT CHARACTERISTICS
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
AIM:
To draw the input and output characteristics of transistor connected in CE configuration
To find β of the given transistor and also its h parameters.
APPARATUS REQUIRED:
Bread board - 1 No
7.
THEORY:
In common emitter configuration, input voltage is applied between base and emitter
terminals and output is taken across the collector and emitter terminals. Therefore the emitter
terminal is common to both input and output. The input characteristics resemble that of a forward
biased diode curve.. As compared to CB arrangement IB increases less rapidly with VBE.
Therefore input resistance of CE circuit is higher than that of CB circuit. The output characteristics
are drawn between Ic and VCE at constant IB. the collector current varies with VCE up to few volts
only. After this the collector current becomes almost constant, and independent of VCE. The value
of VCE up to which the collector current changes with V CE is known as Knee voltage.
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
MODEL GRAPH:
A) INPUT CHARACTERISTICS:
B) OUTPUT CHARACTERSITICS:
Calculations:
1.
Input Characteristics: To obtain input resistance find VBE and IB for a constant VCE
on one of the input characteristics.
Input impedance = hie= Ri = VBE/ IB(VCEis
constant) Reverse voltage gain = hre=VEB/ VCE(IB=
constant)
2.
Output Characteristics: To obtain output resistance find ICand VCBat aconstant
IB. Output admittance 1/hoe = Ro = IC/ VCE(IBis constant)
Forward current gain = hfe = IC/ IB(VCE= constant)
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3.
Current amplification factor β = ΔIC/ΔIB
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
The transistor always operated in the region above Knee voltage, IC is always constant and is
approximately equal to IB.The current amplification factor of CE configuration is given by
β = ΔIC/ΔIB
Input Resistance, ri = ΔVBE /ΔIB (μA) at Constant VCE
Output Résistance, ro = ΔVCE /ΔIC at Constant IB (μA)
PROCEDURE:
A) INPUT CHARACTERISTICS
1. Connect the circuit as per the circuit diagram.
2. For plotting the input characteristics the output voltage VCE is kept constant at 1V and for
different values of VBB , note down the values of IB and VBE
3. Repeat the above step by keeping VCE at 2V and 4V and tabulate all the readings.
4. Plot the graph between VBE and IB for constant VCE
B) OUTPUT CHARACTERISTICS:
1. Connect the circuit as per the circuit diagram
2. For plotting the output characteristics the input current IB is kept constant at 50μA and for
different values of VCC note down the values of IC and VCE
3. Repeat the above step by keeping IB at 75 μA and 100 μA and tabulate the all the readings
4. Plot the graph between VCE and IC for constant IB
PRECAUTIONS:
1. The supply voltage should not exceed the rating of the transistor
2. Meters should be connected properly according to their polarities
TABULATION:
Input Characteristics
VCE = VCE =
0V 5V
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
VBB (Volts)
VBE IB VBE IB
(Volts) (µA) (Volts) (µA)
Output Characteristics
IB = 0 µA IB = 20 µA IB = 40 µA
VCC
(Volts) VCE IC VCE IC VCE IC
(Volts) (mA) (Volts) (mA) (Volts) (mA)
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
RESULT:
Thus obtained the input and output characteristics of transistor connected in CE
configuration and determined its parameters.
VIVA QUESTIONS:
1. What is the range of β for the transistor?
2. What are the input and output impedances of CE configuration?
3. Identify various regions in the output characteristics.
4. What is the relation between α and β?
5. Define current gain in CE configuration.
6. Why CE configuration is preferred for amplification?
7. What is the phase relation between input and output?
8. Draw diagram of CE configuration for PNP transistor.
9. What is the power gain of CE configuration?
10. What are the applications of CE configuration?
25 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
CIRCUIT DIAGRAM
MODEL GRAPH
26 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
Christian College of Engineering & Technology, Oddanchatram
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
THEORY
The circuit of a center-tapped full wave rectifier uses two diodes D1&D2. During positive
half cycle of secondary voltage (input voltage), the diode D1 is forward biased and D2is reverse
biased.
The diode D1 conducts and current flows through load resistor R L. During negative half
cycle, diode D2 becomes forward biased and D1 reverse biased. Now, D2 conducts and current
flows through the load resistor RL in the same direction. There is a continuous current flow through
the load resistor RL, during both the half cycles and will get unidirectional current as show in the
model graph.
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
TABULATION
S.No Load Resistance (RL) Input Voltage Peak Output Voltage Peak (Vo)
(Vm)
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
PROCEDURE
Full-wave Rectifier with filter
1. Connect the circuit as shown in the figure (b).
2. Adjust the load resistance RL to 1Kand connect a capacitor of 100F values in parallel
with the load and note the readings of input and output voltages through Oscilloscope.
3. Note the readings of DC current, DC voltage and AC voltage.
4. Now change the load resistance RL to 2K and repeat the procedure as the above. Also
5. repeat for 10K, 100μF values.
6. Readings are tabulate as per the tabular column.
RESULT
Thus the Input and Output waveforms of a full-wave (center tapped) and bridge rectifier with
filters are observed and plotted.
VIVA QUESTIONS
1. What is a full wave rectifier?
2. How Diode acts as a rectifier?
3. What is the significance of PIV requirement of Diode in full-wave rectifier?
4. Compare capacitor filter with an inductor filter?
5. What is the theoretical maximum value of ripple factor for a full wave rectifier?
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
CIRCUIT DIAGRAM
MODEL GRAPH
30 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
AIM
Plot the frequency response of CE amplifier and calculate gain bandwidth.
Quantity
S.No Device Range/Rating
(in No.s)
1 CE Amplifier trainer Board with
(a) DC power supply 12V 1
THEORY
The CE amplifier provides high gain &wide frequency response. The emitter lead is common to both
input & output circuits and is grounded. The emitter-base circuit is forward biased. The collector current is
controlled by the base current rather than emitter current. The input signal is applied to base terminal of the
transistor and amplifier output is taken across collector terminal.. When +VE half-cycle is fed to the input
circuit, it opposes the forward bias of the circuit which causes the collector current to decrease, it decreases
the voltage more –VE. Thus when input cycle varies through a -VE half-cycle, increases the forward bias
of the circuit, which causes the collector current to increases thus the output signal is common emitter
31 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
32 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
PROCEDURE
1. Connect the circuit diagram as shown in figure.
2. Adjust input signal amplitude in the function generator and observe an amplified voltage at the
output without distortion.
3. By keeping input signal voltages at 50mV, vary the input signal frequency from 0 to 1MHz in
steps as shown in tabular column and note the corresponding output voltage
RESULT
Thus the Frequency response of CE amplifier is plotted.
VIVA QUESTIONS
1. What is an Amplifier?
2. How many types of an Amplifier?
3. What is meant Band width, Lower cut-off and Upper cut-off frequency?
4. How much phase shift for CE Amplifier?
5. What are the applications?
6. Draw the Equivalent circuit for low frequencies?
33 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
CIRCUIT DIAGRAM:
MODEL GRAPH:
34 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
To Plot the frequency response of a CS FET amplifier. Calculate gain and bandwidth.
THEORY:-
A field-effect transistor (FET) is a type of transistor commonly used for weak-signal amplification (for
example, for amplifying wireless (signals). The device can amplify analog or digital signals. It can also switch
DC or function as an oscillator. In the FET, current flows along a semiconductor path called the channel. At one
end of the channel, there is an electrode called the source. At the other end of the channel, there is an electrode
called the drain. The physical diameter of the channel is fixed, but its effective electrical diameter can be varied
by the application of a voltage to a control electrode called the gate. Field-effect transistors exist in two major
classifications. These are known as the junction FET (JFET) and the metal-oxide semiconductor FET
(MOSFET). The junction FET has a channel consisting of N-type semiconductor (N-channel) or P-type
semiconductor (P-channel) material; the gate is made of the opposite semiconductor type. In P-type material,
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electric charges are carried mainly in the form of electron deficiencies called holes. In N-type material, the
charge carriers are primarily electrons. In a JFET, the junction is the boundary between the channel and the
gate.
TABULAR COLUMN:
Input =
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
PROCEDURE: -
1. Connect the circuit diagram as shown in figure.
2. Adjust input signal amplitude in the function generator and observe an amplified voltage at the
output without distortion.
3. By keeping input signal voltage, say at 50mV, vary the input signal frequency from 0 to 1MHz
insteps as shown in tabular column and note the corresponding output voltages.
VIVA QUESTIONS:
1. What are the advantages of JFET over BJT?
2. Why input resistance in FET amplifier is more than the BJT amplifier?
RESULT: -
Thus the Frequency response of CS FET amplifier is plotted.
CIRCUIT DIAGRAM
37 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
MODEL GRAPH
TABULAR COLUMN
Input voltage: Vi =
Frequenc Output (Vo) Gain Gain (in dB) =
y (in Hz) (Peak to AV=V0/V 20 log 10 VO/ Vi
Peak) i
38 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
AIM
Plot the frequency response of CC amplifier and calculate gain bandwidth.
COMPONENTS & EQUIPMENTS REQUIRED
b) DC power supply 5V 1
THEORY
In common-collector amplifier the input is given at the base and the output is taken at the emitter. In
this amplifier, there is no phase inversion between input and output. The input impedance of the CC
amplifier is very high and output impedance is low. The voltage gain is less than unity. Here the collector is
at ac ground and the capacitors used must have a negligible reactance at the frequency of operation.
This amplifier is used for impedance matching and as a buffer amplifier. This circuit is also known as
emitter follower.
PROCEDURE
1. Connect the circuit diagram as shown in figure.
2. Adjust input signal amplitude in the function generator and observe an amplified voltage at the
output without distortion.
3. By keeping input signal voltages at 50mV, vary the input signal frequency from 0 to 1MHz in steps
as shown in tabular column and note the corresponding output voltages.
39 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
VIVA QUESTIONS
1. What is the other name for CC Amplifier?
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RESULT
Thus the Frequency response of CC amplifier is plotted. Gain, AV = dB.
Bandwidth= fH--fL = Hz.
CIRCUIT DIAGRAM
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
42 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
AIM:
THEORY:
The MOSFET is actually a four-terminal device, whose substrate, or body terminal must
be always held at one of the extreme voltage in the circuit, either the most positive for the PMOS
or the most negative for the NMOS. One unique property of the MOSFET is that the gate draws
no measurable current.
PROCEDURE:
OUTPUT/DRAIN CHARACTERISTICS:
1. Connect the circuit as per given diagram properly.
2. Keep VGS constant at some value say 1.1 V by varying VGG
3. Vary VDS in step of 1V up to 10 volts and measure the drain current ID. Tabulate all the readings.
4. Repeat the above procedure for VGS as 1.2V, 1.3V, 1.4V, 1.5V etc
TRANSFER CHARACTERISTICS:
1. Connect the circuit as per given diagram properly.
2. Set the voltage VDS constant at 10 V.
3. Vary VGS by varying VGG in the step of 0.1 up to 1.55V and note down value of drain
current ID. Tabulate all the readings.
4. Plot the output characteristics VDS vs ID and transfer characteristics VGS vs ID.
5. Calculate VT, gm, rd or ro from the graphs and verify it from the data sheet
TABULATION:
DRAIN CHARACTERISTICS
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
TRANSFER
CHARACTERISTICS
VDS = 10 V
44 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
RESULT:
Thus the study of transfer and output characteristics of an n-channel Metal Oxide
Semiconductor field effect Transistor (MOSFET) in Common-source configuration is completed
successfully
CIRCUIT DIAGRAM
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
MODEL GRAPH
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
AIM
Plot the frequency response of CB amplifier and calculate gain bandwidth.
Quantity
S.No Device Range/Rating
(in No.s)
1 CB Amplifier trainer Board with
(g) DC power supply 12V 1
THEORY
The CB amplifier provides high gain &wide frequency response. The base lead is common to both
input & output circuits and is grounded. The emitter-base circuit is forward biased. The collector current is
controlled by the base current rather than emitter current. The input signal is applied to base terminal of the
transistor and amplifier output is taken across collector terminal.. When +VE half-cycle is fed to the input
circuit, it opposes the forward bias of the circuit which causes the collector current to decrease, it decreases
the voltage more –VE. Thus when input cycle varies through a -VE half-cycle, increases the forward bias
of the circuit, which causes the collector current to increases thus the output signal is common emitter
amplifier is in out of phase with the input signal.
Bandwidth = fH-fL
TABULAR COLUMN
Input voltage: Vi =
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EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
PROCEDURE
1. Connect the circuit diagram as shown in figure.
2. Adjust input signal amplitude in the function generator and observe an amplified voltage at the
output without distortion.
48 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
3. By keeping input signal voltages at 50mV, vary the input signal frequency from 0 to 1MHz in
steps as shown in tabular column and note the corresponding output voltage
RESULT
Thus the Frequency response of CB amplifier is plotted.
VIVA QUESTIONS
1. What is an Amplifier?
2. How many types of an Amplifier?
3. What is meant Band width, Lower cut-off and Upper cut-off frequency?
4. How much phase shift for CB Amplifier?
5. What are the applications?
6. Draw the Equivalent circuit for low frequencies?
CIRCUIT DIAGRAM
. Vcc
VCC
RC
R3
CL
49 Q / Dr. P THARCIS
SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd
2
CB
RL
R2
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
MODEL GRAPH:
AIM:
The goal of this experiment is to construct a cascode amplifier and determine its frequency
response.
PROCEDURE:
1) Consider the cascode amplifier of figure 1. Use the following values: RS=10kΩ R3=22kΩ
R2=4kΩ R1=10kΩ RE=4.3kΩ RC=3.3kΩ RL=10kΩ CS=CE=CL= CB=10μF, VCC= 15V.
Assume that Q1 and Q2 are identical transistors with β= 200. Perform the DC analysis. Calculate
VB,Q1, VE,Q1, VB,Q2, VE,Q2, VC,Q2.
2) Calculate the midband gain Am, and the input and output impedance at midband.
4) Estimate fH, if fT= 800 MHz and Cu = 2 pF for both transistors. You may use either the Miller
technique and calculate the dominant pole, or the technique of open circuit time constants.
THEORY:
The cascade is a two-stage amplifier that consists of a common emitter stage feeding into a common
base stage. Compared to a single amplifier stage, this combination may have one or more of the following
characteristics:
higher input-output isolation,
higher input impedance,
higher bandwidth .
TABULAR COLUMN
Input voltage: Vi =
51 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
52 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
RESULT:
Thus the frequency response of cascade amplifier is estimated and graph is plotted.
CIRCUIT DIAGRAM
INPUT GRAPH:
OUTPUT GRAPH:
53 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
AIM:
To observe the input and output waveforms and to calculate the efficiency.
EQUIPMENT REQUIRED:
APPARATUS REQUIRED:
Power supply 0-30V- 1 No.
CRO 20MHz - 1 No.
Digital multimeter - 1 No.
Signal generator 1Hz - 1MHz - 1 No.
COMPONENTS REQUIRED:
Resistors 33KΩ - 1N0
5.6KΩ -2NO
470Ω -1NO
Capacitors 47uf -1NO
2.2uf - 1NO
TRANSFORMER -1NO
THEORY:
The amplifier is said to be class A power amplifier if the q point and the input signal are
selected such that the output signal is obtained for a full input cycle. For this class the position
of q point is approximately y at the mid point of the load line. For all the values of input
signal the transistor remains in the active region and never entire into the cutoff or saturation
region. The collector current flows for 3600 (life cycle) of the input signal in other words the
angle of the collector current flow is 3600 the claa A amplifiers or furthers classified as
directly coupled and transformer coupled and transformer coupled amplifiers in directly
coupled type .The load is directly connected in the collector circuit while in the transformer
coupled type, the load is coupled to the collector using the transformer.
Advantages:
1. Distortion analysis is very important
2. It amplifies audio frequency signals faithfully hence they are called as audio amplifiers
Disadvantages:
1. H parameter analysis is not applicable
2. Due to large power handling the transistor is used power transistor which is large in
54 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
55 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
PROCEDURE:
4. By keeping the input voltage constant, vary the frequency from 0 to 1MHz
in regular steps .
RESULT:
Thus the Gain and frequency as observed of Class A power amplifier is observed
56 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
CIRCUIT DIAGRAM
TABULATION
57 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
AIM:
COMPONENTS REQUIRED:
Function - 2nos
generator
THEORY:
Differential amplifiers it is a type of electronics amplifier that multiplies the difference
between two input signals by constant factor. Differential amplifiers are thereby able to reduce noise that is
common to both inputs, only amplifying the differential signal that we are interested in.
Differential amplifier is a basic circuit which used in all linear integrated circuit (IC), and it
also a basic circuit in analog to digital and digital to analog converter circuits. Differential amplifiers circuit
constructing from two bipolar junction transistor (BJT), so that have two separated inputs and outputs pins with
common emitter pin as shown in figure.
PROCEDURE:
1)Construct the circuit shown in figure 6.5, then make the circuit quiescent (no signal applied) by connecting
both bases to ground.
58 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS
EC3361 ELECTRONIC DEVICES AND CIRCUITS Lab. AUR 2021
2) Now measure the DC values of (𝑉𝑐1, 𝑉𝑐2, 𝑉𝐸, 𝐼𝐵1, 𝐼𝐵2, 𝐼𝐸1, 𝐼𝐸2, 𝐼𝐸)
3) Applied all differential amplifier modes.
Single-input mode
Double input mode
Common input mode
Show the output voltage signal and its 𝑉𝑝 and RMS value .
4) Using the measured data in the previous tables to calculate:
- 𝐴𝑣𝑑𝑚
- 𝐴𝑣𝑐𝑚
- 𝐶𝑀𝑅𝑅 𝑎𝑛𝑑 𝐶𝑀𝑅𝑅 𝑖𝑛 𝑑𝐵
RESULT:
Thus the differential amplifier is worked in different modes and CMRR is measured.
59 SRM MCET / B.E / ECE / II Year – III Semester / 2023-24 Odd / Dr. P THARCIS