Infineon TLE9371VSJ DataSheet

TLE9371VSJ
CAN signal improvement transceiver
Features
• Compliant to ISO 11898-2:2016, SAE J2284-4/-5
• Tx-based CAN FD SIC according to CiA 601-4
• Loop delay symmetry for CAN FD data frames up to 8 Mbit/s
• VIO input for voltage adaption to the microcontroller interface (3.3 V or 5 V)
• Standby mode with minimized quiescent current
• Transmitter supply VCC can be turned off in standby mode for additional
quiescent current savings
• Wake-up indication on the RxD output
• Wide common mode range for electromagnetic immunity (EMI)
• Excellent ESD robustness ±8 kV HBM and IEC 61000-4-2
• CAN short circuit proof to ground, battery, VCC and VIO
• TxD timeout function
• Very low CAN bus leakage current in power-down state
• Overtemperature protection
• Protected against automotive transients according to ISO 7637 and SAE J2962-2
• Green Product (RoHS compliant)
Potential applications
• Gateway module
• Body control module (BCM)
• Engine control unit (ECU)
• ADAS
• Radar
Product validation
Qualified for automotive applications. Product validation according to AEC-Q100.
Description
The TLE9371VSJ is the first high-speed CAN transceiver generation with signal improvement, used in
HS Controller Area Networks (CAN) for automotive applications and also for industrial applications. It is
Datasheet 1.0
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TLE9371VSJ
designed to fulfill the requirements of ISO 11898-2 (2016) physical layer specification as well as SAE J1939 and
SAE J2284.
The TLE9371VSJ is available in a halogen free and RoHS compliant PG-DSO-8 package.
As an interface between the physical bus layer and the HS CAN, the TLE9371VSJ protects the microcontroller
against interference generated in the network. A very high ESD robustness and the optimized RF immunity
allows the use in automotive applications without additional protection devices, such as suppressor diodes
or common mode chokes.
While the TLE9371VSJ is not supplied the transmitter is switched off and behaves passive with the lowest
possible load to all other nodes of the HS CAN.
Based on the high symmetry of the CANH and CANL output signals, the TLE9371VSJ provides very low
electromagnetic emission (EME) within a wide frequency range. The TLE9371VSJ fulfills stringent EMC test
limits without additional external circuitry, such as a common mode choke.
Due to the excellent symmetry combined with the optimized delay symmetry of the receiver the TLE9371VSJ
supports CAN FD data frames. Depending on the size of the network and its parasitic effects the device
supports a transmission rate up to 8 Mbit/s.
Dedicated low-power modes, like standby mode require very low quiescent current while the device is
powered up. In standby mode the typical quiescent current on VIO is below 10 µA while the device can still
wake up from a bus signal on the HS CAN bus.
Fail-safe features such as overtemperature protection, output current limitation and the TxD timeout feature
protect the TLE9371VSJ and the external circuitry from damage.
Type Package Marking

TLE9371VSJ PG-DSO-8 9371V
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TLE9371VSJ
Table of contents
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 High-speed CAN functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 High-speed CAN physical layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4 Modes of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1 Normal-operating mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3 Power-down state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.4 Bus wake-up pattern (WUP) detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.4.1 Bus wake-up pattern (WUP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.4.2 RxD pin wake-up behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5 Fail safe functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1 Short circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2 Unconnected logic input pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3 VCC undervoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.4 TxD timeout function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.5 Delay time for mode change . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.6 Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6 General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.2 Functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.3 Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.1 Power supply interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.1.1 Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.1.2 Undervoltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.2 CAN controller interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.3 Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.4 Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.5 Dynamic transceiver parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.6 Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.1 ESD robustness according to IEC 61000-4-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.2 Application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.3 Voltage adaption to the microcontroller supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
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8.4 Further application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

9 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
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TLE9371VSJ
Block diagram
1 Block diagram
3
VCC
5
VIO
7 1
CANH Driver Timeout TxD
SIC
Transmitter Temp-
6 Protection
CANL Mode 8
STB
Control
Receiver Normal-mode Receiver
4
Mux RxD
Wake-
Logic &
Filter
GND VCC/2 Low-power Receiver
VIO
=
N.C.
Bus-biasing
GND 2
Figure 1 Block diagram
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TLE9371VSJ
Pin configuration
2 Pin configuration
2.1 Pin assignment
TxD 1 8 STB
GND 2 7 CANH
VCC 3 6 CANL
RxD 4 5 VIO
Figure 2 Pin configuration
2.2 Pin definitions and functions
Table 1 Pin definitions and functions

Pin No. Symbol Function
1 TxD Transmit data input;
Internal pull-up to VIO, “low” for dominant state.
2 GND Ground
3 VCC Transmitter supply voltage;
1 uF decoupling capacitor to GND required,
VCC can be turned off in standby mode.
4 RxD Receive data output;
“Low” in dominant state.
5 VIO Digital supply voltage;
Supply voltage input to adapt the logical input and output voltage levels of the
transceiver to the microcontroller supply.
Supply for the low-power receiver.
100 nF decoupling capacitor to GND required.
6 CANL CAN bus low level I/O;
“Low” in dominant state.
7 CANH CAN bus high level I/O;
“High” in dominant state.
8 STB Standby input;
Internal pull-up to VIO, “low” for normal-operating mode.
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High-speed CAN functional description
3 High-speed CAN functional description

HS CAN is a serial bus system that connects microcontrollers, sensors and actuators for real-time control
applications. The use of the Controller Area Network (abbreviated CAN) within road vehicles is described by
the international standard ISO 11898. According to the 7-layer OSI reference model the physical layer of a
HS CAN bus system specifies the data transmission from one CAN node to all other available CAN nodes within
the network. The physical layer specification of a CAN bus system includes all electrical specifications of a
CAN. The CAN transceiver is part of the physical layer. The TLE9371VSJ is a high-speed CAN transceiver with a
dedicated bus wake-up function as defined in the latest ISO 11898-2 HS CAN standard.
3.1 High-speed CAN physical layer
TxD VIO = Digital supply voltage

VCC = Transmitter supply voltage
VIO
TxD = Transmit data input from
the microcontroller
RxD = Receive data output to
the microcontroller
CANH = Bus level on the CANH
input/output
t CANL = Bus level on the CANL
input/output
CANH VDiff = Differential voltage
VCC
CANL between CANH and CANL
VDiff = VCANH – VCANL
VDiff
VCC
“dominant” receiver threshold
“recessive” receiver threshold
RxD
VIO
tLoop(H,L) tLoop(L,H) t
TLE9351V_CAN_Bus_Signals.vsd
Figure 3 High-speed CAN bus signals and logic signals
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TLE9371VSJ
High-speed CAN functional description
The TLE9371VSJ is a high-speed CAN transceiver, operating as an interface between the CAN controller and
the physical bus medium. A HS CAN is a two wire, differential network, which allows data transmission rates
up to 8 Mbit/s. The characteristic for a HS CAN is that the logical high level and logical low level
(microcontroller interface) are converted into a differential signal (CAN bus interface) with the states
dominant and recessive, see Figure 3.
The CANH and CANL pins are the interface to the CAN bus and both pins operate as an input and output. The
RxD and TxD pins are the interface to the microcontroller. The pin TxD is the serial data input from the CAN
controller, the RxD pin is the serial data output to the CAN controller. The device includes a receiver and a
transmitter unit, allowing the transceiver to send data to the bus medium and monitor the data from the bus
medium at the same time, see Figure 1. The device converts the serial data stream from the transmit data
input TxD, into a differential output signal on the CAN bus, provided by the CANH and CANL pins. The receiver
stage of the device monitors the data on the CAN bus and converts them to a serial, single-ended signal on the
RxD output pin. A “low” signal on the TxD pin creates a dominant signal on the CAN bus. The receiver converts
this dominant signal to a “low” signal on the RxD pin, see Figure 3. The feature of broadcasting data to the CAN
bus and listening to the data traffic on the CAN bus simultaneously is essential to support the bit-to-bit
arbitration within the network.
The voltage levels for HS CAN transceivers are defined in ISO 11898-2. Whether a data bit is dominant or
recessive depends on the voltage difference between the CANH and CANL pins:
VDiff = VCANH - VCANL.
For a dominant signal on the CAN bus the high-speed transceiver creates a differential signal of VDiff ≥ 1.5 V. To
receive a recessive signal from the CAN bus the amplitude of the differential VDiff ≤ 0.5 V.
In a partially supplied high-speed CAN, the CAN bus nodes have different power supply conditions. Some
nodes are connected to the common power supply while other nodes are disconnected from the power supply
and in power-down state. Regardless of whether the CAN bus node is supplied or not, each node connected to
the common bus media must not interfere with the communication. The device supports partially-supplied
networks. In power-down state, the receiver input resistors are switched off and the transceiver input has a
high resistance.
For permanently supplied ECUs, the HS CAN transceiver, the device provides a stand-by mode. In stand-by
mode, the power consumption of the device is optimized to a minimum, while the device is still able to
recognize wake-up patterns on the CAN bus and signal the wake-up event to the external microcontroller.
The voltage level on the digital input TxD and on the digital output RxD is determined by the power supply
level at the VIO pin. Depending on the voltage level at the VIO pin, the signal levels on the logic pins (STB, TxD
and RxD) are compatible with microcontrollers having a 5 V or 3.3 V I/O supply. Usually the digital power
supply VIO of the transceiver is connected to the I/O power supply of the microcontroller, see Figure 15.
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TLE9371VSJ
Modes of operation
4 Modes of operation
The device supports the following modes of operation, see Figure 4:
• Normal-operating mode
• Standby mode
The mode selection input pin STB triggers mode changes. If a wake-up event occurs on the HS CAN bus, then
the device indicates that on the RxD output pin in stand-by mode, but it does not trigger a mode change.
Undervoltage on VCC disables the transmitter output stage. An undervoltage event on the digital supply VIO
powers down the device.
STB = 0
AND
tmode expired
Normal-
Standby
operating
mode
mode
STB = 1
AND
tmode expired
VCC and VIO are in
the functional
range for at least
tPON
Power-down
Any mode
VIO < VIO_UV state
Figure 4 Mode state diagram
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Modes of operation
4.1 Normal-operating mode

In normal-operating mode all functions of the device are available and the device is fully functional. Data can
be received from the HS CAN bus as well as be transmitted to the HS CAN bus.
• The transmitter is enabled and drives data stream on the TxD input pin to the bus pins CANH and CANL
• The receiver is enabled and converts the signals from the bus to a serial data stream on the RxD output pin
• The bus biasing is connected to VCC/2 if VCC > VCC_UV
• The TxD timeout function is enabled, see Chapter 5.4
• The overtemperature protection is enabled, see Chapter 5.6
• The undervoltage detection on VCC is enabled, see Chapter 5.3
Conditions for entering normal-operating mode of the device:
• If VIO > VIO_UV and the STB pin is “low”, then the device enters normal-operating mode after tMode from
standby mode, see Figure 4
If a “low” signal is applied on TxD input pin during a mode change to normal-operating mode, device disables
the transmitter as long as “low” signal is applied on the TxD input pin. If a “high” signal is applied on the TxD
input pin for at least tTxD_rel, then the device enables the transmitter, see Figure 5.
Mode Any Mode Normal-operating Mode
TxD
0.7 x VIO
tTxD_rel
Transmitter disabled enabled
Mode Any Mode Normal-operating Mode
TxD
Transmitter disabled enabled
Figure 5 Mode change to normal-operating mode with dominant signal on TxD
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TLE9371VSJ
Modes of operation
4.2 Standby mode

The standby mode is the low-power mode of the device. In standby mode the following functions are defined:
• The transmitter is disabled and does not drive the data stream on the TxD input pin to the bus pins CANH
and CANL
• The normal-mode receiver is disabled and the data available on the bus is blocked.
• The device monitors the CAN bus for a valid wake-up pattern, see Chapter 4.4.
• The RxD output pin indicates a CAN bus wake-up, see Chapter 4.4.2
• Bus biasing is connected to GND
• TxD dominant timeout function is disabled
• The overtemperature protection is disabled
• The undervoltage detection on VCC is disabled, see Chapter 5.3
Conditions for entering standby mode of the device:
• If VIO > VIO_UV and the STB pin is “high”, then the device enters standby mode after tMode from normal-
operation mode
• If VCC and VIO are in the functional range for at least tPON, then the device enters standby mode from power-
down state
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Modes of operation
4.3 Power-down state

In power-down state the device is not functional and has the following behavior:
• The transmitter and receiver are disabled
• The bus biasing is set to high impedance
• The TxD timeout function is disabled
• The overtemperature protection is disabled
• The undervoltage detection on VCC is disabled
• RxD follows the VIO voltage
Conditions for entering power-down state of the device:

• VIO is below the VIO_UV threshold
VCC and VIO are in

functional range
VIO_UV
tPON
Any Mode of Operation Power-down State Standby State
Figure 6 Power-down and power-up behavior
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TLE9371VSJ
Modes of operation
4.4 Bus wake-up pattern (WUP) detection

The device has implemented the bus wake-up mechanism according to ISO 11898-2:2016. In standby mode
the low power receiver monitors the activity on the CAN bus and in case it detects a wake-up pattern, it
indicates the wake-up signal on the RxD output pin. A wake-up event does not trigger a mode change. The
device remains in standby mode until the microcontroller has requested a mode change to the normal-
operating mode.
4.4.1 Bus wake-up pattern (WUP)

The wake-up pattern contains a dominant signal with the pulse width tFilter, followed by a recessive signal with
the pulse width tFilter and another dominant signal with the pulse width tFilter. tWake starts at the first valid
dominant pulse (pulse width > tFilter). The subsequent recessive and dominant pulse must occur within tWake to
fulfill a wake-up pattern, see Figure 7. As long as the device does not detect a wake-up event, the RxD output
remains “high”.
t < tWake
VDiff
Min(VDiff_D_STB_Range)
t > tFilter t > tFilter

Max(VDiff_R_STB_Range)
t > tFilter
t
wake-up
detected
Figure 7 Remote wake-up signal
4.4.2 RxD pin wake-up behavior

If the device detects a wake-up event, then it sets the RxD output pin to “low” and then the RxD output follows
the CAN bus signal with the delay of tWU as long as the pulse width exceeds the filter time tFilter, see Figure 8.
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Modes of operation
VDiff
tWU
t < tFilter
Min(VDiff_D_STB_Range)
t > tFilter t > tFilter t > tFilter

Max(VDiff_R_STB_Range)
tWU t < tFilter tWU
t
VRxD
70% of VIO
30% of VIO
t
wake-up
detected
Figure 8 RxD signal follows the CAN bus signal
If at least one of the following conditions is fulfilled, then the device disables the RxD pin wake up behavior:
• A mode change to normal-operating mode is performed during a wake-up pattern
• The voltage supply VIO < VIO_UV
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TLE9371VSJ
Fail safe functions
5 Fail safe functions
5.1 Short circuit protection

The CANH and CANL bus pins are proven to cope with a short circuit fault against GND and against the supply
voltages. A current limiting circuit protects the transceiver against damages. If the device heats up due to a
continuous short on the CANH or CANL pin, the internal overtemperature protection switches off the bus
transmitter.
5.2 Unconnected logic input pins

If the input pins are not connected and floating, then the integrated pull-up resistors at the digital input pins
force the device into fail safe behavior, see Table 2.
Table 2 Unconnected logical input pins

Input signal Default state Comment
TxD “High” Pull-up resistor to VIO
STB “High” Pull-up resistor to VIO
5.3 VCC undervoltage

If VCC < VCC_UV, then the VCC supply of the transceiver is in undervoltage condition with the following functions
independent of the transceiver mode, see Figure 9:
• Transmitter is deactivated
• The bus biasing is set to GND
VCC
tVCC_UV_filter
VCC_UV
tVCC_recovery
VIO_UV
Transmitter Enabled Disabled Enabled
CANH
CANL
1) Bus Biasing = GND 1)
1) Functionallity depents on Mode of operation
Figure 9 Undervoltage on the transmitter supply VCC
5.4 TxD timeout function

If the logical signal on the TxD pin is permanently “low”, then the TxD timeout feature protects the CAN bus
from blocked communication due to this errant logic signal. A permanent “low” signal on the TxD pin can
occur due to a locked-up microcontroller or in a short circuit on the printed circuit board, for example. In
normal-operating mode, a “low” signal on the TxD pin for the time t > tTXD_TO enables the TxD timeout feature
Datasheet 15 1.0
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TLE9371VSJ
Fail safe functions
and the device disables the transmitter, see Figure 10. The receiver is still active and the RxD output pin
continues monitoring data on the bus.
TxD
t
t > tTxD TxD time–out released
TxD time-out
CANH
CANL
RxD
Figure 10 TxD timeout function
5.5 Delay time for mode change

The HS CAN transceiver device changes the mode of operation within the time window tMode. During the mode
change from standby mode to a non-low power mode the device sets the RxD output to “high” and RxD does
not reflect the status on the CANH and CANL input pins.
5.6 Overtemperature protection

The device has an integrated overtemperature detection to protect the device against thermal overstress of
the transmitter. The overtemperature protection is only active in normal-operating mode. If an
overtemperature condition (TJunction ≥ TJSD) occurs, then the temperature sensor disables the transmitter while
the transceiver remains in normal-operating mode. After the device cools down (TJunction < TJSD) the device
activates the transmitter again, see Figure 11. A hysteresis is implemented within the temperature sensor.
Datasheet 16 1.0
2023-02-28
TLE9371VSJ
Fail safe functions
TJSD (shut down temperature) cool down

TJ ΔT
switch-on transmitter
CANH
CANL
TxD
t
RxD
Figure 11 Overtemperature protection
Datasheet 17 1.0
2023-02-28
TLE9371VSJ
General product characteristics
6 General product characteristics
6.1 Absolute maximum ratings
Table 3 Absolute maximum ratings voltages, currents and temperatures1)

All voltages with respect to ground; positive current flowing into pin;
(unless otherwise specified)
Parameter Symbol Values Unit Note or Number
Min. Typ. Max. Test Condition
Voltages
Transmitter supply voltage VCC -0.3 – 6.0 V – P_7.1.1
Digital supply voltage VIO -0.3 – 6.0 V – P_7.1.2
CANH and CANL DC voltage VCANH -40 – 40 V – P_7.1.3
versus GND
Differential voltage between VCAN_Diff -40 – 40 V – P_7.1.4
CANH and CANL
Voltages at the digital I/O pins: VMAX_IO -0.3 – 6.0 V – P_7.1.8
STB, TxD
Voltages at the digital I/O pins: VMAX_RxD -0.3 – VIO+0.3 V – P_7.1.9
RxD
Currents
RxD output current IRxD -5 – 5 mA – P_7.1.11
Temperatures
Junction temperature Tj -40 – 150 °C – P_7.1.12
Storage temperature TS -55 – 150 °C – P_7.1.13
ESD robustness
2)
ESD robustness at CANH, VESD_HBM_CAN -8 – 8 kV P_7.1.14
CANL versus GND HBM;
100 pF via 1.5 kΩ
2)
ESD robustness at all other VESD_HBM_ALL -2 – 2 kV P_7.1.15
pins HBM;
100 pF via 1.5 kΩ
3)
ESD robustness at corner pins VESD_CDM_CP -750 – 750 V P_7.1.16
CDM
3)
ESD robustness at any other VESD_CDM -500 – 500 V P_7.1.17
pins CDM
1) Not subject to production test, specified by design.
2) Human body model (HBM) robustness according to AE - Q100-002
3) Charge device model (CDM) robustness according to AEC - Q100-011 Rev-D; voltage level refers to test condition (TC)
mentioned in the standard.
Note: Latchup robustness: class II according to AEC - Q100-04.
Datasheet 18 1.0
2023-02-28
TLE9371VSJ
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability. Integrated
protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal-operating range. Protection
functions are not designed for continuos repetitive operation.
Datasheet 19 1.0
2023-02-28
TLE9371VSJ
6.2 Functional range
Table 4 Functional range

Supply voltages
Transmitter supply voltage VCC 4.75 – 5.25 V – P_7.2.1
Digital supply voltage VIO 3.0 – 5.5 V – P_7.2.2
Thermal parameters
1)
Junction temperature Tj -40 – 150 °C P_7.2.3
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics
table.
6.3 Thermal resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more
information, please visit www.jedec.org.
Table 5 Thermal resistance1)

Thermal resistances
2)
Junction to ambient RthJA_DSO8 – 120 – K/W P_7.3.2
PG-DSO-8
Thermal shutdown (junction temperature)
Thermal shutdown temperature, TJSD 170 180 190 °C Temperature P_7.3.3
rising falling: minimum
150°C
Thermal shutdown hysteresis ∆T 5 10 20 K – P_7.3.4
2) Specified RthJA value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board. The product (chip
and package) was simulated on a 76.2 mm × 114.3 mm × 1.5 mm board with two inner copper layers (2 × 70 µm Cu,
2 × 35 µm Cu).
Datasheet 20 1.0
2023-02-28
TLE9371VSJ
Electrical characteristics
7 Electrical characteristics
7.1 Power supply interface
7.1.1 Current consumption
Table 6 Current consumption

4.75 V < VCC < 5.25 V;3.0 V < VIO < 5.5 V; RL = 60 Ω; -40°C < Tj < 150°C; all voltages with respect to ground; positive
current flowing into pin; unless otherwise specified.
Current consumption at VCC ICC_R – 2 4 mA VTxD = VIO; P_8.1.5
normal-operating mode, VSTB = 0 V;
recessive state VCANH = VCANL = VCC/2
Current consumption at VCC ICC_D – 38 48 mA VTxD = VSTB = 0 V; P_8.1.9
normal-operating mode, t < tTxD
dominant state
Current consumption at VIO IIO – – 2 mA VSTB = 0 V; P_8.1.12
normal-operating mode VDiff = 0 V;
recessive state
Current consumption at VCC ICC(STB) – – 5 µA VTxD = VSTB = VIO P_8.1.16
standby mode
Current consumption at VIO IIO(STB) – 7 18 µA VTxD = VSTB = VIO; P_8.1.19
standby mode 0 V < VCC < 5.25 V
1)
Current consumption at VIO IIO_STB_85 – – 12 µA P_8.1.21
standby mode VTxD = VSTB = VIO;
TJ < 85°C;
0 V < VCC < 5.25 V
Datasheet 21 1.0
2023-02-28
TLE9371VSJ
7.1.2 Undervoltage detection
Table 7 Undervoltage detection

4.75 V < VCC < 5.25 V; 3.0 V < VIO < 5.5 V; RL = 60 Ω; -40°C < Tj < 150°C; all voltages with respect to ground; positive
VCC undervoltage threshold VCC_UV 4.25 4.35 4.5 V – P_8.1.25
1)
VCC undervoltage filter time tVCC_UV_filter 1 – 10 µs P_8.1.27
1)
VCC undervoltage recovery tVCC_recovery – – 70 µs P_8.1.28
time
VIO undervoltage threshold VIO_UV 2.0 2.5 3.0 V – P_8.1.29
1)
Power-up delay time tPON – – 280 µs P_8.1.33
Figure 6
Datasheet 22 1.0
2023-02-28
TLE9371VSJ
7.2 CAN controller interface
Table 8 CAN controller interface

Receiver output RxD
“High” level output current IRxD_H – -2 -1 mA VRxD = VIO - 0.4 V; P_8.2.1
VDiff < 0.5 V
“Low” level output current IRxD_L 1 2 – mA VRxD = 0.4 V; P_8.2.3
VDiff > 0.9 V
Transmitter input TxD
“High” level input voltage VTxD_H 0.7 × – 6.0 V Recessive state P_8.2.4
VIO
“Low” level input voltage VTxD_L -0.3 – 0.3 × V Dominant state P_8.2.6
VIO
Internal pull-up resistor TxD RTxD 35 50 70 kΩ – P_8.2.9
1)
Input capacitance CTxD – – 10 pF P_8.2.10
TxD dominant timeout tTxD 1 – 4 ms Normal-operating P_8.2.11
mode
Standby input STB
“High” level input voltage VMode_H 0.7 × – 6.0 V – P_8.2.14
VIO
“Low” level input voltage VMode_L -0.3 – 0.3 × V Normal-operating P_8.2.16
VIO mode
Internal pull-up resistor RMode 35 50 70 kΩ – P_8.2.19
1)
Input capacitance CMode – – 10 pF P_8.2.20
Datasheet 23 1.0
2023-02-28
TLE9371VSJ
7.3 Receiver
Table 9 Receiver characteristics

Common mode range VCMR -12 – 12 V – P_8.3.1
1)
Differential range dominant VDiff_D_Range 0.9 – 8.0 V P_8.3.4
state, VCMR
normal-operating mode
1)
Differential range recessive VDiff_R_Range -3.0 – 0.5 V P_8.3.6
state, VCMR
1)
Differential range dominant VDiff_D_STB_R 1.15 – 8.0 V P_8.3.8
state, ange VCMR
standby mode
1)
Differential range recessive VDiff_R_STB_R -3.0 – 0.4 V P_8.3.10
state, ange VCMR
standby mode
1)
Single ended internal RCAN_H, 30 – 50 kΩ recessive state; P_8.3.12
resistance RCAN_L -2 V ≤ VCANH ≤ 7 V;
-2 V ≤ VCANL ≤ 7 V
1)
Differential internal resistance RDiff 60 – 100 kΩ recessive state; P_8.3.13
-2 V ≤ VCANH ≤ 7 V;
-2 V ≤ VCANL ≤ 7 V
1)
Input resistance deviation ∆Ri -1 – 1 % recessive state; P_8.3.14
between CANH and CANL VCANH = VCANL = 5 V
1)2)
Input capacitance CANH, CIn – 20 40 pF P_8.3.15
CANL versus GND
1)2)
Differential input capacitance CInDiff – 10 20 pF P_8.3.16
2) S2P-method; f = 10 MHz.
Datasheet 24 1.0
2023-02-28
TLE9371VSJ
7.4 Transmitter
Table 10 Transmitter characteristics

CANL, CANH recessive state VCANL,H 2.0 2.5 3.0 V Normal-operating P_8.4.1
output voltage mode;
VTxD = VIO;
no load
CANH, CANL recessive state VDiff_R_NM -50 – 50 mV Normal-operating P_8.4.3
differential output voltage mode;
VDiff_R_NM = VCANH - VCANL VTxD = VIO;
no load
CANL dominant state output VCANL 0.5 – 2.25 V VTxD = 0 V; P_8.4.5
voltage, 45 Ω < RL < 65 Ω
CANH dominant state output VCANH 2.75 – 4.5 V VTxD = 0 V; P_8.4.6
voltage, 45 Ω < RL < 65 Ω
Differential voltage dominant VDiff_D_NM 1.5 2.0 3.0 V VDiff = VCANH - VCANL; P_8.4.7
state, VTxD = 0 V;
normal-operating mode 50 Ω < RL < 65 Ω
Differential voltage extended VDiff_EXT_BL 1.4 2.0 3.3 V Dominant state; P_8.4.8
bus load normal-operating
mode;
VTxD = 0 V;
45 Ω < RL < 70 Ω
1)
Differential voltage dominant VDiff_HEXT_BL 1.5 – 5.0 V P_8.4.9
state high extended bus load VTxD = 0 V;
normal-operating mode RL = 2240 Ω
CANH, CANL recessive output VDiff_STB -0.2 – 0.2 V No load P_8.4.10
voltage difference standby
mode
CANL, CANH recessive output VCANL,H_STB -0.1 – 0.1 V No load P_8.4.11
voltage standby mode
1)2)
Driver symmetry VSYM 0.95 × 1.0 × 1.05 × V P_8.4.12
VSYM = VCANH + VCANL VCC VCC VCC C1 = 4.7 nF
CANL short circuit current ICANLsc -115 – 115 mA -3 V < VCANLshort < 18 V; P_8.4.13
t < tTxD;
VTxD = 0 V
CANH short circuit current ICANHsc -115 – 115 mA -3 V < VCANHshort < 18 V; P_8.4.14
t < tTxD;
VTxD = 0 V
Datasheet 25 1.0
2023-02-28
TLE9371VSJ
Table 10 Transmitter characteristics (cont’d)

CANH leakage current ICANH,lk -5 – 5 µA VCC = VIO = 0 V; P_8.4.15
0 V < VCANH ≤ 5 V;
VCANH = VCANL
CANL leakage current ICANL,lk -5 – 5 µA VCC= VIO = 0 V; P_8.4.17
0 V < VCANL ≤ 5 V;
VCANH = VCANL
Signal improvement RSI 75 – 125 Ω P_8.4.19
resistance
Signal improvement time tSIC 450 – 530 ns P_8.4.20
2) VSYM observed during dominant and recessive state and also during the transition from dominant to recessive and
vice versa, while TxD is stimulated by a square wave signal. This parameter must be valid for all the possible
transmission rates.
Datasheet 26 1.0
2023-02-28
TLE9371VSJ
7.5 Dynamic transceiver parameters
Table 11 Electrical characteristics dynamic transceiver parameters

Loop delay from TxD to RxD tLoop 80 – 190 ns C1 = 0 pF; P_8.5.1
C2 = 100 pF;
CRxD = 25 pF;
CVCC = 100 nF;
RL = 60 Ω;
VTxD = rise (10% to 90%)
and fall (90% to 10%)
time < 10 ns;
125 kbit/s < 1/tBit<
8 Mbit/s;
see Figure 12,
Figure 13
Transmitter propagation tprop_T 30 – 80 ns C1 = 0 pF; P_8.5.3
delay TxD to bus (“high” until C2 = 100 pF;
recessive; “low” until CVCC = 100 nF;
dominant) RL = 60 Ω;
time < 10 ns;
see Figure 12,
Figure 13
Propagation delay bus to RxD tprop_R 30 – 110 ns C1 = 0 pF; P_8.5.4
(dominant until “low”; C2 = 100 pF;
recessive until “high”) CRxD = 25 pF;
CVCC = 100 nF;
RL = 60 Ω;
VTxD = rise (10% -> 90%)
and fall (90% -> 10%)
time < 10 ns;
see Figure 12,
Figure 13
Delay times
Delay time for mode change tMode – – 20 µs – P_8.5.5
Transmitter release time after tTxD_rel – – 5 µs – P_8.5.6
entering normal-operating
mode in dominant state
CAN activity filter time tFilter 0.5 – 1.8 µs – P_8.5.7
1)
Bus wake-up timeout tWake 0.8 – 10 ms P_8.5.8
Bus wake-up delay time tWU – – 5 µs – P_8.5.9
Datasheet 27 1.0
2023-02-28
TLE9371VSJ
Table 11 Electrical characteristics dynamic transceiver parameters (cont’d)

CAN FD characteristics
Loop delay symmetry ∆tBit(RxD) -30 – 20 ns ∆tBit(RxD) = tBit(RxD) - P_8.5.10
tBit(TxD);
C1 = 0 pF;
C2 = 100 pF;
CRxD = 25 pF;
CVCC = 100 nF;
RL = 60 Ω;
time < 10 ns;
125 kbit/s < 1/tBit <
8 Mbit/s;
see Figure 12,
Figure 13
Receiver propagation delay ∆tRec -20 – 15 ns ∆tRec = tBit(RxD) - tBit(Bus); P_8.5.11
symmetry (received recessive C1 = 0 pF;
bit width) C2 = 100 pF;
CRxD = 25 pF;
CVCC = 100 nF;
RL = 60 Ω;
time < 10 ns;
8 Mbit/s;
see Figure 12, and
Figure 14
Transmitter propagation ∆tBit(Bus) -10 – 10 ns ∆tBit(Bus) = tBit(Bus) - P_8.5.12
delay symmetry (transmitted tBit(TxD);
recessive bit width) C1 = 0 pF;
C2 = 100 pF;
CRxD = 25 pF;
CVCC = 100 nF;
RL = 60 Ω;
time < 10 ns;
8 Mbit/s;
see Figure 12 and
Figure 14
Datasheet 28 1.0
2023-02-28
TLE9371VSJ
7.6 Diagrams
TxD
CANH
RxD
RL/2 CRxD
C2 Transceiver
C1 VIO
CVio
RL/2
6
CANL VCC
CVcc
GND
Figure 12 Test circuit
TxD
0.7 x VIO
0.3 x VIO
t
tprop_T tprop_T
VDiff
0.9 V
0.5 V
tprop_R tprop_R t
tLoop tLoop
RxD
0.7 x VIO
0.3 x VIO
Figure 13 Timing diagram for dynamic characteristics
Datasheet 29 1.0
2023-02-28
TLE9371VSJ
TxD
0.7 x VIO
0.3 x VIO
t
n * tBit(TXD) tBit(TXD)
VDiff
900 mV
500 mV
t
tBit(BUS)
RxD
0.7 x VIO
0.3 x VIO
t
tBit(RXD)
Figure 14 CAN FD electrical parameters
Datasheet 30 1.0
2023-02-28
TLE9371VSJ
Application information
8 Application information
8.1 ESD robustness according to IEC 61000-4-2

Tests for ESD robustness according to IEC 61000-4-2 Gun test (150 pF, 330 Ω) have been performed. The results
and test conditions are available in a separate test report.
Table 12 ESD robustness according to IEC 61000-4-2

Performed Test Result Unit Remarks
1)
Electrostatic discharge voltage at pin CANH and ≥ +8 kV Positive pulse
CANL versus GND
1)
Electrostatic discharge voltage at pin CANH and ≤ -8 kV Negative pulse
CANL versus GND
1) Not subject to production test. ESD robustness ESD GUN according to GIFT / ICT paper: “EMC Evaluation of CAN
Transceivers, version IEC TS62228”, section 4.3. (DIN EN 61000-4-2).
Tested by external test facility IBEE Zwickau – EMC test report available on request.
8.2 Application example

VBAT
I Q1
22 μF
LDO 1 μF
CANH CANL EN GND Q2 100 nF
3
1 μF
22 μF VCC VIO
120 5
Ohm TLE9371V
8 VCC
STB Out
7
CANH 1
TxD Out
Microcontroller
4
6 RxD In
CANL
GND
GND
2
I Q1
22 μF
LDO 1 μF
EN GND Q2
3
1 μF
22 μF VCC VIO 100 nF
5
TLE9371V
8 VCC
STB Out
7
CANH 1
TxD Out
Microcontroller
4
6 RxD In
CANL
GND
120 GND
Ohm 2
CANH CANL example ECU design
Figure 15 Application diagram
Datasheet 31 1.0
2023-02-28
TLE9371VSJ
Application information
8.3 Voltage adaption to the microcontroller supply

To adapt the levels of the digital input and output of the device to the I/O levels of the microcontroller, connect
the power supply pin VIO to the microcontroller voltage supply, see Figure 15.
Note: In case no dedicated digital supply voltage VIO is required in the application, connect the digital
supply voltage VIO to the transmitter supply VCC.
8.4 Further application information

• For further information you may visit: http://www.infineon.com/tle9371vsj
Datasheet 32 1.0
2023-02-28
TLE9371VSJ
Package information
9 Package information
1.73 Max
1)
(1.47)
+0.05
4.93-0.13 0.33×45°
+0.10
Stand off
0.15-0.05
8°
Ma
x
2) +0.25
0.64-0.23
0.2-0.01
+0.08
0.41-0.06
+0.05
+0.20
6-0.16
1.27
8 5
+0.05 1)
3.94-0.13
1 4
Pin1 marking
1) Does not include plastic or metal protrusion of 0.25 max. per side
2) Does not include dambar protrusion of 0.1 max. per side
All dimensions are in units mm
The drawing is in compliance with ISO 128-30, Projection Method 1 [ ]
Figure 16 PG-DSO-8
Green Product (RoHS compliant)

To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Further information on packages

https://www.infineon.com/packages
Datasheet 33 1.0
2023-02-28
TLE9371VSJ
Revision history
10 Revision history
Revision Date Changes

1.0 2023-02-28 Datasheet created
Datasheet 34 1.0
2023-02-28
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
IMPORTANT NOTICE
Edition 2022-11-18 The information given in this document shall in no For further information on technology, delivery terms
event be regarded as a guarantee of conditions or and conditions and prices, please contact the nearest
Published by
characteristics ("Beschaffenheitsgarantie"). Infineon Technologies Office (www.infineon.com).
Infineon Technologies AG With respect to any examples, hints or any typical
81726 Munich, Germany values stated herein and/or any information regarding
the application of the product, Infineon Technologies WARNINGS
hereby disclaims any and all warranties and liabilities
© 2023 Infineon Technologies AG. of any kind, including without limitation warranties of Due to technical requirements products may contain
All Rights Reserved. non-infringement of intellectual property rights of any dangerous substances. For information on the types
third party. in question please contact your nearest Infineon
In addition, any information given in this document is Technologies office.
Do you have a question about any subject to customer's compliance with its obligations
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Email: erratum@infineon.com requirements, norms and standards concerning Technologies in a written document signed by
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The data contained in this document is exclusively any applications where a failure of the product or any
Document reference consequences of the use thereof can reasonably be
intended for technically trained staff. It is the
Z8F65761342 expected to result in personal injury.
responsibility of customer's technical departments to
evaluate the suitability of the product for the intended
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information given in this document with respect to
such application.

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TLE9371VSJ

CAN signal improvement transceiver

Type Package Marking

8.4 Further application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Receiver Normal-mode Receiver

Figure 1 Block diagram

2.1 Pin assignment

Figure 2 Pin configuration

2.2 Pin definitions and functions

Table 1 Pin definitions and functions

3 High-speed CAN functional description

3.1 High-speed CAN physical layer

TxD VIO = Digital supply voltage

“dominant” receiver threshold

“recessive” receiver threshold

Figure 3 High-speed CAN bus signals and logic signals

Figure 4 Mode state diagram

4.1 Normal-operating mode

Mode Any Mode Normal-operating Mode

Transmitter disabled enabled

Mode Any Mode Normal-operating Mode

Transmitter disabled enabled

Figure 5 Mode change to normal-operating mode with dominant signal on TxD

4.2 Standby mode

4.3 Power-down state

Conditions for entering power-down state of the device:

VCC and VIO are in

Any Mode of Operation Power-down State Standby State

Figure 6 Power-down and power-up behavior

4.4 Bus wake-up pattern (WUP) detection

4.4.1 Bus wake-up pattern (WUP)

t > tFilter t > tFilter

4.4.2 RxD pin wake-up behavior

t > tFilter t > tFilter t > tFilter

Figure 8 RxD signal follows the CAN bus signal

5 Fail safe functions

5.1 Short circuit protection

5.2 Unconnected logic input pins

Table 2 Unconnected logical input pins

5.3 VCC undervoltage

Transmitter Enabled Disabled Enabled

1) Functionallity depents on Mode of operation

Figure 9 Undervoltage on the transmitter supply VCC

5.4 TxD timeout function

Figure 10 TxD timeout function

5.5 Delay time for mode change

5.6 Overtemperature protection

TJSD (shut down temperature) cool down

Figure 11 Overtemperature protection

6 General product characteristics

6.1 Absolute maximum ratings

Table 3 Absolute maximum ratings voltages, currents and temperatures1)

Note: Latchup robustness: class II according to AEC - Q100-04.

6.2 Functional range

Table 4 Functional range

6.3 Thermal resistance

Table 5 Thermal resistance1)

7.1 Power supply interface

7.1.1 Current consumption