Control Integrated POwer System

(CIPOS™)

IKCM20L60GD

Datasheet

Datasheet Please read the Important Notice and Warnings at the end of this document V 2.4
www.infineon.com page 1 of 17 2017-09-06
Control Integrated POwer System (CIPOS™)
IKCM20L60GD

Table of contents

Table of contents ................................................................................................................................................... 2

CIPOS™ Control Integrated POwer System ............................................................................................................ 3
Features .................................................................................................................................................................. 3
Target Applications ...................................................................................................................................................... 3
Description .................................................................................................................................................................. 3
System Configuration .................................................................................................................................................. 3
Pin Configuration ................................................................................................................................................... 4
Internal Electrical Schematic ................................................................................................................................. 4
Pin Assignment ...................................................................................................................................................... 5
Pin Description ...................................................................................................................................................... 5
HIN(U, V, W) and LIN(U, V, W) (Low side and high side control pins, Pin 7 - 12)......................................................... 5
VFO (Fault-output and NTC, Pin 14) ............................................................................................................................ 6
ITRIP (Over current detection function, Pin 15).......................................................................................................... 6
VDD, VSS (Low side control supply and reference, Pin 13, 16) ................................................................................... 6
VB(U, V, W) and VS(U, V, W) (High side supplies, Pin 1 - 6) .......................................................................................... 6
NW, NV, NU (Low side emitter, Pin 17 - 19) ................................................................................................................. 6
W, V, U (High side emitter and low side collector, Pin 20 - 22) ................................................................................... 6
P (Positive bus input voltage, Pin 23) .......................................................................................................................... 6
Absolute Maximum Ratings ................................................................................................................................... 7
Module Section ............................................................................................................................................................ 7
Inverter Section............................................................................................................................................................ 7
Control Section ............................................................................................................................................................ 7
Recommended Operation Conditions ................................................................................................................... 8
Static Parameters .................................................................................................................................................. 9
Dynamic Parameters ........................................................................................................................................... 10
Bootstrap Parameters ......................................................................................................................................... 10
Thermistor ........................................................................................................................................................... 11
Mechanical Characteristics and Ratings .............................................................................................................. 11
Circuit of a Typical Application ............................................................................................................................ 12
Switching Times Definition .................................................................................................................................. 13
Electrical characteristic ....................................................................................................................................... 14
Package Outline ................................................................................................................................................... 15
Revision history ................................................................................................................................................... 16

Datasheet 2 of 17 V 2.4
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Control Integrated POwer System (CIPOS™)
IKCM20L60GD

CIPOS™
Control Integrated POwer System
Dual In-Line Intelligent Power Module
3Φ -bridge 600V / 20A

Features Description
Fully isolated Dual In-Line molded module The CIPOS™ module family offers the chance for
 TRENCHSTOP™ IGBTs integrating various power and control components
 Rugged SOI gate driver technology with stability to increase reliability, optimize PCB size and system
against transient and negative voltage costs.
 Allowable negative VS potential up to -11V for It is designed to control three phase AC motors and
signal transmission at VBS=15V permanent magnet motors in variable speed drives
 Integrated bootstrap functionality for applications like an air conditioning, a
 Over current shutdown refrigerator and a washing machine. The package
 Temperature monitor concept is specially adapted to power applications,
which need good thermal conduction and electrical
 Under-voltage lockout at all channels
isolation, but also EMI-save control and overload
 Low side emitter pins accessible for all phase
protection.
current monitoring (open emitter)
 Cross-conduction prevention TRENCHSTOP™ IGBTs and anti parallel diodes are
 All of 6 switches turn off during protection combined with an optimized SOI gate driver for
 Lead-free terminal plating; RoHS compliant excellent electrical performance.
 Very low thermal resistance due to DCB

System Configuration
Target Applications
 3 half bridges with TRENCHSTOP™ IGBTs and
 Home appliances
anti parallel diodes
 Low power motor drives
 3Φ SOI gate driver
 Thermistor
 Pin-to-heatsink clearance distance typ. 1.6mm

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Pin Configuration
Bottom View

(24) NC
(1) VS(U)
(2) VB(U)
(23) P
(3) VS(V)
(4) VB(V)
(22) U
(5) VS(W)
(6) VB(W)
(21) V

(7) HIN(U)
(8) HIN(V) (20) W
(9) HIN(W)
(10) LIN(U)
(11) LIN(V) (19) NU
(12) LIN(W)
(13) VDD
(14) VFO (18) NV
(15) ITRIP
(16) VSS
(17) NW

Figure 1 Pin configuration

Internal Electrical Schematic

NC (24)

P (23)
(1) VS(U)
(2) VB(U) VB1 HO1

RBS1
VS1 U (22)

(3) VS(V)
(4) VB(V) VB2 HO2

RBS2 V (21)
VS2

(5) VS(W)
(6) VB(W) HO3
VB3

RBS3 VS3 W (20)

(7) HIN(U) HIN1 LO1

(8) HIN(V) HIN2
NU (19)
(9) HIN(W) HIN3
(10) LIN(U) LIN1
(11) LIN(V) LIN2 LO2

(12) LIN(W) LIN3

NV (18)
(13) VDD VDD
(14) VFO VFO
LO3
(15) ITRIP ITRIP
(16) VSS VSS NW (17)
Thermistor

Figure 2 Internal schematic

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Pin Assignment
Pin Number Pin Name Pin Description
1 VS(U) U-phase high side floating IC supply offset voltage
2 VB(U) U-phase high side floating IC supply voltage
3 VS(V) V-phase high side floating IC supply offset voltage
4 VB(V) V-phase high side floating IC supply voltage
5 VS(W) W-phase high side floating IC supply offset voltage
6 VB(W) W-phase high side floating IC supply voltage
7 HIN(U) U-phase high side gate driver input
8 HIN(V) V-phase high side gate driver input
9 HIN(W) W-phase high side gate driver input
10 LIN(U) U-phase low side gate driver input
11 LIN(V) V-phase low side gate driver input
12 LIN(W) W-phase low side gate driver input
13 VDD Low side control supply
14 VFO Fault output / Temperature monitor
15 ITRIP Over current shutdown input
16 VSS Low side control negative supply
17 NW W-phase low side emitter
18 NV V-phase low side emitter
19 NU U-phase low side emitter
20 W Motor W-phase output
21 V Motor V-phase output
22 U Motor U-phase output
23 P Positive bus input voltage
24 NC No Connection

Pin Description
HIN(U, V, W) and LIN(U, V, W) (Low side and high
side control pins, Pin 7 - 12)
These pins are positive logic and they are CIPOSTM
responsible for the control of the integrated IGBT. Schmitt-Trigger

The Schmitt-trigger input thresholds of them are HINx

LINx
INPUT NOISE
FILTER
such to guarantee LSTTL and CMOS compatibility  5k UZ=10.5V
SWITCH LEVEL
down to 3.3V controller outputs. Pull-down resistor
VSS VIH; VIL

of about 5k is internally provided to pre-bias Figure 3 Input pin structure

inputs during supply start-up and a zener clamp is
provided for pin protection purposes. Input a) tFILIN b) tFILIN
Schmitt-trigger and noise filter provide beneficial
HIN HIN
noise rejection to short input pulses. LIN LIN

high
The noise filter suppresses control pulses which are HO HO
below the filter time tFILIN. The filter acts according LO low LO

to Figure 4. Figure 4 Input filter timing diagram

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It is not recommended for proper work to provide VDD, VSS (Low side control supply and reference,
input pulse-width lower than 1µs. Pin 13, 16)
The integrated gate drive provides additionally a VDD is the control supply and it provides power
shoot through prevention capability which avoids both to input logic and to output power stage.
the simultaneous on-state of two gate drivers of the Input logic is referenced to VSS ground.
same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and
The under-voltage circuit enables the device to
LO3). When two inputs of a same leg are activated,
operate at power on when a supply voltage of at
only former activated one is activated so that the
least a typical voltage of VDDUV+ = 12.1V is present.
leg is kept steadily in a safe state.
The IC shuts down all the gate drivers power
A minimum deadtime insertion of typically 380ns is
outputs, when the VDD supply voltage is below
also provided by driver IC, in order to reduce cross-
VDDUV- = 10.4V. This prevents the external power
conduction of the external power switches.
switches from critically low gate voltage levels
VFO (Fault-output and NTC, Pin 14) during on-state and therefore from excessive power
dissipation.
The VFO pin indicates a module failure in case of
under voltage at pin VDD or in case of triggered VB(U, V, W) and VS(U, V, W) (High side supplies, Pin
over current detection at ITRIP. A pull-up resistor is 1 - 6)
externally required.
VB to VS is the high side supply voltage. The high
CIPOS TM side circuit can float with respect to VSS following
VDD
the external high side power device emitter voltage.
RON,FLT From ITRIP - Latch
VFO
1
Due to the low power consumption, the floating
VSS From UV detection
driver stage is supplied by integrated bootstrap
Thermistor circuit.
Figure 5 Internal circuit at pin VFO The under-voltage detection operates with a rising
supply threshold of typical VBSUV+ = 12.1V and a
The same pin provides direct access to the NTC,
falling threshold of VBSUV- = 10.4V.
which is referenced to VSS. An external pull-up
resistor connected to +5V ensures that the resulting VS(U, V, W) provide a high robustness against
voltage can be directly connected to the negative voltage in respect of VSS of -50V
microcontroller. transiently. This ensures very stable designs even
under rough conditions.
ITRIP (Over current detection function, Pin 15)
NW, NV, NU (Low side emitter, Pin 17 - 19)
CIPOS™ provides an over current detection
The low side emitters are available for current
function by connecting the ITRIP input with the
measurements of each phase leg. It is
IGBT collector current feedback. The ITRIP
recommended to keep the connection to pin VSS as
comparator threshold (typ. 0.47V) is referenced to
short as possible in order to avoid unnecessary
VSS ground. An input noise filter (typ.: tITRIPMIN =
inductive voltage drops.
530ns) prevents the driver to detect false over-
current events. W, V, U (High side emitter and low side collector,
Pin 20 - 22)
Over current detection generates a shutdown of all
outputs of the gate driver after the shutdown These pins are motor U, V, W input pins.
propagation delay of typically 1000ns. P (Positive bus input voltage, Pin 23)
The fault-clear time is set to minimum 40µs. The high side IGBTs are connected to the bus
voltage. It is noted that the bus voltage does not
exceed 450V.

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Absolute Maximum Ratings

(VDD = 15V and TJ = 25°C, if not stated otherwise)

Module Section
Value
Description Condition Symbol Unit
min max
Storage temperature range Tstg -40 125 °C
Isolation test voltage RMS, f = 60Hz, t = 1min VISOL 2000 - V
Operating case temperature range Refer to Figure 6 TC -40 125 °C

Inverter Section
Value
Description Condition Symbol Unit
min max
Max. blocking voltage IC = 250µA VCES 600 - V
DC link supply voltage of P-N Applied between P-N VPN - 450 V
DC link supply voltage (surge) of P-N Applied between P-N VPN(surge) - 500 V
Output current TC = 25°C, TJ < 150°C IC -20 20 A
TC = 25°C,
Maximum peak output current IC(peak) -40 40 A
less than 1ms
Short circuit withstand time1 VDC ≤ 400V, TJ = 150°C tSC - 5 µs
Power dissipation per IGBT Ptot - 67.5 W
Operating junction temperature range TJ -40 150 °C
Single IGBT thermal resistance,
RthJC - 1.85 K/W
junction-case
Single diode thermal resistance,
RthJCD - 2.85 K/W
junction-case

Control Section
Value
Description Condition Symbol Unit
min max
Module supply voltage VDD -1 20 V
High side floating supply voltage
VBS -1 20 V
(VB vs. VS)
VIN -1 10
Input voltage LIN, HIN, ITRIP V
VITRIP -1 10
Switching frequency fPWM - 20 kHz

1
Allowed number of short circuits: <1000; time between short circuits: >1s.
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Recommended Operation Conditions

All voltages are absolute voltages referenced to VSS -potential unless otherwise specified.
Value
Description Symbol Unit
min typ max
DC link supply voltage of P-N VPN 0 - 400 V
High side floating supply voltage (VB vs. VS) VBS 13.5 - 18.5 V
Low side supply voltage VDD 14.5 16 18.5 V
ΔVBS, -1 - 1
Control supply variation V/µs
ΔVDD -1 - 1
VIN 0 - 5
Logic input voltages LIN, HIN, ITRIP V
VITRIP 0 - 5
Between VSS - N (including surge) VSS -5 - 5 V

Figure 6 TC measurement point1

1
Any measurement except for the specified point in figure 6 is not relevant for the temperature verification and
brings wrong or different information.
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Static Parameters
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Value
Description Condition Symbol Unit
min typ max
IC = 15A
Collector-Emitter saturation voltage TJ = 25°C VCE(sat) - 1.55 2.1 V
150°C - 1.85 -

IF = 15A
Diode forward voltage TJ = 25°C VF - 1.7 2.4 V
150°C - 1.7 -

Collector-Emitter leakage current VCE = 600V ICES - - 1 mA

Logic "1" input voltage (LIN, HIN) VIH - 2.1 2.5 V

Logic "0" input voltage (LIN, HIN) VIL 0.7 0.9 - V

ITRIP positive going threshold VIT,TH+ 400 470 540 mV

ITRIP input hysteresis VIT,HYS 40 70 - mV

VDD and VBS supply under voltage VDDUV+

10.8 12.1 13.0 V
positive going threshold VBSUV+

VDD and VBS supply under voltage VDDUV-

9.5 10.4 11.2 V
negative going threshold VBSUV-

VDD and VBS supply under voltage VDDUVH

1.0 1.7 - V
lockout hysteresis VBSUVH

Quiescent VBx supply current

HIN = 0V IQBS - 300 500 µA
(VBx only)

Quiescent VDD supply current

LIN = 0V, HINX = 5V IQDD - 370 900 µA
(VDD only)

Input bias current VIN = 5V IIN+ - 1 1.5 mA

Input bias current VIN = 0V IIN- - 2 - µA

ITRIP input bias current VITRIP = 5V IITRIP+ - 65 150 µA

VFO input bias current VFO = 5V, VITRIP = 0V IFO - 60 - µA

VFO output voltage IFO = 10mA, VITRIP = 1V VFO - 0.5 - V

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Dynamic Parameters
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Value
Description Condition Symbol Unit
min typ max
Turn-on propagation delay time ton - 620 - ns
VLIN, HIN = 5V,
Turn-on rise time tr - 30 - ns
IC = 15A,
Turn-on switching time tc(on) - 200 - ns
VDC = 300V
Reverse recovery time trr - 130 - ns
Turn-off propagation delay time VLIN, HIN = 0V, toff - 910 - ns
Turn-off fall time IC = 15A, tf - 75 - ns
Turn-off switching time VDC = 300V tc(off) - 120 - ns
Short circuit propagation delay time From VIT,TH+ to 10% ISC tSCP - 1200 - ns
Input filter time ITRIP VITRIP = 1V tITRIPmin - 530 - ns
Input filter time at LIN, HIN for turn
VLIN, HIN = 0V & 5V tFILIN - 290 - ns
on and off
Fault clear time after ITRIP-fault VITRIP = 1V tFLTCLR 40 - - µs
Deadtime between low side and high
DTPWM 1.5 - - µs
side
Deadtime of gate drive circuit DTIC - 380 - ns
VDC = 300V, IC = 15A
IGBT turn-on energy (includes reverse
TJ = 25°C Eon - 470 - µJ
recovery of diode)
150°C - 610 -
VDC = 300V, IC = 15A
IGBT turn-off energy TJ = 25°C Eoff - 270 - µJ
150°C - 360 -
VDC = 300V, IC = 15A
Diode recovery energy TJ = 25°C Erec - 55 - µJ
150°C - 105 -

Bootstrap Parameters
(TJ = 25°C, if not stated otherwise)
Value
Description Condition Symbol Unit
min typ max
Repetitive peak reverse voltage VRRM 600 - - V
VS2 or VS3 = 300V, TJ = 25°C 35
Bootstrap diode resistance of VS2 and VS3 = 0V, TJ = 25°C 40
RBS1 - - Ω
U-phase1 VS2 or VS3 = 300V, TJ = 125°C 50
VS2 and VS3 = 0V, TJ = 125°C 65
Reverse recovery time IF = 0.6A, di/dt = 80A/µs trr_BS - 50 - ns
Forward voltage drop IF = 20mA, VS2 and VS3 = 0V VF_BS - 2.6 - V

1
RBS2 and RBS3 have same values to RBS1.
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Thermistor
Value
Description Condition Symbol Unit
min typ max
Resistor TNTC = 25°C RNTC - 85 - k
B-constant of NTC
B(25/100) - 4092 - K
(Negative Temperature Coefficient)

3500
35
Thermistor resistance [kΩ ]

3000 Min.
30
Typ.
Thermistor resistance [kΩ ]

Max.
25
2500
20

2000 15

10

1500
5

0
1000 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130
Thermistor temperature [℃]

500

0
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130
Thermistor temperature [℃]
Figure 7 Thermistor resistance – temperature curve and table
(For more information, please refer to the application note ‘AN2016-10 CIPOS Mini Technical description’)

Mechanical Characteristics and Ratings

Value
Description Condition Unit
min typ max
Mounting torque M3 screw and washer 0.49 - 0.78 Nm
Flatness Refer to Figure 8 -50 - 100 µm
Weight - 6.58 - g

Figure 8 Flatness measurement position

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Circuit of a Typical Application

NC (24)

P (23)
(1) VS(U)

(2) VB(U)
VB1 HO1

RBS1 U (22)
VS1

(3) VS(V)

#4
(4) VB(V)
VB2 HO2

RBS2 V (21)
VS2 3-ph AC
Motor
(5) VS(W)

(6) VB(W) HO3

VB3

W (20)
RBS3 VS3

#1 #5
(7) HIN(U)
HIN1
LO1
(8) HIN(V)
HIN2

(9) HIN(W) NU (19)

HIN3
(10) LIN(U)
LIN1

(11) LIN(V)
Micro LIN2
LO2 #7
(12) LIN(W) #6
Controller LIN3
NV (18)

VDD line
(13) VDD
VDD Power
(14) VFO
GND line
VFO

(15) ITRIP LO3

ITRIP

GND line
Control
5 or 3.3V line (16) VSS VSS NW (17)

Thermistor

#3
U-phase current sensing
Temperature monitor
#2 V-phase current sensing
W-phase current sensing
<Signal for protection>
<Signal for protection>

Figure 9 Typical application circuit

1. Input circuit
- To reduce input signal noise by high speed switching, the RIN and CIN filter circuit should be mounted. (100Ω, 1nF)
- CIN should be placed as close to VSS pin as possible.
2. Itrip circuit
- To prevent protection function errors, CITRIP should be placed as close to Itrip and VSS pins as possible.
3. VFO circuit
- VFO output is an open drain output. This signal line should be pulled up to the positive side of the 5V/3.3V logic
power supply with a proper resistor RPU.
- It is recommended that RC filter be placed as close to the controller as possible.
4. VB-VS circuit
- Capacitor for high side floating supply voltage should be placed as close to VB and VS pins as possible.
5. Snubber capacitor

- The wiring between CIPOS™ Mini and snubber capacitor including shunt resistor should be as short as possible.

6. Shunt resistor
- The shunt resistor of SMD type should be used for reducing its stray inductance.
7. Ground pattern
- Ground pattern should be separated at only one point of shunt resistor as short as possible.

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Switching Times Definition

HINx 2.1V
LINx
0.9V
trr
toff ton
10%
iCx
90% 90%

tf tr
10% 10%
10% 10%
vCEx
tc(off) tc(on)

Figure 10 Switching times definition

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Electrical characteristic
40 40 40
TJ=25℃ VDD=15V
35 35 35
Ic, Collector - Emitter current [A]

Ic, Collector - Emitter current [A]

IF, Emitter - Collector current [A]

30 30 30

25 25 25

20 20 20

15 VDD=15V 15 15
VDD=20V
TJ=25℃ TJ=25℃
10 10 10
TJ=150℃ TJ=150℃

5 5 5

0 0 0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VCE(sat), Collector - Emitter voltage [V] VCE(sat), Collector - Emitter voltage [V] VF, Emitter - Collector voltage [V]
Typ. Collector – Emitter saturation voltage Typ. Collector – Emitter saturation voltage Typ. Diode forward voltage

4.0 1.0
240
Eoff, Turn off switching energy loss [mJ]
Eon, Turn on switching energy loss [mJ]

Erec, Reverse recovery energy loss [uJ]

VDC=300V VDC=300V
0.9 High side @TJ=25℃
VDD=15V 220 VDD=15V
3.5
High side @TJ=150℃
0.8 Low side @TJ=25℃ 200
High side @TJ=25℃
3.0
Low side @TJ=150℃ 180 High side @TJ=150℃
High side @TJ=25℃ 0.7

2.5 High side @TJ=150℃ 160 Low side @TJ=25℃

0.6
Low side @TJ=25℃ 140 Low side @TJ=150℃
2.0 Low side @TJ=150℃ 0.5
120

0.4 100
1.5
80
0.3
1.0 60
0.2
40
0.5
0.1 VDC=300V
20
VDD=15V
0.0 0.0 0
0 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 35 40
Ic, Collector current [A] Ic, Collector current [A] Ic, Collector current [A]

Typ. Turn on switching energy loss Typ. Turn off switching energy loss Typ. Reverse recovery energy loss

800 1500
840
toff, Turn off propagation delay time [ns]
ton, Turn on propagation delay time [ns]

VDC=300V VDC=300V VDC=300V

tc(on), Turn on switching time [ns]

VDD=15V VDD=15V VDD=15V

810 700 1400
High side @TJ=25℃ High side @TJ=25℃
780
High side @TJ=150℃ 600 1300 High side @TJ=25℃
High side @TJ=150℃
Low side @TJ=25℃ High side @TJ=150℃
750 Low side @TJ=25℃
Low side @TJ=150℃ 500 1200 Low side @TJ=25℃
Low side @TJ=150℃
720 Low side @TJ=150℃
400 1100
690

660 300 1000

630 200 900

600
100 800
570
0 700
0 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 35 40
Ic, Collector current [A] Ic, Collector current [A] Ic, Collector current [A]

Typ. Turn on propagation delay time Typ. Turn on switching time Typ. Turn off propagation delay time
10
ZthJC, RC-IGBT transient thermal resistance [K/W]

450 600
VDC=300V
550
tc(off), Turn off switching time [ns]

VDC=300V VDD=15V
400
VDD=15V 1
500
trr, Reverse recovery time [ns]

High side @TJ=25℃

350 450 High side @TJ=150℃
High side @TJ=25℃ 400 Low side @TJ=25℃ 0.1
300 High side @TJ=150℃ Low side @TJ=150℃
350
Low side @TJ=25℃ D : duty ratio
250 300 0.01
Low side @TJ=150℃ D=50%
250 D=20%
200 D=10%
200 1E-3
D=5%
150 150 D=2%
Single pulse
100 1E-4
100
50

50 0 1E-5
0 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 35 40 1E-7 1E-6 1E-5 1E-4 1E-3 0.01 0.1 1 10 100
Ic, Collector current [A] Ic, Collector current [A] tP, Pulse width [sec.]

Typ. Turn off switching time Typ. Reverse recovery time IGBT transient thermal resistance at all
six IGBTs operation

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Package Outline

Datasheet 15 of 17 V 2.4
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IKCM20L60GD

Revision history

Document Date of release Description of changes

version
Maximum operating case temperature, Tc= 125°C
V 2.4 Sep. 2017
Package outline update

Datasheet 16 of 17 V 2.4
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IMPORTANT NOTICE
Edition 2017-09-06 The information given in this document shall in no For further information on the product, technology,
event be regarded as a guarantee of conditions or delivery terms and conditions and prices please
Published by characteristics (“Beschaffenheitsgarantie”) . contact your nearest Infineon Technologies office
(www.infineon.com).
Infineon Technologies AG
With respect to any examples, hints or any typical
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