CPEN 304 Digital Signal Processing

Lecture 1
Introduction to Digital Signal Processing
May 17, 2023
Godfrey A. Mills, PhD
Email: gmills@ug.edu.gh
Phone: 020-549-6944

Course TA
1 CPEN 304 Lecture 1 Ernest Dumenu
 LECTURE #1 OUTLINE
— Signals, systems, and signal processing
— What is digital signal processing
— Analog signal processing and limitations
— Digital signal processing and limitations
— Architecture of DSP system and functions
— Analog filters
— ADC and DAC
— Digital processor
— DSP hardware and selection
— DSP software and selection
— DSP application areas and scope

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 Signal, system, signal processing
— Signal >> variation of a physical quantity with respect to
time, space or other independent variable that conveys
information about behavior or nature of the phenomenon.
— Mathematically, we describe a signal as function with one
or more variables :
— >> x(t) = 5t ; x(t) = 3e-3t; x(t) = 5t2
— >> s(x,y) = 5x + 3xy + 10y2
— >> s(t) = ∑Aj(t)sin[2𝛑Fj(t)t+⍺j(t)]
— System >> an operator (device or software) that performs
operation on signals at its input to produce an output based
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on well-defined
CPEN 304 Lecture 1 rules
 Signal, system, signal processing
— Cont’d….
— Signal processing >> operation of processing signals to
extract information from content for various applications.
— When we pass a signal through a system (as in filtering), we
refer to the process as “processing of the signals”
— We refer to a filter for eliminating noise and interference
corrupting a desired information-bearing signal as a system.
— In this case, the filter performs some operation on the
signal, which has effect of filtering the noise and the
interference from the desired information-bearing signal.
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 Signal, system, signal processing
— Cont’d….
— Why perform signal processing >> key reason for
processing signals is to recondition the signals and to
eliminate or reduce the effects of undesirable signals (noise
and interference) on the information bearing signals.
— Systems for processing signals are characterized by the type
of operation the system performs on the signal.
— If the operation which is performed by the system is linear,
then the system is called a linear system.
— If the operation performed by the system is nonlinear, then
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the304system
CPEN Lecture 1 is called a nonlinear system.
 What is Digital Signal Processing
— DSP >> the application of mathematical operations
specified by software to manipulate signals (voice, audio, video,
pressure, temperature, position), which are represented in
digital form using a computer (or special purpose processor);
— Realization of a system on a digital computer by means of a
sequence of mathematical operations
— We refer to the method or rules for implementing the system
to perform signal processing operation as DSP algorithm.
— The algorithm must have large mathematical operations that
must be performed quickly and must repeat on series of data
— Example, program a computer to perform digital filtering
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 What is Digital Signal Processing
— Cont’d….
— Digital processing of signals (such as filtering) using digital
processor can be realized via either software or hardware
(logic circuit), each performing its specified instructions
— Processor for processing the signal may be programmable
processor or hardwired digital processor programmed to
perform desired operations on the input signal.
— The hardwired processor is directly configured to perform
specified set of instructions relating to the operations
— Hardware implementation are generally useful for situations
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where
CPEN 304the
Lecturesignal
1 processing operations are well defined.
 What is Digital Signal Processing
— Cont’d….
— With programmable processors (such as DSP processors,
microprocessors - µPs, microcontrollers - µCs, etc), the
instructions are programmed as software
— flexibility to easily change the signal processing operations
via changes in the software
— Programmable signal processors are in common use.
— Hardwired implementation operations on other hand can be
optimized, and results in a cheaper signal processor, and
usually runs faster than its programmable counterpart.
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 Analog Signal Processing
— Most signals encountered in engineering and real-world are
analog in nature and such signals may be processed directly
by analog systems >> purpose will be to change their
characteristics or extracting some information.
— Analog signal processing involves operation or analysis on
analog signals using analog systems (analog electronics) that
represent the operations >> analog signal processing is
defined in the concept of convolution operation.

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 Analog Signal Processing
— Cont’d….
— Analog signal processing is still widely used in applications
where signals are derived from analogue sensors and
transducers prior to conversion to digital signals for storage
and processing.
— Many everyday systems use the concept of analog signal
processing >> FM/AM radio, electric guitar, etc

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 Reasons for using ASP systems
— Analog signal processing has advantages which make it useful:
— Low cost and simple in implementation
— Analog filters are simple to build >> attenuators and
amplifiers, active lowpass RC circuit
— Infinite effective sampling rate
— Infinite resolution in frequency
— No aliasing and reconstruction issues
— Infinite resolution in amplitude
— No quantization noise
— Require less bandwidth for signals, and provide more
accurate representation of changes in physical activity
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 Limitations of ASP systems
— Challenges of analog signal processing include following :
— Accuracy limitations due to component tolerances, etc.
— Difficulty associated with repeatability due to tolerance of
components, changes in environmental conditions such as
temperature and vibration effects
— High sensitivity to electrical noise.
— Inflexibility to changes.
— Difficulty of implementing certain operations such as:
— Nonlinear operations; time-varying operations, etc.
— Difficulty in storing data ;
— Issues with programmability
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 Digital Signal Processing
— Digital signal processing provides alternative way for
processing analog signals
— Since most signals encountered in practice are mostly analog
in nature, processing the signals using a computer require an
interface between the analog signal and the digital processor
>> ADC >> produces appropriate signals for a processor

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 Digital Signal Processing
— Cont’d…
— Once signal has been reduced to discrete samples/numbers,
we can isolate, analyze, and rearrange the components more
easily than if it were in the analog form.
— When the digital output from the digital signal processor is
required in analog form (example speech communication),
another interface must be required between the digital
processor and the output >> DAC
— In situations where output is required in digital form, then
there is no need for a DAC >> extracted information from
radar such as position and speed of aircraft >> only printed
CPEN 304 Lecture 1
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 Reasons for using DSP systems
— DSP has become very useful due the capability it offers for
storage of data, the accuracy of signals produced, and limited
effects from external factors, etc.
— DSP offers many advantages over ASP in many respects as:
— DSP operations can easily be changed through changes in
the program (in digital programmable processors) >>
this gives a flexible systems via software implementation.
— Better control of accuracy can be obtained by changing
(increasing) the number of bits for data representation
— Digital signals are easily stored on storage media without
loss of quality of reproduction of signal.
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 Reasons for using DSP systems
— Cont’d……
— Digital signals sensitivity to electrical noise is minimal in
comparison with the analog signal
— Digital circuits are less sensitive to tolerances of the circuit
component values.
— Digital signals can be easily processed offline and thus, are
easily transported
— Digital information can be easily encrypted for security
— Digital systems are independent of external factors such as
temperature, ageing and other external parameters.
— Flexibility is achieved with software implementations;
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 Limitations of DSP systems
— Limitations of digital signal processing include following :
— Sampling required >> lead to loss of information
— ADC and DAC devices are required for the process
— Quantization and round-off errors introduced due to the
operations >> lead to loss of information
— Limited speed of processors
— Number of bits per sample limits the resolution of the
dependent variable >> small changes in signal amplitude
may be lost due to quantization
— Sampling rate limits resolution of the independent variable
17 >>304closely
CPEN Lecture 1 spaced events may be lost between samples
 Architecture of DSP System
— Architecture of a DSP system contained 3 key elements
— Analog filters (anti-aliasing + reconstruction filters);
— ADC and DAC (mixed signal devices or circuits); and
— Digital processor (µP or any other processor system)

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 Anti-aliasing filter systems
— Practically, most signals obtained from physical measurement
contain other frequency components (noise signals) whose
frequencies are higher than the folding frequency (Nyquist
frequency) or maximum frequency content of actual signal
— These higher frequencies must be removed before we satisfy
sampling theorem condition >> band-limit the signal so that
its frequencies will be less then folding frequency
— To accurately describe an audio signal with frequencies up
to 20 kHz, ADC must sample at a minimum of 40 kHz
— We remove these higher frequencies by passing the analog
signals through a low-pass filter system (anti-aliasing
filter), before passing the filtered signals to ADC >> remove
frequencies above Fs/2 that will alias during the sampling
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 The ADC system of DSP
— The ADC system performs a 3-stage process in converting
the physical signals to digital data for processing:
— Sampling >> discretization the analog signals by taking
samples at discrete instances of time.
— Quantization >> conversion of discrete samples into a
discrete valued signal
— Value of each signal sample is represented by a value
selected from a finite set of integer values
— Difference between the unquantized sample and the
quantized output is called the quantization error
— Coding >> representing each of the quantized discrete
values by a B number of bits of binary sequence
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 The ADC system of DSP
— Cont’d…..
— The rate at which ADC samples the analog signals depends
on the bandwidth of the signals being sampled >> this rate
sets the pace at which the samples are made available to the
digital processor for processing.
— The sampling rate is determined by the amount of signal
required for processing for a given application.

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 The ADC system of DSP
— Cont’d….
— For the ADC to give accurate outputs, the input voltage
entering the ADC must remain constant in amplitude
during “read-in” time until the conversion is complete.
— To retain constant instantaneous value of signal, a sample-
and-hold (S/H) circuit is used in conjunction with ADC
>> S/H (hold value) + ADC (convert value to integer)
— The S/H circuit basically consists of an analog switch, a
shunt capacitor, and a voltage follower >> the circuit is
supplied by a source voltage Vin with internal resistor, Rs.
— If the analog signal is changing too fast, the S/H circuit can
beCPENused to freeze the input voltage during the conversion.
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 The DAC system of DSP
— To reconstruct the sampled data x[n] to analog x(t), the
DAC conversion involves pulling the digital samples from
memory and converting them into impulse train
— The output signals from the DAC system produces analog
signals that are stair-case like in form (sample-and-hold
output) at the sampling frequency >> the output analog
signals are not exact representation of the analog signal and
possess same frequency as the sampling rate >> the signal
thus requires smoothing
— Nearly all DACs operate by holding the last sample value
until another sample is received >> DAC reconstructs at Fs
with a zero-order hold (we see the DAC as equivalent of
the S/H used during ADC)
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 Reconstruction filter systems
— The function of the electronic filter placed after the DAC is
to smoothen the reconstructed analog signal from the DAC
to the required or original signal form >> we refer to this
filter as reconstruction filter >> refer to CPEN 301 on
sampling and reconstruction
— The reconstruction filter is typically a low-pass analog
filter that eliminates frequencies above the Nyquist rate >>
the filter cut-off frequency used is equal to Fs/2

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 DSP System example 1
— Suppose we want to design a digital voice recorder system
that will digitize voice signals, store the data in digital form,
and later reconstruct the signal for playback.
— To recreate intelligible audible signal, the recorder system
must capture the frequencies between about 100 and 3 kHz.
— The analog signal produced by the microphone will also
have much higher frequencies, say to 40 kHz.
— We thus pass the analog signal through a low-pass filter (of a
certain order, say 8) at 3 kHz to remove the noise signal
— The filtered signal is then passed through the ADC which
samples the signal at 8kHz (why the 8 kHz >> we can use
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say
CPEN64 kHz1 to give same effect but will have below 32 kHz)
304 Lecture
 DSP System example 1
— Cont’d….
— Thus, frequencies above 32 kHz will be rejected by the filter
>> we will have unusable band between 3 kHz and 32 kHz
— The ADC first samples the data, quantized the data using a
certain resolution or quantization step, and binarized the
quantized data to binary stream based on the bit depth
— DAC reconstructs the analog signal at 8 kHz with a zeroth
order hold to obtain analog signal with stair-case like form.
— To smoothen the DAC output to the desired analog signal,
the reconstruction filter with cut-off frequency of 3 kHz is
used to filter to produce the final voice signal
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 Quantization of sampled data
— Digital signal is a sequence of numbers (samples) with each
sample being represented by finite number of digits (finite
precision) through quantization process
— In quantization, when the discrete-time continuous-
amplitude signal is converted into the digital signal, error is
introduced through the process.
— We refer to the error introduced by the quantization
process as quantization error or quantization noise.
— If we denote the quantizer operation on the samples x[n] as
Q[x(n)] then the sequence of quantized samples at the
output of the quantizer xq(n) will be >> xq(n) = Q[x(n)]
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 Quantization of sampled data
— Cont’d…
— The error due to the quantization, eq(n), is derived as the
difference between quantized value and actual sample value.
— >> eq(n) = xq(n) - x(n)
— Suppose we have the analog signal x(t) = 0.9t for t ≥ 0 and
x(t) is sampled at a sampling frequency Fs = 1 Hz. Find the
discrete signal x[n] and sketch x[n] for n = -1:8. Find the
first 10 samples of the signal x[n].
— We determine the dynamic range xr[n] of the signal
— x[n] >> xr[n] = xmax[n] – xmin[n] = (1.0 – 0.0)

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 Quantization of sampled data
— Cont’d…
— We refer to the values allowed in the digital signal as
quantization levels, L = 2B , where B denotes the number of
bits to represent each sample by the ADC
— The distance Δ between two successive quantization levels is
called quantization step size or resolution
— >> Δ = xr[n]/(L – 1),
— Suppose we select a quantization level L = 11, find the step
step. What will be the step size if B = 6 bits
— The quantizer assigns each sample of x(n) in a rounding
operation as >> xd[n] = round(x[n]/Δ).
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 Quantization of sampled data
— Cont’d…
— Reversing the quantizer operation gives the discrete signal
with the rounding effect as >> xq[n] = (xd[n]*Δ).
— A graph of signal x(t), x[n] and the quantized output signal
with 11 quantization level is shown in the diagram below

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 Coding of quantized sampled data
— Coding process in ADC essentially assigns a unique binary
number to each quantization level.
— If we have L quantization levels we need at least L different
binary numbers.
— With a word length of B bits we can create 2B different
binary numbers >> 2B ≥ L or equivalently, B ≥ log2 L.
— The number of bits required in the coder is the smallest
integer greater than or equal to log2L.
— Commercially available ADCs may be obtained with finite
precision of B= 16 or less.
— Generally, the higher the sampling speed and the finer the
31 quantization,
CPEN 304 Lecture 1 the more expensive the device becomes.
 The DSP Processor
— DSP processors are special type of processors designed to
perform the mathematical operations in DSP >> processors
are programmable and can be used in manipulating different
information such as sound, images, video, audio, speech, etc
— Variety of processors available for DSP implementation :
— General Purpose Processors (GPP) >> microprocessors;
— Specialized purpose processors >> DSP processors;
— Purpose-built processors or hardware >> Application-
Specific Integrated Circuit (ASICs), Field-programmable
gate arrays (FPGAs);
— DSP processors are designed to implement tasks in parallel
>> student to find difference between DSP and the others
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 Architecture of DSP Processor
— Architecture of DSP processor based on Harvard architecture
>> Von Neumann architecture can be used but mostly
support serial execution of the tasks.

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 Architecture of DSP Processor
— Cont’d….
— One biggest bottleneck in executing DSP algorithms is the
transfer of information to and from memory >> includes
data, such as samples from the input signal and the filter
coefficients, as well as program instructions, the binary
codes that go into the program sequencer.
— For example, if we need to multiply two numbers that reside
in memory, how many binary values do we have to fetch
from memory ? >> refer to your computer architecture
— Three binary values from memory >> 2 for the numbers
to be multiplied and one for the instruction on what to do.
— How will this be executed in a Von Neumann architecture
compared with Harvard architecture
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 Architecture of DSP Processor
— Cont’d….
— Multiplying two numbers will require at least 3 clock cycles,
one to transfer each of the 3 binary numbers over the bus
from memory to the CPU >> time to transfer the results is
not counted because it is assumed to be part of the CPU
— If we need very fast computation or processing, then the Von
Neumann architecture will not be suitable, hence preference
for Harvard architecture for DSP processors
— For the 2 number multiplication example, two numbers will
be passed over the data memory bus and one number, which
is the program instruction, will be passed over the program
memory bus
— Super Harvard architecture (SHARC) have enhanced model
35 where part1 of the data can be relocated in program memory
CPEN 304 Lecture
 DSP algorithm and notation
— DSP is mainly designed to perform mathematical functions
like "add", "subtract", "multiply" and "divide" quickly.
— Consider a simple filter system described by equation below:

— Recall output of discrete time system using convolution sum

— We observe from the format above that the output y[n] of the
system (N input samples) above is combination of sum of
products of coefficients and past input values
— Sketch the implementation diagram for the case of N = 4
— Write a C/C++ code to implement case for N=10 samples
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 DSP algorithm and notation
— Cont’d……
— We observed from the filter expression and flowchart that,
the DSP have inner loop operations, and not programs.
— Operations involve summation for add, multiplication, and
other variable that denote delay/storage (z-1)

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 DSP algorithm and notation
— Cont’d……
— DSP algorithms generally spend most of their execution time
in loop operations
— The execution speed of most DSP algorithms is therefore
limited almost completely by the number of multiplications
and additions required.
— DSP algorithms mostly used in applications >> IIR filters,
FIR filters, FFT (DFT implementation), DCT, convolution
— A typical algorithm for an FIR filter operation (refer to the
filter example above) for real-time signal processing can be
listed as follows:
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 DSP algorithm and notation
— Cont’d……
— Typical operational procedure for the DSP algorithm for FIR:
— 1.Obtain a sample with the ADC >> generate an interrupt
— 2. Detect and manage the interrupt
— 3. Move the sample to the input signal’s buffer
— 4. Update the pointer for the input signal’s buffer
— 5. Zero (initialize) the content of the accumulator
— 6. Control the loop through each of the coefficients
— 7. Fetch the coefficient from the coefficient circular buffer
— 8. Update the pointer for the coefficient’s buffer
— 9. Fetch the sample from the input signal’s buffer
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 DSP algorithm and notation
— Cont’d……
— 10. Update the pointer for the input signal’s buffer
— 11. Multiply the coefficient by the sample
— 12. Add the product to the accumulator
— 13. Move output sample (accumulator) to a holding buffer
— 14. Move output sample from the holding buffer to DAC
— Steps (6 -12), is the loop in the algorithm, which will be
repeated many times (once for each coefficient in the filter)
>> special attention is required for these loop operations.
— With traditional uPs, all the 14 steps above will be executed
in serial form (one step a time) while DSP are designed to
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execute all in
CPEN 304 Lecture 1 parallel (some cases, 6-12 in one clock cycle)
 DSP algorithm and notation
— Cont’d……
— Example, SHARC DSPs provide both serial and parallel
communications ports, which are extremely high-speed
connections.
— At a 40-MHz clock speed, there are two serial ports that
operate at 40 Mbits per second each, while six parallel
ports each provide a 40 Mbytes per second data transfer.
— Thus, when all six the parallel ports are used together, the
data transfer rate that offered will be on order of 240
Mbytes per second which is very fast enough to transfer
an entire textbook in only 2ms.
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 Features of DSP processor
— DSP processors come with features that enable them to
execute their tasks of computation >> CPU, ALU, memory,
I/O, accumulators, shifter, multiplier unit, compare select
and store unit, DMA controller, data and instruction buses.
— These DSP features are organized into the following:
— Datapath
— Fixed point or floating-point arithmetic and MAC
— Multiple memory banks and buses
— Specialized peripherals (I/Os)
— Specialized addressing modes
— Specialized instruction set and execution control
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 Features of DSP processor
— Cont’d….
— Computational engine (central ALU)
— This part of DSP performs major arithmetic operations
or processing instructions like multiplication, addition,,
— The math processing is broken into 3 sections: multiplier,
an Arithmetic Logic Unit (ALU), and a shifter
— The multiplier takes inputs values from two registers,
multiplies them and place results into another register
— The ALU performs addition, subtraction, absolute value,
logical operation (AND, OR, NOT, NOR), conversion
between fixed-point and floating-point formats and
similar functions
CPEN 304 Lecture 1
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 Features of DSP processor
— Cont’d….
— The shifter performs elementary binary operations such
as shifting, rotating, extracting, and depositing segments.
— The ALU is centered around the MAC unit (multiply-
accumulator unit), which is the basic computational
block of DSP device
— MAC unit of DSP determines the speed of overall system
>> the part that makes DSPs so fast compared with other
traditional processors

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 Features of DSP processor
— Cont’d….
— Multiplier-Accumulator (MAC) Unit
— DSP operations typically involves many time-consuming
loop operations of multiplication and addition
— To make real-time operation faster, a MAC unit using
either fixed point or floating-point arithmetic is mandatory
— MAC unit consists of a multiplier that has a pair of two
input registers (x and y) that hold inputs to multiplier
and a k-bit product register that holds results of the
multiplication
— Output of the product register is connected to a double
precision accumulator where products are accumulated
CPEN 304 Lecture 1
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 Features of DSP processor
— Cont’d….
— Since we do not want an overflow or scale the accumulator,
two options are used to avoid such overflow conditions
— Option 1:
— When the width of the accumulator is wider than the
product bit, we “guard bit”
— Option 2:
— We shift right and round the product before the adder
— Three DSP approaches for rounding operation are:
— Truncation >> chop off the results
— Round to nearest >> for < ½, round down
46 — Convergent
CPEN 304 Lecture 1 >> for < ½, round down, > ½ round up
 Features of DSP processor
— Cont’d….

47
— MAC unit
CPEN 304 Lecture 1 Option 1 Option 2
 Features of DSP processor
— Cont’d…..
— Memory (Program memory + Data memory)
— Program memory that stores the program or instructions
of the DSP will use to process the data;
— Data memory that stores the information and data to be
processed
— Memory holds series of instructions which tell DSP
which operations to perform on data.
— In most cases the CPU of the DSP reads some data,
operates on it, and writes it back.
— Complete many memory accesses in a single clock cycle
— Almost all DSPs have some form of memory device –
whether on-chip memory or off-chip memory.
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 Features of DSP processor
— Cont’d…..
— Many memory access is completed in a single clock cycle
— Processor can fetch instructions while also fetching the
operands or storing to memory
— Example, in the simple filter expression shown earlier,
system can operate a multiply and accumulate while
loading the operands and coefficients for the next cycle
— May perform three reads and one or two writes per cycle
— This operation may require multiple memory buses on same
chip rather than simple address and data bus >> Harvard
architecture

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 Features of DSP processor
— Cont’d…..
— Fixed-point and floating-point
— DSP can be divided into two categories based on the
format used to store and manipulate the numbers within
the device >> fixed-point and floating-point DSPs
— Fixed point DSPs usually represent each number with a
minimum of 16 bits (different bit length can be used) >>
216 = 65,536-bit patterns can represent a number
— In unsigned integer, a stored number can take on any
integer value from 0 to 65,535 ( for 0 to 1) while signed
integer uses two’s compliment to make range to include
negative values from -32,768 to +32,767 (for -1 to 1).
— Floating point DSP typically use a minimum of 32 bits to
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 Features of DSP processor
— Cont’d…..
— Floating point DSP typically use a minimum of 32 bits to
store each value
— Floating point therefore results in many more bit patterns
than fixed point >> 232 = 4,294,967,296
— A key feature of floating-point notation is that the
represented numbers are not uniformly spaced >> the
largest and smallest numbers (in ANSI/IEEE std) are
±3.4 x 1038 and ±1.2 x 10-38
— All floating-point DSPs can handle fixed point numbers
which is a necessity to implement counters, loops, and
signals from ADC and going to DAC >> how fast the
computation will depend on the internal architecture
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 Features of DSP processor
— Cont’d…..
— Specialized I/O peripherals for DSPs
(Synchronous serial ports, parallel ports, timers,
on-chip ADC and DAC, D/A, host ports, bit I/O
port, on-chip DMA controller, clock generator)
— DSPs normally have internal ports that provide high
speed communication with other DSPs and converters.
— Ports are directly connected to internal bus to improve
performance and reduce external address decoding

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 DSP hardware selection
— Selection of a DSP processors for an application is mainly
dependent on the type of application (such as telephone, etc)
— Consideration for DSP processor selection include following:
— Arithmetic format >> fixed point or floating point
— Bus widths >> fixed (usually 16 bits) or float (32 bits)
— Speed >> clock frequency (MHz), MIPS, MACs per sec,,,
— Memory/Bus/ISA architecture >> Harvard, SHARC,,,
— Development tools >> S/W tools (assemblers, linkers
simulators, debuggers, compliers, code library, RTOS),
H/W tools (emulators, development boards), JTAG
— Power consumption >> minimize Vcc to reduce power,
sleep mode operation, on-chip clock distribution, etc
— Cost >> limiting packaging cost, real design cost, etc
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 DSP Software selection
— DSP algorithms are programmed in the same languages as
any other Engineering tasks using programming tools such
as Basic, C, C++, Assembly, etc.
— C is often the preference of engineers due to its versatility.
— DSP programming can be divided into 3 levels:
— Assembly
— Compiled
— Application specific.
— Common DSP algorithms usually implemented are:
— Frequency domain filtering – FIR and IIR digital filters
— Frequency-time transformation – FFT

54 CPEN 304 Lecture 1

 DSP application areas and scope
— DSP is a skill that is required by engineers and scientists in
many fields >> summary of application area and scope by
market summarized as:
— Telecommunication application
— Voice and data compression; Echo reduction;
— Signal multiplexing; Filtering;
— Wireless >> cellular phones, base stations, gateways, fax
— Networking >> cable modems, ADSL, VDSL
— Medical application
— Diagnostic imaging (CT, MRI, Ultrasound, etc)
— ECG, EEG and Audiology analysis
— Medical image storage/retrieval
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 DSP application areas and scope
— Cont’d….
— Space application
— Space photograph enhancement
— Data compression
— Image compression
— Intelligent sensory analysis by remote space probes
— Military application
— Radar
— Radio navigation
— Sonar
— Ordinance guidance
— Secure communication
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 DSP application areas and scope
— Cont’d….
— Industrial application
— Oil and mineral prospecting
— Process monitoring and control
— Nondestructive testing
— CAD and design tools
— Commercial application
— Image and sound compression for multimedia
— Movie special effects
— Video conference calling

57 CPEN 304 Lecture 1

 DSP application areas and scope
— Cont’d….
— Scientific application
— Earthquake recording and analysis
— Data acquisition
— Spectral analysis
— Simulation and modelling
— Audio application
— MPEG audio, speech synthesis, voice recognition, speech
quality enhancement, speech encoder, speech decoder,
demodulator and synchronizer, equalizer,
— Consumer electronic
— DVD, digital camera, toaster, wireless headset, audio, etc
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 DSP application areas and scope
— Cont’d……
— Security application
— Biometric identification
— Surveillance system
— Signal intelligence,
— Electronic warfare,
— Information security
— Other related fields
— Industrial control
— Machine learning
— Real-time computing
— Vision and image composition
59 — Feature extraction for pattern recognition
CPEN 304 Lecture 1