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Computer Architecture - Boolean Logic - Answers

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8 views

Computer Architecture - Boolean Logic - Answers

Uploaded by

jaspal
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Boolean Logic Name:

Computer Architecture Score: /


GCSE Computer Science Questions & Answers

Q1 Complete the truth table for the OR logic gate: [1 mark]

A B A OR B

0 0

0 1

1 0

1 1

AQA (2016 Spec) - Specimen Question Paper - Paper 1 /1

Q2 Complete the truth table for the logic circuit shown in Figure 6. [3 marks]

A B X Y Z

0 0

0 1

1 0

1 1

AQA (2016 Spec) - Specimen Question Paper - Paper 1 /3

Q3 A logic circuit is being developed for an automatic door system: [3 marks]

• The automatic door has two sensors, one on either side of the door, sensor F and
sensor B. The door opens when either of these sensors is activated.
• The door system can also be turned on/off using a manual switch, S. The door will not
open unless S is on.
• The output from this logic circuit, for whether the door is open or not, is D.
Draw the logic circuit diagram for this system:

AQA (2016 Spec) - Specimen Question Paper - Paper 1 /3

Q4 The logic diagram below (Fig. 2) shows a system made up of two connected logic [2 marks]
gates, please label them:

OCR (2016 Spec) - 2018 Question Paper - Paper 2 /2

Q5 Complete the truth table below to show the output from this logic system. [4 marks]

A B Q

0 0

0 1

1 0

1 1

OCR (2016 Spec) - 2018 Question Paper - Paper 2 /4

Q6 Draw the logic diagram represented by Q = A OR (NOT B) [2 marks]

OCR (2016 Spec) - 2018 Question Paper - Paper 2 /2


Answers

Q1
A B A OR B

0 0 0

0 1 1

1 0 1

1 1 1

Q2
A B X Y Z

0 0 0 0 1

0 1 0 0 1

1 0 0 0 1

1 1 1 1 0
Mark as follows:
1 mark for all X correct;
1 mark for all Y correct (allow follow on if X is incorrect but it correctly shows B AND X);
1 mark for all Z correct (allow follow on if complete negation of Y even if Y is incorrect);

Q3

Mark as follows:
1 mark if F and B are both inputs to an OR gate;
1 mark if S and the output of F and B (allowing for earlier errors) are inputs to an AND gate;
1 mark if the output of the gate that has S as one input, and the output of F and B as another
input, has its output connected to D;

Q4

1 mark per bullet, max 2


- AND / conjunction
- NOT / negation
Q5
A B Q

0 0 1

0 1 1

1 0 1

1 1 0

Q6 1 mark per bullet, max 2

- OR gate with two inputs // NOT gate on B input


- Logic system as above with no other gates, with labelled inputs of A and B

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