Network Theory 18EC32

NETWORK THEORY (18EC32)

Syllabus

Module -1
Basic Concepts:

Practical sources, Source transformations, Network reduction using Star – Delta transformation,
Loop and node analysis with linearly dependent and independent sources for DC and AC networks.
Module -2
Network Theorems:

Superposition, Millman‘s theorems, Thevinin‘s and Norton‘s theorems, Maximum Power transfer
theorem.
Module -3
Transient behavior and initial conditions:

Behavior of circuit elements under switching condition and their Representation, evaluation of
initial and final conditions in RL, RC and RLC circuits for AC and DC excitations.
Module -4
Laplace Transformation & Applications:

Solution of networks, step, ramp and impulse responses, waveform Synthesis.

Module -5
Two port network parameters:

Definition of Z, Y, h and Transmission parameters, modelling with these parameters, relationship

between parameters sets.
Resonance:

Series Resonance:

Variation of Current and Voltage with Frequency, Selectivity and Bandwidth, Q-Factor, Circuit
Magnification Factor, Selectivith with Variable Capacitance, Selectivity with Variable Inductance.

Parallel Resonance:

Selectivity and Bandwidth, Maximum Impedance Conditions with C, L and f Variable, current in Anti-
Resonant Circuit, The General Case-Resistance Present in both Branches.

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 Network Theory 18EC32

Course Outcomes:

At the end of the course, the students will be able to

 Determine currents and voltages using source transformation/ source shifting/ mesh/
nodal analysis and reduce given network using star-delta transformation/source
transformation/ source shifting.
 Solve network problems by applying Superposition/ Reciprocity/ Thevenin‘s/ Norton‘s/
Maximum Power Transfer/ Millman‘s Network Theorems and electrical laws to reduce
circuit complexities and to arrive at feasible solutions.
 Calculate current and voltages for the given circuit under transient conditions.
 Apply Laplace transform to solve the given network.
 Solve the given network using specified two port network parameter like Z or Y or T or h.
 Understand the concept of resonance

Text Books:

1. M.E. Van Valkenberg (2000), ―Network analysis, Prentice Hall of India, 3rdedition, 2000,
ISBN: 9780136110958.
2. Roy Choudhury, ―Networks and systems, 2nd edition, New Age International Publications,
2006, ISBN: 9788122427677

Reference Books:

1. Hayt, Kemmerly and Durbin ―Engineering Circuit Analysis, TMH 7th Edition, 2010.
2. J. David Irwin /R. Mark Nelms, ―Basic Engineering Circuit Analysis, John Wiley, 8thed, 2006.
3. Charles K Alexander and Mathew N O Sadiku, ― Fundamentals of Electric Circuits, Tata
McGraw-Hill, 3rd Ed, 2009.

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 Network Theory 18EC32

Module 1: Basic Circuit Concepts

Network: Any interconnection of network or circuit elements (R, L, C, Voltage and Current sources).
Circuit: Interconnection of network or circuit elements in such a way that a closed path is formed
and an electric current flows in it.
Active Circuit elements deliver the energy to the network (Voltage and Current sources)

Passive Circuit elements absorb the energy from the network (R, L and C).

Active elements:
Ideal Voltage Source is that energy source whose terminal voltage remains constant regardless of
the value of the terminal current that flows. Fig.1a shows the representation of Ideal voltage
source and Fig.1b, it’s V-I characteristics.

Fig.1a: Ideal Voltage source Representation Fig. 1b: V-I characteristics

Practical Voltage source: is that energy source whose terminal voltage decreases with the increase
in the current that flows through it. The practical voltage source is represented by an ideal voltage
source and a series resistance called internal resistance. It is because of this resistance there will be
potential drop within the source and with the increase in terminal current or load current, the drop
across resistor increases, thus reducing the terminal voltage. Fig.2a shows the representation of
practical voltage source and Fig.2b, it’s V-I characteristics.

Fig. 2a: Practical Current Source Fig.2b. VI Characteristics

Here, i1 = i - v1/R …… (2)

Dependent or Controlled Sources: These are the sources whose voltage/current depends on
voltage or current that appears at some other location of the network. We may observe 4 types of

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Network Theory 18EC32

dependent sources.
1. Voltage controlled voltage source(VCVS)
2. Voltage controlled current source(VCCS)
3. Current controlled voltage source(CCVS)
4. Current controlled current source(CCCS)
Fig.3a,b,c and d represent the sources in the same order.

Kirchhoff’s Voltage Law (KVL)

It states that algebraic sum of all branch voltages around any closed path of the network is equal to
zero at all instants of time. Based on the law of conservation of energy.

Fig. 4: Example illustrating KVL

Applying KVL clockwise, + V1 + V2 + V3 –Vg = 0 …… (3)

=> Vg= V1 + V2 + V3 …… (4), indicative of energy delivered= energy absorbed

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Kirchhoff’s Current Law (KCL)

The algebraic sum of branch currents that leave a node of a network is equal to zero at all instants
of time. Based on the law of conservation of charge.

Fig. 5: Example illustrating KCL

Applying KCL at node X, + I1 + I2 - I3 - I4 + I5 = 0 ……. (5)
=>I3 + I4 = I1 + I2 + I5 …… (6), indicative of sum of incoming currents= sum of outgoing currents at a
node.

Source Transformation
Source Transformation involves the transformation of voltage source to its equivalent current
source and vice-versa.
Consider a voltage source with a series resistance R, in Fig. 6a and a current source with the same
resistance R connected across, in Fig.6b.

a
a

b
b
Fig.6 a Voltage Source Fig.6 b Current Source
The terminal voltage and current relationship in the case of voltage source
is; v1 = v – i1 R …… (7)
The terminal voltage and current relationship in the case of current source
is; i1= i - v1/ R, which can be written as, v1 = i R- i1R …… (8)
If the voltage source above has to be equivalently transformed to or represented by, a current
source then the terminal voltages and currents have to be same in both cases.
This means eqn. (7) should be equal to eqn. (8). This implies, v= i R or i = v / R…(9).

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Network Theory 18EC32

If eqn.(9) holds good, then the voltage source above can be equivalently transformed to or
represented by, the current source shown above and vice-versa.

Problems:
1. For the network shown below in Fig.7, find the current through 2Ω resistor, using source
transformation technique.

Fig .7
Solution: In the given circuit, Converting 5A source to voltage source so that resistor 4Ω comes in
series with source resistor 3Ω and equivalent of them can be found. Also converting 1A source to
voltage source, we obtain the circuit as below;

Converting 15V source above to current source and converting 3V x dependent current source to
dependent voltage source, we get the following;

Taking equivalent of the parallel combination of 7Ω resistors and converting 15/7 A current source
to voltage source, we get as shown below;

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Network Theory 18EC32

Applying KVL to the loop above clockwise, we get; 3.5 I - 51 Vx + 17 I +2I + 9I + 9 -7.5=0
From the circuit above, Vx =2I, substitute in above eqn, then we get;
-70.5 I = -1.5
=> I = 0.02127 A = 21.27mA
2. Represent the network shown below in Fig.8, by a single voltage source in series with a
resistance between the terminals A and B, using source transformation techniques

Fig
Solution: In the circuit above, 5V and8.20 V sources are present in series arm and they are series
opposing .So, the sources are replaced by single voltage source which is the difference of two (as
they are opposing, if series aiding then sum has to be considered). The polarity of the resulting
voltage source will have same as that of higher value voltage source. Multiple current sources in
parallel, can be added if they are in same direction and if they are in opposite direction, then
difference is taken and resulting source will have same direction as that of higher one.
Taking source transformation, such that we get all current sources in parallel and all resistances in
parallel, between the terminals. This leads to finding of equivalent current source and equivalent
resistance between A-B. The source transformation leads to single voltage source in series with a
resistance. These are shown below;

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Illustration of Mesh Analysis:

3.Find the mesh currents in the network shown in fig.9

Fig.9
We identify two meshes; 10V-2Ω-4 Ω called as mesh 1 and 3Ω-2V-4 Ω called as mesh2. We consider
i1 to flow in mesh1 and i2 to flow in mesh2. Their directions are always considered to be clockwise. If
they are in opposite direction in actual, we get negative values when we calculate them, indicative of
actual direction to be opposite.
10V-2Ω branch only belongs to mesh1 and so current through it is i1 and 3Ω-2V branch only belongs
to mesh2 and so current through it is always i 2. Also, 4Ω belongs to both meshes and so, the current
through it will be the resultant of i1 and i2. These are shown below;
Next we will apply KVL to each of the meshes; As a result, In this case, we get two equations in
terms of i1 and i2 and when we solve them we get i1 and i2. And when we know the mesh current
values, we can find the response at any point of network.
The polarities of the potential drops across passive circuit elements are based on the directions of
the current that flows through them
Applying KVL to mesh1;
+2 i1 + 4 (i1 – i2) -10 = 0
=> +6 i1 – 4 i 2 = 10…… (1)
Applying KVL to mesh2;
+3 i2 + 2 - 4 (i1 – i2) = 0
Above equation can be rewritten as
+3 i2 + 2 + 4 (i2 –i1) =0
=> -4 i1 + 7 i 2 = -2 …… (2)
Also observing the bold equations above, we may say that easily the potential drops across passive
circuit elements can be considered to take +ve signs. From now onwards, we will not specifically
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identify polarities ofpotential drops across passive circuit elements. They are considered to take
positive signs. For the case of shared element, like 4Ω above, which is shared between mesh1 and
mesh2, the potential drop across it , is considered to be +4(i1 –i2), when we apply KVL to mesh1 and
+4(i2-i1), when we apply KVL to mesh2. Now eqn1 and eqn2 above can be represented in matrix
form as shown;

Using Cramers Rule,

=> i1= ∆i1 / ∆ = 2.384 A

=> i2= ∆i2 / ∆ = 1.076 A
As already told, if we know the mesh current values, we can find the response at any point of
network. And so, Vx and Ix identified, can be easily obtained using the mesh currents.
Ix=-i2=-1.076A
Vx=3i2=3.228A

4. Find the power delivered or absorbed by each of the sources shown in the network in Fig.10.
Use mesh analysis

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Fig.
10

Solution:-
Power delivered by 125 V source, P125 =125 i1 Power delivered by 50V source,
P50= 50 I =50 (i2-i1)
Power delvd. by dependent current source, Pds = (0.2Va) (vds) = (i1-i3) (vds)
{Because Va =5 (i1-i3)}
From the circuit; Va =5 (i1 - i3)
Also; i2 =0.2
Va = i1 – i3 (it is as good as specifying the value of i2 or we can say we have obtained equation from
mesh2, so no need of applying KVL to mesh2)
Applying KVL to mesh1;
5 (i1-i3) + 7.5(i1-i2) +50-125=0
12.5 i1 -7.5 i2 -5 i3 = 75;
substituting i2 = i1 –i3; we have; 5 i1 + 2.5 i3 =125 …… (1)
Applying KVL to mesh3; 17.5 i3 +2.5 (i3-i2) +5(i3-i1) =0
-5 i1-2.5 i2+25 i3 =0; substituting i2 = i1 – i3; we have;
-7.5 i1 + 27.5 i3 =0 …… (2)

Solving (1) and (2), we get; i1=13.2 A and i3=3.6 A

So, i2=i1 – i3 = 13.2 -3.6 =9.6 A

P125 = 125 i1= 125 (13.2) =1650 W (power delivered)
P50 =50 I =50 (i2 –i1) = 50 (9.6 -13.2) = -180 W, here negative value of power delivered is the
indicative of the fact that power is actually absorbed by 50V source.
To find vds in the network shown, we apply KVL to the outer loop

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 Network Theory 18EC32

+17.5 i3 - vds -125 =0 {when applying KVL, the potential drop across passive circuit element is
taken as, + (resistance or impedance value) x (that particular current which is in alignment with
KVL direction), if clockwise direction is considered, then clockwise current)}

=> vds = - 62V

Pds = (0.2 Va)(vds) =(i1 – i3) vds = - 595.2W => Dependent source absorbs power of 595.2 W

5.Find the power delivered by dependent source in the network shown in Fig.11.Use mesh analysis

Fig.11
Solution:-

From the circuit, ia = i2 – i3

Power delivered by dependent source, Pds = (20 ia) (i2) =20 (i2-i3) i2
Apply KVL to mesh1
5 i1 + 15 (i1- i3) +10 (i1-i2) - 660 =0

30 i1 -10 i2 -15 i3 = 660…… (1)

Apply KVL to mesh2
10 (i2 - i1) + 50 (i2- i3) – 20 ia =0
10 (i2 - i1) + 50 (i2- i3) – 20 (i2- i3)
-10 i1 + 40 i2 – 30 i3 =0 …… (2)
Apply KVL to mesh3
25 i3 + 50 (i3 - i2) +15 (i3 –i1) =0

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Network Theory 18EC32

-15 i1 -50 i2 + 90 i3 =0 …… (3)

Solving (1), (2) and (3), we get i2= 27 A and i3 =22A
Pds = (20) (i2-i3) i2 = 20(5)27) =2700W, power delivered.
AC Circuits

These circuits consist L and C components along with R. Here we consider the excitation of the
circuits by sinusoidal sources. Consider an AC circuit shown below;

Fig.12 Fig.13

Let the applied voltage, v(t) = Vm sin(ωt + θ1), the circuit current that flows is i(t) and is given as;
i(t) = I m sin (ωt +θ2) . These two sinusoidal quantities can be represented by phasors; a phasor is a
rotating vector in the complex plane. This is shown in Fig.13, which is a voltage phasor. The phasor
has a magnitude of Vm and rotates at an angular frequency of ω with time.
The voltage phasor is given by Vm ∟θ1 (Also referred as polar form of phasor). The rectangular form
is Vm cos θ1 + j Vm sin θ1.
Similarly, the current phasor is given by I m ∟θ2 (Also referred as polar form of phasor). The
rectangular form is Im cos θ2 + j Im sin θ2.
The ratio of voltage phasor to the current phasor is called as
impedance. Z= (Vm ∟θ1)/ (Im ∟θ2) = (Vm/Im) ∟ (θ1- θ2) =(Vm/Im) ∟θ
The impedance although a complex quantity but is not a phasor, as with respect to time, the angle
of impedance do not change
• If the AC circuit above is represented equivalently by single resistance,
then Z= (Vm ∟θ1)/ (Im ∟θ1)
{since in resistance there is no phase difference between voltage and current and so θ2 = θ1}.
So, Z = (Vm/Im)∟ 0°
= (Vm/Im) cos 0° +j (Vm/Im) sin 0°
= Vm/Im = R.

• If the AC circuit above is represented equivalently by single inductance,

then Z= (Vm ∟θ1)/ (Im ∟(θ1 - 90°)) { since in inductance, current lags the voltage in phase by90°}
So, Z = (Vm/Im)∟ 90°
= (Vm/Im) cos 90° +j (Vm/Im) sin90°
= j (Vm/Im)
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 Network Theory 18EC32

= jωL {in inductance, the ratio of peak value of voltage to peak value of current is always the
reactance which is given by ωL}. Now we can say, any inductance of L henry can be equivalently
represented by impedance of jωL Ohms.
• If the AC circuit above is represented equivalently by single capacitance,
then Z= (Vm ∟θ1)/ (Im ∟(θ1 + 90°)) { since in capacitance, current leads the voltage in phase by 90°}
So, Z = (Vm/Im)∟ -90°
= (Vm/Im) cos 90° - j (Vm/Im) sin90°
= -j (Vm/Im)
= -j(1/ωC)
= -j/ωC {in capacitance, the ratio of peak value of voltage to peak value of current is always the
reactance which is given by 1/ωc. Now we can say, any capacitance of C farad can be equivalently
represented by impedance of -j/ ωC Ohms.
6.Find the current through the capacitor in the circuit shown in Fig.14. Use mesh Analysis.

Solution:
The sources are represented by phasors. The mesh currents are identified. The current through the
capacitor is i3. So, i3 needs to be found using mesh analysis.

Apply KVL to mesh1;

j4 (i1 - i3) + 2 (i1 - i2) – (5∟0° )=0 (2+j4) i1 – 2 i2 – j4 i3 = 5 ……(1)
Apply KVL to mesh2;
3 (i2 – i3) + (10∟45° ) + 2 (i2 - i1)=0
-2 i1 + 5 i2 – 3 i3 = -(10∟45° ) = -7.07 – j 7.07 ……(2)
Apply KVL to mesh3;
-j2 i3 +3 (i3 - i2) + j4 (i3 - i1) =0
-j4 i1 – 3 i2 + (3+j2) i3 =0…… (3)

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 Network Theory 18EC32

Using Cramer’s rule to find i3 .

= (2+j4)[5(3+j2)-9] + 2[-2(3+j2)- (-3)(-j4)] –j4[6+j20]= 40-j12

= (2 + j4)[+3(-7.07 –j 7.07)] + 2[+j4(-7.07-j7.07)] +5[6+ j 20]
=128.98 – j83.82
Therefore, i3 = ∆i3 / ∆ = (128.98 –j83.82)/ (40-j12)
= 3.535-j1.035

= 3.68∟-16.31° A.
The above result represents the phasor of capacitor current. From this we can easily write the
steady state expression of capacitor current, as,
i3(t) = 3.68 cos(2t -16.31°) A

Node analysis

Here, we identify nodes of the given network and consider one node as ground node, which is
considered to be zero potential point. We then identify the voltage at each of the remaining nodes
which is nothing but potential difference between a node of interest and ground node, with ground
node as reference. Node analysis involves the computation of node voltages, and when once these
are found, we can find the response at any point of network.
Illustration

6.Find the node voltages in the network shown in Fig.15;

Fig.15
Solution

There are 3 nodes in the network. The bottom node is selected as ground node. The voltage at

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Network Theory 18EC32

node1 is identified as v1 and it is the potential difference between the node1 and the ground, with
ground as reference. The voltage at node2 is identified as v2 and it is the potential difference
between node2 and the ground, with ground as reference.
Recall KCL statement that “the algebraic sum of branch currents leaving a node of a network is zero
at all instants of time”.

Apply KCL at node1;

-10 +2v1 +4 (v1-v2) =0
6v1 - 4 v2 = 10 ……(1)
Apply KCL at node2;
+4 (v2-v1) +3 v2 +2 =0
=> -4 v1 +7 v2 = - 2 …… (2)
Node equations in Matrix form

Using Cramer’s rule;

v1= ∆v1/ ∆ = 62/26

v1 = 2.384V
v2= ∆v2 /∆ = 28/26
v2 = 1.076V

8. Use Node analysis to find the voltage Vx in the circuit shown in Fig. 16
Fig.16

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Network Theory 18EC32

The ground node and other nodes with their voltages are identified as shown;

Although that point where two circuit elements join is referred as node (like 30V and 3 mho joining
point above), we do not consider voltage there or apply KCL, because it will simply contribute for
redundancy, as without considering the above, still the solution can be obtained. Therefore, we
consider voltages or apply KCL to those nodes where three or more circuit elements join.
From the circuit; Vx = v1+ 5 –v2 and v2 = 2Vx
v2 = 2 (v1 + 5 – v2)
2 v1 – 3 v2 = -10 …… (1),
now we have an equation expressing v2 or an equation associated with node 2. So no need of
applying KCL at node2.
Apply KCL at node1;
3 (v1 – (-30)) + 4 + 2( v1 + 5 - v2) =0
5 v1 – 2 v2 = -104 ............................................. (2)

Solving (1) and (2), we get;

v1=-26.545V and v2= -14.363V
Therefore, Vx = v1+ 5 –v2
-26.545 +5 +14.363 = -7.182 V.

10. Find the power delivered by dependent source using node analysis in the circuit shown in Fig. 17.

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 Network Theory 18EC32

Fig.17

Solution: Identify ground node and other node with its voltage as shown;

From the circuit; ia = v1/20 and

Pds = ( 60 ia) x (current that comes out of +ve polarity of 60ia )

= (60 ia) [(v1-(-60ia))/(10 +15)]

= (60 ia ) ( v1 + 60 ia )/25

10. Find the current i1 in the network shown in Fig. 18. Use node Analysis.

Identify ground node and other node voltages as shown. Also writing source using phasor
representation.

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 Network Theory 18EC32

From the circuit; i1 = v1 / (-j2.5)

Apply KCL at node1; v1/ (-j2.5) + (v1 – (20∟0°))/10 + (v1 –v2) / j4 = 0
j 0.4 v1 + 0.1 v1 –j 0.25v1 + j0.25v2 = 2
(0.1 + j0.15) v1 + j 0.25 v2 = 2 ……(1)
Apply KCL at node 2;
-2i1 + v2 /j2 + (v2 –v1)/j4 = 0
-2(v1 /(-j2.5)) + v2 /j2 + (v2 –v1)/j4 =0
-j0.8 v1 -j 0.5 v2 –j0.25v2 + j0.25v1 = 0
-j0.55 v1– j 0.75 v2 = 0 ............................................... (2)
Using Cramer’s rule;

v1= ∆v1/∆ = (-j1.5) / (-0.025-j0.075)

= 18 +j6 =18.97∟18.43°V
Therefore, i1 = v1 /(-j2.5) = -2.4 + j7.2 = 7.58 ∟108.43° A.
i1(t)= 7.58 cos (4t +108.43 °) A

Concept of Supermesh:
Supermesh concept is considered whenever a current source appears in common to two meshes.
Consider the Network Below;

+
v
Fig.19
To know the advantage of applying supermesh concept; first consider usual way;
Applying KVL to mesh 1;
R1 i1 + vx –Vs =0
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 Network Theory 18EC32

R1 i1 + vx = Vs…..(1)
Applying KVL to mesh 2;
(R2 +R3)i2 –vx =0 vx = (R2 +R3)i2 …..(2)
Substituting (2) in (1), we get; R1 i1 + (R2 +R3)i2 =Vs …..(3)
Also from the circuit;
i2-i1 =Is
i2 = Is +i1 ……(4)
Substituting (4) in (3) we get, i1; Substituting i1 in (4), we get i2.
Applying the concept of supermesh;

Here, after identifying a current source common to two meshes; we first write constraint equation
which relates corresponding mesh currents and the current source value.
i2 – i1 =Is
Or i2 =Is +i1….. (1)

We then club those two meshes and call it as supermesh; shown by dashed lines in the figure; Now
we apply KVL to supermesh;
R1i1 + R1i2 +R3 i2 –Vs =0
R1i1 + (R1 +R3 ) i2 =Vs ……(2), this equation is exactly the same as (3) in previous case.
In this case, it was easily obtained thus reducing the steps. Now, substituting (1) in (2), we get i1.
Then substituting i1 in (1) we get i2. Therefore, mesh currents were easily obtained using
supermesh concept.
11. Use mesh analysis to find Vx in the circuit shown in fig. 20

Fig.20

Solution: From the circuit; Vx = 10i1

Identifying 3A and Vx /4 current sources appearing in common to mesh-1&2 and mesh-2&3
respectively; the constraint equations are written as;
i2 – i1=3
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 Network Theory 18EC32

=> i2= 3 +i1

Also i3- i2 = Vx/4 , wkt, Vx = 10 i1
Substituting in above equation we get i3 –i2= 10 i1/4,
wkt i2 = 3+i1
substituting this => 4 i3- 4(3+i1)-10i1=0

-14 i1 + 4 i3 =12 …….(1)

Apply KVL to supermesh formed by 10Ω→2 Ω→4Ω→25V→50V→10Ω
10 i1 + 2 i2 +4 i3 +25 -50 =0
10 i1 + 2 i2 + 4 i3 = 25
10 i1 + 2 (3+i1) +4 i3 =25
12 i1 + 4 i3 =19 ......................................... (2)
Solving (1) and (2), we get
i1= 0.2692 A and i3 = 3.9423 A i2 = 3+i1 = 3.2692 A.
Vx= 10 i1 = 2.692V

12. Find vx in the circuit shown in fig. 21, using mesh analysis;

Fig.21
From the circuit; vx = - j4 i2
ix = i1 –i2
i3 – i2 = 2 ix (current source 2ix appears in common to two meshes)
i3 – i2 = 2( i1 –i2)
i3 = 2i1 –i2
Apply KVL to mesh 1;
10 i1 – j 2.5(i1 – i2) – (20∟0°) = 0
(10 - j2.5) i1 + j 2.5 i2 = 20 ………(1)
Apply KVL to supermesh formed by j4Ω→2Ω→5∟30°→-j2.5 Ω → j4Ω,
wehave, j4 i2 +2 i3 +(5∟30°) – j 2.5 (i2 –i1) = 0
wkt i3 = 2i1 –i2 , subs in above eqn;
j4 i2 + 2 ( 2i1- i2) + (5∟30°) – j2.5 (i2 –i1) = 0

(4 +j2.5) i1 + (-2 + j1.5) i2 = -(5∟30°) = - 4.33 - j2.5 …….(2)

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Using cramer’s rule;

i2 = ∆i2 / ∆ = (-129.55 - j64.175) / (-10 +j10) i2 = 3.268 + j9.686 i2 = 10.22 ∟71.35° A

Therefore, vx= -j4 i2 = 38.74 – j13.07 = 40.89 ∟-18.64° V

Concept of Supernode:

Super node concept is applied whenever a voltage source appears in common to twonodes.

Consider the network below;

Fig.22
To illustrate the advantage of supernode concept; we first find the node voltages of the network
by the usual way;

Apply KCL at node 1;

v1/R1 – IS + IX = 0 v1/ R1 + IX = IS ……. (1)
Apply KCL at node 2;
v2 / R2 + v2 /R3 – IX =0 v2/R2 + v2 /R3 = IX …..(2)
Subs (2) in (1), we get;
v1/R1 + v2/R2 + v2/R3 = IS …… (3)
Also from the circuit; v1- v2 = VS
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 Network Theory 18EC32

=> v1 = VS + v2 ……. (4)

Substituting (4) in (3) will give the value of v2 Substituting the value of v2 in (4) will give the value of
v 1.
Applying the concept of supernode;
After identifying the voltage source appearing in common to two nodes;
We first write constraint equation; which relates the voltage source value with the corresponding
node voltages; here it is; v1 – v2 = VS
v1= v2 +VS …… (1)

After this, we club the corresponding nodes to become one node and call it as a supernode. Then
we apply KCL to supernode. Here, we apply KCL at supernode X as shown;
v1/R1 – IS + v2/R2 + v2/R3 =0
v1/R1 + v2/R2 + v2/R3 = IS ……(2)
The above equation is same as eqn 3 in previous method, but the above equation was easily
obtained in just one step. Therefore, when a voltage source is appearing in common to two nodes,
it is always advantageous to consider the concept of supermesh.
Now, substituting (1) in (2), we get v2. Substituting v2 in (2) we get v1.

13. Find ia and va in the network shown in fig. 23 using node analysis

Fig.

Solution:

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 Network Theory 18EC32

From the circuit;

Also; v2 =12 V v1- v3 = 8

v1 = 8 + v3
Apply KCL at supernode X;
v1/500 + (v1- v2) /125 + (v3-v2)/250 + v3/500 =0
v1 +4v1 -4v2 +2v3 -2v2 +v3 =0
5v1 -6v2 +3v3=0
Substituting v1 = 8 + v3 in above equation, we get; 5(8+v3) -6v2 +3v3 =0
-6v2+ 8v3 = -40
Wkt v2 =12 V
Therefore, v3 = (-40+6(12))/8 = 4V
Now, ia = (v2 – v3)/250 =0.032 =32 mA.
va = v3 = 4V.

14. Find all the node voltages in the network shown infig.24

Solution:

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 Network Theory 18EC32

From the circuit; vb = 8 V Also, va –vd = 6 i1

i1= (vb-vc)/2 subs in above eqn.
we get; va – vd = 6 (vb - vc) /2
2va – 2vd = 6 v b – 6 vc
2va + 6vc – 2vd = 6 vb =6(8) =48 ………(1)
Apply KCL at supernode X as shown;
(va- vb)/2 + va/2 - 3vc + (vd-vc)/2 =0
(va -8)/2 + va/2 - 3vc + (vd - vc)/2 = 0
va- 8 + va – 6 vc + vd – vc =0
2va – 7vc + vd = 8 .................................................. (2)
Apply KCL at node C
-4 + (vc- vd)/2 + (vc- vb)/2 = 0
-8 +vc – vd + vc –vb =0
2vc –vd = v b + 8 =16 ................................................(3)
Solving (1),(2) and (3), we get;
va = 9.142V , vc= -1.142 V , vd = -18.28V and vb =8V (given)

Star- delta (∆) and delta (∆) to star transformations

Fig 25.a Delta arrangement Fig.25.b Star arrangement

(The positions of Z1, Z2 and Z3 should be noted. Z1 will appear between a and c; from there, going
clockwise we see Z2 and Z3. The positions of Z a, Zb and Zc should be noted. Za connected to vertex-a
and centroid. Zb connected to vertex-b and centroid. Zc connected to vertex-c and centroid.)
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 Network Theory 18EC32

Consider the above arrangements are equivalent; then;

Zac = Z1(Z2+ Z3) / (Z1+Z2+ Z3) = Za +Zc...................................................................... (1)

Also,
Zab = Z2(Z3+ Z1) / (Z1+Z2+ Z3) = Za + Zb ............................................................................. (2)

Zbc = Z3( Z1+ Z2) / (Z1+Z2+ Z3) = Zb + Zc .............................................................................(3)

Eqn. (1) –Eqn.(3)

(Z1Z2 – Z2Z3)/ (Z1+Z2+Z3) = Za- Zb .................................................................................. (4)

Solving (2) and (4), we get,

Za = Z1 Z2 /(Z1 +Z2 +Z3) .................................................................................. (5)

Substituting (5) in (2), solving for Z a, we get; Zb = Z2 Z3 /(Z1 +Z2 +Z3) ...................... (6)

Substituting (5) in (1), solving for Zc, we get; Zc = Z1 Z3 /(Z1 +Z2 +Z3)… (7)
Consider

Eqn(8) / Zb gives
Z1 = (Za Zb +Zb Zc +Za Zc ) / Zb .............................................................................. (9)
Eqn(8) / Zc gives
Z2 = (Za Zb +Zb Zc +Za Zc ) / Zc ............................................................................. (10)
Eqn(8) / Za gives
Z3 = (Za Zb +Zb Zc +Za Zc ) / Za ............................................................................. (11)
15. Reduce the network shown in fig.26 to a single resistor between terminals a-b.

Fig.26
Solution:

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 Network Theory 18EC32

From the network above, we observe, 10Ω and 5Ω are in series and also 5Ω and 25Ω are in series.
Therefore they are equivalently replaced by 15 Ω and 30 Ω as shown.
Identifying delta between the vertices a1-b1-c1;
We have R1→R2→R3 as, 5Ω→20Ω→15Ω
Corresponding star will have;
Ra = R1 R2 /(R1 + R2 + R3) = 100/40 =2.5 Ω (resistance connected to vertex a1)
Rb = R2 R3 /(R1 + R2 + R3) = 300/40 =7.5 Ω (resistance connected to vertex b1)
Rc = R1 R3 /(R1 + R2 + R3) = 75/40 =1.875 Ω (resistance connected to vertex c1)
After replacing delta elements by corresponding star elements;
10Ω and 2.5 Ω appear in series. 30Ω and 7.5Ω appear in series. 2Ω and 1.875Ω appear in series.
They are replaced by their equivalent resistances.

Identifying star between the vertices a2-b2-c2;

We have Ra→Rb→Rc as, 12.5Ω→37.5Ω→3.875Ω
Corresponding delta will have; R1 = (Ra Rb + Rb Rc + Ra Rc )/Rb
= [(12.5)(37.5) + (37.5)(3.875) + (3.875)(12.5)]/37.5
=662.5/37.5= 17.66 Ω (resistance connected b/n vertex a2 and c2)
R2 = (Ra Rb + Rb Rc + Ra Rc )/Rc
=662.5/3.875= 170.96 Ω (resistance connected b/n vertex a2 and 2)
R3 = (Ra Rb + Rb Rc + Ra Rc )/Ra
=662.5/12.5= 53 Ω (resistance connected b/n vertex b2 and c2)

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 Network Theory 18EC32

After replacing star elements by corresponding delta elements;

15||17.66 = 8.11Ω

53||30 =19.15Ω

Therefore, Rab = (19.15 +8.11)||170.96 = 23.51Ω

16. Find the current I in the network shown in Fig 27 by reducing the network contain a source
and a single series impedance

Solution:

Identifying delta between the vertices a1-b1-c1;

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 Network Theory 18EC32

We have Z1→Z2→Z3 as, -j6Ω→j2Ω→4Ω Corresponding star will have;

Za = Z1 Z2 /(Z1 + Z2 + Z3) = (-j6)(j2)/(4-j4) = 1.5 + j1.5Ω(Impedance connected to vertex a1)
Zb = Z2 Z3 /(Z1 + Z2 + Z3) = (j2)(4)/(4-j4) = -1 + j Ω (Impedance connected to vertex b1)
Zc = Z1 Z3 /(Z1 + Z2 + Z3) = (-j6)(4)/(4-j4) = 3-j3 Ω(Impedance connected to vertex c1)
After replacing delta elements by corresponding star elements;

The series impedances are replaced by equivalent impedances

(6-j3) // (4+j) = 2.711 - j 0.057Ω

The single series impedance value, Z = (3.5 + j4.5) + (2.711- j 0.057)

Z = 6.211 + j 4.443 Ω Therefore, I = 100/Z = 100/(6.211 + j4.443) =13.09∟-35.57° A
Additional Problems and Solutions

1) Using source transform, find the power delivered by the 50V source in the circuit shown:-

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 Network Theory 18EC32

Solution: - Using source transformation for the pair V2 and R2, we get,

Adding the parallel current sources and obtaining equivalent resistance of R3 and R2, we have,

Converting the current source back to voltage source,

If I is the current in the circuit,

Therefore Power delivered by 50V source is

2. Find the current through 4Ω in the network shown:

Solution: - Applying KVL to mesh 1 (mesh with )

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 Network Theory 18EC32

Applying KVL to mesh 2

Applying KVL to mesh 3

Matrix form

3. Find the value of V2 if the current through 4Ω is zero.

Solution: - Given =0
Applying KVL to mesh 3 (mesh with ), we get 2

Applying KVL to mesh 2,

Applying KVL to mesh 1, 5

=
Therefore, V2 = V

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Network Theory 18EC32

4. Find Vx using mesh analysis for the circuit shown

Solution: - From the circuit

Applying concept of super mesh, Therefore,

Remove the arm of the current source and apply kvl,

Applying KVL to mesh with i3

Therefore

5. Find Vx and Ix in the circuit shown using mesh analysis

Solution: - From the circuit

Also from the circuit
Substituting equations 1 and 2 in 3, we get

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 Network Theory 18EC32

6 ⟹ ……(4)

Removing the arm containing common current source and applying KVL, we get

Solving equations 4 and 5, we get

Therefore, .

6. Use node analysis to find V0 in the circuit shown below

From the circuit,

; ----- (1);

12V Super node X

V1 V3
V2
1Ω
1Ω

2Ω -j4 ohm Vo
j2 ohm

Applying KCL to super node X,

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 Network Theory 18EC32

(From(1))

--------- (2)
Applying KCL at V1,

------------- (3)
Using Cramer’s rule,

∆=

∆=

∆=

∆ =
∆

W.K.T,

7. Find the equivalent resistance between the terminals X and Y

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 Network Theory 18EC32

Solution:-

Star 1:- ;

Corresponding Delta will have,

Similarly,

= 6.5

= 13

Now consider star 2:- ;

Corresponding Delta will have,

Similarly,

= 15.28

= 21.4
15.28Ω

6.5Ω

17.8Ω 8.66Ω 13Ω 21.4Ω

This circuit can be reduced now using parallel and series combination of resistors as show below.

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Network Theory 18EC32

Therefore the equivalent resistance between X & Y = 3.53

8. Determine the equivalent resistance between the terminals X & Y

Solution:
Consider the Delta ;
It can be replaced with the circuit shown below

Where,

Ra=2.35
Similarly, Rb=1.17
Rc=1.88

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Network Theory 18EC32

The above circuit can be written as,

X

6Ω a 5.17Ω

5.35Ω
c b
5Ω

Consider the Delta, ;

Therefore the equivalent resistance between X & Y = 4.22

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Network Theory 18EC32

Source Shifting:
Voltage Source shifting

The above circuit can be written as,

Which is equivalent to,

Current Source Shifting:-

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Network Theory 18EC32

The above circuit can be redrawn as

Problems on Source Shifting & Source Transformation:-

1) Reduce the network shown to a single voltage source in series with a resistance using source
shifting and source transformation.

Solution:-
Use Source shifting property on both the sources and rewrite the circuit a shown below,

Now using Source transformation we get,

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Network Theory 18EC32

After simplifying the above circuit and applying Source transformation again, we get,

Which can be further simplified using Source transformation yet again,

20V
20Ω
15A

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Network Theory 18EC32

2. Find the voltage across the capacitor of 20Ω reactance of the network.

Solution:- Using Source Transformation,

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Network Theory 18EC32

From the above circuit,

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