S7 1500 Cpu 1512C-1 PN (6es7512-1ck01-0ab0)

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)
Preface
S7-1500 / ET 200MP
Documentation Guide 1
2
SIMATIC Product overview
Technology functions 3
S7-1500
CPU 1512C-1 PN 4
(6ES7512-1CK01-0AB0) Wiring
Parameters/address space 5
Equipment Manual
Interrupts/diagnostics
alarms 6
Technical specifications 7
Dimension drawings A
Parameter data records B
Analog value processing C
05/2021
A5E40898741-AB
Legal information
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Preface
Security information
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Purpose of the documentation

This manual supplements the system manual of the S7-1500 automation system / ET 200MP
distributed I/O system as well as the function manuals. This manual contains a description of
the module-specific information. The system-related functions are described in the system
manual. Cross-system functions are described in the function manuals.
The information provided in this manual and the system manual enables you to commission
the CPU 1512C-1 PN.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Equipment Manual, 05/2021, A5E40898741-AB 3
Preface
Conventions
STEP 7: In this documentation, "STEP 7" is used as a synonym for all versions of the
configuration and programming software "STEP 7 (TIA Portal)".
Please also observe notes marked as follows:
Note
A note contains important information on the product described in the documentation, on
the handling of the product or on the section of the documentation to which particular
attention should be paid.
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CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

4 Equipment Manual, 05/2021, A5E40898741-AB
Table of contents
Preface ................................................................................................................................................... 3
1 S7-1500 / ET 200MP Documentation Guide ........................................................................................... 8
2 Product overview ................................................................................................................................. 10
2.1 New functions ................................................................................................................... 10
2.2 Area of application of the SIMATIC S7-1500 CPUs ............................................................... 12
2.3 Hardware properties and firmware functions ...................................................................... 23
2.3.1 Hardware properties of the CPU part .................................................................................. 24
2.3.2 Firmware functions of the CPU part .................................................................................... 26
2.3.3 Hardware properties of the analog on-board I/O module .................................................... 30
2.3.4 Firmware functions of the analog on-board I/O module ...................................................... 32
2.3.5 Hardware properties of the digital on-board I/O module ..................................................... 34
2.3.6 Firmware functions of the digital on-board I/O module ....................................................... 37
2.4 Operator controls and display elements.............................................................................. 39
2.4.1 Front view with closed front panel ..................................................................................... 39
2.4.2 Front view of the CPU without front panel and view from below......................................... 41
2.4.3 Rear view........................................................................................................................... 43
2.5 Operating mode buttons .................................................................................................... 44
3 Technology functions .......................................................................................................................... 45
3.1 High-speed counters .......................................................................................................... 45
3.1.1 Functions .......................................................................................................................... 46
3.1.1.1 Counting ........................................................................................................................... 46
3.1.1.2 Measuring ......................................................................................................................... 47
3.1.1.3 Position detection for motion control ................................................................................. 48
3.1.1.4 Additional functions........................................................................................................... 49
3.1.2 Configuring the high-speed counters ................................................................................. 50
3.1.2.1 General ............................................................................................................................. 50
3.1.2.2 Assignment of the control interface of the high-speed counters ......................................... 50
3.1.2.3 Assignment of the feedback interface of the high-speed counters....................................... 52
3.2 Pulse generators ................................................................................................................ 54
3.2.1 Operating modes ............................................................................................................... 54
3.2.1.1 Operating mode: Pulse-width modulation (PWM) ............................................................... 54
3.2.1.2 Operating mode: Frequency output ................................................................................... 61
3.2.1.3 Operating mode: PTO ........................................................................................................ 65
3.2.2 Functions .......................................................................................................................... 70
3.2.2.1 Function: High-speed output.............................................................................................. 70
3.2.2.2 Function: Direct control of the pulse output (DQA) ............................................................. 71
3.2.3 Configuring the PWM and frequency output modes ............................................................ 72
3.2.3.1 Assignment of the control interface ................................................................................... 72
3.2.3.2 Handling the SLOT parameter (control interface) ................................................................ 74
3.2.3.3 Assignment of the feedback interface ................................................................................ 77
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Table of contents
4 Wiring .................................................................................................................................................. 79
4.1 Supply voltage ................................................................................................................... 79
4.2 PROFINET interfaces........................................................................................................... 80
4.3 Terminal and block diagrams ............................................................................................. 82
4.3.1 Block diagram of the CPU part ............................................................................................ 82
4.3.2 Terminal and block diagram of the analog on-board I/O ...................................................... 83
4.3.3 Terminal and block diagram of the digital on-board I/O....................................................... 92
4.3.4 Addresses of the high-speed counters .............................................................................. 105
4.3.5 Addresses of the pulse generators in the Pulse Width Modulation (PWM) and Frequency
Output modes ................................................................................................................. 109
4.3.6 Addresses of pulse generators in the PTO mode ............................................................... 110
4.3.7 Interconnection overview of the inputs ............................................................................ 111
4.3.8 Interconnection overview of outputs ................................................................................ 113
5 Parameters/address space ................................................................................................................. 116
5.1 Address space of the analog on-board I/O......................................................................... 116
5.2 Address space of the digital on-board I/O ......................................................................... 118
5.3 Address space of the pulse generators ............................................................................. 120
5.4 Measurement types and measuring ranges of the analog on-board I/O ............................. 121
5.5 Output type and output ranges of the analog on-board I/O ............................................... 122
5.6 Parameters of the analog on-board I/O ............................................................................. 122
5.7 Parameters of the digital on-board I/O .............................................................................. 125
6 Interrupts/diagnostics alarms ............................................................................................................ 127
6.1 Status and error displays .................................................................................................. 127
6.1.1 Status and error displays of the CPU part .......................................................................... 127
6.1.2 Status and error displays of the analog on-board I/O ......................................................... 130
6.1.3 Status and error displays of the digital on-board I/O .......................................................... 132
6.2 Interrupts and diagnostics................................................................................................ 134
6.2.1 Interrupts and diagnostics of the CPU part ........................................................................ 134
6.2.2 Interrupts and diagnostics of the analog on-board I/O....................................................... 134
6.2.3 Interrupts and diagnostics of the digital on-board I/O ....................................................... 136
7 Technical specifications..................................................................................................................... 140
A Dimension drawings .......................................................................................................................... 165
B Parameter data records ..................................................................................................................... 167
B.1 Parameter assignment and structure of the parameter data records of the analog on-
board I/O ......................................................................................................................... 167
B.2 Structure of a data record for input channels of the analog on-board I/O........................... 168
B.3 Structure of a data record for output channels of the analog on-board I/O ........................ 173
B.4 Parameter assignment and structure of the parameter data records of the digital on-
board I/O ......................................................................................................................... 176
B.5 Structure of a data record for input channels of the digital on-board I/O ........................... 177
B.6 Structure of a data record for output channels of the digital on-board I/O ......................... 179
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Table of contents
B.7 Parameter data records of the high-speed counters .......................................................... 181

B.8 Parameter data records (PWM) ......................................................................................... 187
C Analog value processing ................................................................................................................... 190
C.1 Conversion method ......................................................................................................... 190
C.2 Representation of analog values....................................................................................... 196
C.3 Representation of input ranges ........................................................................................ 197
C.3.1 Representation of analog values in voltage measuring ranges .......................................... 198
C.3.2 Representation of analog values in current measuring ranges ........................................... 199
C.3.3 Representation of the analog values of resistance-type sensors/resistance-type
thermometers ................................................................................................................. 200
C.3.4 Measured values for wire break diagnostics ...................................................................... 202
C.4 Representation of output ranges ...................................................................................... 203
C.4.1 Representation of analog values in the voltage output ranges .......................................... 204
C.4.2 Representation of analog values in the current output ranges........................................... 205
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

S7-1500 / ET 200MP Documentation Guide 1
The documentation for the SIMATIC S7-1500 automation system and the SIMATIC ET 200MP
distributed I/O system is arranged into three areas.
This arrangement enables you to access the specific content you require.
Basic information
The System Manual and Getting Started describe in detail the configuration, installation,
wiring and commissioning of the SIMATIC S7-1500 and ET 200MP systems. The STEP 7 online
help supports you in the configuration and programming.
Device information
Product manuals contain a compact description of the module-specific information, such as
properties, wiring diagrams, characteristics and technical specifications.
General information
The function manuals contain detailed descriptions on general topics regarding the SIMATIC
S7-1500 and ET 200MP systems, e.g. diagnostics, communication, motion control, Web
server, OPC UA.
You can download the documentation free of charge from the Internet
(https://support.industry.siemens.com/cs/ww/en/view/109742691).
Changes and supplements to the manuals are documented in a Product Information.
You can download the product information free of charge from the Internet
(https://support.industry.siemens.com/cs/us/en/view/68052815).
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

S7-1500 / ET 200MP Documentation Guide
Manual Collection S7-1500/ET 200MP

The Manual Collection contains the complete documentation on the SIMATIC S7-1500
automation system and the ET 200MP distributed I/O system gathered together in one file.
You can find the Manual Collection on the Internet
SIMATIC S7-1500 comparison list for programming languages

The comparison list contains an overview of which instructions and functions you can use for
which controller families.
You can find the comparison list on the Internet
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Application examples
The application examples support you with various tools and examples for solving your
automation tasks. Solutions are shown in interplay with multiple components in the system -
separated from the focus on individual products.
You will find the application examples on the Internet
(https://support.industry.siemens.com/cs/ww/en/ps/ae).
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview 2
2.1 New functions
New functions of the CPU in firmware version V2.9

The following table provides an overview of the most important new functions of the CPU
with firmware version V2.9.
New functions Applications Customer benefits Where can I find in-

formation?
Communication of the CPU
Secure PG/HMI communi- With STEP 7 and WinCC as of Version Secure and standardized crea- Communication func-
cation V17, SIMATIC S7-1500 CPUs and ET tion or assignment of PLC tion manual
200 CPUs from firmware version 2.9 communication certificates (https://support.industr
support innovated and standardized y.siemens.com/cs/ww/
secure PG/PC and HMI communica- en/view/59192925)
tion – referred to as Secure PG/HMI
communication for short.
Protection of confidential You have the option of assigning a Additional password protec-
configuration data password for protecting confidential tion of confidential configura-
configuration data of the respective tion data
CPU. This refers to data such as pri-
vate keys that are required for the
proper functioning of certificate-
based protocols.
OPC UA: Alarms & Condi- OPC UA clients from any manufactur- Without further measures,
tions er can subscribe to alarms of the CPU alarms created once via OPC
via OPC UA Alarms & Conditions. UA are available as events and
alarms. The alarms can be
displayed by any display de-
vice with corresponding OPC
UA client functionality.
OPC UA: Certificate man- Via GDS push management func- The automation of the certifi-
agement via Global Dis- tions: cate management eliminates
covery Server (GDS) any manual work required for
• Automated update of OPC UA reconfiguring the CPU, for
certificates of an S7-1500 CPU example, after a certificate has
• Transfer of updated certificates expired, and a new download
to the CPU.
and lists in RUN operating state of
the CPU
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
2.1 New functions
New functions Applications Customer benefits Where can I find in-

formation?
DHCP (Dynamic Host The CPU can use the DHCP communi- With DHCP, you can integrate Communication func-
Configuration Protocol) cation protocol to assign the network the CPU into an existing IT tion manual
configuration via a DHCP server. network without having to (https://support.industr
The CPU uses a client ID for identifi- make additional changes to y.siemens.com/cs/ww/
cation on the DHCP server. the PROFINET interface. en/view/59192925)
The following parameters can be
obtained:
• IP Suite
• DNS server
• NTP server
The CPU can also send its host name
to the DHCP server.
MRP interconnection in The MRP interconnection procedure There is no limit to the maxi- PROFINET function
PROFINET networks is an extension of MRP. mum number of 50 devices in manual
MRP interconnection enables the a ring when setting up redun- (https://support.industr
redundant coupling of two or more dant network topologies. y.siemens.com/cs/ww/
rings with MRP in PROFINET net- Monitoring of larger topolo- en/view/49948856)
works. gies with ring redundancy
Web server of the CPU
Web applications that can Additional methods to manage web Web applications are also Web server function
be loaded by the user applications via Web API available in STOP mode of the manual
You can use all available Web API CPU (https://support.industr
methods within the web application Reduced development times y.siemens.com/cs/ww/
of web server user pages en/view/59193560)
New Web API methods Reading and changing the CPU oper- Additional applications for the
ating state via Web API web server
Ticket methods for transferring large
amounts of data outside of the JSON
RPC protocol
Diagnostic information on Diagnostic information is available Comprehensive diagnostic
motion control for all technology objects options by means of motion
Improved display and grouping of the control applications are possi-
tags ble via the web server.
Optimizations to the DNS The feedback messages of the OPC A pool of NTP servers can be Communication func-
(Domain Name System) UA server with the "Application addressed. tion manual
functionality with OPC Name" can be sent via DNS. (https://support.industr
UA/Open User Communi- The NTP client of the CPU can address y.siemens.com/cs/ww/
cation and on the web its relevant NTP servers via DNS. en/view/59192925)
server Web server function
The Web server can be consistently
reached via DNS addressing. DNS is manual
taken into account during certificate (https://support.industr
handling. y.siemens.com/cs/ww/
en/view/59193560)
Technology functions of the CPU
Axis functions • Backlash compensation The repeat accuracy of a S7-1500T Motion Con-
movement is increased by trol function manuals
• Linear motor compensation for the mechan- (https://support.industr
ical play of the real axis. y.siemens.com/cs/ww/
Easier control of highly dy- en/view/109751049)
namic linear motors.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
2.2 Area of application of the SIMATIC S7-1500 CPUs
Reference
You can find an overview of all new functions, improvements and revisions in the respective
firmware versions on the Internet
Area of application
SIMATIC S7-1500 is the modular control system for a wide variety of automation applications
in discrete automation.
SIMATIC S7-1500 is the cost-effective and convenient solution for a broad range of tasks and
offers the following advantages:
• Modular, fanless design
• Simple realization of distributed structures
• User-friendly handling
Areas of application of the SIMATIC S7-1500 automation system include, for example:
• Special-purpose machines
• Textile machinery
• Packaging machines
• General mechanical engineering
• Controller engineering
• Machine tool engineering
• Installation engineering
• Electrical industry and crafts
• Automobile engineering
• Water/waste water
• Food & Beverage
Areas of application of the SIMATIC S7-1500R/H redundant system include, for example:
• Tunnels
• Airports (e.g. baggage conveyors)
• Subways
• Shipbuilding
• Wastewater treatment plants
• High-bay warehouses
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Areas of application of the SIMATIC S7-1500T automation system for advanced motion
control applications include, for example:
• Packaging machines
• Converting applications
• Assembly automation
• Pick-and-place automation
• Palletizers
You can choose between CPUs with various levels of performance and a comprehensive
range of modules with many convenient functions. Fail-safe CPUs enable use in fail-safe
applications. The modular design allows you to use only the modules that you need for your
application. The controller can be retrofitted with additional modules at any time to expand
its range of tasks.
High industrial suitability due to the high resistance to EMC, shock and vibration enable
universal use of the SIMATIC S7-1500, S7-1500R/H and S7-1500T automation systems.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Performance segments of the CPUs

The CPUs can be used for smaller and mid-range applications, as well as for the high-end
range of machine and plant automation.
Table 2- 1 Standard CPUs
CPU Performance segment PROFIBUS PROFINET PROFINET Basic Work Pro-

interfaces IO RT/IRT IO RT PROFINET memory cessing
interfaces interface functional- time for
ity bit oper-
ations
CPU 1511-1 PN Standard CPU for small -- 1 -- -- 1.15 MB 60 ns
to mid-range applica-
tions
CPU 1513-1 PN Standard CPU for mid- -- 1 -- -- 1.8 MB 40 ns
range applications
CPU 1515-2 PN Standard CPU for mid- -- 1 1 -- 3.5 MB 30 ns
range to large applica-
tions
CPU 1516- Standard CPU for de- 1 1 1 -- 6 MB 10 ns
3 PN/DP manding applications
and communication
tasks
CPU 1517- Standard CPU for de- 1 1 1 -- 10 MB 2 ns
and communication
tasks
CPU 1518- Standard CPU for high- 1 1 1 1 24 MB 1 ns
4 PN/DP performance applica-
tions, demanding com-
munication tasks and
very short reaction
times
CPU 1518- Standard CPU for high- 1 1 1 1 74* MB 1 ns
4 PN/DP MFP performance applica-
munication tasks, very
short reaction times and
C/C++ blocks for the
user program
* 50 MB of the integrated work memory is reserved for the function library of CPU runtime
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Table 2- 2 Redundant CPUs

ity bit oper-
ations
CPU 1513R-1 PN Redundant CPU for -- 1 -- -- 1.8 MB 80 ns
smaller to mid-range
applications
CPU 1515R-2 PN Redundant CPU for mid- -- 1 -- 1 3.5 MB 60 ns
tions
CPU 1517H- Redundant CPU for -- 1 -- 1 10 MB 4 ns
3 PN demanding applications
and communication
tasks
CPU 1518HF- Fail-safe and redundant -- 1 -- 2 69 MB 4 ns
4 PN CPU for demanding
applications and com-
munication tasks
Table 2- 3 Compact CPUs

ity bit oper-
ations
CPU 1511C-1 PN Compact CPU for small -- 1 -- -- 1.175 MB 60 ns
tions
CPU 1512C-1 PN Compact CPU for mid- -- 1 -- -- 1.25 MB 48 ns
range applications
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Table 2- 4 Fail-safe CPUs

ity bit oper-
ations
CPU 1511F-1 PN Fail-safe CPU for small -- 1 -- -- 1.225 MB 60 ns
tions
CPU 1511TF- Fail-safe technology -- 1 -- -- 1.225 MB 60 ns
1 PN CPU for small to mid-
range applications
CPU 1513F-1 PN Fail-safe CPU for mid- -- 1 -- -- 1.95 MB 40 ns
range applications
CPU 1515F-2 PN Fail-safe CPU for mid- -- 1 1 -- 3.75 MB 30 ns
tions
CPU 1515TF- Fail-safe technology -- 1 1 -- 3.75 MB 30 ns
2 PN CPU for demanding
munication tasks
CPU 1516F-3 Fail-safe CPU for de- 1 1 1 -- 6.5 MB 10 ns
PN/DP manding applications
and communication
tasks
CPU 1516TF- Fail-safe technology 1 1 1 -- 6.5 MB 10 ns
3 PN/DP CPU for demanding
munication tasks
CPU 1517F- Fail-safe CPU for de- 1 1 1 -- 11 MB 2 ns
and communication
tasks
CPU 1517TF- Fail-safe technology 1 1 1 -- 11 MB 2 ns

3 PN/DP CPU for demanding
munication tasks
CPU 1518F- Fail-safe CPU for high- 1 1 1 1 26 MB 1 ns
4 PN/DP performance applica-
munication tasks and
very short reaction
times
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview

ity bit oper-
ations
CPU 1518F- Fail-safe CPU for high- 1 1 1 1 76* MB 1 ns
4 PN/DP MFP performance applica-
munication tasks, very
short reaction times and
C/C++ blocks for the
user program
CPU 1518TF- Technology CPU for 1 1 1 1 69 MB 1 ns
4 PN/DP high-performance mo-
tion control applications
with large quantities,
demanding communi-
cation tasks and very
short reaction times
* 50 MB of the integrated work memory is reserved for the function library of CPU runtime
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Table 2- 5 Technology CPUs

ity bit oper-
ations
CPU 1511T-1 PN Technology CPU for -- 1 -- -- 1.225 MB 60 ns
small to mid-range
applications
CPU 1515T-2 PN Technology CPU for -- 1 1 -- 3.75 MB 30 ns
mid-range to large ap-
plications
CPU 1516T-3 PN Technology CPU for 1 1 1 -- 6.5 MB 10 ns
/DP high-end applications
and communication
tasks
CPU 1517T- Technology CPU for 1 1 1 -- 11 MB 2 ns
3 PN/DP complex applications
and communication
tasks
CPU 1518T- Technology CPU for 1 1 1 1 69 MB 1 ns
4 PN/DP high-performance mo-
tion control applications
with large quantities,
demanding communi-
cation tasks and very
short reaction times
CPU 1511TF- These CPUs are described in the fail-safe CPUs
1 PN
CPU 1515TF-
2 PN
CPU 1516TF-
3 PN/DP
CPU 1517TF-
3 PN/DP
CPU 1518TF-
4 PN/DP
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Performance segments of compact CPUs

The compact CPUs can be used for smaller to mid-range applications and have an integrated
analog and digital on-board I/O as well as integrated technology functions. The following
table shows the specific properties of the Compact CPUs.
CPU 1511C-1 PN CPU 1512C-1 PN

Integrated analog inputs/outputs 5 inputs/2 outputs 5 inputs/2 outputs
Integrated digital inputs/outputs 16 inputs/16 outputs 32 inputs/32 outputs
High-speed counters 6 6
Frequency meters 6 (max. 100 kHz) 6 (max. 100 kHz)
Period duration measurement 6 channels 6 channels
Pulse width modulation (PWM output)
Max. 4 (up to 100 kHz) Max. 4 (up to 100 kHz)
Pulse Train Output (PTO output) Max. 4 (up to 100 kHz) Max. 4 (up to 100 kHz)
Frequency output Up to 100 kHz Up to 100 kHz
Integrated Motion Control technology functions

All CPUs of the SIMATIC S7-1500 automation system support motion control technology
functions. STEP 7 provides PLCopen-standardized Motion Control instructions for configuring
and connecting a drive to the CPU.
S7-1500 Motion Control supports the following technology objects:
• Speed-controlled axes
• Positioning axes
• Synchronous axes
• External encoders
• Cam
• Cam track
• Measuring input
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
The technology CPUs of the SIMATIC S7-1500-automation system offer enhanced Motion
Control functions:
• Advanced synchronization functions
– Synchronization with specification of the synchronous position
– Actual value coupling
– Shifting of the master value at the following axis
– Camming
• Up to 4 encoder or measuring systems as actual position for position control
• Cam
• Kinematics for control of:
– Cartesian portals
– Roller pickers
– Jointed-arm robots
– Delta pickers
– SCARA robots
Due to the supported technology functions, the S7-1500T CPUs are suitable for controlling
packaging machines, converting applications, assembly automation, etc.
Additional integrated technology functions

For effective commissioning, diagnostics and fast optimization of drives and controls, the
SIMATIC S7-1500 controller series offers extensive trace functions for all CPU tags.
In addition to drive integration, the SIMATIC S7-1500 controller series has a PID compact
closed-loop controller; easy-to-configure blocks allow automatic optimization of the
controller parameters for optimum control quality.
Other technology functions

Technology modules also implement functions such as high-speed counting, position
detection, measuring functions and pulse generators (PTO, PWM and frequency output). With
the CPU 1511C-1 PN and CPU 1512C-1 PN compact CPUs, these functions are already
integrated and can be implemented without additional technology modules.
SIWAREX is a versatile and flexible weighing module which you can use as a static scale for
operation.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Redundant CPUs
The CPUs of the S7-1500R/H redundant system offer a high degree of reliability and system
availability. A redundant configuration of the most important automation components
reduces the likelihood of production downtimes and the consequences of component errors.
The higher the risks and costs of a production downtime, the more worthwhile the use of a
redundant system. The avoidance of production downtimes compensates for the generally
higher investment costs.
Security Integrated
In conjunction with STEP 7, each CPU offers password-based know-how protection against
unauthorized reading out or modification of the program blocks.
Copy protection provides reliable protection against unauthorized reproduction of program
blocks. With copy protection, individual blocks on the SIMATIC memory card can be tied to its
serial number so that the block can only be run if the configured memory card is inserted into
the CPU.
In addition, you can assign various access rights to different user groups in the controller
using four different authorization levels.
Improved manipulation protection allows changed or unauthorized transfers of engineering
data to be detected by the controller.
The use of an Ethernet CP (CP 1543-1) provides you with additional access protection
through a firewall or possibilities to establish secure VPN connections.
Safety Integrated
The fail-safe CPUs are intended for users who want to implement demanding standard and
fail-safe applications both centrally and decentrally.
These fail-safe CPUs allow the processing of standard and safety programs on a single CPU.
This allows fail-safe data to be evaluated in the standard user program. The integration also
provides the system advantages and the extensive functionality of SIMATIC for fail-safe
applications.
The fail-safe CPUs are certified for use in safety mode up to:
• Safety class (Safety Integrity Level) SIL 3 according to IEC 61508:2010
• Performance Level (PL) e and Category 4 according to ISO 13849-1:2015 or EN ISO 13849-
1:2015
Additional password protection for F-configuration and F-program is set up for IT security.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Design and handling

All CPUs of the SIMATIC S7-1500 product series feature a display with plain text information.
The display provides the user with information on the order numbers, firmware version, and
serial number of all connected modules. In addition, the IP address of the CPU and other
network settings can be adapted locally without a programming device. Error messages are
shown on the display directly in plain text. When performing servicing, you can minimize
plant downtimes by quickly accessing the diagnostics alarms. Detailed information about this
and a multitude of other display functions is available in the SIMATIC S7-1500 Display
Simulator (https://support.industry.siemens.com/cs/ww/en/view/109761758).
Uniform front connectors for all modules and integrated potential jumpers for flexible
formation of potential groups simplify storage. Additional components such as circuit
breakers, relays, etc., can be installed quickly and easily, since a DIN rail is implemented in
the rail of the SIMATIC S7-1500. The CPUs of the SIMATIC S7-1500 product series can be
expanded centrally and in a modular fashion with signal modules. Space-saving expansion
enables flexible adaptation to each application.
The system cabling for digital signal modules enables fast and clear connection to sensors
and actuators from the field (fully modular connection consisting of front connector
modules, connection cables and I/O modules), as well as easy wiring inside the control
cabinet (flexible connection consisting of front connectors with assembled single
conductors).
System diagnostics and alarms

Integrated system diagnostics is activated by default for the CPUs. The different types of
diagnostics are configured instead of programmed. System diagnostics information and
alarms from the drives are displayed consistently and in plain text:
• On the CPU display
• In STEP 7
• On the HMI
• On the Web server
This information is available in RUN mode, but also in STOP mode of the CPU. The diagnostic
information is updated automatically when you configure new hardware components.
The CPU is available as a central interrupt server in up to three project languages. The HMI
takes over the display in the project languages defined for the CPU. If you require alarm texts
in additional languages, you can load them into your HMI via the configured connection. The
CPU, STEP 7 and your HMI ensure data consistency without additional engineering steps. The
maintenance work is easier.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
2.3 Hardware properties and firmware functions

The CPU 1512C-1 PN consists of a CPU part, an analog on-board I/O module (X10) and a
digital on-board I/O module (X11 and X12). When configured in the TIA Portal, the compact
CPU therefore occupies a single shared slot (slot 1).
The properties and functions of the CPU part and the analog and digital on-board I/O modules
can be found in the subsections below. The properties describe the hardware features of the
CPU part and the analog and digital on-board I/O modules. The functions describe the
functions of the firmware of the CPU part and the analog and digital on-board I/O modules.
Article number
6ES7512-1CK01-0AB0
Accessories
The following accessories are included in the scope of delivery and can also be ordered
separately as spare parts:
• 3 x front connector (push-in terminals) including cable ties
• 3 x shield clamp
• 3 x shield terminal
• 3 x infeed element (push-in terminals)
• 3 x labeling strip
• 3 x universal front cover
For more information on accessories, refer to the S7-1500, ET 200MP system manual
(http://support.automation.siemens.com/WW/view/en/59191792).
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
2.3.1 Hardware properties of the CPU part
View of the CPU

The figure below shows the CPU part of the CPU 1512C-1 PN.
Figure 2-1 CPU 1512C-1 PN
Note
Protective film
Note that a protective film is attached to the display of the CPU when shipped from the
factory. Remove the protective film if necessary.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Properties
The CPU 1512C-1 PN has the following technical properties:
Property Description Additional information

CPU display All CPUs of the SIMATIC S7-1500 product series feature • S7-1500, ET 200MP system
a display with plain text information. The display pro-
manual
vides information on order numbers, firmware version
and serial numbers of all connected modules. In addi- (http://support.automation.sieme
tion, you can set the IP address of the CPU and carry out ns.com/WW/view/en/59191792)
further network settings. The display shows occurring • SIMATIC S7-1500 Display Simula-
error messages directly in plain text.
tor
In addition to the functions listed here, a multitude of
other functions that are described in the SIMATIC S7- (https://support.industry.siemens
1500 Display Simulator are shown on the display. .com/cs/ww/en/view/109761758)
Supply voltage A 4-pole connection plug that is located at the front of • Chapter Wiring (Page 79)
the CPU supplies the 24 V DC supply voltage.
• S7-1500, ET 200MP system
manual
(http://support.automation.sieme
ns.com/WW/view/en/59191792)
PROFINET IO
PROFINET interface (X1 P1 The X1 interface has two ports (P1 R and P2 R). In addi- PROFINET function manual
R and X1 P2 R) tion to basic PROFINET functionality, its also supports (http://support.automation.siemens.
PROFINET IO RT (real time) and IRT (isochronous real com/WW/view/en/68039307)
time), which means you can configure PROFINET IO
communication or real-time settings on the interface.
Port 1 and Port 2 can also be used as ring ports for the
configuration of redundant ring structures in Ethernet
(media redundancy).
Basic PROFINET functionality comprises:
• HMI communication
• Communication with the configuration system
• Communication with a higher-level network (back-
bone, router, Internet)
• Communication with another machine or automa-
tion cell
Operation of the CPU as • IO controller:
• IO controller As an IO controller the CPU addresses the connected
• I-device IO devices
• I-device:
As an I-device (intelligent IO device) the CPU is as-
signed to a higher-level IO controller and is used in
the process as an intelligent pre-processing unit of
sub-processes
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
2.3.2 Firmware functions of the CPU part
Functions
The CPU 1512C-1 PN supports the following functions:
Function Description Additional information

Integrated system diag- The system automatically generates the messages for Diagnostics function manual
nostics the system diagnostics and outputs these messages via (http://support.automation.siemens.
a programming device/PC, HMI device, the Web server com/WW/view/en/59192926)
or the integrated display. System diagnostics infor-
mation is also available when the CPU is in STOP mode.
Integrated Web server The Web server lets you access the CPU data by means • Web server function manual
of a network. Evaluations, diagnostics, and modifica-
(http://support.automation.sieme
tions are thus possible over long distances. Monitoring
and evaluation is possible without STEP 7; all you need ns.com/WW/view/en/59193560)
is a Web browser. Make sure that you take appropriate • Security with SIMATIC S7 control-
measures (e.g. limiting network access, using firewalls) lers system manual
to protect the CPU from being compromised.
(https://support.industry.siemens
.com/cs/ww/en/view/90885010)
Integrated trace func- Trace functionality supports you in troubleshooting Using the trace and logic analyzer
tionality and/or optimizing the user program. function function manual
You record device tags and evaluate the recordings with (http://support.automation.siemens.
the trace and logic analyzer function. Tags are, for ex- com/WW/view/en/64897128)
ample, drive parameters or system and user tags of a
CPU.
The device saves the recordings. You can read out and
permanently save the recordings with the configuration
system (ES), if required. The trace and logic analyzer
function is therefore suitable for monitoring highly
dynamic processes.
The trace record can also be displayed through the Web
server.
OPC UA With OPC UA, data is exchanged via an open and ven- Communication function manual
dor-neutral communication protocol. The CPU can act (https://support.industry.siemens.co
as OPC UA server. The CPU can communicate with m/cs/ww/en/view/59192925)
OPC UA clients as an OPC UA server.
Through OPC UA Companion Specification, the meth-
ods can be specified uniformly and independently of
manufacturers. The specified methods enable you to
integrate devices from various manufacturers more
easily into your plants and production processes.
Configuration control You can use configuration control to operate different S7-1500, ET 200MP system manual
real hardware configurations with a configured maxi- (http://support.automation.siemens.
mum configuration of the hardware. This means that, com/WW/view/en/59191792)
in series machine manufacturing in particular, you have
the option of operating/configuring different configura-
tion variants of a machine with a single project.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview

PROFINET IO
RT (real time) RT prioritizes PROFINET IO telegrams over standard PROFINET function manual
telegrams. This ensures the required determinism in the (http://support.automation.siemens.
automation technology. In this process the data is com/WW/view/en/49948856)
transferred via prioritized Ethernet telegrams.
IRT (isochronous real time) A reserved bandwidth within the send clock is available
for IRT data. The reserved bandwidth ensures that the
IRT data can be transmitted in time-synchronized inter-
vals, unaffected by other high network loading (e.g.
TCP/IP communication or additional real time communi-
cation). Update times with maximum determinism can
be realized through IRT. Isochronous applications are
possible with IRT.
Isochronous mode The Isochronous mode system property acquires meas-
ured values and process data and processes the signals
in a fixed system clock. Isochronous mode thus contrib-
utes to high control quality and hence to greater manu-
facturing precision. Isochronous mode reduces possible
fluctuations of the process reaction times to a mini-
mum. Time-assured processing makes higher machine
cycles possible.
MRP (Media Redundancy It is possible to establish redundant networks via the
Protocol) Media Redundancy Protocol. Redundant transmission
links (ring topology) ensure that an alternative commu-
nication path is made available if a transmission link
fails. The PROFINET devices that are part of this redun-
dant network form an MRP domain.
RT operation is possible with the use of MRP.
MRPD (Media Redundancy The advantage of the MRP extension MRPD is that, in
with Planned Duplication) the event of a failure of a device or a line in the ring, all
other devices continue to be supplied with IO data
without interruption and with short update times.
MRPD is based on IRT and MRP. To realize media redun-
dancy with short update times, the PROFINET devices
participating in the ring send their data in both direc-
tions. The devices receive this data at both ring ports so
that there is no reconfiguration time.
Shared device The "Shared device" function allows you to divide the
modules or submodules of an IO device up among dif-
ferent IO controllers. Numerous IO controllers are often
used in larger or widely distributed systems. Without
the "Shared device" function, each I/O module of an IO
device is assigned to the same IO controller. If sensors
that are physically close to each other must provide
data to different IO controllers, several IO devices are
required. The "Shared device" function allows the mod-
ules or submodules of an IO device to be divided up
among different IO controllers, thus allowing flexible
automation concepts. You can, for example, combine
I/O modules that are physically close to each other in
one IO device.
PROFIenergy PROFIenergy is a PROFINET-based data interface for
switching off consumers centrally and with full coordi-
nation during pause times regardless of the manufac-
turer or device type. Through this, the process should
only be provided with the energy that is absolutely
required. The majority of the energy is saved by the
process; the PROFINET device itself only contributes a
few watts of savings potential.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview

Integrated technology
Motion Control S7-1500 CPUs support the controlled positioning and • Section Technology functions
traveling of axes via S7-1500 Motion Control functions
(Page 45)
by means of the following technology objects:
Speed-controlled axes, positioning axes, synchronized • S7-1500T Motion Control func-
axes, external encoders, cams, cam tracks and measur- tion manuals
ing inputs. (https://support.industry.siemens
• Speed-controlled axis for controlling a drive with .com/cs/ww/en/view/109751049)
speed specification
• Positioning axis for position-controlled positioning
of a drive
• Synchronous axis to interconnect with a master
value. The axis is synchronized to the master axis
position.
• External encoder for detecting the actual position of
an encoder and its use as a master value for syn-
chronous operation
• Cams, cam track for position-dependent generation
of switching signals
• Measuring input for fast, accurate and event-
dependent sensing of actual positions
Integrated closed-loop • PID Compact (continuous PID controller) PID control function manual
control functionality (https://support.industry.siemens.co
• PID 3Step (step controller for integrating actuators) m/cs/ww/en/view/108210036)
• PID Temp (temperature controller for heating and
cooling with two separate actuators)
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview

Integrated safety
Know-how protection The know-how protection protects user blocks against S7-1500, ET 200MP system manual
unauthorized access and modifications. (http://support.automation.siemens.
Copy protection Copy protection links user blocks to the serial number com/WW/view/en/59191792)
of the SIMATIC memory card or to the serial number of
the CPU. User programs cannot run without the corre-
sponding SIMATIC memory card or CPU.
Access protection You can use authorization levels to assign separate
rights to different users.
Integrity protection The CPUs dispose of integrity protection by default.
Integrity protection identifies possible manipulations of
engineering data on the SIMATIC memory card or dur-
ing data transfer between TIA Portal and CPU.
Integrity protection also checks the communication
from a SIMATIC HMI system to the CPU for possible
manipulations of engineering data.
If integrity protection identifies the manipulation of
engineering data, the user receives a corresponding
message.
Password provider As an alternative to manual password input you can
connect a password provider to STEP 7. A password
provider offers the following advantages:
• Convenient handling of passwords. STEP 7 reads the
password automatically for the blocks. This saves
you time.
• Optimum block protection because the users do not
know the password itself.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
2.3.3 Hardware properties of the analog on-board I/O module
View
The following figure shows the analog on-board I/O (X10) of the CPU 1512C-1 PN.
Figure 2-2 Analog on-board I/O
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Properties of the analog inputs

The 5 inputs of the analog on-board I/O module have the following properties:

Resolution: 16 bits in- A CPU processes information exclusively in digital for- • Chapter Analog value processing
cluding sign mat. An ADC (analog-to-digital converter) integrated
into the analog on-board I/O module therefore converts • Analog value processing function
the analog value into a bit pattern. For the CPU, this manual
conversion always returns a 16-bit word for SIMATIC (http://support.automation.sieme
products. The ADC used digitalizes the analog signal and ns.com/WW/view/en/67989094)
approximates its value with a stepped curve. The resolu-
tion specifies the number of increments of the analog
value along this stepped curve here.
Integrated types of Controllers are only capable of processing analog values
measuring in the form of bit patterns. For this purpose, transducers
which can be connected to the analog module measure
physical variables such as pressure or temperature. This
analog value is measured by the analog input module in
the form of the measurement types current, voltage or
resistance. The analog on-board I/O module supports
the following measurement types on the following
channels.
• Voltage measurement type can be set individually
for channel 0 to 3
• Current measurement type can be set individually
for channel 0 to 3
• Resistor measurement type can be set for channel 4
• Thermal resistor measurement type can be set for
channel 4
Configurable diagnostics The analog on-board I/O module can diagnose errors. Chapter Parameters of the analog
The module reports the diagnosed state to the CPU on-board I/O (Page 122)
using a diagnostics error interrupt. Different types of
diagnostics are available that you can parameterize
channel-granularly.
Hardware interrupt You can react to process events (such as nega- • Chapter Parameters of the ana-
tive/positive exceeding of specific limits) through the
log on-board I/O (Page 122)
configuration of a hardware interrupt. Hardware inter-
rupts can be parameterized channel-granularly. • Chapter Structure of a data rec-
ord for input channels of the
analog on-board I/O (Page 168)
• STEP 7 online help
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Properties of the analog outputs

The 2 outputs of the analog on-board I/O module have the following properties:

Resolution: 16 bits in- Once the CPU has processed the digital signal, a DAC • Chapter Analog value processing
cluding sign (digital-to-analog converter) integrated in the analog
on-board I/O module converts the output signal to an • Analog value processing function
analog current or voltage value. The resulting value of manual
the output signal corresponds to the output value with (http://support.automation.sieme
which the analog on-board I/O module controls the ns.com/WW/view/en/67989094)
analog actuators.
Integrated output types With the selection of the type of output you specify
whether the digital-to-analog converter is to convert the
output signal into the type of output "Current" or "Volt-
age". The output can be selected by individual channel.
Configurable diagnostics The analog on-board I/O module can diagnose errors. Chapter Parameters of the analog
The module reports the diagnosed state to the CPU on-board I/O (Page 122)
using a diagnostics error interrupt. Different types of
diagnostics are available that you can parameterize
channel-granularly.
2.3.4 Firmware functions of the analog on-board I/O module
Functions of the analog inputs

The 5 inputs of the analog on-board I/O module have the following functions:

Reconfiguration in RUN You have the option of reassigning parameters for the • Chapter Parameters of the ana-
analog on-board I/O module in RUN (for example,
measuring ranges of individual channels can be modi-
fied in RUN without affecting the other channels). • Chapter Parameter assignment
and structure of the parameter
data records of the analog on-
board I/O (Page 167)
Support of the value sta- Value status = 1 ("Good") indicates that the value of Chapter Address space of the analog
tus (Quality Information, the assigned input at the terminal is valid. on-board I/O (Page 116)
QI) Value status = 0 ("Bad") indicates that the read value is
not valid.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Functions of the analog outputs

The 2 outputs of the analog on-board I/O module have the following functions:

Reconfiguration in RUN You have the option of reassigning parameters for the • Chapter Parameters of the ana-
analog on-board I/O module in RUN (for example,
output ranges of individual channels can be modified
in RUN without affecting the other channels). • Chapter Parameter assignment
data records of the analog on-
Support of the value sta- Value status = 1 ("Good") indicates that the process Chapter Address space of the analog
tus (Quality Information, value specified by the user program is correctly output on-board I/O (Page 116)
QI) at the terminal.
Value status = 0 ("Bad") indicates that the process
value output at the hardware output is incorrect.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
2.3.5 Hardware properties of the digital on-board I/O module
View
The following figure shows the digital on-board I/O (X11 and X12) of the CPU 1512C-1 PN.
Figure 2-3 Digital on-board I/O
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Properties of the digital inputs

The digital inputs of the digital on-board I/O module have the following properties:

Standard and high-speed The digital on-board I/O module has 32 high-speed Section Wiring (Page 79)
inputs inputs for signals up to a max. of 100 kHz. The inputs
can be used as standard inputs and as inputs for tech-
nology functions.
The inputs have a rated input voltage of 24 V DC.
The inputs are suitable for switches and 2-/3-/4-wire
proximity switches.
Configurable diagnostics The digital on-board I/O module is able to diagnose Section Parameters of the digital on-
errors. The module reports the diagnosed state to the board I/O (Page 125)
CPU using a diagnostics error interrupt. You can param-
eterize the type of diagnostics channel-specifically.
Hardware interrupt You can react to process events (such as positive edge, Section Parameters of the digital on-
negative edge) through the configuration of a hardware board I/O (Page 125)
interrupt. Hardware interrupts can be parameterized Section Structure of a data record for
channel-granularly. input channels of the digital on-
STEP 7 online help
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Properties of the digital outputs

The digital outputs of the digital on-board I/O module have the following properties:

Configurable diagnostics The digital on-board I/O module is able to diagnose Section Interconnection overview of
errors. The module reports the diagnosed state to the outputs (Page 113)
CPU using a diagnostics error interrupt. You can param-
eterize the type of diagnostics channel-specifically.
Standard and high-speed outputs
Standard outputs The digital on-board I/O module has 16 standard out- Section Wiring (Page 79)
puts.
High-speed outputs Of the 32 standard outputs you can also use 8 outputs
as high-speed outputs for technology functions.
Rated output voltage The outputs have a rated output voltage of 24 V DC.
Output frequencies and Rated output current as output for standard mode: 0.5 A Section Interconnection overview of
output currents per channel. outputs (Page 113)
As an output for technology functions, you can select
between an output current of up to 0.5 A at an output
frequency up to 10 kHz (load dependent) and a reduced
output current of max. 0.1 A at an increased output
frequency of up to 100 kHz.
Application The outputs are suitable for, e.g. solenoid valves, DC
contactors and indicator lights, or also for signal trans-
mission or proportional valves.
Driver blocks X11 The digital outputs of the digital onboard I/O X11 have Section Terminal and block diagram
driver blocks with parasitic diodes. In principle, parasitic of the digital on-board I/O (Page 92)
diodes have an effect when switching off inductive
loads such as freewheeling diodes. The shutdown volt-
age is limited to -0.8 V. Therefore, the demagnetization
of inductive loads takes longer and can be approximate-
ly calculated using the following formula.
tau = L / R (tau= time constant, L = inductance value,
R = ohmic resistance value)
After the expiration of a period of 5 * tau, the current
has decreased in effect to 0 A due to the inductive load.
The maximum value is derived from:
tau = 1.15H / 48 Ohm = 24 ms. After
5 * 24 ms = 120 ms, the current has decreased in effect
to 0 A.
For comparison: With standard modules, inductive
shutdown voltage is limited, for example, to Vcc -53 V
(supply voltage – 53 V), which causes the current to
decrease to 0 A after about 15 ms.
Driver blocks X12 The driver blocks of the outputs from the digital inboard
I/O X12 have no freewheeling diodes.
The cut-off voltage is -29 V. Inductive loads are there-
fore demagnetized faster than for X11.
If ground is interrupted, no unwanted current flows
through the digital outputs to the ground.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Simultaneous use of technology and standard functions

You can use technology and standard functions at the same time, provided the hardware
allows this. For example, all the digital inputs not assigned to the counting, measuring or
position detection or PTO technology functions can be used as standard DI.
Inputs to which technology functions are assigned can be read. Outputs to which technology
functions are assigned cannot be written.
See also
Parameter assignment and structure of the parameter data records of the digital on-board I/O
(Page 176)
2.3.6 Firmware functions of the digital on-board I/O module
Functions of the digital inputs

The digital inputs of the digital on-board I/O module have the following functions:

Technology functions The high-speed digital inputs of the digital on-board Chapter Technology functions
I/O module support technology functions such as fast (Page 45)
counting, measuring, position detection and pulse
generators (PWM, PTO and frequency output). Due to
the supported technology functions, the compact
CPUs are suitable for controlling pumps, fans, mixers,
conveyor belts, lifting platforms, gate control systems,
building management systems, synchronized axes,
etc.
Reconfiguration in RUN You have the option of reassigning parameters for the • Chapter Parameters of the digital
digital on-board I/O module in RUN (for example,
on-board I/O (Page 125)
values for input delay of individual channels can be
modified without affecting the other channels). • Chapter Parameter assignment
data records of the digital on-
Support of the value sta- Value status = 1 ("Good") indicates that the value of Chapter Address space of the digital
tus (Quality Information, the assigned input at the terminal is valid. on-board I/O (Page 118)
QI) Value status = 0 ("Bad") indicates that no/too little
supply voltage L+ is applied at the terminal and that
the read value is therefore not valid.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Functions of the digital outputs

The digital outputs of the digital on-board I/O module have the following functions:

Technology functions The high-speed digital outputs of the digital on-board Chapter Technology functions
I/O module support technology functions such as fast (Page 45)
counting, measuring, position detection and pulse
generators (PWM, PTO and frequency output). Due to
the supported technology functions, the compact
CPUs are suitable for controlling pumps, fans, mixers,
conveyor belts, lifting platforms, gate control systems,
building management systems, synchronized axes,
etc.
Reconfiguration in RUN You have the option of reassigning parameters for the • Chapter Parameters of the digital
digital on-board I/O module in RUN (for example,
on-board I/O (Page 125)
behavior during CPU STOP, without affecting the oth-
er channels). • Chapter Parameter assignment
data records of the digital on-
Support of the value sta- Value status = 1 ("Good") indicates that the process Chapter Address space of the digital
tus (Quality Information, value specified by the user program is correctly output on-board I/O (Page 118)
QI) at the terminal.
Value status = 0 ("Bad") indicates that the process
value output at the hardware output is incorrect or
the channel is used for technology functions.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
2.4 Operator controls and display elements
2.4.1 Front view with closed front panel

The following figure shows the front view of the CPU 1512C-1 PN.
① LEDs for the current operating mode and diagnostics status of the CPU
② Status and error displays RUN/ERROR of the analog on-board I/O
③ Status and error displays RUN/ERROR of the digital on-board I/O
④ Control keys
⑤ Display
Figure 2-4 View of the CPU 1512C-1 PN with closed front panels (front)
Note
Temperature range for display
To increase its service life, the display switches off at a temperature below the permitted
operating temperature of the device. When the display cools down again, it automatically
switches itself on again. When the display is switched off, the LEDs continue to show the
status of the CPU.
You can find additional information on the temperatures at which the display switches itself
on and off in the Technical specifications (Page 140).
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
Removing and fitting the front panel or display

You can remove and fit the front panel or the display during operation.
WARNING
Personal injury and damage to property may occur
If you pull or plug the front panel of an S7-1500 automation system during operation,
personal injury or damage to property can occur in zone 2 hazardous areas.
Before you remove or fit the front panel, switch off the power supply to the S7-1500
automation system in hazardous area zone 2.
Locking the front panel

You can lock the front panel to protect your CPU against unauthorized access.
You can attach a security seal or a padlock with a hoop diameter of 3 mm to the front panel.
Figure 2-5 Locking latch on the CPU
In addition to the mechanical lock, you can also block access to a password-protected CPU on
the display (local lock) and assign a password for the display. For more information on the
display, the configurable protection levels and the local lock, refer to the S7-1500, ET 200MP
(http://support.automation.siemens.com/WW/view/en/59191792) system manual.
Reference
You will find detailed information on the individual display options, a training course and a
simulation of the available menu commands in the SIMATIC S7-1500 Display Simulator
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
2.4.2 Front view of the CPU without front panel and view from below
The following figure shows the operator control and connection elements of the
CPU 1512C-1 PN with the front cover of the CPU open.
① LEDs for the current operating mode and diagnostics status of the CPU
② Status and error displays RUN/ERROR of the analog on-board I/O
③ Status and error displays RUN/ERROR of the digital on-board I/O
④ Connector for power supply
⑤ Operating modes with "STOP ACTIVE" LED
⑥ LEDs for the 2 ports (X1 P1 and X1 P2) of the PROFINET interface X1
⑦ MAC address
⑧ Display
Figure 2-6 View of the CPU 1512C-1 PN without front panel on the CPU (front)
Note
Removing the display
Only remove the display if it is faulty.
You can find information on removing and replacing displays in the S7-1500, ET 200MP
system manual (http://support.automation.siemens.com/WW/view/en/59191792).
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
① Slot for the SIMATIC memory card

② PROFINET IO interface (X1) with 2 ports
③ Connection for supply voltage
④ Fastening screw
Figure 2-7 View of the CPU 1512C-1 PN – bottom
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
2.4.3 Rear view

The following figure shows the connection elements on the rear of the CPU 1512C-1 PN.
① Shield contact surfaces

② Plug-in connection for power supply
③ Plug-in connection for backplane bus
④ Fastening screws
Figure 2-8 View of the CPU 1512C-1 PN - rear
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Product overview
2.5 Operating mode buttons
2.5 Operating mode buttons

You use the operating mode buttons to set the operating mode of the CPU.
The following table shows the meaning of the corresponding operation of the operating
mode buttons.
Table 2- 6 Meaning of the operating mode buttons
Operation of the operating mode Meaning Explanation

buttons
RUN RUN mode The CPU executes the user program.
STOP STOP mode The user program is not executed. (STOP ACTIVE
LED lights up).
MRES Manual memory reset The CPU executes memory reset.
(with inserted SIMATIC
memory card)
1. Press the operating mode button
or or
STOP.
Reset to factory settings The CPU is reset to its factory settings.
Result: The RUN/STOP LED lights up (without inserted SIMATIC You can find additional information in the S7-
yellow. memory card): 1500/ET 200MP system manual
2. Press the operating mode button (https://support.industry.siemens.com/cs/ww/en/v
iew/59191792).
STOP until the RUN/STOP LED lights
up for the 2nd time and remains
continuously lit (this takes three
seconds). After this, release the but-
ton.
3. Press the operating mode button
STOP again within the next three
seconds.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Technology functions 3
3.1 High-speed counters
Properties
The technology functions of the compact CPU have the following technical properties:
• 32 high-speed digital inputs (up to 100 kHz), isolated
– 6 high-speed counters (High Speed Counter/HSC), which can all be used as A/B/N
• Interfaces
– 24 V encoder signals of sourcing or push-pull encoders and sensors
– 24 V encoder supply output, short-circuit-proof
– Up to 2 additional digital inputs per high-speed counter for possible HSC DI functions
(Sync, Capture, Gate)
– 1 digital output per high-speed counter for fast reaction to the count
• Counting range: 32 bits
• Diagnostics and hardware interrupts can be configured
• Supported encoder/signal types
– 24 V incremental encoder
(with 2 tracks A and B, phase-shifted by 90°, up to 6 incremental encoders also with
zero track N)
– 24 V pulse encoder with direction signal
– 24 V pulse encoder without direction signal
– 24 V pulse encoder each for forward pulse & reverse pulse
The high-speed counters support reconfiguration in RUN. You can find additional information
in section Parameter data records of the high-speed counters (Page 181).
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Technology functions
3.1.1 Functions
3.1.1.1 Counting
Counting refers to the detection and adding up of events. The counters acquire and evaluate
encoder signals and pulses. You can specify the count direction using encoder or pulse
signals or through the user program.
You can control counting processes using the digital inputs. You can switch the digital
outputs exactly at defined count values, regardless of the user program.
You can configure the response of the counters using the functionalities described below.
Counting limits
The counting limits define the count value range used. The counting limits are selectable and
can be modified during runtime by the user program.
The highest counting limit that can be set is 2147483647 (231–1). The lowest counting limit
that can be set is –2147483648 (–231).
You can configure the response of the counter at the counting limits:
• Continue or stop counting (automatic gate stop) on violation of a counting limit
• Set count value to start value or to opposite counting limit on violation of a counting limit
Start value
You can configure a start value within the counting limits. The start value can be modified
during runtime by the user program.
Depending on the parameter assignment, the compact CPU can set the current count value to
the start value during synchronization, during the Capture function, on violation of a
counting limit or when the gate is opened.
Gate control
Opening and closing the hardware gate and software gate defines the period of time during
which the counting signals are acquired.
The digital inputs of the digital on-board I/O control the hardware gate. The user program
controls the software gate. You can enable the hardware gate using the parameter
assignment. The software gate (bit in the control interface of the cyclic I/O data) cannot be
disabled.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Capture
You can configure an external reference signal edge that triggers the saving of the current
count value as a Capture value. The following external signals can trigger the Capture
function:
• Rising or falling edge of a digital input
• Both edges of a digital input
• Rising edge of signal N at the encoder input
You can configure whether counting continues from the current count value or from the start
value after the Capture function.
Hysteresis
You can specify hysteresis for the comparison values, within which a digital output is
prevented from switching again. An encoder may stop at a certain position, and slight
movements may make the count value fluctuate around this position. If a comparison value
or a counting limit lies within this fluctuation range, the corresponding digital output will be
switched on and off often if hysteresis is not used. The hysteresis prevents these unwanted
switching operations.
Reference
For more information on the counter, refer to the S7-1500, ET 200MP, ET 200SP Counting,
measurement and position detection function manual
3.1.1.2 Measuring
Measuring functions
The following measuring functions are available:
Table 3- 1 Overview of available measuring functions
Measurement type Description

Frequency measure- A measuring interval calculates the average frequency based on the time sequence of the count
ment pulses, and returns this frequency as a floating-point number in units of hertz.
Period measurement A measuring interval calculates the average period duration based on the time sequence of the
count pulses, and returns this period duration as a floating-point number in units of seconds.
Velocity measurement A measuring interval calculates the average velocity based on the time sequence of the count
pulses, and returns this velocity in the configured unit.
The measured value and count value are both available in the feedback interface.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Update time
You can configure the interval at which the compact CPU updates the measured values
cyclically as the update time. Larger update times smooth uneven measured variables and
increase the measuring accuracy.
Gate control
Opening and closing the hardware gate and software gate defines the period of time during
which the count signals are acquired. The update time is asynchronous to the opening of the
gate, which means that the update time is not started when the gate is opened. After the
gate is closed, the last measured value calculated is still returned.
Measuring ranges
The measuring functions have the following measuring range limits:
Table 3- 2 Overview of low and high measuring range limits
Measurement type Low measuring range limit High measuring range limit
Frequency measurement 0.04 Hz 400 kHz *
Period measurement 2.5 μs * 25 s
Velocity measurement Depending on the configured number of "increments per unit" and the "timebase
for velocity measurement"
* Applies to 24 V incremental encoder and "quadruple" signal evaluation
All measured values are returned as signed values. The sign indicates whether the count
value increased or decreased during the relevant time period. For example, a value of -80 Hz
means that the count value decreases at 80 Hz.
Reference
For more information on measuring, refer to the S7-1500, ET 200MP, ET 200SP Counting,
measurement and position detection function manual
3.1.1.3 Position detection for motion control

You can use the digital on-board I/O, e.g. with an incremental encoder, for position detection
with S7-1500 Motion Control. The position input is based on the counting function, which
evaluates the acquired encoder signals and provides them for S7-1500 Motion Control.
In the hardware configuration of the CPU 1512C-1 PN in STEP 7 (TIA Portal), select the
"Position input for Motion Control" mode.
Reference
For a detailed description of the use of motion control and its configuration, refer to the
S7-1500 Motion Control function manual
(http://support.automation.siemens.com/WW/view/en/109749262). In the function module,
the interface between the drives and encoders is referred to as a technology module (TM). In
this context, a technology module (TM) also refers to the digital on-board I/O of the compact
CPU described here.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

3.1.1.4 Additional functions
Synchronization
You can configure an external reference signal edge to load the counter with the specified
start value. The following external signals can trigger a synchronization:
• Rising or falling edge of a digital input
• Rising edge of signal N at the encoder input
• Rising edge of signal N at the encoder input depending on the level of the assigned digital
input
Comparison values
The integrated counter supports 2 comparison values and digital output HSC DQ1. If the
counter or measured value meets the set comparison condition, HSC DQ1 can be set in order
to trigger direct control operations in the process.
Both comparison values can be set in the parameters and can be changed during runtime by
the user program.
Hardware interrupts
If you have enabled a hardware interrupt in the hardware configuration, the counter can
trigger a hardware interrupt in the CPU when a comparison event occurs, if there is overflow
or underflow, at a zero crossing of the counter, and/or at a change of count direction
(direction reversal). You can specify which events are to trigger a hardware interrupt during
operation in the hardware configuration.
Diagnostics interrupts
If you have enabled a diagnostics interrupt in the hardware configuration, the counter can
trigger a diagnostics interrupt if the supply voltage is missing, if there is an incorrect A/B
count signal or lost hardware interrupt.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

3.1.2 Configuring the high-speed counters
3.1.2.1 General
You configure the high-speed counters (HSC) in STEP 7 (TIA Portal).
The functions are controlled by the user program.
Reference
A detailed description of configuring the counting and measuring functions can be found in:
• S7-1500, ET 200MP, ET 200SP Counting, measurement and position detection
(http://support.automation.siemens.com/WW/view/en/59709820) function manual
• in the STEP 7 online help under "Using technology functions > Counting, measuring and
position detection > Counting, measuring and position detection (S7-1500)"
A detailed description of configuring Motion Control be found in:
• in the S7-1500/S7-1500T Motion Control
(https://support.industry.siemens.com/cs/ww/en/view/109766459) function manual
• in the STEP 7 online help under "Using technology functions > Motion Control > Motion
Control (S7-1500)"
3.1.2.2 Assignment of the control interface of the high-speed counters

The user program uses the control interface to influence the behavior of the high speed
counter.
Note
Operation with High_Speed_Counter technology object
The High_Speed_Counter technology object is available for high-speed counting mode. We
therefore recommend use of the High_Speed_Counter technology object instead of the
control interface/feedback interface for controlling the high speed counter.
For information on configuring the technology object and programming the associated
instruction, refer to the S7-1500, ET 200MP, ET 200SP Counting, measurement and position
detection (http://support.automation.siemens.com/WW/view/en/59709820) function manual.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Control interface per channel

The following table shows the control interface assignment:
Table 3- 3 Assignment of the control interface
Offset from start Parameter Meaning

address
Bytes 0 to 3 Slot 0 Load value (meaning of the value is specified in LD_SLOT_0)
Bytes 4 to 7 Slot 1 Load value (meaning of the value is specified in LD_SLOT_1)
Byte 8 LD_SLOT_0* Specifies the meaning of the value in Slot 0
Bit 3 Bit 2 Bit 1 Bit 0
0 0 0 0 No action, idle state
0 0 0 1 Load counter
0 0 1 0 Reserve
0 0 1 1 Load start value
0 1 0 0 Load comparison value 0
0 1 1 0 Load low counting limit
0 1 1 1 Load high counting limit
1 0 0 0 Reserve
to
1 1 1 1
LD_SLOT_1* Specifies the meaning of the value in Slot 1
Bit 7 Bit 6 Bit 5 Bit 4
0 0 0 0 No action, idle state
0 0 0 1 Load counter
0 0 1 0 Reserve
0 0 1 1 Load start value
0 1 1 0 Load low counting limit
0 1 1 1 Load high counting limit
1 0 0 0 Reserve
to
1 1 1 1
Byte 9 EN_CAPTURE Bit 7: Enable capture function
EN_SYNC_DN Bit 6: Enable downward synchronization
EN_SYNC_UP Bit 5: Enable upward synchronization
SET_DQ1 Bit 4: Set DQ1
SET_DQ0 Bit 3: Set DQ0
TM_CTRL_DQ1 Bit 2: Enable technological function DQ1
TM_CTRL_DQ0 Bit 1: Enable technological function DQ0
SW_GATE Bit 0: Software gate
Byte 10 SET_DIR Bit 7: Count direction (with encoder without direction signal)
– Bits 2 to 6: Reserve; bits must be set to 0
RES_EVENT Bit 1: Reset of saved events
RES_ERROR Bit 0: Reset of saved error states
Byte 11 – Bits 0 to 7: Reserve; bits must be set to 0
* If values are loaded simultaneously via LD_SLOT_0 and LD_SLOT_1, the value from Slot 0 is taken first internally and then
the value from Slot 1 . This may lead to unexpected intermediate states.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Reference
You can find a graphic representation of the processing of the various SLOT parameters in the
section Handling the SLOT parameter (control interface) (Page 74).
3.1.2.3 Assignment of the feedback interface of the high-speed counters

The user program receives current values and status information from the high speed counter
via the feedback interface.
Note
Operation with High_Speed_Counter technology object
The High_Speed_Counter technology object is available for high-speed counting mode. We
therefore recommend use of the technology object High_Speed_Counter instead of the
control interface/feedback interface for controlling the high speed counter.
For information on configuring the technology object and programming the associated
instruction, refer to the S7-1500, ET 200MP, ET 200SP Counting, measurement and position
detection (http://support.automation.siemens.com/WW/view/en/59709820) function manual.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Feedback interface per channel

The following table shows the feedback interface assignment:
Table 3- 4 Assignment of the feedback interface
Offset from start Parameter Meaning

address
Bytes 0 to 3 COUNT VALUE Current count value
Bytes 4 to 7 CAPTURED VALUE Last Capture value acquired
Bytes 8 to 11 MEASURED VALUE Current measured value
Byte 12 – Bits 3 to 7: Reserve; set to 0
LD_ERROR Bit 2: Error when loading via control interface
ENC_ERROR Bit 1: Incorrect encoder signal
POWER_ERROR Bit 0: Incorrect supply voltage L+
Byte 13 – Bits 6 to 7: Reserve; set to 0
STS_SW_GATE Bit 5: Software gate status
STS_READY Bit 4: Digital on-board I/O started up and parameters assigned
LD_STS_SLOT_1 Bit 3: Load request for Slot 1 detected and executed (toggling)
LD_STS_SLOT_0 Bit 2: Load request for Slot 0 detected and executed (toggling)
RES_EVENT_ACK Bit 1: Reset of event bits active
– Bit 0: Reserve; set to 0
Byte 14 STS_DI2 Bit 7: Reserve; set to 0
STS_DI1 Bit 6: Status HSC DI1
STS_DI0 Bit 5: Status HSC DI0
STS_DQ1 Bit 4: Status HSC DQ1
STS_DQ0 Bit 3: Status HSC DQ0
STS_GATE Bit 2: Internal gate status
STS_CNT Bit 1: Count pulse detected within last approx. 0.5 s
STS_DIR Bit 0: Direction of last count value change
Byte 15 STS_M_INTERVAL Bit 7: Count pulse detected in previous measuring interval
EVENT_CAP Bit 6: Capture event has occurred
EVENT_SYNC Bit 5: Synchronization has occurred
EVENT_CMP1 Bit 4: Comparison event for DQ1 has occurred
EVENT_CMP0 Bit 3: Comparison event for DQ0 has occurred
EVENT_OFLW Bit 2: Overflow has occurred
EVENT_UFLW Bit 1: Underflow has occurred
EVENT_ZERO Bit 0: Zero crossing has occurred
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

3.2 Pulse generators
3.2.1 Operating modes
3.2.1.1 Operating mode: Pulse-width modulation (PWM)
Properties
The pulse-width modulation (PWM) mode of the compact CPU has the following technical
properties:
Minimum Maximum
Standard output High-speed out- High-speed output Standard High-speed High-speed
put deactivated activated output output deac- output acti-
tivated vated
Pulse 400 µs with load > 20 µs with load 2 µs 1)
duration 0.1 A 1) > 0.1 A 1) 10,000,000 µs (10 s)
500 µs with load 40 µs with load
≥ 2m A 1) ≥ 2m A 1)
Period 10 ms 2) 100 μs 2) 10 μs
duration
1) A lower value is theoretically possible but, depending on the connected load, the output voltage can no longer be output
as complete rectangular pulse
2) Load dependent
Principle of operation
With pulse width modulation, a signal with defined cycle duration and variable on-load factor
is output at the digital output. The on-load factor is the relationship of the pulse duration to
the cycle duration. In PWM mode, you can control the on-load factor and the cycle duration.
With pulse width modulation you vary the mean value of the output voltage. Depending on
the connected load, you can control the load current or the power with this.
You can specify the pulse duration as one-hundredth of the period duration (0 bis 100), as
one-thousandth (0 to 1000), as one ten-thousandth (0 to 10,000) or in S7 analog format.
① Period duration
② Pulse duration
The pulse duration can be between 0 (no pulse, always off) and full-scale deflection (no
pulse, period duration always on).
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

The PWM output can, for example, be used to control the speed of a motor from standstill to
full speed or you can use it to control the position of a valve from closed to completely open.
You configure the pulse width modulation (PWM) mode in STEP 7 (TIA Portal).
The pulse width modulation mode has the following functions:
• When the option "High-speed output (0.1 A)" is activated, you can generate a minimum
pulse duration of 2 μs at a current of 100 mA. If the option "High-speed output (0.1 A)" is
not activated, you can generate a minimum pulse duration of 20 μs with a load > 0.1 A
and a minimum pulse duration of 40 μs with a load of ≥ 2 mA and a current of maximum
0.5 A. If a standard output is used, you can generate a minimum pulse duration of 400 µs
with a load of > 0.1 A and a minimum pulse duration of 500 µs with a load of ≥ 2 mA.
• You can control the pulse output (DQA) of the channel manually via the control and
feedback interface.
• You can configure the reaction to CPU STOP. Upon change to CPU STOP, the pulse output
(DQA) is set to the configured state.
Controller
For the pulse width modulation (PWM) mode, the user program directly accesses the control
and feedback interface of the channel.
A reconfiguration via the instructions WRREC/RDREC and parameter assignment data record
128 is supported. You can find additional information in section Parameter data records
(PWM) (Page 187)
You control the on-load factor (pulse-cycle ratio) of the pulse width via the OUTPUT_VALUE
field of the control interface. Pulse width modulation generates continuous pulses based on
this value. The period duration is adjustable.
Figure 3-1 Pulse schematic
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Starting the output sequence

The control program must output the enable for the output sequence with the help of the
software enable (SW_ENABLE 0 → 1). The feedback bit STS_SW_ENABLE indicates that the
software enable is pending at the PWM.
If the software enable is activated (rising edge), STS_ENABLE is set. The output sequence runs
continuously, as long as SW_ENABLE is set.
Note
Output control signal TM_CTRL_DQ
• If TM_CTRL_DQ = 1, the technology function takes over the control and generates pulse
sequences at the output PWM DQA.
• If TM_CTRL_DQ = 0, the user program takes over the control and the user can set the
output PWM DQA directly via the control bit SET_DQA.
Canceling the output sequence

A deactivation of the software enable (SW_ENABLE = 1 → 0) cancels the current output
sequence. The last cycle duration is not completed. STS_ENABLE and the digital output
PWM DQA are immediately reset to 0.
A renewed pulse output is only possible after a restart of the output sequence.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Minimum pulse duration and minimum interpulse period

You assign the minimum pulse duration and the minimum interpulse period with the help of
the parameter "Minimum pulse duration".
• A pulse duration determined by the technology function or PWM channel which is shorter
than the minimum pulse duration will be suppressed.
• A pulse duration determined by the technology function or PWM channel which is longer
than the cycle duration less the minimum interpulse period will be set to the value of the
cycle duration (output switched on permanently).
① Cycle duration
② Cycle duration minus minimum interpulse period
③ Minimum pulse duration
④ OUTPUT_VALUE (One tenth of a percent on-load factor)
⑤ Pulse duration
Figure 3-2 Minimum pulse duration and minimum interpulse period
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Setting and changing the pulse on-load factor

OUTPUT_VALUE assigns the on-load factor for the current period duration. You select the
range of the field OUTPUT_VALUE of the control interface with the "Output format"
parameter.
• Output format per 100: Value range between 0 and 100
Pulse duration = (OUTPUT_VALUE/100) x period duration.
• Output format 1/1000: Value range between 0 and 1 000
Pulse duration = (OUTPUT_VALUE/1 000) x cycle duration.
• Output format 1/10000: Value range between 0 and 10 000
Pulse duration = (OUTPUT_VALUE/10 000) x cycle duration.
• Output format "S7 analog output": Value range between 0 and 27,648
Pulse duration = (OUTPUT_VALUE/27 648) x period duration.
You assign OUTPUT_VALUE directly via the control program. A new OUTPUT_VALUE is applied
at the output when the next rising edge occurs.
Setting and changing the period duration

• Permanent updating
The period duration is permanently controlled via the control interface. The MODE_SLOT
bit must be set ("1" means permanent updating); LD_SLOT must be set to value 1 ("1"
means period duration). Set the period value in the field SLOT. The unit is always a
microsecond.
– High-speed output activated: between 10 μs and 10 000 000 μs (10 s) in the field SLOT
– High-speed output deactivated: between 100 μs and 10 000 000 μs (10 s) in the field
SLOT
– Standard output (100 Hz output): between 10 000 µs (10 ms) and 10 000 000 µs
(10 s) in the field SLOT
• Individual updating
Set the period duration in the configuration parameters. Alternatively, execute an
individual updating via the control interface. MODE_SLOT must be deleted ("0" means
individual updating); LD_SLOT must be set to value 1 ("1" means period duration). Set the
period duration value in the field SLOT. The unit is always a microsecond.
– High-speed output activated: between 10 μs and 10 000 000 μs (10 s) in the
parameters
– High-speed output deactivated: between 100 μs and 10 000 000 μs (10 s) in the
parameters
– Standard output (100 Hz output): between 10 000 µs (10 ms) and 10 000 000 µs
(10 s) in the parameters
The new period duration is applied at the next rising edge of the output.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Setting the minimum pulse duration and the minimum interpulse period
You assign the minimum pulse duration and the minimum interpulse period as DWORD
numerical value between 0 and 10 000 000 μs (10 s) with the help of the channel parameter
configuration "Minimum pulse duration".
Parameters of the pulse width modulation (PWM) mode
Category Parameter Meaning Value range Default

Reaction to Reaction to CPU The parameter "Output substitute Output substitute value Output substi-
CPU STOP STOP value" generates a substitute value tute value
upon CPU STOP, which you can
define with the parameter "Substi-
tute value for pulse output (DQA)".
The parameter "Continue opera- Continue operation
tion" still generates the PWM out-
put signal upon CPU STOP, which
was generated before the CPU
STOP.
Substitute value If you have set the option "Output 0 0
for pulse output substitute value" for "Reaction to (use substitute value 0)
(DQA) CPU STOP", the parameter "Substi- 1
tute value for pulse output (DQA)" (use substitute value 1)
defines the substitute value to be
used for the pulse output of the
channel.
If you have set the option "Contin-
ue operation" for "Reaction to CPU
STOP", the parameter "Substitute
value for pulse output (DQA)"
cannot be selected
Diagnostics No supply voltage The parameter "No supply voltage Deactivated Deactivated
interrupt L+ L+" activates the diagnostic inter-
rupt of the channel in the case of Activated
no supply voltage L+
Parameter High-speed output The "High-speed output (0.1 A)" Deactivated Deactivated
(0.1 A) parameter is used to specify The output supports frequencies
whether you want to use the se- of up to 10 kHz (load dependent)
lected pulse output as high-speed and currents of up to 0.5 A or
output. Requirement for this is frequencies of up to 100 Hz and
that the selected pulse output currents of up to 0.5 A depending
supports the operation as high- on the performance capability of
speed output. the selected output.
Activated
The output supports frequencies
of up to 100 kHz and currents of
up to 0.1 A.
Output format Defines the format of the ratio S7 analog output Per 100
value (on-load factor) in the field Interprets the ratio value in the
"OUTPUT_VALUE" of the control field OUTPUT_VALUE" of the con-
duration of the channel. trol interface 1/27648 of the
current period duration.
Supported value range from 0 to
27 648
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Per 100
Interprets the ratio value in the
field "OUTPUT_VALUE"of the con-
trol interface percentage value of
the current period duration.
Supported value range 0 to 100
Per 1,000
field "OUTPUT_VALUE"of the con-
trol interface is a one-tenth per-
centage point of the current
period duration.
1 000
Per 10,000
field "OUTPUT_VALUE" of the
control interface is a one-
hundredth percentage point of
the current period duration.
10 000
Minimum pulse Defines the minimum pulse dura- 0 μs to 10 000 000 μs (10 s) 0 μs
duration tion and the minimum interpulse
period of the output signal of the
channel. The channel suppresses
all pulses and pauses that are
below the specified value.
Period duration Defines the period duration of the x to 10 000 000 μs (10 s) 2 000 000 μs
output signal of the channel in μs. at 100 kHz hardware output (2 s)
In RUN, the user program can (high-speed output (0.1 A) acti-
control the period duration via the vated): 10 μs to 10 000 000 μs
control and feedback interface of (10 s)
the channel. at 10 kHz hardware output (high-
speed output (0.1 A) deactivat-
ed): 100 μs to 10 000 000 μs
(10 s)
at 100 kHz hardware output
(high-speed output (0.1 A) deac-
tivated): 10 000 μs (10 ms) to
10 000 000 μs (10 s)
Hardware Pulse output The parameter "Pulse output For B: Hardware
inputs / (DQA) (DQA)" defines the hardware out- X11, terminal 21 (DQ0 / %Q4.0): output for the
outputs put to use as pulse output channel. 10 kHz / 0.5 A or 100 kHz / 0.1 A least signifi-
cant address
For B:
X11, terminal 31 (DQ8 / %Q5.0):
100 Hz / 0.5 A
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Output signals for pulse width modulation (PWM) mode
Output signal Meaning Value range

Continuous pulse current at the digital A pulse is output at the digital output PWM Continuous pulse current
output PWM DQA DQA for the set on-load factor and cycle dura-
tion.
3.2.1.2 Operating mode: Frequency output

In this operating mode you can assign a frequency value with high frequencies more
precisely than by using period duration in PWM mode.
A rectangular signal with an assigned frequency and a constant on-load factor of 50 % is
generated at the digital output.
The frequency output mode has the following functions:
• When the option "High-speed output (0.1 A)" is activated, you can generate a minimum
pulse duration of 2 μs at a current of 100 mA. If the option "High-speed output (0.1 A)" is
not activated, you can generate a minimum pulse duration of 20 μs with a load > 0.1 A
and a minimum pulse duration of 40 μs with a load of ≥ 2 mA and a current of maximum
0.5 A.
If you use a standard output, you can generate a minimum pulse duration of 400 µs with a
load of > 0.1 A and a minimum pulse duration of 500 µs with a load of ≥ 2 mA and a
current of max. 0.5 A.
Minimum Maximum
Standard out- High-speed High-speed Standard out- High-speed High-speed
put output deac- output acti- put output deac- output acti-
tivated vated tivated vated
Frequency 0.1 Hz 100 Hz 1) 10 kHz 1) 100 kHz
1) Load dependent
• You can control the pulse output (DQA) of the channel manually via the control and
feedback interface.
• You can configure the reaction to CPU STOP. Upon change to CPU STOP, the pulse output
(DQA) is set to the configured state.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Controller
For the frequency output mode, the user program directly accesses the control and feedback
interface of the channel.
A reconfiguration via the instructions WRREC/RDREC and parameter assignment data record
128 is supported. You can find additional information in section Parameter data records
(PWM) (Page 187).
Figure 3-3 Pulse schematic
Starting the output sequence

The control program must initiate the enable for the output sequence with the help of the
software enable (SW_ENABLE 0 → 1). The feedback bit STS_SW_ENABLE indicates that the
software enable is pending at the pulse generator.
If the software enable is activated (rising edge), STS_ENABLE is set. The output sequence runs
continuously, as long as SW_ENABLE is set.
Note
Output control signal TM_CTRL_DQ
• If TM_CTRL_DQ = 0, the user program takes over the control and the user can directly set
the output PWM DQA via the control bit SET_DQA.
Canceling the output sequence
Deactivating the software enable (SW_ENABLE = 1 → 0) during the frequency output cancels
the current output sequence. The last cycle duration is not completed. STS_ENABLE and the
digital output PWM DQA are immediately reset to 0.
A renewed pulse output is only possible after a restart of the output sequence.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Setting and changing the output value (frequency)

You set the frequency with the OUTPUT_VALUE directly with the control program in the
control interface. The value is specified in the real format and the unit is always "Hz". The
possible range depends on the parameter "High-speed output (0.1 A)" as follows:
• High-speed pulse output deactivated
– Frequency (OUTPUT_VALUE) 0.1 Hz to 10,000 Hz
• High-speed pulse output activated
• Standard output (100 Hz output)
The new frequency is applied at the start of the next period. The new frequency has no
impact on the falling edge or the pulse-cycle ratio. However, the application can take up to
10 s depending on the previously set frequency.
Accuracy of the output frequency

The configured output frequency is output with a frequency-dependent accuracy at the
digital output PWM DQA. You can find an overview of the accuracy as a function of the
frequency used in the section Interconnection overview of outputs (Page 113).
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Parameters of the frequency output mode

Reaction to Reaction to CPU The parameter "Output substitute Output substitute value Output substi-
CPU STOP STOP value" generates a substitute value tute value
upon CPU STOP, which you can
define with the parameter "Substi-
tute value for pulse output (DQA)".
The parameter "Continue opera- Continue operation
tion" still generates the frequency
output signal upon CPU STOP,
which was generated before the
CPU STOP.
Substitute value If you have set the option "Output 0 0
for pulse output substitute value" for "Reaction to (use substitute value 0)
(DQA) CPU STOP", the parameter "Substi- 1
tute value for pulse output (DQA)" (use substitute value 1)
defines the substitute value to be
used for the pulse output of the
channel.
If you have set the option "Contin-
ue operation" for "Reaction to CPU
STOP", the parameter "Substitute
value for pulse output (DQA)"
cannot be selected.
Diagnostics No supply voltage The parameter "No supply voltage Deactivated Deactivated
interrupt L+ L+" activates the diagnostic inter-
rupt of the channel in the case of Activated
no supply voltage L+
Parameter High-speed output The "High-speed output (0.1 A)" Deactivated Deactivated
(0.1 A) parameter is used to specify The output supports frequencies
whether you want to use the se- of up to 10 kHz (load dependent)
lected pulse output as high-speed and currents of up to 0.5 A or
output. Requirement for this is frequencies of up to 100 Hz and
that the selected pulse output currents of up to 0.5 A depending
supports the operation as high- on the performance capability of
speed output. the selected output.
Activated
The output supports frequencies
of up to 100 kHz and currents of
up to 0.1 A.
Output format Defines the value for the frequen- 1 Hz 1 Hz
cy output in the field Interprets the value of the fre-
"OUTPUT_VALUE" of the control quency output in the field
duration of the channel. "OUTPUT_VALUE" as frequency
with the unit Hz.
Hardware Pulse output The parameter "Pulse output For B: Hardware
inputs / (DQA) (DQA)" is used to define the hard- X11, terminal 21 (DQ0 / %Q4.0): output for the
outputs ware output that you want to use 10 kHz / 0.5 A or 100 kHz / 0.1 A least signifi-
as pulse output channel. cant address
For B:
X11, terminal 31 (DQ8 / %Q5.0):
100 Hz / 0.5 A
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Output signals for frequency output mode
Output signal Meaning Value range

Continuous pulse current at the digital A pulse for the assigned frequency is output Continuous pulse current
output PWM DQA at the digital output PWM DQA.
3.2.1.3 Operating mode: PTO

The PTO (Pulse Train Output) mode can be used to output position information. This allows
you to, for example, control stepper motor drives or simulate an incremental encoder. The
frequency of the pulses represents the speed, while the number of pulses represents the
distance. The direction can also be specified by using two signals per channel. You can use a
PTO channel for setpoint output (drive) for an axis technology object.
PTO mode is divided into the following four signal types:
• PTO (pulse (A) and direction (B)): If you select the PTO signal type (pulse (A) and direction
(B)), an output (A) controls the pulses and an output (B) controls the direction. B is 'High'
(active) when pulses are generated in a negative direction. B is 'Low' (inactive) when
pulses are generated in a positive direction.
① Positive direction of rotation

② Negative direction of rotation
• PTO (Count Up (A) and Count Down (B)): When you select PTO when you select the PTO
signal type (count up (A) and count down (B)), an output (A) outputs pulses for positive
directions and another output (B) outputs pulses for negative directions.
① Positive direction of rotation

② Negative direction of rotation
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

• PTO (A, B phase-shifted): When you select the PTO signal type (A, B phase-shifted), the
two outputs pulses with the specified velocity, but phase-shifted by 90 degrees. This is a
1x combination in which the pulse shows the duration between two positive transitions of
A. In this case the direction is determined based on the output which first changes from 0
to 1. With positive direction, A preceeds B. With negative direction B preceeds A.
The number of generated pulses is based on the number of 0-to-1 transitions from phase
A. The phase ratio determines the direction of motion:
PTO (A, B phase-shifted)

Phase A precedes phase B (positive motion) Phase A follows phase B (negative motion)
Number of pulses Number of pulses
• PTO (A, B phase-shifted - quadruple): When you select the PTO signal type (A, B phase-
shifted, quadruple), the two outputs transmit pulses with the specified velocity, but
phase-shifted by 90 degrees. The quadruple signal type is a 4x configuration in which
each edge transition corresponds to an increment. Therefore, a full period of the signal A
contains four increments. In this way two outputs, each with 100 kHz signal frequency,
can be used to output a control signal that supplies 400,000 increments per second. The
direction is determined based on the output which first changes from 0 to 1. With positive
direction, A preceeds B. With negative direction B preceeds A.
PTO (A, B phase-shifted - quadruple)

Phase A precedes phase B (positive motion) Phase A follows phase B (negative motion)
Number of pulses Number of pulses
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Parameters of PTO mode

Diagnostics No supply voltage L+ With the parameter "No Deactivated Deactivated
interrupt supply voltage L+" you Activated
activate the diagnostic
interrupt of the channel
in the case of no supply
voltage L+.
Data exchange Reference speed With the parameter Floating-point number: 3,000.0 (rpm)
with the drive "Reference speed" you 1.0 bis 20,000.0 (rpm)
define the reference
value for the drive ve-
locity. The drive velocity
is defined as percent-
age value of the refer-
ence speed in the range
from -200 % to +200 %.
Maximum speed The parameter "Maxi- The supported value range de- 3,000.0 (rpm)
mum speed" is used to pends on:
define the required
maximum speed for • the signal type selected under
your application. "Operating mode"
• the value defined under "In-
crements per revolution"
• the value defined under "Ref-
erence speed"
The low limit of the value range
is:
• for the signal type "PTO (A, B
phase-shifted - quadruple)":
0.1 Hz * 60 s/min * 4) / In-
crements per revolution
• for the non-quadruple PTO
signal types: (0.1 Hz *
60 s/min) / increments per
revolution
The high limit of the value range
is the minimum of the value:
• 2 * reference speed
and of the value:
• for the signal type "PTO (A, B
phase-shifted - quadruple)":
(100 000 Hz * 60 s/min * 4) /
Increments per revolution
• for the non-quadruple PTO
signal types:
(100 000 Hz * 60 s/min) / Incr
ements per revolution
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Increments per revolu- The "Increments per 1 to 1,000,000 200
tion revolution" is used to
define the number of
increments per revolu-
tion (also in microstep
mode), which is re-
quired by the drive for a
revolution.
Fine resolution Bits in incr. actual value The parameter defines 0 0
(G1_XIST1) the number of bits for
the coding of the fine
resolution in the cur-
rent incremental value
of G1_XIST1.
Stop behavior Quick stop time The parameter "Quick 1 to 65 535 (ms) 1,000 (ms)
stop time" defines the
time interval it should
take for the drive to go
from the maximum
speed to a standstill
(OFF3).
Hardware in- Reference switch input The parameter "Refer- [Input address of the reference --
puts / ence switch input" switch DI]
outputs defines the hardware
input of the reference
switch.
Edge selection reference The parameter "Edge Rising edge Rising edge
switch selection reference Falling edge
switch" defines the
edge type which is to
be detected by the
reference switch.
Measuring input The parameter "Measur- [Input address of the measuring --
ing input" defines the input DI]
hardware input of the
measuring input.
"Drive ready" input The parameter ""Drive [Input addresses of the inputs --
ready" input" defines "Drive ready" DIn]
the hardware input of
the input "Drive ready".
Pulse output A The parameter "Pulse [Output address DQ for PTO sig- grayed out
for "PTO (pulse (A) and output A" defines the nal A (output frequency Read only access
direction (B))" hardware output for 100 kHz)] to the parameter
PTO signal A.
Direction output B The parameter "Direc- [Output address 1 of the DQ for Qn (output fre-
for "PTO (pulse (A) and tion output B" defines PTO signal B (output frequency quency 100 kHz)
direction B))" the hardware output for 100 kHz)]
PTO signal B. [Output address 2 of the DQ for
PTO signal B (output frequen-
cy 100 Hz)]
Clock generator forward The "Clock generator [Output address DQ for PTO sig- grayed out
(A) forward (A)" parameter nal A (output frequency Read only access
for "PTO (Count up (A) defines the hardware 100 kHz)] to the parameter
and Count down (B))" output for PTO signal A.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Clock generator back- The "Clock generator [Output address 1 of the DQ for grayed out
ward (B) backward (B)" parame- PTO signal B (output frequency Read only access
for "PTO (Count up (A) ter defines the hard- 100 kHz)] to the parameter
and Count down (B))" ware output for PTO
signal B.
Phase A The "Clock generator [Output address of the DQ for grayed out
for "PTO (A, B phase- output (A)" parameter PTO signal A (output frequency Read only access
shifted)" and "PTO (A, B defines the hardware 100 kHz)] to the parameter
phase-shifted, quadru- output for PTO signal A.
ple)"
Phase B The "Clock generator [Output address 1 of the DQ for grayed out
for "PTO (A, B phase- output (B)" parameter PTO signal B (output frequency Read only access
shifted)" and "PTO (A, B defines the hardware 100 kHz)] to the parameter
phase-shifted, quadru- output for PTO signal B.
ple)"
Drive enable output The parameter "Drive [Output addresses of the enable --
enable output" defines output DQn (output frequency
the hardware output of 100 Hz)
the output "Drive ena-
ble output".
Reaction of the PTO channel to CPU STOP

The PTO channel reacts to a change to CPU STOP with the removal of the drive enable (to the
extent that the drive enable output is configured) and with output of the velocity setpoint 0
at the hardware outputs configured for the signal tracks A and B. The CPU STOP reaction of
the PTO channels cannot be configured.
Note
Reaction to CPU STOP
Upon CPU STOP, the hardware outputs assigned for the PTO outputs A and B can switch to
signal state 'High' (1) and/or remain there. A switching/remaining of the two hardware
outputs to/in signal level 'Low' (0) is not guaranteed.
Controller
The pulse output channels for the four modes of the pulse generators (PTO) are controlled
using Motion Control via the technology objects TO_SpeedAxis, TO_PositioningAxis and
TO_SynchronousAxis. With these operating modes, the control and feedback interface of the
channels is a partial implementation of the PROFIdrive interface "Telegram 3". For a detailed
description of the use of motion control and its configuration, refer to the S7-1500/S7-1500T
Motion Control function manual
(https://support.industry.siemens.com/cs/ww/en/view/109766459) and the STEP 7 online
help.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

3.2.2 Functions
3.2.2.1 Function: High-speed output

The function "High-speed output (0.1 A)" enhances the signal clock of the digital outputs
(DQ0 to DQ7). Less delay, fluctuation, jitter, and shorter rise and fall times, occur at the
switching edges.
The function "High-speed output (0.1 A)" is suited for generating pulse signals in a more
precise clock, but provides a lower maximum load current.
For the PWM and frequency output modes, select the high-speed output of the channel in
STEP 7 (TIA Portal). You can also change the parameter assignment during runtime with the
help of the program via the data record.
High-speed pulse output (high-speed output) is available for the following operating modes:
• PWM
• Frequency output
• PTO (the pulse outputs for the PTO mode are always "High-speed output (0.1 A)")
High-speed output
Minimum Maximum
High-speed output High-speed output High-speed output High-speed output
deactivated activated deactivated activated
Pulse duration 20 µs with load 2 µs 1)
> 0.1 A 1) 10,000,000 μs (10 s)
40 µs with load
≥ 2 mA 1)
Period duration 100 μs 2) 10 μs
Frequency 0.1 Hz 10 kHz 2) 100 kHz
1) A lower value is theoretically possible but, depending on the connected load, the output voltage can no longer be output
as complete rectangular pulse
2) Load dependent
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

3.2.2.2 Function: Direct control of the pulse output (DQA)
Direct control of the pulse output (DQA)

In the modes "Pulse width modulation PWM" and "Frequency output", you can set the pulse
output (DQA) of a pulse generator directly via the control program. Select the function for the
DQ direct control by deleting the output control bit of the PWM channel (TM_CTRL_DQ = 0) in
the control interface.
The direct control of the pulse output (DQA) can be helpful when commissioning a control
system for automation.
When you select the direct control of the pulse output (DQA) during a pulse output sequence,
the sequence continues to run in the background so that the output sequence is continued as
soon as the channel takes control again (by setting TM_CTRL_DQ = 1).
You assign the status of the pulse output (DQA) using the control bits SET_DQA.
When you set TM_CTRL_DQ = 1, you deselect the direct control of the pulse output (DQA) and
the channel takes over the processing. If the output sequence is still running (STS_ENABLE
still active), the PWM channel takes over the control of the output again. If TM_CTRL_DQ = 1
and STS_ENABLE is not active, the module's channel also takes over processing, but then
outputs "0".
Note
Output signal TM_CTRL_DQ of the PWM channel
• If TM_CTRL_DQ = 0, the user program takes over the control and the user can set the PWM
DQA directly using the control bits SET_DQA.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

3.2.3 Configuring the PWM and frequency output modes
3.2.3.1 Assignment of the control interface

The user program influences the behavior of the PWM channel through the control interface.
Control interface per channel

The following table shows the control interface assignment:
Table 3- 5 Assignment of the control interface
7 6 5 4 3 2 1 0
Byte 0 OUTPUT_VALUE
Byte 1 PWM: On-load factor * (Int)
Byte 2 In PWM mode, the on-load factor uses only the two least significant bytes (byte 2 and byte 3).
Byte 3 Frequency output: Frequency in Hz (Real)
Byte 4 SLOT
Byte 5
Byte 6
Byte 7
Byte 8 Reserved = 0 MODE_SLO LD_SLOT
T Specifies the meaning of the value under SLOT
0000: No action
0001: Period duration (PWM)
0010 to 1111: Reserved
Byte 9 Reserved = 0 Reserved Reserved SET_DQA Reserved TM_CTRL_D SW_ENAB
=0 =0 =0 Q LE
Byte 10 Reserved = 0 RES_ERRO
R
Byte 11 Reserved = 0
* The terms "On-load factor", "Pulse duty factor" and "Duty factor" can be used synonymously
Use case
1. Transfer the control for the output to the PWM channel.
2. Set SW_ENABLE, in order that the output can be started.
3. Set the required on-load factor using OUTPUT_VALUE.
4. If necessary, change the period duration (cyclic or once). If you do not change the value,
the period duration from the hardware configuration will be used.
5. With TM CTRL_DQ and SET_DQ set the output from the user program permanently to 1 or
0.
6. Acknowledge any errors that occur using RES_ERROR.
Additional parameters for the output sequence are defined before the start of an output
sequence.
The data record of the parameter assignment is changed in the device configuration in STEP 7
(TIA Portal) or through WRREC execution.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Control interface parameters
OUTPUT_VALUE
The interpretation of the value OUTPUT_VALUE depends on the set operating mode.
OUTPUT_VALUE is always updated. When an invalid value is detected (outside the permissible
range), the error memory bit ERR_OUT_VAL is set until a valid value is detected. During the
error condition the invalid value is ignored and the PWM channel continues with the last valid
OUTPUT_VALUE. Note that, in the frequency output mode, it is also possible that no last valid
value is available. In this case the pulse output returns the value 0, i.e. there is no pulse
output.
Please note that the on-load factor is not checked in PWM mode. If the on-load factor is
greater than the format permits, the PWM channel uses a ratio of 100 %. 0 % in effect for
values < 0.
SLOT, MODE_SLOT and LD_SLOT

Use these control interface fields if you occasionally change the period duration in PWM
mode before the start of the output sequence or during operation. You can find a description
of the interaction between SLOT, MODE_SLOT and LD_SLOT under Handling the SLOT
parameter (control interface) (Page 74)
SW_ENABLE
If 0 → 1, activate the output sequence.
TM_CTRL_DQ
• If 1, the output is controlled by the PWM channel and generates the pulse sequences
• If 0, the output is controlled directly by the program using the SET_DQA assignments
SET_DQA
• If 1, set the output A to 1, if TM_CTRL_DQ is inactive
• If 0, set the output A to 0, if TM_CTRL_DQ is inactive
RES_ERROR
Resetting the error bit memory ERR_LD in the feedback interface
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

3.2.3.2 Handling the SLOT parameter (control interface)
SLOT and MODE_SLOT

SLOT has the following operating modes.
• Mode for individual update (MODE_SLOT = 0)
Use this mode if you occasionally change the specific parameters (such as period duration)
before the start of the output sequence or during operation.
– The value in SLOT is the always applied when the value changes in LD_SLOT.
– The acknowledgment bit STS_LD_SLOT in the feedback interface is switched.
– The value of LD_SLOT defines the interpretation of SLOT (see the table below
"Interpretation of the SLOT parameter value").
– If the LD_SLOT value is invalid, the setting of the feedback bit ERR_LD indicates a
parameter assignment error. The user has to reset the error using the control bit
RES_ERROR and enable the SLOT parameter again for the next value.
– Changes made in this mode can be read back by the channel in the parameter
assignment data record.
– The current changes are entered in the data record 128 during the reading back of the
parameter assignment data with RDREC from the user program. These changes are lost
during a warm restart of the CPU.
• Mode for cyclic updating (MODE_SLOT = 1)
Use this operating mode if the program is to continuously control another parameter in
addition to the main parameter to be controlled.
– The value in SLOT is transferred with each module cycle.
– No acknowledgment bit is available.
– The value of LD_SLOT defines the interpretation of SLOT (see the table below
"Interpretation of the SLOT parameter value").
– If the value in SLOT is not valid, the error ERR_SLOT_VAL occurs. The error is
automatically reset as soon as a valid value is loaded.
– In this mode the value in the parameter assignment data record is not updated. If
LD_SLOT is changed in this mode, the last value applied from LD_SLOT is valid.
– The mode for permanent updating can be stopped by setting LD_SLOT to 0 and
MODE_SLOT to 0. By stopping the mode for permanent updating the changes made at
the parameters during the permanent updating are retained until the next changes via
SLOT (cyclic or once) or until the next STOP-RUN transition.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Interpretation of the SLOT parameter value

The value written in the SLOT parameter is displayed as in the table below depending on the
LD_SLOT value and the mode is interpreted.
LD_SLOT Meaning of SLOT value Valid modes for using the SLOT value SLOT data type
0 No action / idling All operating modes
1 Period duration PWM UDInt
Permissible value range*:
Minimum value: 10 µs, 100 µs or
10 000 µs (10 ms)
Maximum value: 10 000 000 µs
(10 s)
* The permissible value range depends on the selected hardware output and sometimes on the high-speed mode (high-
speed/standard).
Individual updating of the parameter 'Period duration'

The following representation illustrates the workflow of the individual updating of the
parameter 'Period duration'. The described workflow principle can also be used on the
channels of the high-speed counters.
① User writes the first parameter in SLOT and specifies the first parameter in LD_SLOT
② Technology channel applies the first parameter and indicates the application by change in the
bit STS_LD_SLOT
③ User writes the second parameter in SLOT and specifies the second parameter in LD_SLOT
④ Technology channel applies the second parameter and indicates the application by change in
the bit STS_LD_SLOT
⑤ User writes 0 in LD_SLOT, (SLOT inactive)
⑥ Technology channels answers change in LD_SLOT with a change in STS_LD_SLOT
Figure 3-4 Individual updating
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Note that the following requirements apply to the representation shown above:
• The value MODE_SLOT must be set to 0
• Errors or invalid values are shown in the feedback bit ERR_SLOT_VAL
• The error must be acknowledged
If MODE_SLOT 0 = 1, the following applies (for PWM mode only):
• The value in SLOT is continuously evaluated according to LD_SLOT
• STS_LD_SLOT does not change
• An error is automatically reset as soon as a valid value is set in SLOT
Cyclic updating of the parameter 'Period duration'

The following representation illustrates the execution of the cyclic updating of the parameter
'Period duration'. The described workflow principle can also be used on the channels of the
high-speed counters.
① • User sets SLOT to the required parameter

• User sets MODE_SLOT to 1
• User sets LD_SLOT to the required value (1 for period duration)
② User changes value in SLOT continuously and technology channel evaluates continuously
③ Value in SLOT exceeds permitted limit, technology channel shows this ERR_SLOT_VAL and con-
tinues working with the last valid value
④ Value in SLOT again in permitted range, technology channel resets ERR_SLOT_VAL inde-
pendently and continues working with the value in SLOT
⑤ User resets LD_SLOT and MODE_SLOT, technology channel continues to work with last value
Figure 3-5 Cyclic updating
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

3.2.3.3 Assignment of the feedback interface

The user program receives current values and status information from the pulse width
modulation via the feedback interface.
Feedback interface per channel

The following table shows the feedback interface assignment:
Table 3- 6 Assignment of the feedback interface
7 6 5 4 3 2 1 0
Byte 0 ERR_SLOT_ ERR_OUT_V Reserved Reserved ERR_PULSE ERR_LD Reserved ERR_PWR
VAL AL =0 =0 Error during =0 missing
The valid in The value in loading via supply
SLOT is OUTPUT_VA control voltage L+
invalid LUE is inva- interface
lid
Byte 1 Reserved = 0 STS_SW_EN STS_READY Reserved STS_LD_SLO Reserved = 0
ABLE Channel =0 T
SW_ENABLE parameters Load
detected or assigned prompt
feedback and ready detected
status and execut-
SW_ENABLE ed for Slot
(toggling)
Byte 2 Reserved = 0 Reserved Reserved Reserved STS_DQA STS_ENAB
=0 =0 =0 LE
Byte 3 Reserved = 0 Reserved = 0
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Feedback parameters
Table 3- 7 Status feedback
Feedback parameters Meaning Value range

STS_READY The channel is correctly configured, is operating 0: Not ready to run
and supplying valid data. 1: Ready to run
STS_SW_ENABLE Current status of the software enable 0: SW_ENABLE is not active
1: SW_ENABLE detected
STS_LD_SLOT Acknowledgment bit for each action of the SLOT Each switching of this bit represents
in the SLOT mode for individual updating (for a a successful LD_SLOT action.
description of the acknowledgment bit, refer to
the section Handling the SLOT parameter (control
interface) (Page 74)).
STS_ENABLE The output sequence is active. 0: No output sequence running
(STS_ENABLE always depends on the status of the 1: Output sequence running
software enable STS_SW_ENABLE ab)
STS_DQA State of the pulse output (DQA) 0: Pulse output is not active
1: Pulse output is active
Feedback parameters Meaning Value range

ERR_PWR No supply voltage L+ 0: No error
1: Error
ERR_LD Error during loading of a parameter value in the 0: No error
operating mode for individual updating 1: Error
ERR_OUT_VAL The value in OUTPUT_VALUE is invalid 0: No error
1: Error
ERR_SLOT_VAL The value in SLOT is invalid, where MODE_SLOT = 1 0: No error
(permanent updating) 1: Error
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring 4
4.1 Supply voltage
24 V DC supply voltage (X80)

The connecting plug for the supply voltage is plugged in when the CPU ships from the
factory.
The following table shows the signal names and the descriptions of the pin assignment of
the 24 V DC supply voltage.
Table 4- 1 Pin assignment 24 V DC supply voltage
View Signal name 1) Description

Connector
1 1L+ + 24 V DC of the supply voltage
2 1M Ground of the supply voltage
3 2M Ground of the supply voltage for loop-through 2)
4 2L+ + 24 V DC of the supply voltage for loop-through 2)
1) 1L+ and 2L+ as well as 1M and 2M are bridged internally

2) Maximum 10 A permitted
If the CPU is supplied by a system power supply, it is not necessary to connect the 24 V
supply.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
4.2 PROFINET interfaces
PROFINET interface X1 with 2-port switch (X1 P1 R and X1 P2 R)

The assignment corresponds to the Ethernet standard for an RJ45 plug.
• When autonegotiation is deactivated, the RJ45 socket is allocated as a switch (MDI-X).
• When autonegotiation is activated, autocrossing is in effect and the RJ45 socket is
allocated either as data terminal equipment (MDI) or a switch (MDI-X).
Figure 4-1 PROFINET ports
Note
You need a screwdriver (max. blade width 2.5 mm) to remove the PROFINET plug.
Remove display
You can find a description of how to remove and replace the display in the S7-1500,
ET 200MP (http://support.automation.siemens.com/WW/view/en/59191792) system manual.
Reference
For more information on "Wiring the CPU" and "Accessories/spare parts", refer to the S7-1500,
ET 200MP system manual (http://support.automation.siemens.com/WW/view/en/59191792).
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Assignment of the MAC addresses

The CPU 1512C-1 PN has a PROFINET interface with two ports. The PROFINET interface itself
has a MAC address, and each of the two PROFINET ports has its own MAC address. The
CPU 1512C-1 PN therefore has three MAC addresses in total.
The MAC addresses of the PROFINET ports are needed for the LLDP protocol, for example for
the neighborhood discovery function.
The number range of the MAC addresses is continuous. The first and last MAC address are
lasered on the rating plate on the right side of each CPU 1512C-1 PN.
The table below shows how the MAC addresses are assigned.
Table 4- 2 Assignment of the MAC addresses
Assignment Labeling
MAC address 1 PROFINET interface X1 • Front, lasered
(visible in STEP 7 for accessible devices)
• Right side, lasered
(start of number range)
MAC address 2 Port X1 P1 R (required for LLDP, for • Front and right side, not lasered
example)
MAC address 3 Port X1 P2 R (required for LLDP, for • Front, not lasered
example)
• Right side, lasered
(end of number range)
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
4.3 Terminal and block diagrams
4.3.1 Block diagram of the CPU part
Block diagram
The following figure shows the block diagram of the CPU part.
① CPU with control and operating mode buttons PN X1 P1 R PROFINET interface X1 port 1
② Display PN X1 P2 R PROFINET interface X1 Port 2
③ Electronics L+ 24 V DC supply voltage
④ Interface to on-board I/O M Ground
⑤ Interfaces to the backplane bus SF STOP ACTIVE LED (yellow)
⑥ Backplane bus interface R/S RUN/STOP LED (yellow/green)
⑦ Internal supply voltage ER ERROR LED (red)
⑧ 2-port switch MT MAINT LED (yellow)
X50 SIMATIC memory card X1 P1, X1 P2 Link TX/RX LED
X80 24 V DC Infeed of supply voltage
Figure 4-2 Block diagram of the CPU part
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
4.3.2 Terminal and block diagram of the analog on-board I/O

This section contains the block diagram of the analog on-board I/O (X10) and various wiring
options.
For information on wiring the front connector, establishing the cable shield, etc., refer to the
S7-1500, ET 200MP (http://support.automation.siemens.com/WW/view/en/59191792) system
manual.
Note
You can use and combine the different wiring options for all channels. Note, however, that
unneeded terminals of an analog input channel must not be connected.
Definition
Un+/Un- Voltage input channel n (voltage only)

Mn+/Mn- Measuring input channel n (only resistance-type transmitters or thermal
resistors (RTD))
In+/In- Current input channel n (current only)
Ic n+/Ic n- Current output for RTD, channel n
QVn Voltage output channel
QIn Current output channel
MANA Reference potential of the analog circuit
CHx Channel or display of the channel status
Infeed element
The infeed element is inserted on the front connector and serves to shield the analog on-
board I/O.
Note
The analog on-board I/O does not require power to be supplied by the infeed element. The
infeed element is, however, necessary for shielding.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Wiring: Voltage measurement

The following figure shows the terminal assignment for voltage measurement at the
channels available for this measurement type (channels 0 to 3).
① Analog-to-digital converter (ADC)

② LED interface
③ Infeed element (for shielding only)
④ Digital-to-analog converter (DAC)
⑤ Equipotential bonding cable (optional)
⑥ Voltage measurement
Figure 4-3 Block diagram and terminal assignment for voltage measurement
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Wiring: 4-wire measuring transducer for current measurement

The following figure shows the terminal assignment for current measurement with 4-wire
measuring transducer at the channels available for this measurement type (channels 0 to 3).

② LED interface
⑥ Connector 4-wire measuring transducer
Figure 4-4 Block diagram and terminal assignment for current measurement with 4-wire measuring
transducer
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Wiring: 2-wire measuring transducer for current measurement

Alternatively to connecting a 4-wire transducer, you can also connect 2-wire transducers to
channels 0 to 3. An external 24 V power supply is required to connect a 2-wire transducer to
the analog on-board I/O of the compact CPU. Feed this voltage short-circuit proof to the 2-
wire transducer. Use a fuse to protect the power supply unit.
NOTICE
Defective transducers
Note that the analog input of the transducer is not protected against destruction in the
event of a defect (short circuit). Take the necessary precautions against such cases.
The figure below shows an example of the connection of a 2-wire transducer to channel 0
(CH0) of the analog on-board I/O.
① Sensor (e.g. pressure gauge)

② 2-wire transducer
③ Fuse
④ Equipotential bonding cable (optional)
Figure 4-5 2-wire transducer at channel 0
Use the measurement type "Current (4-wire transducer)" and the measuring range
4 to 20 mA for the parameter assignment of the 2 wire transducer in STEP 7 (TIA Portal).
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Wiring: 4-wire connection of resistance-type sensors or thermal resistors (RTD)

The following figure shows the terminal assignment for 4-wire connection of resistance-type
sensors or thermal resistors at the channel available for this (channel 4).

② LED interface
⑥ 4-wire connection
Figure 4-6 Block diagram and terminal assignment for 4-wire connection
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring

Note
3-wire connection
Note that line resistances are not compensated with a 3-wire connection.

② LED interface
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring

Note
2-wire connection
Note that line resistances are not compensated with a 2-wire connection.

② LED interface
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Wiring: Voltage output

The figure below shows the terminal assignment for the wiring of the voltage outputs with:
• 2-wire connection, no compensation for line resistances.

② LED interface
⑤ 2-wire connection CH0 and CH1
Figure 4-9 Block diagram and terminal assignment for voltage output
Note
MANA on terminals 19 and 20 is equivalent.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Wiring: Current output

The following figure shows an example of the terminal assignment for wiring current
outputs.

② LED interface
⑤ Current output CH0 and CH1
Figure 4-10 Block diagram and terminal assignment for current output
Note
MANA on terminals 19 and 20 is equivalent.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
4.3.3 Terminal and block diagram of the digital on-board I/O

This section contains the block diagram of the digital on-board I/O (X11 and X12) with
standard inputs and outputs and the encoder supply, as well as the rules for the correct
wiring of the ground connections.
For information on wiring the front connector, establishing the cable shield, etc., refer to the
S7-1500, ET 200MP (http://support.automation.siemens.com/WW/view/en/59191792) system
manual.
Infeed element
The infeed element is inserted on the front connector and serves to shield the digital on-
board I/O.
Note
The digital on-board I/O is supplied via the front connector terminals and therefore does not
require power to be supplied by the infeed element. The infeed element is, however,
necessary for shielding.
Output driver
The digital onboard I/O uses the following output drivers:
• X11, DQ0 to DQ7: Push-pull stage and freewheeling diode
• X11, DQ8 to DQ15: High-side switch and freewheeling diode
• X12 DQ0 to DQ7: High-side switch without freewheeling diode
• X12 DQ8 to DQ15: High-side switch without freewheeling diode
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Block diagram and terminal assignment X11

The figure below shows you how to connect the digital on-board I/O X11 and the assignment
of the channels to the addresses (input byte a and b, output byte c and d).
① Encoder supply for the digital inputs

② CPU interface
xL+ Connection for 24 V DC supply voltage
xM Connection for ground
CHx Channel or channel status LED (green)
RUN Status display LED (green)
ERROR Error display LED (red)
PWR POWER supply voltage LED (green)
Figure 4-11 Block diagram and terminal assignment of the digital on-board I/O X11
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Block diagram and terminal assignment X12

The figure below shows you how to connect the digital on-board I/O X12 and the assignment
of the channels to the addresses (input byte a and b, output byte c and d).
① Encoder supply for the digital inputs

② CPU interface
xL+ Connection for 24 V DC supply voltage
xM Connection for ground
CHx Channel or channel status LED (green)
RUN Status display LED (green)
ERROR Error display LED (red)
PWR POWER supply voltage LED (green)
Figure 4-12 Block diagram and terminal assignment of the digital on-board I/O X12
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Supply voltage using the digital on-board I/O X11 as an example

The inputs and outputs of the digital on-board I/O are divided into two load groups, which are
supplied with 24 V DC.
The digital inputs DI0 to DI15 form a load group and are supplied via the connections 1L+
(terminal 19) and 1M (terminal 20).
The digital outputs DQ0 to DQ7 are supplied via the connection 2L+ (terminal 29). The digital
outputs DQ8 to DQ15 are supplied via the connection 3L+ (terminal 39). Please note that the
digital outputs DQ0 to DQ15 only have a common ground. In each case, they are led through
to the two terminals 30 and 40 (2M/3M) and bridged in the module. The digital outputs form
a common load group.
NOTICE
Polarity reversal of the supply voltage
An internal protective circuit protects the digital on-board I/O against destruction if the
polarity of the supply voltage is reversed. In the case of polarity reversal of the supply
voltage, however, unexpected states can occur at the digital outputs.
Response of the digital outputs to a wire break at ground connection of the outputs
Due to the characteristics of the output driver used in the module, approx. 25 mA supply
current flows out through the outputs via a parasitic diode in the event of a ground wire
break. This behavior can lead to non-set outputs also carrying high levels and emitting up to
25 mA output current. Depending on the type of load, 25 mA can be sufficient to control the
load with high level. To prevent unintended switching of the digital outputs in the event of a
ground wire break, follow these steps:
Wire to ground twice

Connect ground to terminal 30 and to terminal 40.
1. Route the first ground connection from terminal 30 to the central ground connection of
the plant.
2. Route the second ground connection from terminal 40 to the central ground connection of
the plant.
If terminal 30 or 40 are interrupted by a ground wire break, the outputs will continue to be
supplied via the second, intact ground connection.
WARNING
Wire break at ground connection
Never bridge from terminal 30 to terminal 40 in the front connector and never lead only
one wire to the central ground connection.
Connect terminal 30 and terminal 40 to a common ground point.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
As a supplement to the block diagram and terminal assignment, the following figure shows
the correct wiring of the outputs in order to prevent switching of the outputs in the event of
a ground wire break.
Figure 4-13 Correct wiring using the digital on-board I/O X11 as an example
The ground is supplied with a first cable from the central terminal block to terminal 30 of the
module and additionally with a second cable also from the central terminal block to
terminal 40 of the module.
At the digital outputs, each of the ground connections of the loads is connected with a
separate cable for each load to the central terminal block.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
The figure below shows the current flow with correct wiring.
Figure 4-14 Current flow with correct wiring using the digital on-board I/O X11 as an example
With correct wiring, the supply current flows from the power supply 2L+ via terminal 29 to
the module. In the module, the current flows via the output driver and exits the module via
terminal 40.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
The figure below shows the reaction to interruption of the first ground cable.
Figure 4-15 Interruption of the first ground cable using the digital on-board I/O X11 as an example
If a wire break occurs on the first ground cable from the central terminal block to terminal 30,
the module can continue to operate without restrictions, as it is still connected to the ground
via the second cable from the central terminal block to terminal 40.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
The figure below shows the reaction to interruption of the second ground cable.
Figure 4-16 Interruption of the second ground cable using the digital on-board I/O X11 as an example
If a wire break occurs on the second ground cable from the central block terminal to
terminal 30, the module can continue to operate without restrictions, as it is still connected
to the ground via the first cable from the central terminal block to terminal 40.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
The figure below shows the current flow upon interruption of both ground cables.
Figure 4-17 Current flow upon interruption of both ground cables using the digital on-board I/O X11
as an example
If a wire break occurs on the first and on the second ground cable from the central terminal
block to the terminals 30 and 40 of the module, a malfunction occurs on the module. Both
ground connections of the module are interrupted.
The supply current flows from the power supply 2L+ via terminal 29 to the module. In the
module, the current flows via the output driver into the parasitic diode and exits the module
via the output terminal, e.g. as shown in the figure via terminal 27. The supply current
therefore flows via the connected load. The internal supply current is typically 25 mA.
WARNING
Interruption of both ground cables
If the ground terminals 30 and 40 are interrupted, the following incorrect response can
occur:
The activated outputs, which are switched to high, start to switch back and forth between
high and low. If the load connected at the output is sufficiently small, the output is
continuously activated.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Faulty wiring
The following figure shows faulty wiring, which has a bridge on the front connector.
Figure 4-18 Faulty wiring using the digital on-board I/O X11 as an example: Bridge
Terminals 30 and 40 are connected in the front connector and only routed with one cable to
the central terminal block. If this cable breaks, terminals 30 and 40 are no longer connected
to the ground. The module's supply current flows out via the output terminal.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
The figure below shows the current flow when the ground connections of the loads and the
ground connection of terminal 30 are routed with a common cable to the central terminal
block.
① Ground connections of other plant parts that can also carry large currents.
Figure 4-19 Faulty wiring using the digital on-board I/O X11 as an example: Common cable
If a break occurs in the common cable, the current of the outputs flows via terminal 30 to the
module and via terminal 40 to the central terminal block. The current flows via the module.
WARNING
Current flow with faulty wiring
If a break occurs in the common cable, the current can be very high, depending on the
plant, and lead to the destruction of the module.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
The figure below shows the current flow with correct wiring when a potential difference exits
between the grounding points.
① Grounding point functional earth 1 (FE 1)

② Grounding point functional earth 2 (FE 2)
Figure 4-20 Potential difference using the digital on-board I/O X11 as an example
Equipotential bonding occurs via terminals 30 and 40. When a potential difference exists
between the grounding points FE1 and FE2, the compensating current flows via terminals 30
and 40.
WARNING
Current flow with faulty wiring
In the event of a potential difference, the current can be very high, depending on the
potential conditions, and lead to the destruction of the module.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Response of the digital outputs to a wire break at ground connection of the outputs (X12)
Due to the design of the module, in contrast to the digital onboard I/O X12, no supply current
is discharged via the outputs if ground is interrupted in the digital onboard I/O X12, in
contrast to the digital onboard I/O X11.
Figure 4-21 Internal circuitry of the digital onboard I/O X12
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Input filter for digital inputs

To suppress disruptions, you can configure an input delay for the digital inputs.
You can specify the following values for the input delay:
• None
• 0.05 ms
• 0.1 ms
• 0.4 ms
• 1.6 ms
• 3.2 ms (default setting)
• 12.8 ms
• 20 ms
Note
Shielding
If you use standard digital inputs with "None" set as the input delay, you must use shielded
cables. Shielding and the infeed element are recommended for use of standard digital inputs
starting from an input delay of 0.05 ms but are not absolutely necessary.
4.3.4 Addresses of the high-speed counters

You connect the encoder signals, the digital input and output signals and the encoder
supplies to the two 40-pin front connectors of the digital on-board I/O. For information on
wiring the front connectors, establishing the cable shields, etc., refer to the S7-1500, ET
200MP (http://support.automation.siemens.com/WW/view/en/59191792) system manual.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Encoder signals
The 24 V encoder signals are designated with letters A, B and N. You can connect the
following encoder types:
• Incremental encoder with signal N:
Signals A, B and N are connected using the correspondingly marked connections. Signals
A and B are the two incremental signals, phase-shifted by 90°. N is the zero mark signal
that supplies a pulse per revolution.
• Incremental encoder without signal N:
Signals A and B are connected using the correspondingly marked connections. Signals A
and B are the two incremental signals, phase-shifted by 90°.
• Pulse encoder without direction signal:
The count signal is connected to the A connection.
• Pulse encoder with direction signal:
The count signal is connected to the A connection. The direction signal is connected to the
B connection.
• Pulse encoder with up/down count signal:
The up count signal is connected to the A connection. The down count signal is connected
to the B connection.
You can connect the following encoders or sensors to the A, B and N inputs:
• Switching to P potential:
The encoder or sensor switches the A, B and N inputs to 24 V DC.
Note
External load resistance
Note that, depending on the characteristics of the signal source, effective load and height
of the signal frequency, you may possibly require an external load resistance to limit the
fall time of the signal from high level to low level.
The specifications/technical data of the signal source (e.g. sensor) are decisive for the
configuration of such a load resistance.
• Push-pull:
The encoder or sensor switches the A, B and N inputs alternately to 24 V DC and to ground
M.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Digital inputs HSC DI0 and HSC DI1

The digital inputs are logically assigned to the high-speed counters (HSC). For information on
the possible assignment of the on-board I/O inputs to the high-speed counters, refer to table
Interconnection overview of the inputs (Page 111). Up to two digital inputs are available for
each high-speed counter (HSC DI0 and HSC DI1). You can use the digital inputs for the gate
control (Gate), synchronization (Sync) and Capture functions. Alternatively, you can use one
or more digital inputs as standard digital inputs without the functions mentioned and read
the signal state of the respective digital input using the feedback interface.
Digital inputs that you do not use for high-speed counting are available for use as standard
DIs.
Input addresses of the high-speed counters

You set the digital input addresses used by the high-speed counters (HSC) and the
assignment of A/B/N, DI0, DI1 and DQ1 signals in STEP 7 (TIA Portal). You can enable and
configure each HSC when you configure the compact CPU.
The compact CPU assigns the input addresses for the A/B/N signals automatically according to
the configuration.
You specify the input addresses for DI0 and DI1 according to the table Interconnection
overview of the inputs (Page 111). The interconnection produces a direct connection of the
HSC to an input of the on-board I/O. The high-speed counter then uses this input as HSC DI0
or HSC DI1 ([DI] symbol). The [DI] symbols in the table identify the input addresses for
HSC DI0 and HSC DI1 that are offered for selection in the hardware configuration.
Assignment of HSC addresses of inputs

You can find an overview of the options for interconnecting the inputs of the front
connectors X11 and X12 in the section Interconnection overview of the inputs (Page 111).
Note
HSC compatibility mode
The displayed interconnection options in the section Interconnection overview of the inputs
(Page 111) assume that the "Front connector assignment like CPU 1511C" option is disabled.
If the option is enabled, the input signals are interconnected the same way as for the
CPU 1511C-1 PN. In this case, the interconnection options of the CPU 1511C-1 PN manual
apply.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Digital outputs HSC-DQ0 and HSC-DQ1

Two digital outputs are available for each high-speed counter. Digital output HSC-DQ0 is a
logical output that cannot be interconnected with a digital output of the on-board I/O. Digital
output HSC-DQ0 can only be used via the user program. HSC-DQ1 is a physical output that
can be interconnected with a digital output of the on-board I/O.
The digital outputs are 24 V sourcing output switches relative to M and can be loaded with a
rated load current of 0.1 A. The outputs used as standard outputs have a rated load current of
0.5 A. The digital outputs are protected against overload and short-circuit.
Note
It is possible to directly connect relays and contactors without external wiring. For
information on the maximum possible operating frequencies and the inductance values of
the inductive loads at the digital outputs, refer to the Technical specifications section.
The section Interconnection overview of outputs (Page 113) provides an overview of which
digital outputs you can interconnect to which high-speed counters. Digital outputs to which
no high-speed counter is interconnected can be used as standard outputs. The maximum
output delay of each digital output used as standard output is 500 µs.
Shielding
Note
When you use digital inputs/outputs with technology functions, i.e. interconnect high-speed
counters with the inputs/outputs, you must use shielded cables and the infeed element for
shielding.
Reference
For more information on configuring the inputs of the high-speed counters, refer to the
S7-1500, ET 200MP, ET 200SP Counting, measurement and position detection
(http://support.automation.siemens.com/WW/view/en/59709820) function manual and the
STEP 7 online help.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
4.3.5 Addresses of the pulse generators in the Pulse Width Modulation (PWM)
and Frequency Output modes
Configuring the outputs as pulse generators

If you configure the memory of the outputs of the CPU as pulse generators (for PWM or PTO),
the corresponding addresses of the outputs are removed from the memory. You cannot use
the addresses of the outputs for other purposes in your user program. When your user
program writes a value to an output that you are using as a pulse generator, the CPU does
not write this value to the physical output.
Assignment of the PWM addresses of the outputs

digital outputs you can interconnect to which PWM channels.
Note
The digital inputs and outputs assigned to PWM and PTO cannot be forced.
You assign the digital inputs and outputs to the pulse duration modulation (PWM) and the
pulse train output (PTO) during the device configuration. If you assign digital inputs and
outputs to these functions, the values of the addresses of the assigned digital inputs and
outputs cannot be changed by the function for forcing in the watch table. Instead, you can
force the output bit TM_CTRL_DQ to 0 and switch the output on or off with the bit SET_DQA
(relevant for the PWM and Frequency Output modes).
For more information on forcing inputs and outputs, refer to the S7-1500, ET 200MP system
manual (http://support.automation.siemens.com/WW/view/en/59191792).
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
4.3.6 Addresses of pulse generators in the PTO mode

You connect the encoder signals, the digital input and output signals and the encoder
supplies to the two 40-pin front connectors of the digital on-board I/O. For information on
wiring the front connectors and establishing the cable shield, refer to the S7-1500, ET 200MP
system manual (http://support.automation.siemens.com/WW/view/en/59191792).
Encoder signals
In addition to supporting its outputs, each PTO channel also supports the three following
optional inputs:
• Reference Switch (RS)
• Measuring Input (MI)
• Drive Ready (DR)
Input addresses of the pulse generators (PTO)

You make the settings of the digital input addresses used by the pulse generators (PTO) in the
hardware configuration of STEP 7 (TIA Portal). When you configure the compact CPU you can
individually activate and configure the four PTO channels.
Assignment of PTO addresses of inputs

A direct connection from the PTO to an input of the on-board I/O is established through the
interconnection. You can find an overview of the options for interconnecting the inputs (DI0
to DI15) to the available PTO channels (PTO1 to PTO4) in the section Interconnection
overview of the inputs (Page 111).
Assignment of the PTO addresses of the outputs

digital outputs you can interconnect to which PTO channels.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
4.3.7 Interconnection overview of the inputs
Combined interconnection of the technology channels

In order that you can correctly divide the available inputs between the possible technology
channels HSC and PTO, the following table provides you with an overview of the possible
interconnections of the front connectors X11 and X12. This overview is a combination of
interconnection options of technology channels for HSC and PTO.
Fro Ter- Chan PTO High-speed counter (HSC)

nt mina nel PTO1 PTO2 PTO3 PTO4 HSC1 HSC2 HSC3
co l
nn
ec-
tor
X1 1 DI0 [DR] [DR] [DR] [DR] A
1 2 DI1 [DR] [DR] [DR] [DR] [B]
3 DI2 [DR] [DR] [DR] [DR] [N]
4 DI3 [DR] [DR] [DR] [DR] A
5 DI4 [DR] [DR] [DR] [DR] [B]
6 DI5 [DR] [DR] [DR] [DR] [N]
8 DI7 [DR] [DR] [DR] [DR] [B]
11 DI8 [DR] [DR] [DR] [DR] [DI] [DI] [N] [DI]
12 DI9 [DR] [DR] [DR] [DR] [DI] [DI] [DI]
15 DI12 [DR] [MI] [DR] [DR] [DR] [DI] [DI] [DI]
16 DI13 [DR] [RS] [DR] [MI] [DR] [DR] [DI] [DI] [DI]
17 DI14 [DR] [DR] [RS] [DR] [DR] [DI] [DI] [DI]
[...] = Use is optional

[DR] = Drive Ready; [MI] = Measuring Input; [RS] = Reference Switch
[DI] stands for [HSC DI0/HSC DI1] = DI: Is used for the HSC functions: Gate, Sync and Capture
The assignment to [B] or [N] takes precedence over the assignment to HSC DI0 or HSC DI1. This means that input addresses
that are assigned to count signal [B] or [N] based on the selected signal type cannot be used for other signals such as
HSC DI0 or HSC DI1.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Fro Ter- Chan PTO High-speed counter (HSC)

nt mina nel PTO1 PTO2 PTO3 PTO4 HSC4 HSC5 HSC6
co l
nn
ec-
tor
X1 1 DI0 [DR] [DR] [DR] [DR] A
2 2 DI1 [DR] [DR] [DR] [DR] [B]
3 DI2 [DR] [DR] [DR] [DR] [N]
5 DI4 [DR] [DR] [DR] [DR] [B]
6 DI5 [DR] [DR] [DR] [DR] [N]
8 DI7 [DR] [DR] [DR] [DR] [B]
11 DI8 [DR] [DR] [DR] [DR] [DI] [DI] [N] [DI]
15 DI12 [DR] [DR] [DR] [MI] [DR] [DI] [DI] [DI]
16 DI13 [DR] [DR] [DR] [RS] [DR] [DI] [DI] [DI]
17 DI14 [DR] [DR] [DR] [DR] [MI] [DI] [DI] [DI]
18 DI15 [DR] [DR] [DR] [DR] [RS] [DI] [DI] [DI]
[...] = Use is optional

[DR] = Drive Ready; [MI] = Measuring Input; [RS] = Reference Switch
[DI] stands for [HSC DI0/HSC DI1] = DI: Is used for the HSC functions: Gate, Sync and Capture
The assignment to [B] or [N] takes precedence over the assignment to HSC DI0 or HSC DI1. This means that input addresses
that are assigned to count signal [B] or [N] based on the selected signal type cannot be used for other signals such as
HSC DI0 or HSC DI1.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
4.3.8 Interconnection overview of outputs
Combined interconnection of the technology channels

The following table provides you with an overview of the possible interconnections of the
front connectors X11 and X12 to allow you to correctly divide the available inputs between
the possible technology channels HSC, PWM and PTO. This overview is a combination of
interconnection options of technology channels for HSC, PWM and PTO.
Hardware output Standard DQ PWM PTO HSC

Fron Ter Ch Output Configurable Configurable Configurable Configurable Configu- Can be used
t mi an module as standard as PWM as PTO out- as PTO out- rable as as HSC-DQ1
con nal nel DQ for chan- output for put A for put B for "Drive for channel
nect nel channel channel 1) channel 2) enable
or output"
for chan-
nel
X11 1 DQ High-speed PWM1 PTO1
0 Standard DQ0 PWM1 [PTO
2/3/4]
2 DQ High-speed PTO1 [HSC1]
1 Standard DQ1 [PTO
1/2/3/4]
3 DQ High-speed PWM2 PTO2
1/3/4]
4 DQ High-speed PTO2 HSC2
3 Standard DQ3 [PTO
1/2/3/4]
5 DQ High-speed PWM3 PTO3 [HSC3]
1/2/4]
5 Standard DQ5 [PTO
1/2/3/4]
7 DQ High-speed PWM4 PTO4 HSC6
1/2/3]
7 Standard DQ7 [PTO
1/2/3/4]
11 DQ DQ8 PWM1 [PTO
8 1/2/3/4]
12 DQ DQ9 PTO1* [PTO [HSC1]
9 1/2/3/4]
13 DQ DQ10 PWM2 [PTO
10 Standard 1/2/3/4]
14 DQ DQ11 PTO2* [PTO HSC2
11 1/2/3/4]
15 DQ DQ12 PWM3 [PTO [HSC3]
12 1/2/3/4]
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring

13 1/2/3/4]
17 DQ DQ14 PWM4 [PTO HSC6
14 1/2/3/4]
15 1/2/3/4]
X12 1 DQ DQ0 [PTO
0 1/2/3/4]
2 DQ DQ1 [PTO
1 1/2/3/4]
3 DQ DQ2 [PTO
2 1/2/3/4]
4 DQ DQ3 [PTO
3 1/2/3/4]
5 DQ DQ4 [PTO
4 1/2/3/4]
6 DQ Standard DQ5 [PTO
5 1/2/3/4]
7 DQ DQ6 [PTO
6 1/2/3/4]
8 DQ DQ7 [PTO
7 1/2/3/4]
11 DQ DQ8 [PTO
8 1/2/3/4]
12 DQ DQ9 [PTO
9 1/2/3/4]
13 DQ DQ10 [PTO
10 1/2/3/4]
14 DQ DQ11 [PTO
11 1/2/3/4]
15 DQ DQ12 [PTO
12 1/2/3/4]
16 DQ DQ13 [PTO
13 1/2/3/4]
17 DQ DQ14 [PTO
14 1/2/3/4]
18 DQ DQ15 [PTO
15 1/2/3/4]
* Only supports for PTO direction signal (signal type "pulse A and direction B")
1) "PTOx - Output A" stands for the signal types Pulse Output A or Pulse
2) "PTOx - Output B" stands for the Pulse output B or Direction signal types
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Wiring
Technical characteristics of the outputs

The following table shows an overview of the technical characteristics of the individual
outputs.
Frequency range DQ0 to DQ7 DQ8 to DQ15

(period duration) High-speed output High-Speed output Standard output
(0.1 A) activated (0.1 A) deactivated
max. 100 kHz max. 10 kHz max. 100 Hz
max. 0.1 A max. 0.5 A max. 0.5 A
Switching to P potential / Switching to P potential1) Switching to P potential1)
sink output
Accuracy of 10 to <= 100 kHz (100 to ±100 ppm ±2 µs --- ---
the pulse > = 10 µs)
duration 100 Hz to <10 kHz (10 ±100 ppm ±10 µs with
ms to > 100 µs) load > 0.1 A
10 to < 100 Hz (0.1 s to ±100 ppm ±20 µs with ±100 ppm ±100 µs with
> 10 ms) load ≥ 2mA load > 0.1 A
±100 ppm ±200 µs with
load ≥ 2mA
1 to <10 Hz (1 to > 0.1 s) ±150 ppm ±2 µs ±150 ppm ±10 µs with ±150 ppm ±100 µs with
load > 0.1 A load > 0.1 A
±150 ppm ±20 µs with ±150 ppm ±200 µs with
load ≥ 2mA load ≥ 2mA
0.1 to < 1 Hz (10 to >1 s) ±600 ppm ±2 µs ±600 ppm ±10 µs with ±600 ppm ±100 µs with
load > 0.1 A load > 0.1 A
±600 ppm ± 20 µs with ±600 ppm ±200 µs with
load ≥ 2mA load ≥ 2mA
Accuracy of --- ± 100 ppm2) ± 100 ppm2) ± 100 ppm2)3)
the frequen-
cy
Minimum 2 µs 20 µs with load > 0.1 A 400 µs with load > 0.1 A
pulse dura- 40 µs with load ≥ 2 mA 500 µs with load ≥ 2 mA
tion
20 µs with load < 240 Ω1) 400 µs with
load < 240 Ω1)
1) With sourcing outputs, it must be taken into consideration that falling edges can be delayed as compared to rising edges
depending on the load. The on-load factor can therefore be falsified. Consider using a high-speed output if the load at
the output is greater than 240 Ω.
2) The frequency has a basic accuracy of ±100 ppm with a resolution of 0.3638 mHz.
3) Standard outputs are affected by jitter during generation of frequencies. The set period duration is not adhered to in
every period, but it is adhered to on average over several periods.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Parameters/address space 5
5.1 Address space of the analog on-board I/O
Address space of the analog input and output channels

The addresses are divided into five analog input channels and two analog output channels.
STEP 7 (TIA Portal) assigns the addresses automatically. You can change the addresses in the
hardware configuration of STEP 7 (TIA Portal), i.e. freely assign the start address. The
addresses of the channels are based on the start address.
"IB x" stands, for example, for the start address input byte x. "QB x" stands, for example, for
the start address output byte x.
Figure 5-1 Address space seven-channel analog on-board I/O with value status
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Parameters/address space
5.1 Address space of the analog on-board I/O
Value status (quality information, QI)

As of firmware version 2.0, the analog and digital on-board I/O support the value status as
diagnostics option. You activate the use of the value status in the hardware configuration of
STEP 7 (TIA Portal). Value status is deactivated by default.
When you activate the value status, the input area of the analog on-board I/O contains two
additional bytes, which provide the QI bits to the five analog input channels and two analog
output channels. You access the QI bits through the user program.
Value status of input channels

Value status = 1 ("Good") indicates that the value of the assigned input at the terminal is
valid.
Value status = 0 ("Bad") indicates that the read value is not valid.
Possible cause for value status = 0:
• a channel has been deactivated
• a measured value was not updated after a parameter change
• a measured value is outside the low/high measuring range (overflow/underflow)
• Wire break has occurred (only for the "Voltage" measurement type in the measuring range
"1 to 5 V" and for the "Current" measurement type in the measuring range "4 to 20 mA")
Value status of output channels

The value status = 1 ("Good") indicates that the process value specified by the user program is
correctly output at the terminal.
The value status = 0 ("Bad") indicates that the process value output at the hardware output is
incorrect.
• a channel has been deactivated
• Outputs are inactive (for example, CPU in STOP)
• An output value is outside the lower/upper measuring range (overflow/underflow)
• Wire break has occurred (only for the "Current" output type)
• Short-circuit has occurred (only for the "Voltage" output type)
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

5.2 Address space of the digital on-board I/O
Address space of digital input and digital output channels

The addresses are divided into 2 x 16 digital input channels and 2 x 16 digital output
channels. STEP 7 (TIA Portal) assigns the addresses automatically. You can change the
addresses in the hardware configuration of STEP 7 (TIA Portal), i.e. freely assign the start
address. The addresses of the channels are based on the start address.
The letters "a" to "d" are lasered on the on-board I/O. "IB a", for example, stands for start
address input byte a. "QB x", for example, stands for start address output byte x.
Figure 5-2 Address space of the submodule X11 of the 2 x 32-channel digital on-board I/O (16 digital
inputs/16 digital outputs) with value status
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Figure 5-3 Address space of the submodule X12 of the 2 x 32-channel digital on-board I/O (16 digital
inputs/16 digital outputs) with value status
Value status (quality information, QI)

As of firmware version 2.0, the analog and digital on-board I/O support the value status as
diagnostics option. You activate the use of the value status in the hardware configuration of
STEP 7 (TIA Portal). Value status is deactivated by default. You can activate/deactivate the
value status of the digital on-board I/O for X11 and X12 independently of each other.
When you activate the value status, the input area of the digital on-board I/O (X11/X12)
contains four additional bytes, which provide the QI bits to the 16 digital input channels and
16 digital output channels. You access the QI bits through the user program.
Value status of input channels

Value status = 1 ("Good") indicates that the value of the assigned input at the terminal is
valid.
Value status = 0 ("Bad") indicates that no/or too little supply voltage L+ is applied at the
terminal and that the read value is therefore not valid.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

5.3 Address space of the pulse generators
Value status of output channels

The value status = 1 ("Good") indicates that the process value specified by the user program is
correctly output at the terminal.
The value status = 0 ("Bad") indicates that the process value output at the hardware output is
incorrect or the channel is used for technology functions.
• The supply voltage L+ is missing at the terminals or is not sufficient
• Outputs are inactive (for example, CPU in STOP)
• Technology functions (HSC, PWM or PTO) use the channel
Note
Behavior of the value status at the output channels for technology functions
The output channels return the value status 0 ("Bad") when a technology channel (HSC, PWM
or PTO) is used. It does not matter in this context whether the output value is incorrect or
not.
Address space of the high-speed counters

Table 5- 1 Size of the input and output addresses of the high-speed counters
Inputs Outputs
Size per high-speed counter (6x) 16 bytes 12 bytes
You can find a description of the control interface in the section Assignment of the control
interface of the high-speed counters (Page 50). You can find a description of the feedback
interface in the section Assignment of the feedback interface of the high-speed counters
(Page 52).
Table 5- 2 Size of the input and output addresses in operating mode "Position input for Motion Control"
Inputs Outputs
Size per high-speed counter (6x) 16 bytes 4 bytes
5.3 Address space of the pulse generators

Address space of the pulse generators in the PWM, frequency output and PTO modes
Operating mode Feedback interface Control interface

(inputs) (outputs)
PWM (4x) 4 bytes 12 bytes
Frequency output 4 bytes 12 bytes
PTO 18 bytes 10 bytes
Deactivated 4 bytes * 12 bytes *
* In "Deactivated" mode, the control interface is not evaluated and the feedback interface is set to 0 value
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

5.4 Measurement types and measuring ranges of the analog on-board I/O
5.4 Measurement types and measuring ranges of the analog

on-board I/O
Introduction
The analog on-board I/O is set to voltage measurement type and measuring range ±10 V by
default for the inputs on channels 0 to 3. By default, channel 4 is set to resistance measuring
type and measuring range 600 Ω. If you want to use another measurement type or
measuring range, change the parameter settings of the analog on-board I/O with STEP 7 (TIA
Portal).
Disable unused inputs to prevent disturbances that cause incorrect behavior (e.g. triggering
of a hardware interrupt).
Measurement types and measuring ranges

The following table shows the measurement types, the measuring range and the possible
channels.
Table 5- 3 Measurement types and measuring range
Measurement type Measuring range Channel

Voltage 0 to 10 V 0 to 3
1 to 5 V
±5 V
±10 V
Current 4WMT 0 to 20 mA 0 to 3
(4-wire measuring transducer) 4 to 20 mA
±20 mA
Resistance 150 Ω 4
300 Ω
600 Ω
Thermal resistor RTD Pt 100 Standard/Climate 4
Ni 100 Standard/Climate
Deactivated - -
The tables of the input ranges, overflow, underrange, etc. can be found in the appendix .
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

5.5 Output type and output ranges of the analog on-board I/O
5.5 Output type and output ranges of the analog on-board I/O
Introduction
The analog on-board I/O is set to voltage output type and output range ±10 V as default for
the outputs. If you want to use another output range or output type, you need to change the
parameter settings of the analog on-board I/O in STEP 7 (TIA Portal).
Output types and output ranges

The following table shows the output type and the corresponding output ranges.
Table 5- 4 Output type and output ranges
Output type Output range

Voltage 1 to 5 V
0 to 10 V
±10 V
Current 0 to 20 mA
4 to 20 mA
±20 mA
Deactivated -
5.6 Parameters of the analog on-board I/O

Parameters of the analog on-board I/O
You specify the properties of the analog on-board I/O during parameter assignment with
STEP 7 (TIA Portal). The tables below list the parameters that can be set for inputs and
outputs, respectively.
When parameters are assigned in the user program, they are transferred to the analog on-
board I/O via data records with the WRREC instruction, see section Parameter assignment and
structure of the parameter data records of the analog on-board I/O (Page 167).
Configurable parameters and default settings for inputs

Table 5- 5 Configurable "Diagnostics" parameters
Parameters 1) Value range Default Reconfiguration in

RUN
Diagnostics
• Overflow Yes/No No Yes
• Underflow Yes/No No Yes
• Wire break 2) Yes/No No Yes
• Current limit for wire break diagnostics 1.185 mA or 3.6 mA 1.185 mA Yes
1) All parameters can be set channel-selective

2) Only for the "Voltage" measurement type in the measuring range 1 to 5 V and for the "Current" measurement type in the
measuring range 4 to 20 mA
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Table 5- 6 Configurable "Measuring" parameters

RUN
Measuring
• Measurement type See section Measurement Voltage Yes
types and measuring ranges of (channels 0 to 3)
the analog on-board I/O Resistance
(Page 121) (channel 4)
• Measuring range ±10 V Yes
(channels 0 to 3)
600 Ω
(channel 4)
• Temperature coefficient Pt: 0.003851 0.003851 Yes
Pt: 0.003916
Pt: 0.003902
Pt: 0.003920
Ni: 0.006180
Ni: 0.006720
• Temperature unit • Kelvin (K) 2) °C Yes
• Fahrenheit (°F)
• Celsius (°C)
• Interference frequency suppression 400 Hz 50 Hz Yes 3)

60 Hz
50 Hz
10 Hz
• Smoothing None/weak/medium/strong None Yes

2) Kelvin (K) is only possible for the "Standard range" measuring range and not for the "Climatic range" measuring range
3) The interference frequency suppression must have the same value for all active input channels. This value can only be
changed through reconfiguration in RUN with single channel parameter assignment (data records 0 to 4) if all other in-
put channels are disabled.
Table 5- 7 Configurable "Hardware interrupt" parameters

RUN
Hardware interrupts
• Hardware interrupt low limit 1 Yes/No No Yes
• Hardware interrupt high limit 1 Yes/No No Yes
• Hardware interrupt low limit 2 Yes/No No Yes
• Hardware interrupt high limit 2 Yes/No No Yes
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

You can find an overview of the limits for the hardware interrupts in the section Structure of
a data record for input channels of the analog on-board I/O (Page 168).
Configurable parameters and default settings for outputs
Table 5- 8 Configurable "Diagnostics" parameters
Parameters 1) Value range Default Reconfigura-

tion in RUN
Diagnostics
• Wire break 2) Yes/No No Yes
• Short-circuit to ground 3) Yes/No No Yes
• Overflow Yes/No No Yes
• Underflow Yes/No No Yes

2) Only for the "Current" output type
3) Only for the "Voltage" output type
Table 5- 9 Configurable output parameters
Parameters 1) Value range Default Reconfigura-

tion in RUN
Output parameters
• Output type See section Output type and output ranges of the analog on- Voltage Yes
• Output range ±10 V Yes
• Reaction to CPU STOP • Turn off Turn off Yes

• Keep last value
• Output substitute value
• Substitute value Must be within the permitted voltage/current output range. 0 Yes
See "Valid substitute value for the output range" table in the
section Structure of a data record for output channels of the
analog on-board I/O (Page 173)
Short-circuit detection
The diagnostics for short circuit to ground can be configured for the voltage output type.
Short-circuit detection is not possible for low output values. The output voltages must
therefore be under -0.1 V or over +0.1 V.
Wire break detection

The diagnostics for wire break can be configured for the current output type. Wire break
detection is not possible for low output values; the output currents must therefore be below -
0.2 mA or above +0.2 mA.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

5.7 Parameters of the digital on-board I/O
Parameters of the digital on-board I/O in standard mode

You specify the properties of the digital on-board I/O during the parameter assignment with
STEP 7 (TIA Portal). The tables below list the parameters that can be set for inputs and
outputs, respectively.
When parameters are assigned in the user program, they are transferred to the digital on-
board I/O via data records with the WRREC instruction, see section Parameter assignment and
structure of the parameter data records of the digital on-board I/O (Page 176).
The use of a digital input by a technology channel

When a digital input is in use by a technology channel (HSC, PTO or PWM) the corresponding
digital input channel remains fully usable without any restriction.
Use of a digital output by a technology channel

When a digital output is in use by a technology channel (HSC, PTO or PWM) the following
restrictions apply to the use of the corresponding digital output channel:
• Output values for the digital output channel are not effective. The output values are
specified by the technology channel.
• The CPU STOP behavior configured for the digital output channel is not effective. The
reaction of the output to CPU Stop is specified by the technology channel.
• With activated value status (Quality Information) for the DI16/DQ16 submodule, the QI-bit
for the digital output channel shows the value 0 (= Status "Bad").
• The current state of the digital output is not returned to the process image output. In the
PTO operating mode, you can only observe the switching operations of the assigned
digital outputs directly at the output. In the PWM operating mode and with high-speed
counters (HSC), you can observe the current state additionally via the feedback interface.
Note, however, that high frequencies may no longer be observed under certain
circumstances due to an excessively low sampling rate.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Configurable parameters and default settings for inputs
Table 5- 10 Configurable parameters for inputs

RUN
Diagnostics
• No Yes/No No Yes
supply voltage L+
Input delay None, 0.05 ms, 0.1 ms, 3.2 ms Yes
0.4 ms, 1.6 ms, 3.2 ms,
12.8 ms, 20 ms
Hardware interrupt
• Rising edge Yes/No No Yes
• Falling edge Yes/No No Yes
Configurable parameters and default settings for outputs
Table 5- 11 Configurable parameters for outputs

RUN
Diagnostics
• Missing Yes/No No Yes
supply voltage L+
Reaction to CPU STOP • Turn off Turn off Yes
When the digital output is controlled by a
• Keep last value
technology channel (HSC, PTO or PWM), this
parameter is not effective. In this case the • Output substitute value 1
technology channel specifies the reaction of
the digital output to CPU STOP.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Interrupts/diagnostics alarms 6
6.1 Status and error displays
6.1.1 Status and error displays of the CPU part
LED display
The figure below shows the LED displays of the CPU part.
① RUN/STOP LED (yellow/green LED)

② ERROR LED (red LED)
③ MAINT LED (yellow LED)
④ LINK RX/TX LED for port X1 P1 (yellow/green LED)
⑤ LINK RX/TX LED for port X1 P2 (yellow/green LED)
⑥ STOP ACTIVE-LED (yellow LED)
Figure 6-1 LED display of the CPU 1512C-1 PN (without front panel)
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Interrupts/diagnostics alarms
Meaning of the RUN/STOP, ERROR and MAINT LEDs

The CPU has three LEDs for displaying the current operating mode and diagnostics status. The
following table shows the meaning of the various combinations of colors for the RUN/STOP,
ERROR and MAINT LEDs.
Table 6- 1 Meaning of the LEDs
RUN/STOP LED ERROR LED MAINT LED Meaning

Missing or insufficient supply voltage on the CPU.
LED off LED off LED off
An error has occurred.
LED off LED flashes red LED off
CPU is in RUN mode.
LED lit green LED off LED off
A diagnostics event is pending.
LED lit green LED flashes red LED off
Maintenance demanded for the plant.
LED lit green LED off LED lit yellow The affected hardware must be checked/replaced
within a short period of time.
Active Force job
Bad configuration
LED lit green LED off LED flashes yellow
A diagnostics event is pending.
LED lit yellow LED flashes red LED off
Firmware update successfully completed.
LED lit yellow LED off LED flashes yellow
CPU is in STOP mode.
LED lit yellow LED off LED off
The program on the SIMATIC memory card is caus-
LED lit yellow ing an error.
LED flashes red LED flashes yellow
Firmware update using SIMATIC memory card has
failed.
The CPU has detected an error state. Additional
information is available via the CPU diagnostic
buffer.
CPU is performing internal activities during STOP,
LED off LED off e.g. ramp-up after STOP.
LED flashes yellow
Download of the user program from the SIMATIC
memory card
CPU carries out a program with active breakpoint.
Startup (transition from STOP → RUN)
LED off LED off
LED flashes
yellow/green
Startup (CPU booting)
LED flashes red LED flashes yellow Test of LEDs during startup, inserting a module.
LED flashes
yellow/green LED flashing test
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Meaning of LINK RX/TX LED

Each port has a LINK RX/TX LED. The table below shows the various "LED scenarios" of the CPU
ports.
Table 6- 2 Meaning of the LED
LINK TX/RX LED Meaning

There is no Ethernet connection between the PROFINET interface of the PROFINET device and
LED off the communication partner.
No data is currently being sent/received via the PROFINET interface.
There is no LINK connection.
The "LED flashing test" is being performed.
LED flashes green
There is an Ethernet connection between the PROFINET interface of your PROFINET device
LED lit green and a communication partner.
Data is currently being received from or sent to a communications partner on Ethernet via
the PROFINET interface of the PROFINET device.
LED flashes yellow/green
Note
"LED" instruction
You can read the status (e.g. "On" or "Off") of LEDs of a CPU or a module using the "LED"
instruction. Note, however, that it is not possible to read the LED status of the LINK RX/TX
LEDs on all S7-1500 CPUs.
You can find additional information on the "LED" instruction in the STEP 7 online help.
Meaning of the STOP ACTIVE LED

The following table shows the meaning of the STOP ACTIVE LED for the CPU 1512C-1 PN.
Table 6- 3 Meaning of the LEDs
STOP ACTIVE LED Meaning

The CPU is switched to "STOP" mode using the STOP button.
LED lit yellow • As long as the STOP ACTIVE LED is lit up, switching the CPU to RUN mode is only possible using
the RUN button.
• The CPU can then no longer be set to RUN mode via the display operation or via online functions.
The state of the buttons is retained at power-off. If the CPU does not start up automatically after a
power-on, you have to keep the STOP button pressed during start-up until the STOP ACTIVE LED is
activated.
• If an automatic start-up is to be reliably prevented after a power-up, the STOP button has to be
kept pressed during the start-up of the CPU until the STOP ACTIVE LED is activated.
• The CPU is set to "STOP" mode using the display or programming device and not with the STOP
LED off button on the device.
• The CPU is in RUN mode.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

6.1.2 Status and error displays of the analog on-board I/O
LED displays
The figure below shows the LED displays (status and error displays) of the analog on-board
I/O.
Figure 6-2 LED displays
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Meaning of the LED displays

The following tables explain the meaning of the status and error displays. Corrective
measures for diagnostic alarms can be found in the section Interrupts and diagnostics of the
analog on-board I/O (Page 134).
Table 6- 4 RUN/ERROR status and error displays
LEDs Meaning Remedy

RUN ERROR
No voltage or voltage too low • Turn on the CPU and/or the system power
Off Off supply modules.
Analog on-board I/O starts up and flashes until
Flashes Off valid parameter assignment.
---
Parameters have been set for the analog on-
On Off board I/O.
Indicates module errors (at least one error is Evaluate the diagnostics and eliminate the error
On Flashes present on one channel, e.g. wire break). (e.g. wire break).
Hardware defective. Replace the compact CPU.
Flashes Flashes
CHx LED
Table 6- 5 CHx status display
CHx LED Meaning Remedy

Channel disabled. ---
Off
Channel parameters set and OK. ---
On
Channel parameters set, channel error present. Check the wiring.
On Diagnostics alarm: e.g. wire break Disable diagnostics.
Note
Maintenance LED
During ramp-up, the firmware of the CPU checks the consistency of the calibration data of the
analog on-board I/O stored by the SIEMENS Production. The yellow MAINT LED lights up if the
firmware detects an inconsistency (e.g. an invalid value) or missing calibration data. The
MAINT-LED is located next the red ERROR-LED on the analog on-board I/O.
Note that the MAINT LED on the analog on-board I/O is only intended for troubleshooting by
SIEMENS. In normal condition, the MAINT-LED should not light up. However, if the LED is lit
up, please contact SIEMENS "mySupport" at Internet
(https://support.industry.siemens.com/My/ww/en/).
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

6.1.3 Status and error displays of the digital on-board I/O
LED displays
The figure below shows an example of the LED displays (status and error displays) of the first
module of the digital on-board I/O. Remedial measures for diagnostics alarms can be found in
section Interrupts and diagnostics of the digital on-board I/O (Page 136).
Figure 6-3 LED displays
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Meaning of the LED displays

The following tables explain the meaning of the status and error displays.
RUN/ERROR LED
Table 6- 6 RUN/ERROR status and error displays
LED Meaning Remedy

RUN ERROR
No voltage or voltage too low • Turn on the CPU.
Off Off
• Check whether too many modules are in-
serted.
Digital on-board I/O starts up.
Flashes Off
---
Digital on-board I/O is ready for operation.
On Off
A diagnostics interrupt is pending. Supply volt- Check supply voltage L+.
On Flashes age missing.
PWRx LED
Table 6- 7 PWRx status display
PWRx LED Meaning Remedy

Supply voltage L+ to module too low or missing Check supply voltage L+.
Off
Supply voltage L+ is present and OK. ---
On
CHx LED
Table 6- 8 CHx status display
CHx LED Meaning Remedy

0 = Status of the input/output signal. ---
Off
1 = Status of the input/output signal. ---
On
Note
For the status display, the digital inputs only take into account the filter time of the
corresponding DI and not the filter time of the A/B/N signals of the fast counters (HSC).
For example, a static signal may be displayed when the DI has a configured input delay of
3.2 ms, even though a 100 kHz counter on these inputs still detects edge transitions.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

6.2 Interrupts and diagnostics
6.2.1 Interrupts and diagnostics of the CPU part

For information on the topic of "Interrupts", refer to the STEP 7 (TIA Portal) online help.
For information on "Diagnostics" and "System alarms", refer to the Diagnostics
(http://support.automation.siemens.com/WW/view/en/59192926) function manual.
6.2.2 Interrupts and diagnostics of the analog on-board I/O
Diagnostics interrupt
The analog on-board I/O generates a diagnostics interrupt at the following events:
Table 6- 9 Diagnostics interrupt for inputs and outputs
Event Diagnostics interrupt

Inputs Outputs
Overflow x x
Underflow x x
Wire break x 1) x 2)
Short-circuit to ground --- x 3)
1) Possible for the voltage measuring range (1 to 5 V), current measuring range (4 to 20 mA)
2) Possible for current output type
3) Possible for voltage output type
Hardware interrupt for inputs

The compact CPU can generate a hardware interrupt for the following events:
• Below low limit 1
• Above high limit 1
• Below low limit 2
• Above high limit 2
You can find detailed information on the event in the hardware interrupt organization block
with the "RALARM" (read additional interrupt information) instruction and in the STEP 7 (TIA
Portal) online help.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

The start information of the organization block includes information on which channel of the
analog on-board I/O triggered the hardware interrupt. The figure below shows the
assignment to the bits of double word 8 in local data.
Figure 6-4 Start information of the organization block
Behavior when limits 1 and 2 are reached at the same time

If the two high limits 1 and 2 are reached at the same time, the analog on-board I/O always
signals the hardware interrupt for high limit 1 first. The configured value for high limit 2 is
irrelevant. After processing the hardware interrupt for high limit 1, the compact CPU triggers
the hardware interrupt for high limit 2.
The analog on-board I/O behaves accordingly when the low limits are reached
simultaneously. If the two low limits 1 and 2 are reached at the same time, the analog on-
board I/O always signals the hardware interrupt for low limit 1 first. After processing the
hardware interrupt for low limit 1, the analog on-board I/O triggers the hardware interrupt for
low limit 2.
Structure of the additional interrupt information
Table 6- 10 Structure of USI = W#16#0001
Data block name Contents Comment Bytes

USI W#16#0001 Additional hardware interrupt information of 2
(User Structure Identifier) the analog on-board I/O
The channel that triggered the hardware interrupt follows.
Channel B#16#00 to B#16#n Number of the event-triggering channel (n = 1
number of analog on-board I/O channels -1)
It is followed by the event that triggered the hardware interrupt.
Event B#16#03 Below low limit 1 1
B#16#04 Above high limit 1
B#16#05 Below low limit 2
B#16#06 Above high limit 2
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Diagnostics alarms
A diagnostics alarm is output for each diagnostics event and the ERROR LED flashes on the
analog on-board I/O. The diagnostics alarms can, for example, be read out in the diagnostics
buffer of the CPU. You can evaluate the error codes with the user program.
Table 6- 11 Diagnostics alarms, their meaning and corrective measures
Diagnostics alarm Error code Meaning Remedy

Wire break 6H Resistance of encoder circuit too Use a different encoder type or modify the
high wiring, for example, using cables with
larger cross-section
Interruption of the cable between Connect the cable
the analog on-board I/O and sensor
Channel not connected (open) • Disable diagnostics
• Connect the channel
Overflow 7H Measuring range exceeded Check the measuring range
The output value set by the user Correct the output value
program exceeds the valid rated
range/overrange
Underflow 8H Value below measuring range Check the measuring range
The output value set by the user Correct the output value
program is below the valid rated
range/underrange
Short-circuit to ground 1H Overload at output Eliminate overload
Short-circuit of output QV to MANA Eliminate the short-circuit
6.2.3 Interrupts and diagnostics of the digital on-board I/O
Diagnostics interrupt
A diagnostics alarm is output for each diagnostics event and the ERROR LED flashes on the
digital on-board I/O. You can read out the diagnostics alarms, for example, in the diagnostics
buffer of the CPU. You can evaluate the error codes with the user program.
Diagnostics alarm Error code Meaning Corrective measures

Load voltage missing 11H No supply voltage L+ Feed supply voltage L+
Hardware interrupt 16H The digital on-board I/O cannot trigger an • Change the interrupt processing in the
lost interrupt because the previous interrupt
CPU and reconfigure the digital on-
was not acknowledged; possibly a config-
uration error board I/O.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Diagnostic interrupts when using high-speed counters
Diagnostics alarm Error code Meaning Corrective measures

Illegal A/B signal ratio 500H • Time sequence of the A and B signals • Correct the process wiring
of the incremental encoder do not • Check the encoder/sensor
meet certain requirements.
• Check the parameter assignment.
• Possible causes:
– Signal frequency too high
– Encoder is defective
– Process wiring is incorrect
Hardware interrupt
The compact CPU can generate a hardware interrupt for the following events:
• Rising edge
• Falling edge
You will find detailed information on the event in the hardware interrupt organization block
with the "RALRM" (read additional interrupt information) instruction and in the STEP 7 online
help.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

The start information of the organization block includes information on which channel
triggered the hardware interrupt. The figure below shows the assignment to the bits of
double word 8 in local data.
Figure 6-5 Start information of the organization block
Structure of the additional interrupt information
Table 6- 14 Structure of USI = W#16#0001
Data block name Contents Comment Bytes

USI W#16#0001 Additional interrupt information of the hard- 2
(User Structure Identifier) ware interrupts of the digital on-board I/O
The channel that triggered the hardware interrupt follows.
Channel B#16#00 to B#16#0F Number of the event-triggering channel (chan- 1
nel 0 to channel 15)
The error event that triggered the hardware interrupt follows.
Event B#16#01 Rising edge 1
B#16#02 Falling edge
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Hardware interrupts when using the high-speed counters
Table 6- 15 Hardware interrupts and their meaning
Hardware interrupt Event type Meaning

number
Opening of the internal gate (gate start) 1 When the internal gate is opened, the technology function
triggers a hardware interrupt in the CPU.
Closing of the internal gate (gate stop) 2 When the internal gate is closed, the technology functions
trigger a hardware interrupt in the CPU.
Overflow (high counting limit violated) 3 When the count value exceeds the high counting limit, the
technology function triggers a hardware interrupt in the
CPU.
Underflow (low counting limit violated) 4 When the count value falls below the low counting limit,
the technology function triggers a hardware interrupt in the
CPU.
Comparison event for DQ0 occurred 5 When a comparison event for DQ0 occurs due to the select-
ed comparison condition, the technology function triggers
a hardware interrupt in the CPU.
When the change of the count value for an incremental or
pulse encoder was not caused by a count pulse, the tech-
nology function does not trigger a hardware interrupt.
Comparison event for DQ1 occurred 6 When a comparison event for DQ1 occurs due to the select-
ed comparison condition, the technology function triggers
a hardware interrupt in the CPU.
When the change of the count value for an incremental or
pulse encoder was not caused by a count pulse, the tech-
nology function does not trigger a hardware interrupt.
Zero crossing 7 At a zero crossing of the counter or position value, the
technology function triggers a hardware interrupt in the
CPU.
New Capture value present1) 8 When the current counter or position value is saved as a
Capture value, the technology function triggers a hardware
interrupt in the CPU.
Synchronization of the counter by an exter- 9 At the synchronization of the counter by an N signal or
nal signal edge at DI, the technology function triggers a hardware
interrupt in the CPU.
Direction reversal2) 10 When the count value or position value changes direction,
the technology function triggers a hardware interrupt in the
CPU.
1) Can only be set in counting mode
2) Feedback bit STS_DIR is preset to "0". When the first count value or position value change occurs in the reverse direction
directly after switching on the digital on-board I/O, a hardware interrupt is not triggered.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Technical specifications 7
Technical specifications of the CPU 1512C-1 PN
The following table shows the technical specifications as of 05/2021. You will find a data
sheet including daily updated technical specifications on the Internet
(https://support.industry.siemens.com/cs/ww/en/pv/6ES7512-1CK01-0AB0/td?dl=en).
Article number 6ES7512-1CK01-0AB0

General information
Product type designation CPU 1512C-1 PN
HW functional status FS03
Firmware version V2.9
Product function
• I&M data Yes; I&M0 to I&M3
• Isochronous mode Yes; With minimum OB 6x cycle of 625 µs (dis-

tributed)
Engineering with
• STEP 7 TIA Portal configurable/integrated V17 (FW V2.9) / V15 (FW V2.5) or higher; with
older TIA Portal versions configurable as 6ES7512-
from version
1CK00-0AB0
Configuration control
via dataset Yes
Display
Screen diagonal [cm] 3.45 cm
Control elements
Number of keys 8
Mode buttons 2
Supply voltage
Type of supply voltage 24 V DC
permissible range, lower limit (DC) 19.2 V; 20.4 V DC, for supplying the digital in-
puts/outputs
permissible range, upper limit (DC) 28.8 V
Reverse polarity protection Yes
Mains buffering
• Mains/voltage failure stored energy time 5 ms; Refers to the power supply on the CPU sec-
tion
• Repeat rate, min. 1/s
Input current
Current consumption (rated value) 0.8 A; Without load; 18.8 A: CPU + load
Current consumption, max. 1 A; Without load; 19 A: CPU + load
Inrush current, max. 1.9 A; Rated value
I²t 0.34 A²·s
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Technical specifications

Digital inputs
• from load voltage L+ (without load), max. 20 mA; per group
Digital outputs
• from load voltage L+, max. 30 mA; Per group, without load
Output voltage
Rated value (DC) 24 V
Encoder supply
Number of outputs 2; One common 24 V encoder supply per 16 digi-
tal inputs
24 V encoder supply
• 24 V Yes; L+ (-0.8 V)
• Short-circuit protection Yes
• Output current, max. 1A
Power
Infeed power to the backplane bus 10 W
Power consumption from the backplane bus 9W
(balanced)
Power loss
Power loss, typ. 15.2 W
Memory
Number of slots for SIMATIC memory card 1
SIMATIC memory card required Yes
Work memory
• integrated (for program) 250 kbyte
• integrated (for data) 1 Mbyte
Load memory
• Plug-in (SIMATIC Memory Card), max. 32 Gbyte
Backup
• maintenance-free Yes
CPU processing times

for bit operations, typ. 48 ns
for word operations, typ. 58 ns
for fixed point arithmetic, typ. 77 ns
for floating point arithmetic, typ. 307 ns
CPU-blocks
Number of elements (total) 4 000; Blocks (OB, FB, FC, DB) and UDTs
DB
• Number range 1 ... 60 999; subdivided into: number range that
can be used by the user: 1 ... 59 999, and number
range of DBs created via SFC 86: 60 000 ... 60 999
• Size, max. 1 Mbyte; For DBs with absolute addressing, the
max. size is 64 KB
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


FB
• Number range 0 ... 65 535
• Size, max. 250 kbyte
FC
• Number range 0 ... 65 535
OB
• Number of free cycle OBs 100
• Number of time alarm OBs 20
• Number of delay alarm OBs 20
• Number of cyclic interrupt OBs 20; With minimum OB 3x cycle of 500 µs
• Number of process alarm OBs 50
• Number of DPV1 alarm OBs 3
• Number of isochronous mode OBs 1
• Number of technology synchronous alarm 2

OBs
• Number of startup OBs 100
• Number of asynchronous error OBs 4
• Number of synchronous error OBs 2
• Number of diagnostic alarm OBs 1
Nesting depth
• per priority class 24
Counters, timers and their retentivity

S7 counter
• Number 2 048
Retentivity
– adjustable Yes
IEC counter
• Number Any (only limited by the main memory)
Retentivity
– adjustable Yes
S7 times
• Number 2 048
Retentivity
– adjustable Yes
IEC timer
• Number Any (only limited by the main memory)
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Retentivity
– adjustable Yes
Data areas and their retentivity
Retentive data area (incl. timers, counters, 128 kbyte; In total; available retentive memory for
flags), max. bit memories, timers, counters, DBs, and technol-
ogy data (axes): 88 KB
Extended retentive data area (incl. timers, 1 Mbyte; When using PS 6 0W 24/48/60 V DC HF
counters, flags), max.
Flag
• Number of clock memories 8; 8 clock memory bit, grouped into one clock
memory byte
Data blocks
• Retentivity adjustable Yes
• Retentivity preset No
Local data
• per priority class, max. 64 kbyte; max. 16 KB per block
Address area
Number of IO modules 2 048; max. number of modules / submodules
I/O address area
• Inputs 32 kbyte; All inputs are in the process image
• Outputs 32 kbyte; All outputs are in the process image
per integrated IO subsystem

– Inputs (volume) 8 kbyte
– Outputs (volume) 8 kbyte

per CM/CP
– Inputs (volume) 8 kbyte
– Outputs (volume) 8 kbyte

Subprocess images
• Number of subprocess images, max. 32
Hardware configuration
Number of distributed IO systems 32; A distributed I/O system is characterized not
only by the integration of distributed I/O via
PROFINET or PROFIBUS communication modules,
but also by the connection of I/O via AS-i master
modules or links (e.g. IE/PB-Link)
Number of DP masters
• Via CM 6; A maximum of 6 CMs/CPs (PROFIBUS,
PROFINET, Ethernet) can be inserted in total
Number of IO Controllers
• integrated 1
• Via CM 6; A maximum of 6 CMs/CPs (PROFIBUS,

PROFINET, Ethernet) can be inserted in total
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Rack
• Modules per rack, max. 32; CPU + 31 modules
• Number of lines, max. 1
PtP CM
• Number of PtP CMs the number of connectable PtP CMs is only limited
by the number of available slots
Time of day
Clock
• Type Hardware clock
• Backup time 6 wk; At 40 °C ambient temperature, typically
• Deviation per day, max. 10 s; Typ.: 2 s
Operating hours counter

• Number 16
Clock synchronization
• supported Yes
• in AS, master Yes
• in AS, slave Yes
• on Ethernet via NTP Yes
Digital inputs
integrated channels (DI) 32
Digital inputs, parameterizable Yes
Source/sink input P-reading
Input characteristic curve in accordance with Yes
IEC 61131, type 3
Digital input functions, parameterizable
• Gate start/stop Yes
• Capture Yes
• Synchronization Yes
Input voltage
• Type of input voltage DC
• Rated value (DC) 24 V
• for signal "0" -3 to +5V
• for signal "1" +11 to +30V
Input current
• for signal "1", typ. 2.5 mA
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Input delay (for rated value of input voltage)
for standard inputs
– parameterizable Yes; none / 0.05 / 0.1 / 0.4 / 1.6 / 3.2 / 12.8 / 20
ms
– at "0" to "1", min. 4 µs; for parameterization "none"
– at "0" to "1", max. 20 ms
– at "1" to "0", min. 4 µs; for parameterization "none"
– at "1" to "0", max. 20 ms

for interrupt inputs
– parameterizable Yes; Same as for standard inputs
for technological functions
– parameterizable Yes; Same as for standard inputs
Cable length
• shielded, max. 1 000 m; 600 m for technological functions; de-
pending on input frequency, encoder and cable
quality; max. 50 m at 100 kHz
• unshielded, max. 600 m; for technological functions: No
Digital outputs
Type of digital output Transistor
integrated channels (DO) 32
Current-sourcing Yes; Push-pull output
Short-circuit protection Yes; electronic/thermal
• Response threshold, typ. 1.6 A with standard output, 0.5 A with high-speed
output; see manual for details
Limitation of inductive shutdown voltage to Connector X11: -0.8 V; connector X12: L+ (-53 V)
Controlling a digital input Yes
Accuracy of pulse duration Up to ±100 ppm ±2 μs at high-speed output; see
manual for details
minimum pulse duration 2 µs; With High Speed output
Digital output functions, parameterizable
• Switching tripped by comparison values Yes; As output signal of a high-speed counter
• PWM output Yes
– Number, max. 4
– Cycle duration, parameterizable Yes
– ON period, min. 0%
– ON period, max. 100 %
– Resolution of the duty cycle 0.0036 %; For S7 analog format, min. 40 ns
• Frequency output Yes
Switching capacity of the outputs

• with resistive load, max. 0.5 A; 0.1 A with high-speed output, i.e. when
using a high-speed output; see manual for details
• on lamp load, max. 5 W; 1 W with high-speed output, i.e. when using
a high-speed output; see manual for details
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Load resistance range
• lower limit 48 Ω; 240 ohms with high-speed output, i.e.
when using a high-speed output; see manual for
details
• upper limit 12 kΩ
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Output voltage
• Type of output voltage DC
• for signal "0", max. 1 V; With high-speed output, i.e. when using a
high-speed output; see manual for details
• for signal "1", min. 23.2 V; L+ (-0.8 V)
Output current
• for signal "1" rated value 0.5 A; 0.1 A with high-speed output, i.e. when
using a high-speed output, observe derating; see
manual for details
• for signal "1" permissible range, min. 2 mA
• for signal "1" permissible range, max. 0.6 A; 0.12 A with high-speed output, i.e. when
using a high-speed output, observe derating; see
manual for details
• for signal "0" residual current, max. 0.5 mA
Output delay with resistive load

• "0" to "1", max. 200 µs
• "1" to "0", max. 500 µs; Load-dependent

– "0" to "1", max. 5 µs; Depending on the output used, see addi-
tional description in manual
– "1" to "0", max. 5 µs; Depending on the output used, see addi-
tional description in manual
Parallel switching of two outputs
• for logic links Yes; for technological functions: No
• for uprating No
• for redundant control of a load Yes; for technological functions: No
Switching frequency
• with resistive load, max. 100 kHz; For high-speed output, 100 Hz for
standard output
• with inductive load, max. 0.5 Hz; Acc. to IEC 60947-5-1, DC-13; observe
derating curve
• on lamp load, max. 10 Hz
Total current of the outputs

• Current per channel, max. 0.5 A; see additional description in the manual
• Current per group, max. 8 A; see additional description in the manual
• Current per power supply, max. 4 A; 2 power supplies for each group, current per
power supply max. 4 A, see additional description
in manual
– Current per channel, max. 0.5 A; see additional description in the manual
Relay outputs
• Number of relay outputs 0
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Cable length
• shielded, max. 1 000 m; 600 m for technological functions; de-
pending on output frequency, load, and cable
quality; max. 50 m at 100 kHz
• unshielded, max. 600 m; for technological functions: No
Analog inputs
Number of analog inputs 5; 4x for U/I, 1x for R/RTD
• For current measurement 4; max.
• For voltage measurement 4; max.
• For resistance/resistance thermometer 1

measurement
permissible input voltage for voltage input 28.8 V
(destruction limit), max.
permissible input current for current input 40 mA
(destruction limit), max.
Cycle time (all channels), min. 1 ms; Dependent on the parameterized interfer-
ence frequency suppression; for details, see con-
version procedure in manual
Technical unit for temperature measurement Yes; °C/°F/K
adjustable
Input ranges (rated values), voltages
• 0 to +10 V Yes; Physical measuring range: ± 10 V
– Input resistance (0 to 10 V) 100 kΩ
• 1 V to 5 V Yes; Physical measuring range: ± 10 V
– Input resistance (1 V to 5 V) 100 kΩ
• -10 V to +10 V Yes
– Input resistance (-10 V to +10 V) 100 kΩ
• -5 V to +5 V Yes; Physical measuring range: ± 10 V
– Input resistance (-5 V to +5 V) 100 kΩ

Input ranges (rated values), currents
• 0 to 20 mA Yes; Physical measuring range: ± 20 mA
– Input resistance (0 to 20 mA) 50 Ω; Plus approx. 55 ohm for overvoltage protec-

tion by PTC
• -20 mA to +20 mA Yes
– Input resistance (-20 mA to +20 mA) 50 Ω; Plus approx. 55 ohm for overvoltage protec-
tion by PTC
• 4 mA to 20 mA Yes; Physical measuring range: ± 20 mA
– Input resistance (4 mA to 20 mA) 50 Ω; Plus approx. 55 ohm for overvoltage protec-

tion by PTC
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Input ranges (rated values), resistance ther-
mometer
• Ni 100 Yes; Standard/climate
– Input resistance (Ni 100) 10 MΩ
• Pt 100 Yes; Standard/climate
– Input resistance (Pt 100) 10 MΩ

Input ranges (rated values), resistors
• 0 to 150 ohms Yes; Physical measuring range: 0 ... 600 ohms
– Input resistance (0 to 150 ohms) 10 MΩ
• 0 to 300 ohms Yes; Physical measuring range: 0 ... 600 ohms
• 0 to 600 ohms Yes

Cable length
• shielded, max. 800 m; for U/I, 200 m for R/RTD
Analog outputs
integrated channels (AO) 2
Voltage output, short-circuit protection Yes
Cycle time (all channels), min. 1 ms; Dependent on the parameterized interfer-
ence frequency suppression; for details, see con-
version procedure in manual
Output ranges, voltage
• 0 to 10 V Yes
• 1 V to 5 V Yes
• -10 V to +10 V Yes
Output ranges, current

• 0 to 20 mA Yes
• -20 mA to +20 mA Yes
• 4 mA to 20 mA Yes
Load impedance (in rated range of output)

• with voltage outputs, min. 1 kΩ
• with voltage outputs, capacitive load, max. 100 nF
• with current outputs, max. 500 Ω
• with current outputs, inductive load, max. 1 mH
Cable length
• shielded, max. 200 m
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Analog value generation for the inputs
Integration and conversion time/resolution per
channel
• Resolution with overrange (bit including 16 bit
sign), max.
• Integration time, parameterizable Yes; 2.5 / 16.67 / 20 / 100 ms, acts on all channels
• Interference voltage suppression for inter- 400 / 60 / 50 / 10

ference frequency f1 in Hz
Smoothing of measured values
• parameterizable Yes
• Step: None Yes
• Step: low Yes
• Step: Medium Yes
• Step: High Yes
Analog value generation for the outputs

Integration and conversion time/resolution per
channel
• Resolution with overrange (bit including 16 bit
sign), max.
Settling time
• for resistive load 1.5 ms
• for capacitive load 2.5 ms
• for inductive load 2.5 ms
Encoder
Connection of signal encoders
• for voltage measurement Yes
• for current measurement as 4-wire trans- Yes

ducer
• for resistance measurement with two-wire Yes

connection
• for resistance measurement with three-wire Yes

connection
• for resistance measurement with four-wire Yes

connection
Connectable encoders
• 2-wire sensor Yes
– permissible quiescent current (2-wire 1.5 mA

sensor), max.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Encoder signals, incremental encoder (asym-
metrical)
• Input frequency, max. 100 kHz
• Counting frequency, max. 400 kHz; with quadruple evaluation
• Signal filter, parameterizable Yes
• Incremental encoder with A/B tracks, 90° Yes

phase offset
• Incremental encoder with A/B tracks, 90° Yes

phase offset and zero track
• pulse encoder Yes
• pulse encoder with direction Yes
• pulse encoder with one impulse signal per Yes

count direction
Errors/accuracies
Linearity error (relative to input range), (+/-) 0.1 %
Temperature error (relative to input range), (+/- 0.005 %/K
)
Crosstalk between the inputs, max. -60 dB
Repeat accuracy in steady state at 25 °C (rela- 0.05 %
tive to input range), (+/-)
Output ripple (relative to output range, band- 0.02 %
width 0 to 50 kHz), (+/-)
Linearity error (relative to output range), (+/-) 0.15 %
Temperature error (relative to output range), 0.005 %/K
(+/-)
Crosstalk between the outputs, max. -80 dB
Repeat accuracy in steady state at 25 °C (rela- 0.05 %
tive to output range), (+/-)
Operational error limit in overall temperature
range
• Voltage, relative to input range, (+/-) 0.3 %
• Current, relative to input range, (+/-) 0.3 %
• Resistance, relative to input range, (+/-) 0.3 %
• Resistance thermometer, relative to input Pt100 Standard: ±2 K, Pt100 Climate: ±1 K, Ni100

Standard: ±1.2 K, Ni100 Climate: ±1 K
range, (+/-)
• Voltage, relative to output range, (+/-) 0.3 %
• Current, relative to output range, (+/-) 0.3 %
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Basic error limit (operational limit at 25 °C)
• Voltage, relative to input range, (+/-) 0.2 %
• Current, relative to input range, (+/-) 0.2 %
• Resistance, relative to input range, (+/-) 0.2 %
• Resistance thermometer, relative to input Pt100 Standard: ±1 K, Pt100 Climate: ±0.5 K,

Ni100 Standard: ±0.6 K, Ni100 Climate: ±0.5 K
range, (+/-)
• Voltage, relative to output range, (+/-) 0.2 %
• Current, relative to output range, (+/-) 0.2 %
Interference voltage suppression for f = n x (f1

+/- 1 %), f1 = interference frequency
• Series mode interference (peak value of 30 dB
interference < rated value of input range),
min.
• Common mode voltage, max. 10 V
• Common mode interference, min. 60 dB; at 400 Hz: 50 dB
Interfaces
Number of PROFINET interfaces 1
1. Interface
Interface types
• RJ 45 (Ethernet) Yes; X1
• Number of ports 2
• integrated switch Yes
Protocols
• IP protocol Yes; IPv4
• PROFINET IO Controller Yes
• PROFINET IO Device Yes
• SIMATIC communication Yes
• Open IE communication Yes; Optionally also encrypted
• Web server Yes
• Media redundancy Yes
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


PROFINET IO Controller
Services
– PG/OP communication Yes
– Isochronous mode Yes
– Direct data exchange Yes; Requirement: IRT and isochronous mode

(MRPD optional)
– IRT Yes
– PROFIenergy Yes; per user program
– Prioritized startup Yes; Max. 32 PROFINET devices
– Number of connectable IO Devices, 128; In total, up to 256 distributed I/O devices can
max. be connected via AS-i, PROFIBUS or PROFINET
– Of which IO devices with IRT, max. 64
– Number of connectable IO Devices for 128

RT, max.
– of which in line, max. 128
– Number of IO Devices that can be simul- 8; in total across all interfaces

taneously activated/deactivated, max.
– Number of IO Devices per tool, max. 8
– Updating times The minimum value of the update time also de-
pends on communication share set for PROFINET
IO, on the number of IO devices, and on the
quantity of configured user data
Update time for IRT
– for send cycle of 250 µs 250 μs to 4 ms; Note: In the case of IRT with
isochronous mode, the minimum update time of
625 µs of the isochronous OB is decisive
– for send cycle of 500 µs 500 μs to 8 ms; Note: In the case of IRT with
isochronous mode, the minimum update time of
625 µs of the isochronous OB is decisive
– for send cycle of 1 ms 1 ms to 16 ms
– With IRT and parameterization of "odd" Update time = set "odd" send clock (any multiple
send cycles of 125 µs: 375 µs, 625 µs ... 3 875 µs)
Update time for RT

– for send cycle of 250 µs 250 µs to 128 ms
– for send cycle of 500 µs 500 µs to 256 ms
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


PROFINET IO Device
Services
– PG/OP communication Yes
– Isochronous mode No
– IRT Yes
– PROFIenergy Yes; per user program
– Shared device Yes
– Number of IO Controllers with shared 4

device, max.
– activation/deactivation of I-devices Yes; per user program
– Asset management record Yes; per user program
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Interface types
RJ 45 (Ethernet)
• 100 Mbps Yes
• Autonegotiation Yes
• Autocrossing Yes
• Industrial Ethernet status LED Yes
Protocols
Number of connections
• Number of connections, max. 128; via integrated interfaces of the CPU and
connected CPs / CMs
• Number of connections reserved for 10
ES/HMI/web
• Number of connections via integrated inter- 88
faces
• Number of S7 routing paths 16
Redundancy mode
• H-Sync forwarding Yes
Media redundancy
– Media redundancy only via 1st interface (X1)
– MRP Yes
– MRP interconnection, supported Yes; as MRP ring node according to IEC 62439-2
Edition 3.0
– MRPD Yes; Requirement: IRT
– Switchover time on line break, typ. 200 ms; For MRP, bumpless for MRPD
– Number of stations in the ring, max. 50

SIMATIC communication
• PG/OP communication Yes; encryption with TLS V1.3 pre-selected
• S7 routing Yes
• S7 communication, as server Yes
• S7 communication, as client Yes
• User data per job, max. See online help (S7 communication, user data
size)
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Open IE communication
• TCP/IP Yes
– Data length, max. 64 kbyte
– several passive connections per port, Yes

supported
• ISO-on-TCP (RFC1006) Yes
– Data length, max. 64 kbyte
• UDP Yes
– Data length, max. 2 kbyte; 1 472 bytes for UDP broadcast
– UDP multicast Yes; Max. 5 multicast circuits
• DHCP Yes
• DNS Yes
• SNMP Yes
• DCP Yes
• LLDP Yes
• Encryption Yes; Optional
Web server
• HTTP Yes; Standard and user pages
• HTTPS Yes; Standard and user pages
OPC UA
• Runtime license required Yes; "Small" license required
• OPC UA Client Yes
– Application authentication Yes
– Security policies Available security policies: None, Basic128Rsa15,

Basic256Rsa15, Basic256Sha256
– User authentication "anonymous" or by user name & password
– Number of connections, max. 4
– Number of nodes of the client interfac- 1 000

es, max.
– Number of elements for one call of 300
OPC_UA_NodeGetHandleList/OPC_UA_R
eadList/OPC_UA_WriteList, max.
OPC_UA_NameSpaceGetIndexList, max.
OPC_UA_MethodGetHandleList, max.
– Number of simultaneous calls of the cli- 1
ent instructions per connection (except
OPC_UA_ReadList,OPC_UA_WriteList,OP
C_UA_MethodCall), max.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


– Number of simultaneous calls of the cli- 5
ent instructions
OPC_UA_ReadList,OPC_UA_WriteList
and OPC_UA_MethodCall, max.
– Number of registerable nodes, max. 5 000
– Number of registerable method calls of 100

OPC_UA_MethodCall, max.
– Number of inputs/outputs when calling 20
OPC_UA_MethodCall, max.
• OPC UA Server Yes; Data access (read, write, subscribe), method
call, custom address space
– Application authentication Yes
– Security policies Available security policies: None, Basic128Rsa15,

Basic256Rsa15, Basic256Sha256
– User authentication "anonymous" or by user name & password
– GDS support (certificate management) Yes
– Number of sessions, max. 32
– Number of accessible variables, max. 50 000
– Number of registerable nodes, max. 10 000
– Number of subscriptions per session, 20

max.
– Sampling interval, min. 100 ms
– Publishing interval, min. 500 ms
– Number of server methods, max. 20
– Number of inputs/outputs per server 20

method, max.
– Number of monitored items, max. 1 000; for 1 s sampling interval and 1 s send in-
terval
– Number of nodes for user-defined serv- 1 000
er interfaces, max.
• Alarms and Conditions Yes
– Number of program alarms 100
– Number of alarms for system diagnos- 50

tics
Further protocols
• MODBUS Yes; MODBUS TCP
Isochronous mode
Equidistance Yes
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


S7 message functions
Number of login stations for message func- 32
tions, max.
Program alarms Yes
Number of configurable program messages, 5 000; Program messages are generated by the
max. "Program_Alarm" block, ProDiag or GRAPH
Number of loadable program messages in RUN, 2 500
max.
Number of simultaneously active program
alarms
• Number of program alarms 600
• Number of alarms for system diagnostics 100
• Number of alarms for motion technology 80

objects
Test commissioning functions
Joint commission (Team Engineering) Yes; Parallel online access possible for up to 5
engineering systems
Status block Yes; Up to 8 simultaneously (in total across all ES
clients)
Single step No
Number of breakpoints 8
Status/control
• Status/control variable Yes
• Variables Inputs/outputs, memory bits, DBs, distributed

I/Os, timers, counters
• Number of variables, max.
– of which status variables, max. 200; per job
– of which control variables, max. 200; per job

Forcing
• Forcing Yes
• Forcing, variables Peripheral inputs/outputs
• Number of variables, max. 200
Diagnostic buffer
• present Yes
• Number of entries, max. 1 000
– of which powerfail-proof 500

Traces
• Number of configurable Traces 4; Up to 512 KB of data per trace are possible
Interrupts/diagnostics/status information
Alarms
• Diagnostic alarm Yes
• Hardware interrupt Yes
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Diagnoses
• Monitoring the supply voltage Yes
• Wire-break Yes; for analog inputs/outputs, see description in

manual
• Short-circuit Yes; for analog outputs, see description in manual
• A/B transition error at incremental encoder Yes
Diagnostics indication LED

• RUN/STOP LED Yes
• ERROR LED Yes
• MAINT LED Yes
• STOP ACTIVE LED Yes
• Monitoring of the supply voltage (PWR-LED) Yes
• Channel status display Yes
• for channel diagnostics Yes; For analog inputs/outputs
• Connection display LINK TX/RX Yes
Supported technology objects

Motion Control Yes; Note: The number of technology objects
affects the cycle time of the PLC program; selec-
tion guide via the TIA Selection Tool
• Number of available Motion Control re- 800
sources for technology objects
• Required Motion Control resources

– per speed-controlled axis 40
– per positioning axis 80
– per synchronous axis 160
– per external encoder 80
– per output cam 20
– per cam track 160
– per probe 40
• Positioning axis
– Number of positioning axes at motion 5
control cycle of 4 ms (typical value)
– Number of positioning axes at motion 10
control cycle of 8 ms (typical value)
Controller
• PID_Compact Yes; Universal PID controller with integrated op-
timization
• PID_3Step Yes; PID controller with integrated optimization
for valves
• PID-Temp Yes; PID controller with integrated optimization
for temperature
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Counting and measuring
• High-speed counter Yes
Integrated Functions
Counting functions
• Continuous counting Yes
• Counter response parameterizable Yes
• Hardware gate via digital input Yes
• Software gate Yes
• Event-controlled stop Yes
• Synchronization via digital input Yes
• Counting range, parameterizable Yes
Comparator
– Number of comparators 2; per count channel; see manual for details
– Direction dependency Yes
– Can be changed from user program Yes

Position detection
• Incremental acquisition Yes
• Suitable for S7-1500 Motion Control Yes
Measuring functions
• Measuring time, parameterizable Yes
• Dynamic measurement period adjustment Yes
• Number of thresholds, parameterizable 2
Measuring range
– Frequency measurement, min. 0.04 Hz
– Frequency measurement, max. 400 kHz; with quadruple evaluation
– Cycle duration measurement, min. 2.5 µs
– Cycle duration measurement, max. 25 s

Accuracy
– Frequency measurement 100 ppm; depending on measuring interval and
signal evaluation
– Cycle duration measurement 100 ppm; depending on measuring interval and
signal evaluation
– Velocity measurement 100 ppm; depending on measuring interval and
signal evaluation
Potential separation
Potential separation digital inputs
• between the channels No
• between the channels, in groups of 16
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Potential separation digital outputs
• between the channels No
• between the channels, in groups of 16
Potential separation channels

• between the channels and backplane bus Yes
• Between the channels and load voltage L+ No
Isolation
Isolation tested with 707 V DC (type test)
Ambient conditions
Ambient temperature during operation
• horizontal installation, min. -25 °C; No condensation
• horizontal installation, max. 60 °C; note derating data for onboard I/O in the
manual. Display: 50 °C, at an operating tempera-
ture of typically 50 °C, the display is switched off
• vertical installation, min. -25 °C; No condensation
• vertical installation, max. 40 °C; note derating data for onboard I/O in the
manual. Display: 40 °C, at an operating tempera-
ture of typically 40 °C, the display is switched off
Ambient temperature during stor-
age/transportation
• min. -40 °C
• max. 70 °C
Altitude during operation relating to sea level

• Installation altitude above sea level, max. 5 000 m; Restrictions for installation altitudes > 2
000 m, see manual
Configuration
Programming
Programming language
– LAD Yes
– FBD Yes
– STL Yes
– SCL Yes
– GRAPH Yes
Know-how protection
• User program protection/password protec- Yes
tion
• Copy protection Yes
• Block protection Yes
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


Access protection
• protection of confidential configuration Yes
data
• Password for display Yes
• Protection level: Write protection Yes
• Protection level: Read/write protection Yes
• Protection level: Complete protection Yes
Cycle time monitoring

• lower limit adjustable minimum cycle time
• upper limit adjustable maximum cycle time
Dimensions
Width 110 mm
Height 147 mm
Depth 129 mm
Weights
Weight, approx. 1 360 g
Power reduction (derating) to total current of digital outputs (per power supply)
The following figure shows the load rating of the digital outputs in relation to the mounting
position and the ambient temperature.
① Horizontal mounting position

② Vertical mounting position
Figure 7-1 Loading capacity of the digital outputs per mounting position
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

The following trends shows the load rating of the digital outputs when technology functions
are used in dependence on the ambient temperature.
Figure 7-2 Load rating of the digital outputs when technology functions are used
Power reduction (derating) to total current of digital inputs (per power supply)
The following figure shows the load rating of the current for encoder supplies of digital
inputs.
Figure 7-3 Load rating of the current for encoder supplies of digital inputs
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Simultaneity of digital inputs per group

If the maximum voltage at the inputs is 24 V, all the digital inputs may be simultaneously at
high level (corresponds to 100% of the digital inputs).
If the maximum voltage at the inputs is 30 V, only 12 digital inputs of 16 digital inputs of one
group may be simultaneously at high level (corresponds to 75% of the digital inputs).
General technical specifications

For information on the general technical specifications, such as standards and approvals,
electromagnetic compatibility, protection class, etc., refer to the S7-1500, ET 200MP system
manual (http://support.automation.siemens.com/WW/view/en/59191792).
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Dimension drawings A
This appendix contains the dimension drawings of the compact CPU installed on a mounting
rail. You must take the dimensions into consideration for installation in cabinets, control
rooms, etc.
Figure A-1 Dimension drawing of CPU 1512C-1 PN – front and side views
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Dimension drawings
Figure A-2 Dimension drawing of CPU 1512C-1 PN – side view with front panel open
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Parameter data records B
B.1 Parameter assignment and structure of the parameter data
records of the analog on-board I/O
Parameter assignment in the user program

You have the option of reassigning parameters for the analog on-board I/O in RUN (for
example, measuring ranges of individual channels can be modified in RUN without affecting
the other channels).
Changing parameters in RUN

The parameters are transferred to the analog on-board I/O via data records with the WRREC
instruction. The parameters set with STEP 7 (TIA Portal) are not changed in the CPU, which
means the parameters set in STEP 7 (TIA Portal) will be valid again after a restart.
The parameters are checked for plausibility by the analog on-board I/O only after the transfer.
Output parameter STATUS

If errors occur when transferring parameters with the "WRREC" instruction, the analog on-
board I/O continues operation with the previous parameter assignment. However, a
corresponding error code is written to the STATUS output parameter.
You will find a description of the "WRREC" instruction and the error codes in the STEP 7 (TIA
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Parameter data records
B.2 Structure of a data record for input channels of the analog on-board I/O
B.2 Structure of a data record for input channels of the analog

on-board I/O
Assignment of data record and channel

The parameters for the 5 analog input channels are located in data records 0 to 4 and are
assigned as follows:
• Data record 0 for channel 0
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Data record structure

The example in the figure below shows the structure of data record 0 for channel 0. The
structure is identical for channels 1 to 4. The values in byte 0 and byte 1 are fixed and must
not be changed.
You enable a parameter by setting the corresponding bit to "1".
Figure B-1 Structure of data record 0: Bytes 0 to 6
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Codes for measurement types

The following table contains all measurement types of the inputs of the analog on-board I/O
with the corresponding codes. You must enter these codes in byte 2 of the data record for
the corresponding channel (refer to the figure Structure of data record 0: Bytes 0 to 6).
Table B- 1 Codes for measurement type
Measurement type Code

Deactivated 0000 0000
Voltage (valid for channels 0 to 3) 0000 0001
Current, 4-wire measuring transducer (valid for channels 0 to 3) 0000 0010
Resistance (valid for channel 4) 0000 0100
Thermal resistor linear (valid for channel 4) 0000 0111
Codes for measuring ranges

The following table contains all measuring ranges of the inputs of the analog on-board I/O
with the corresponding codes. You must enter these codes in each case in byte 3 of the data
record for the corresponding channel (refer to the figure Structure of data record 0: Bytes 0
to 6).
Table B- 2 Codes for measuring range
Measuring range Code

Voltage
±5 V 0000 1000
±10 V 0000 1001
1 to 5 V 0000 1010
0 to 10 V 0000 1011
Current, 4-wire measuring transducer
0 to 20 mA 0000 0010
4 to 20 mA 0000 0011
±20 mA 0000 0100
Resistance
150 Ω 0000 0001
300 Ω 0000 0010
600 Ω 0000 0011
Thermal resistor
Pt 100 Climate 0000 0000
Ni 100 Climate 0000 0001
Pt 100 Standard 0000 0010
Ni 100 Standard 0000 0011
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Codes for temperature coefficient

The following table lists all temperature coefficients for temperature measurement of the
thermal resistors along with their codes. You must enter these codes in each case in byte 4 of
the data record for the corresponding channel (refer to the figure Structure of data record 0:
Bytes 0 to 6)
Table B- 3 Codes for temperature coefficient
Temperature coefficient Code

Pt xxx
0.003851 0000 0000
0.003916 0000 0001
0.003902 0000 0010
0.003920 0000 0011
Ni xxx
0.006180 0000 1000
0.006720 0000 1001
Hardware interrupt limits

The values that can be set for hardware interrupts (high/low limit) must be within the
nominal range and overrange/underrange of the relevant measuring range.
The following tables list the permitted hardware interrupt limits. The limits depend on the
selected measurement type and measuring range.
Table B- 4 Voltage limits
Voltage
±5 V, ±10 V 1 to 5 V, 0 to 10 V
32510 32510 High limit
-32511 -4863 Low limit
Table B- 5 Current and resistance limits
Current Resistance
±20 mA 4 to 20 mA / (all configurable measuring ranges)
0 to 20 mA
32510 32510 32510 High limit
-32511 -4863 1 Low limit
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

B.3 Structure of a data record for output channels of the analog on-board I/O
Table B- 6 Limits for thermal resistor Pt 100 Standard and Pt 100 Climate
Thermal resistor
Pt 100 Standard Pt 100 Climate
°C °F K °C °F K
9999 18319 12731 15499 31099 --- High limit
-2429 -4053 303 -14499 -22899 --- Low limit
Table B- 7 Limits for thermal resistor Ni 100 Standard and Ni 100 Climate
Thermal resistor
Ni 100 Standard Ni 100 Climate
°C °F K °C °F K
2949 5629 5681 15499 31099 --- High limit
-1049 -1569 1683 -10499 -15699 --- Low limit
B.3 Structure of a data record for output channels of the analog

on-board I/O

The parameters for the 2 analog output channels are located in data records 64 and 65 and
are assigned as follows:
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


The figure below shows the structure of data record 64 for channel 0 as an example. The
structure is identical for channel 1. The values in byte 0 and byte 1 are fixed and must not be
changed.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Codes for output type

The following table contains all output types of the outputs of the analog on-board I/O with
the corresponding codes. You must enter these codes in each case in byte 2 of the data
record for the corresponding channel (see the previous figure).
Table B- 8 Codes for the output type
Output type Code

Disabled 0000 0000
Voltage 0000 0001
Current 0000 0010
Codes for output ranges

The following table contains all output ranges for voltage and current of the outputs of the
analog on-board I/O with the corresponding codes. You must enter these codes in each case
in byte 3 of the corresponding data record (see previous figure).
Table B- 9 Codes for output range
Output range for voltage Code

1 to 5 V 0000 0011
0 to 10 V 0000 0010
±10 V 0000 0000
Output range for current Code
0 to 20 mA 0000 0001
4 to 20 mA 0000 0010
±20 mA 0000 0000
Permitted substitute values

The following table lists all output ranges for the permitted substitute values. You must enter
these substitute values in each case in bytes 6 and 7 of the data record for the corresponding
channel (see the previous figure). You can find the binary representation of the output
ranges in the section Representation of output ranges (Page 203).
Table B- 10 Permitted substitute value for the output range
Output range Permitted substitute value

±10 V -32512 ... +32511
1 to 5 V -6912 ... +32511
0 to 10 V 0 ... +32511
±20 mA -32512 ... +32511
4 to 20 mA -6912 ... +32511
0 to 20 mA 0 ... +32511
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

B.4 Parameter assignment and structure of the parameter data records of the digital on-board I/O
B.4 Parameter assignment and structure of the parameter data

records of the digital on-board I/O
Parameter assignment in the user program

You have the option of reassigning parameters for the digital on-board I/O in RUN (for
example, values for input delay of individual channels can be modified in RUN without
affecting the other channels).
Changing parameters in RUN

The parameters are transferred to the digital on-board I/O via data records 0 to 15 with the
WRREC instruction. The parameters set with STEP 7 (TIA Portal) are not changed in the CPU,
which means the parameters set in STEP 7 (TIA Portal) will be valid again after a restart.
The parameters are only checked for plausibility after the transfer.
Output parameter STATUS

If errors occur when transferring parameters with the "WRREC" instruction, the digital on-
board I/O continues operation with the previous parameter assignment. However, a
corresponding error code is written to the STATUS output parameter.
You will find a description of the "WRREC" instruction and the error codes in the STEP 7 (TIA
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

B.5 Structure of a data record for input channels of the digital on-board I/O
B.5 Structure of a data record for input channels of the digital

on-board I/O

The parameters per submodule for the 32 digital input channels are located in data records 0
to 15 and are assigned as follows:
First submodule (X11):
• …
Second submodule (X12):
• …
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

B.5 Structure of a data record for input channels of the digital on-board I/O

not be changed.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

B.6 Structure of a data record for output channels of the digital on-board I/O
B.6 Structure of a data record for output channels of the digital

on-board I/O

The parameters per submodule for the 32 digital output channels are located in data records
64 to 79 and are assigned as follows:
First submodule (X11):
• …
Second submodule (X12):
• …
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

B.6 Structure of a data record for output channels of the digital on-board I/O

not be changed.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

B.7 Parameter data records of the high-speed counters

You can change the parameters of the High Speed Counter in RUN mode. The WRREC
instruction is used to transfer the parameters to the High Speed Counter using data
record 128.
If errors occur when transferring or validating parameters with the WRREC instruction, the
High Speed Counter continues operation with the previous parameter assignment. The
STATUS output parameter then contains a corresponding error code. If no error has occurred,
the length of the data actually transferred is entered in the STATUS output parameter.
You will find a description of the "WRREC" instruction and the error codes in the STEP 7
(TIA Portal) online help.

The following table shows you the structure of data record 128 with the counter channel.
The values in byte 0 to byte 3 are fixed and must not be changed. The value in byte 4 may
only be changed by parameter reassignment and not in RUN mode.
Table B- 11 Parameter data record 128 - HSC parameter header
Bit →
Byte 7 6 5 4 3 2 1 0
0 Major Version = 1 Minor Version = 0
1 Length of parameter data of the channel = 48
2 Reserved = 0 1)
3
1) Reserved bits must be set to 0
Table B- 12 Parameter data record 128 - operating mode
Bit →
Byte 7 6 5 4 3 2 1 0
Operating mode
4 Reserved = 0 1) Operating mode:
0000B: Deactivated
0001B: Counting
0010B: Measuring
0011 to 1111B: Reserved
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Table B- 13 Parameter data record 128 - Basic parameters
Bit →
Byte 7 6 5 4 3 2 1 0
Basic parameters
5 Reserved = 0 1) Enable Reaction to CPU STOP:
additional 00B: Output substitute
diagnostic value
interrupts2)
01B: Keep last value
10B: Continue operation
11B: Reserved
2) Must be set to 1 for the activation of the diagnostic interrupts "Missing supply voltage L+, "Illegal A/B signal ratio" and
"Hardware interrupt lost"
Table B- 14 Parameter data record 128 - Counter inputs
Bit →
Byte 7 6 5 4 3 2 1 0
Counter inputs
6 Reserved = 0 1) Signal evaluation: Signal type:
00B: Single 0000B: Pulse (A)
01B: Double 0001B: Pulse (A) and direction (B)
10B: Quadruple 0010B: Count up (A), count down (B)
11B: Reserved 0011B: Incremental encoder (A, B phase-shifted)
0100B: Incremental encoder (A, B, N)
7 Reaction to signal N: Invert direc- Reserved = Filter frequency
00B: No reaction to sig- tion 0 1) 0000B: 100 Hz
nal N 0001B: 200 Hz
01B: Synchronization at 0010B: 500 Hz
signal N 0011B: 1 kHz
10B: Capture at signal N 0100B: 2 kHz
11B: Reserved 0101B: 5 kHz
0110B: 10 kHz
0111B: 20 kHz
1000B: 50 kHz
1001B: 100 kHz
1010B: Reserved
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Table B- 15 Parameter data record 128 - Hardware interrupts
Bit →
Byte 7 6 5 4 3 2 1 0
Hardware interrupts1)
8 Reserved = Reserved = Reserved = Direction Underflow Overflow Gate stop Gate start
0 1) 0 1) 0 1) reversal (low count- (high count-
ing limit ing limit
violated) violated)
9 Synchroni- New cap- Reserved = Zero cross- Reserved = Comparison Reserved = Comparison
zation of ture value 0 1) ing 0 1) event for 0 1) event for
the counter available DQ1 oc- DQ0 oc-
by an exter- curred curred
nal signal
Table B- 16 Parameter data record 128 - Behavior DQ0/1
Bit →
Byte 7 6 5 4 3 2 1 0
Behavior of DQ0/1
10 Set output (DQ1): Set output (DQ0):
0000B: Use by user program 0000B: Use by user program
0001B: 0001B:
Counting: Between comparison value 1 and high limit; Counting: Between comparison value 0 and high limit;
Measuring: Measured value >= Comparison value 1 Measuring: Measured value >= Comparison value 0
0010B: 0010B:
Counting: Between comparison value 1 and low limit; Counting: Between comparison value 0 and low limit;
Measuring: Measured value <= Comparison value 1 Measuring: Measured value <= Comparison value 0
0011B: 0011B:
Counting: At comparison value 1 for one pulse dura- Counting: At comparison value 0 for one pulse duration;
tion; Measuring: Reserved
Measuring: Reserved
0100B: Between comparison value 0 and 1 0100B: Reserved
0101B: 0101B:
Counting: After set command from CPU until compari- Counting: After set command from CPU until compari-
son value 1; son value 0;
Measuring: Reserved Measuring: Reserved
0110B: 0110 to 1111B: Reserved
Counting: Reserved
Measuring: Not between comparison value 0 and 1
11 Count direction (DQ1): Count direction (DQ0): Reserved = 0 1) Substitute Substitute
00B: Reserved 00B: Reserved value for value for
DQ1 DQ0
01B: Up 01B: Up
10B: Down 10B: Down
11B: In both directions 11B: In both directions
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Bit →
Byte 7 6 5 4 3 2 1 0
12 Pulse duration (DQ0):
13 WORD: Value range in ms/10: 0 to 65535D
14 Pulse duration (DQ1):
15 WORD: Value range in ms/10: 0 to 65535D
Table B- 17 Parameter data record 128 - Behavior DI0
Bit →
Byte 7 6 5 4 3 2 1 0
Behavior of DI0
16 Behavior of Edge selection (DI0): Level selec- Reserved = Set function of the DI (DI0):
count value 00B: Reserved tion (DI0): 0 1) 000B: Gate start/stop (level-triggered)
after Cap-
ture (DI0): 01B: On a rising edge 0B: Active at 001B: Gate start (edge-triggered)
10B: On a falling edge high level 010B: Gate stop (edge-triggered)
0B: Continue 11B: On rising and falling 1B: Active at 011B: Synchronization
counting edge low level 100B: Enable synchronization at signal N
1B: Set to 101B: Capture
start value 110B: Digital input without function
and contin-
ue counting 111B: Reserved
Bit →
Byte 7 6 5 4 3 2 1 0
17 Behavior of DI1:
See byte 16
18 Reserved = 0 1)
19 Sync option Reserved = 0 1) Reserved = 0 1)
0B: Once
1B: Periodi-
cally
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Bit →
Byte 7 6 5 4 3 2 1 0
Values
20-23 High counting limit:
DWORD: Value range: –2147483648 to 2147483647D or 80000000 to 7FFFFFFFH
24-27 Comparison value 0:
Counting mode: DWORD Value range: –2147483648 to 2147483647D or 80000000 to 7FFFFFFFH;
Measuring mode: REAL Floating-point number in the set unit of the measured variable
28-31 Comparison value 1:
Counting mode: DWORD Value range: –2147483648 to 2147483647D: or 80000000 to 7FFFFFFFH;
Measuring mode: REAL Floating-point number in the set unit of the measured variable
32-35 Start value:
36-39 Low counting limit:
40-43 Update time:
DWORD: Value range in μs: 0 to 25000000D
Table B- 20 Parameter data record 128 - Counter behavior at limits and at gate start
Bit →
Byte 7 6 5 4 3 2 1 0
Counter behavior at limits and at gate start
44 Response to gate start: Response to counting limit violation: Reset at counting limit violation:
00B: Set to start value 000B: Stop counting 000B: To other counting limit
01B: Continue with current 001B: Continue counting 001B: On start value
value
10 to 11B: Reserved 010 to 111B: Reserved 010 to 111B: Reserved
Table B- 21 Parameter data record 128 - Specify measured value
Bit →
Byte 7 6 5 4 3 2 1 0
Specify measured value
45 Reserved = 0 1) Time base for velocity measurement: Measured variable:
000B: 1 ms 00B: Frequency
001B: 10 ms 01B: Period duration
010B: 100 ms 10B: Velocity
011B: 1 s 11B: Reserved
100B: 60 s/1 min
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Bit →
Byte 7 6 5 4 3 2 1 0
46 Increments per unit:
47 WORD: Value range: 1 to 65535D
48 Set hysteresis range:
Value range: 0 to 255D
49 Use of Reserved = 0 1) Selection HSC DI0
HSC DI0 Value range (applicable if the CPU is configured with deactivated
0B: Not used 'Front connector assignment like 1511C' setting):
1B: Used HSC1..3:
01000B: Front connector X11, terminal 11 (DI8)
HSC4..6:
All other values: Reserved
Note: If the CPU with enabled 'Front connector assignment like 1511C'
setting is configured, the parameter data record definition of CPU
1511C applies. See device manual of CPU 1511C.
50 Use of Reserved = 0 1) Selection HSC DI1
HSC DI1 Value range (applicable if the CPU is configured with deactivated
0B: Not used 'Front connector assignment like 1511C' setting):
1B: Used HSC1..3:
HSC4..6:
Note: If the CPU with enabled 'Front connector assignment like 1511C'
setting is configured, the parameter data record definition of CPU
1511C applies. See device manual of CPU 1511C.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

B.8 Parameter data records (PWM)
Bit →
Byte 7 6 5 4 3 2 1 0
51 Use of Reserved = 0 1) Selection HSC DQ1
HSC DQ1 Value range:
0B: Not used HSC1:
1B: Used 00001B: Front connector X11, terminal 22 (DQ1)
01001B: Front connector X11, terminal 32 (DQ9)
HSC2:
HSC3:
HSC4:
HSC5:
HSC6:

You have the option of reassigning the pulse width modulation parameters in RUN. The
parameters are transferred with the instruction WRREC via the data record 128 to the PWM
submodule.
If errors occur when transferring or validating parameters with the WRREC instruction, the
module continues operation with the previous parameter assignment. The output parameter
STATUS then contains a corresponding error code. If no error has occurred, the length of the
data actually transferred is entered in the output parameter STATUS.
You can find a description of the "WRREC" instruction and the error codes in the STEP 7 (TIA
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


The following table shows the structure of the data record 128 for the pulse width
modulation. The values in byte 0 to byte 3 are fixed and must not be changed.
Table B- 22 Parameter data record 128
Bit →
Byte 7 6 5 4 3 2 1 0
0 Major Version = 1 Minor Version = 0
1 Length of the parameter data of the channel in bytes = 12
2 Reserved = 0 1)
3
4 Current Dithering High-speed output Operating mode
control
0B: Deac- 0B: Deac- 0B: Deactivated 0000B: Reserved
tivated tivated
1B: Reserved 1B: Reserved 01B: Activated 0001B: PWM (pulse-width modulation)
10B-11B: Reserved 0010B: Reserved
0011B: Reserved
0100B: Frequency output
0110B to 1110B: Reserved
1111B: Deactivated
5 Reserved = 0 1) Reserved = 0 1) Diagnostics Reaction to CPU STOP
interrupt
0B: Deac- 00B: DQ substitute value
tivated
1B: Activat- 01B: Reserved
ed 10B: Operating mode for
continuation of operation
11B: Reserved
6 Reserved = 0 1) Pulse output (DQA) selection
Range of values for PWM1:
7 Reserved = 0 1) Output format Reserved = Reserved = Reserved = Substitute
0 1) 0 1) 0 1) value DQA
PWM Frequency 0B: 0 V
output
00B: S7 00B: Re- 1B: 24 V
analog served
format
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Bit →
Byte 7 6 5 4 3 2 1 0
01B: per 100 01B: 1 Hz
(%)
10B: per 10B: Re-
1000 served
11B: per 11B: Re-
10,000 served
8-11 DWORD minimum pulse duration
PWM: Minimum pulse duration (default = 0 μs)
Frequency output: Reserved
12-15 DWORD period duration
PWM: Period duration
Supported value range depending on configured values for "Pulse output (DQA)" and "High-speed output (0.1 A)"
• for 100 kHz DQ (high-speed output activated): 10 μs to 10 000 000 μs (10 s)
• for 10 kHz DQ (high-speed output deactivated): 100 μs to 10 000 000 μs (10 s)
• for 100 Hz DQ (high-speed output deactivated): 10 000 μs (10 ms) to 10 000 000 μs (10 s)
Default = 2 000 000 μs (2 s)
Frequency output: Reserved
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Analog value processing C
C.1 Conversion method
Conversion
An integrated analog-to-digital converter converts the analog signal into a digital signal in
order that the compact CPU can process the analog signal read in by an analog channel. Once
the CPU has processed the digital signal, an integrated digital-to-analog converter converts
the output signal into an analog current or voltage value.
Interference frequency suppression

The interference frequency suppression of the analog inputs suppresses the interference
caused by the frequency of the AC voltage network used. The frequency of the AC voltage
network may interfere with measured values, particularly for measurements within narrow
voltage ranges.
You set the line frequency with which the plant operates (400, 60, 50 or 10 Hz) using the
"Interference frequency suppression" parameter in STEP 7 (TIA Portal). The "Interference
frequency suppression" parameter can only be set module-wide (for all input channels). The
interference frequency suppression filters out the set interference frequency
(400/60/50/10 Hz) as well as multiples of it. The selected interference frequency suppression
also defines the integration time. The conversion time changes depending on the set
interference frequency suppression.
For example, an interference frequency suppression of 50 Hz corresponds to an integration
time of 20 ms. The analog on-board I/O supplies one measured value to the CPU every
millisecond over a period of 20 ms. This measured value corresponds to the floating mean
value of the last 20 measurements.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Analog value processing
The following figure shows how this works using a 400 Hz interference frequency
suppression as an example. A 400 Hz interference frequency suppression corresponds to an
integration time of 2.5 ms. The analog on-board I/O supplies a measured value to the CPU
every 1.25 milliseconds within the integration time.
Figure C-1 Interference frequency suppression 400 Hz
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

The following figure shows how this works using a 60 Hz interference frequency suppression
as an example. A 60 Hz interference frequency suppression corresponds to an integration
time of 16.6 ms. The analog on-board I/O supplies a measured value to the CPU every 1.04
milliseconds within the integration time.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

time of 20 ms. The analog on-board I/O supplies a measured value to the CPU every
millisecond within the integration time.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

time of 100 ms. The analog on-board I/O supplies a measured value to the CPU every
millisecond within the integration time.
The following table provides an overview of the configurable line frequencies, the integration
time and the intervals within which measured values are supplied to the CPU.
Table C- 1 Overview of the configurable line frequencies
Interference frequency suppression Integration time Interval

400 Hz 2.5 ms 2 x 1.25 ms
60 Hz 16.6 ms 16 x 1.04 ms
50 Hz 20 ms 20 x 1 ms
10 Hz 100 ms 100 x 1 ms
Note
Basic error with an integration time of 2.5 ms.
With an integration time of 2.5 ms, the measured value is changed by the following values
based on the additionally obtained basic error and noise:
• with "voltage", "current" and "resistance" by ±0.1 %
• with "Thermal resistor Pt 100 Standard" by ±0.4 K
• with "Thermal resistor Pt 100 Climatic" by ±0.3 K
• with "Thermal resistor Ni 100 Standard" by ±0.2 K
• with "Thermal resistor Ni 100 Climatic" by ±0.1 K
A detailed description of the basic and operating error is available in the function manual
Analog value processing (http://support.automation.siemens.com/WW/view/en/67989094).
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Smoothing
The individual measured values are smoothed by filtering. The smoothing can be set in 4
levels and channel-selective in STEP 7 (TIA Portal).
Smoothing time = Smoothing (k) x configured integration time
The following figure shows the time it takes for the smoothed analog value to reach
approximately 100 % depending on the set smoothing. This is valid for all signal changes at
the analog input.
① None (smoothing = 1 x integration time)

② Weak (smoothing = 4 x integration time) *
③ Medium (smoothing = 16 x integration time) *
④ Strong (smoothing = 32 x integration time) *
* The smoothing time can increase by 1 x integration time.
Figure C-5 Smoothing time depending on the set smoothing level
The following table shows the time it takes for the smoothed analog value to reach
approximately 100 % depending on the set smoothing and the set interference frequency
suppression.
Table C- 2 Smoothing time depending on the set smoothing level and interference frequency suppression
Selection of the smoothing Interference frequency suppression/smoothing time

(mean value generation from scan values) 400 Hz 60 Hz 50 Hz 10 Hz
None 2.5 ms 16.6 ms 20 ms 100 ms
Weak 10 ms 66.4 ms 80 ms 400 ms
Medium 40 ms 265.6 ms 320 ms 1600 ms
Strong 80 ms 531.2 ms 640 ms 3200 ms
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

C.2 Representation of analog values
Cycle time
The cycle times (1 ms, 1.04 ms and 1.25 ms) result from the configured interference
frequency suppression. The cycle time is independent of the number of configured analog
channels. The values for the analog input channels are detected sequentially in each cycle.
Reference
For more information on conversion time, cycle time and conversion method, refer to the
Analog value processing (http://support.automation.siemens.com/WW/view/en/67989094)
function manual.
C.2 Representation of analog values
Introduction
The analog values for all measuring ranges that you can use with the analog on-board I/O are
represented in this appendix.
For cross-product information on "analog value processing", refer to the Analog value
processing (http://support.automation.siemens.com/WW/view/en/67989094) function
manual.
Measured value resolution

Each analog value is entered left aligned into the tags. The bits marked with "x" are set to "0".
Note
This resolution does not apply to temperature values. The digitalized temperature values are
the result of a conversion in the analog on-board I/O.
Table C- 3 Resolution of the analog values
Resolution in bits Values Analog value

including sign
Decimal Hexadecimal High byte Low byte
16 1 1H Sign 0 0 0 0 0 0 0 00000001
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

C.3 Representation of input ranges

The tables below set out the digitized representation of the input ranges separately for
bipolar and unipolar input ranges. The resolution is 16 bits.
Table C- 4 Bipolar input ranges
Dec. val- Measured Data word Range

ue value in %
215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20
32767 >117.589 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Overflow
32511 117.589 0 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 Overrange
27649 100.004 0 1 1 0 1 1 0 0 0 0 0 0 0 0 0 1
27648 100.000 0 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0
1 0.003617 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0.000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Nominal
-1 -0.003617 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 range
-27648 -100.000 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0
-27649 -100.004 1 0 0 1 0 0 1 1 1 1 1 1 1 1 1 1 Underrange
-32512 -117.593 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
-32768 <-117.593 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Underflow
Table C- 5 Unipolar input ranges
Dec. val- Measured Data word Range

ue value in %
215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20
32767 >117.589 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Overflow
32511 117.589 0 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 Overrange
27649 100.004 0 1 1 0 1 1 0 0 0 0 0 0 0 0 0 1
27648 100.000 0 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 Nominal
1 0.003617 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 range
0 0.000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-1 -0.003617 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Underrange
-4864 -17.593 1 1 1 0 1 1 0 1 0 0 0 0 0 0 0 0
-32768 <-17.593 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Underflow
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

C.3.1 Representation of analog values in voltage measuring ranges

The following tables list the decimal and hexadecimal values (codes) of the possible voltage
measuring ranges.
Table C- 6 Voltage measuring ranges ±10 V, ±5 V
Values Voltage measuring range Range

dec. hex. ±10 V ±5 V
32767 7FFF >11.759 V >5.879 V Overflow
32511 7EFF 11.759 V 5.879 V Overrange
27649 6C01
27648 6C00 10 V 5V Nominal range
20736 5100 7.5 V 3.75 V
1 1 361.7 µV 180.8 µV
0 0 0V 0V
-1 FFFF
-20736 AF00 -7.5 V -3.75 V
-27648 9400 -10 V -5 V
-27649 93FF Underrange
-32512 8100 -11.759 V -5.879 V
-32768 8000 <-11.759 V <-5.879 V Underflow
Table C- 7 Voltage measuring range 1 to 5 V, 0 to 10 V
Values Voltage measuring range Range

dec. hex. 1 to 5 V 0 to 10 V
32767 7FFF >5.704 V >11.759 V Overflow
32511 7EFF 5.704 V 11.759 V Overrange
27649 6C01
27648 6C00 5V 10.0 V Nominal range
20736 5100 4V 7.5 V
1 1 1 V + 144.7 µV 361.7 μV
0 0 1V 0V
-1 FFFF Underrange
-4864 ED00 0.296 V -1.759 V
-32768 8000 < 0.296 V < -1.759 V Underflow
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

C.3.2 Representation of analog values in current measuring ranges

The following tables list the decimal and hexadecimal values (codes) of the possible current
measuring ranges.
Table C- 8 Current measuring range ±20 mA
Values Current measuring range

dec. hex. ±20 mA
32767 7FFF >23.52 mA Overflow
32511 7EFF 23.52 mA Overrange
27649 6C01
27648 6C00 20 mA Nominal range
20736 5100 15 mA
1 1 723.4 nA
0 0 0 mA
-1 FFFF
-20736 AF00 -15 mA
-27648 9400 -20 mA
-32512 8100 -23.52 mA
-32768 8000 <-23.52 mA Underflow
Table C- 9 Current measuring ranges 0 to 20 mA and 4 to 20 mA
Values Current measuring range

dec. hex. 0 to 20 mA 4 to 20 mA
32767 7FFF >23.52 mA >22.81 mA Overflow
32511 7EFF 23.52 mA 22.81 mA Overrange
27649 6C01
27648 6C00 20 mA 20 mA Nominal range
20736 5100 15 mA 16 mA
1 1 723.4 nA 4 mA + 578.7 nA
0 0 0 mA 4 mA
-1 FFFF Underrange
-4864 ED00 -3.52 mA 1.185 mA
-32768 8000 <-3.52 mA <1.185 mA Underflow
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

C.3.3 Representation of the analog values of resistance-type sensors/resistance-

type thermometers
The following tables list the decimal and hexadecimal values (codes) of the possible
resistance-type sensor ranges.
Table C- 10 Resistance-type sensors of 150 Ω, 300 Ω and 600 Ω
Values Resistance-type sensor range

dec. hex. 150 Ω 300 Ω 600 Ω
32767 7FFF >176.38 Ω >352.77 Ω >705.53 Ω Overflow
32511 7EFF 176.38 Ω 352.77 Ω 705.53 Ω Overrange
27649 6C01
27648 6C00 150 Ω 300 Ω 600 Ω Nominal range
20736 5100 112.5 Ω 225 Ω 450 Ω
1 1 5.43 mΩ 10.85 mΩ 21.70 mΩ
0 0 0Ω 0Ω 0Ω
Table C- 11 Resistance-type thermometer Pt 100 Standard
Pt 100 Values Pt 100 Values Pt 100 Values Range

Standard Standard Standard
dec. hex. dec. hex. dec. hex.
in °C in °F in K
(1 digit = (1 digit = (1 digit =
0.1°C) 0.1 °F) 0.1 K)
> 1000.0 32767 7FFF > 1832.0 32767 7FFF > 1273.2 32767 7FFF Overflow
1000.0 10000 2710 1832.0 18320 4790 1273.2 12732 31BC Overrange
: : : : : : : : :
850.1 8501 2135 1562.1 15621 3D05 1123.3 11233 2BE1
850.0 8500 2134 1562.0 15620 3D04 1123.2 11232 2BE0 Nominal range
: : : : : : : : :
-200.0 -2000 F830 -328.0 -3280 F330 73.2 732 2DC
-200.1 -2001 F82F -328.1 -3281 F32F 73.1 731 2DB Underrange
: : : : : : : : :
-243.0 -2430 F682 -405.4 -4054 F02A 30.2 302 12E
< -243.0 -32768 8000 < -405.4 -32768 8000 < 30.2 32768 8000 Underflow
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Table C- 12 Resistance-type thermometer Pt 100 Climate
Pt 100 Climate/ Values Pt 100 Climate/ Values Range

in °C in °F
dec. hex. dec. hex.
(1 digit = 0.01 °C) (1 digit = 0.01 °F)
> 155.00 32767 7FFF > 311.00 32767 7FFF Overflow
155.00 15500 3C8C 311.00 31100 797C Overrange
: : : : : :
130.01 13001 32C9 266.01 26601 67E9
130.00 13000 32C8 266.00 26600 67E8 Nominal range
: : : : : :
-120.00 -12000 D120 -184.00 -18400 B820
-120.01 -12001 D11F -184.01 -18401 B81F Underrange
: : : : : :
-145.00 -14500 C75C -229.00 -22900 A68C
< -145.00 -32768 8000 < -229.00 -32768 8000 Underflow
Table C- 13 Resistance-type thermometer Ni 100 standard
Ni 100 Values Ni 100 Values Ni 100 Values Range

Standard Standard Standard
dec. hex. dec. hex. dec. hex.
in °C in °F in K
(1 digit = (1 digit = (1 digit =
0.1 °C) 0.1 °F) 0.1 K)
> 295.0 32767 7FFF > 563.0 32767 7FFF > 568.2 32767 7FFF Overflow
295.0 2950 B86 563.0 5630 15FE 568.2 5682 1632 Overrange
: : : : : : : : :
250.1 2501 9C5 482.1 4821 12D5 523.3 5233 1471
250.0 2500 9C4 482.0 4820 12D4 523.2 5232 1470 Nominal range
: : : : : : : : :
-60.0 -600 FDA8 -76.0 -760 FD08 213.2 2132 854
-60.1 -601 FDA7 -76.1 -761 FD07 213.1 2131 853 Underrange
: : : : : : : : :
-105.0 -1050 FBE6 -157.0 -1570 F9DE 168.2 1682 692
< -105.0 -32768 8000 < -157.0 -32768 8000 < 168.2 32768 8000 Underflow
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Table C- 14 Resistance-type thermometer Ni 100 Climate
Ni 100 Climate in °C Values Ni 100 Climate in Values Range

(1 digit = 0.01 °C) °F
dec. hex. dec. hex.
(1 digit = 0.01 °F)
> 155.00 32767 7FFF > 311.00 32767 7FFF Overflow
155.00 15500 3C8C 311.00 31100 797C Overrange
: : : : : :
130.01 13001 32C9 266.01 26601 67E9
130.00 13000 32C8 266.00 26600 67E8 Nominal range
: : : : : :
-60.00 -6000 E890 -76.00 -7600 E250
-60.01 -6001 E88F -76.01 -7601 E24F Underrange
: : : : : :
-105.00 -10500 D6FC -157.00 -15700 C2AC
< - 105.00 -32768 8000 < - 157.00 -32768 8000 Underflow
C.3.4 Measured values for wire break diagnostics
Measured values for "Wire break" diagnostics as a function of diagnostics enables

With suitable parameter assignment, events that occur trigger a diagnostics entry and a
diagnostics interrupt.
Table C- 15 Measured values for wire break diagnostics
Format Parameter assignment Measured values Explanation

S7 • "Wire break" diagnostics enabled 32767 7FFFH "Wire break" or "Cable break" diagnostics
alarm
• "Overflow/Underflow" diagnostics
enabled or disabled
("Wire break" diagnostics has a higher
priority than "Overflow/Underflow"
diagnostics)
• "Wire break" diagnostics disabled -32767 8000 H • Measured value after leaving the under-
• "Overflow/Underflow" diagnostics range
enabled • Diagnostics alarm "Low limit" violated
• "Wire break" diagnostics disabled -32767 8000 H Measured value after leaving the underrange
• "Overflow/Underflow" diagnostics
disabled
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

C.4 Representation of output ranges

The tables below set out the digitalized representation of the output ranges separately for
bipolar and unipolar ranges. The resolution is 16 bits.
Table C- 16 Bipolar output ranges
Dec. value Output Data word Range

value in %
21 21 21 21 21 21 29 28 27 26 25 24 23 22 21 20
5 4 3 2 1 0
32511 117.589 0 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 Maximum output

value*
32511 117.589 0 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 Overrange
27649 100.004 0 1 1 0 1 1 0 0 0 0 0 0 0 0 0 1
27648 100.000 0 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 Nominal range
1 0.003617 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0.000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-1 -0.003617 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
-27648 -100.000 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0
-27649 -100.004 1 0 0 1 0 0 1 1 1 1 1 1 1 1 1 1 Underrange
-32512 -117.593 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
-32512 -117.593 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 Minimum output
value**
* When values > 32511 are specified, the output value is limited to 117.589%.
** When values < -32512 are specified, the output value is limited to -117.593%.
Table C- 17 Unipolar output ranges
Dec. value Output Data word Range

value in %
21 21 21 21 21 21 29 28 27 26 25 24 23 22 21 20
5 4 3 2 1 0
32511 117.589 0 1 1 1 1 1 1 1 x x x x x x x x Maximum output

value*
32511 117.589 0 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 Overrange
27649 100.004 0 1 1 0 1 1 0 0 0 0 0 0 0 0 0 1
27648 100.000 0 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 Nominal range
1 0.003617 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0.000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Minimum output
value**
* When values > 32511 are specified, the output value is limited to 117.589%.
** When values < 0 are specified, the output value is limited to 0%.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

C.4.1 Representation of analog values in the voltage output ranges

The tables below list the decimal and hexadecimal values (codes) of the possible voltage
output ranges.
Table C- 18 Voltage output range ±10 V
Values Voltage output range Range

dec. hex. ±10 V
>117.589% >32511 >7EFF 11.76 V Maximum output value
117.589% 32511 7EFF 11.76 V Overrange
27649 6C01
100% 27648 6C00 10 V
75% 20736 5100 7.5 V
0.003617% 1 1 361.7 µV
0% 0 0 0V
-1 FFFF -361.7 µV Nominal range
-75% -20736 AF00 -7.5 V
-100% -27648 9400 -10 V

-117.593% -32512 8100 -11.76 V
<-117.593% <-32512 < 8100 -11.76 V Minimum output value
Table C- 19 Voltage output range 0 V to 10 V

dec. hex. 0 to 10 V
117.589% 32511 7EFF 11.76 V Overrange
27649 6C01
100% 27648 6C00 10 V Nominal range
75% 20736 5100 7.5 V
0.003617% 1 1 361.7 µV
0% 0 0 0V
<0% <0 <0 0V Minimum output value
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Table C- 20 Voltage output range 1 V to 5 V

dec. hex. 1 to 5 V
117.589% 32511 7EFF 5.70 V Overrange
27649 6C01
100% 27648 6C00 5V Nominal range
75% 20736 5100 4V
0.003617% 1 1 1 V +144.7 µV
0% 0 0 1V
-1 FFFF 1 V -144.7 µV Underrange
-25% -6912 E500 0V
<-25% <-6912 <E500 0V Minimum output value
C.4.2 Representation of analog values in the current output ranges

The tables below list the decimal and hexadecimal values (codes) of the possible current
output ranges.
Table C- 21 Current output range ±20 mA
Values Current output range Range

dec. hex. ±20 mA
>117.589% >32511 >7EFF 23.52 mA Maximum output value
117.589% 32511 7EFF 23.52 mA Overrange
27649 6C01
100% 27648 6C00 20 mA
75% 20736 5100 15 mA
0.003617% 1 1 723.4 mA
0% 0 0 0 mA
-1 FFFF -723.4 mA Nominal range
-75% -20736 AF00 -15 mA
-100% -27648 9400 -20 mA
-117.593% -32512 8100 -23.52 mA
<-117.593% <-32512 <8100 -23.52 mA Minimum output value
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Table C- 22 Current output range 0 to 20 mA

dec. hex. 0 to 20 mA
117.589% 32511 7EFF 23.52 mA Overrange
27649 6C01
100% 27648 6C00 20 mA
75% 20736 5100 15 mA
0.003617% 1 1 723.4 mA Nominal range
0% 0 0 0 mA
<0% <0 <0 0 mA Minimum output value
Table C- 23 Current output range 4 to 20 mA

dec. hex. 4 to 20 mA
117.589% 32511 7EFF 22.81 mA Overrange
27649 6C01
100% 27648 6C00 20 mA
75% 20736 5100 16 mA
0.003617% 1 1 4 mA Nominal range
0% 0 0 4 mA
-1 FFFF Underrange
-25% -6912 E500 0 mA
<-25% <-6912 <E500 0 mA Minimum output value
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)


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Parameter data records B

Analog value processing C

Siemens AG A5E40898741-AB Copyright © Siemens AG 2017 - 2021.

Purpose of the documentation

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Please also observe notes marked as follows:

Siemens Industry Online Support

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

B.7 Parameter data records of the high-speed counters .......................................................... 181

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Manual Collection S7-1500/ET 200MP

SIMATIC S7-1500 comparison list for programming languages

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

New functions of the CPU in firmware version V2.9

New functions Applications Customer benefits Where can I find in-

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

New functions Applications Customer benefits Where can I find in-

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

2.2 Area of application of the SIMATIC S7-1500 CPUs

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Performance segments of the CPUs

Table 2- 1 Standard CPUs

CPU Performance segment PROFIBUS PROFINET PROFINET Basic Work Pro-

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Table 2- 2 Redundant CPUs

CPU Performance segment PROFIBUS PROFINET PROFINET Basic Work Pro-

Table 2- 3 Compact CPUs

CPU Performance segment PROFIBUS PROFINET PROFINET Basic Work Pro-

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Table 2- 4 Fail-safe CPUs

CPU Performance segment PROFIBUS PROFINET PROFINET Basic Work Pro-

CPU 1517TF- Fail-safe technology 1 1 1 -- 11 MB 2 ns

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

CPU Performance segment PROFIBUS PROFINET PROFINET Basic Work Pro-

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Table 2- 5 Technology CPUs

CPU Performance segment PROFIBUS PROFINET PROFINET Basic Work Pro-

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Performance segments of compact CPUs

CPU 1511C-1 PN CPU 1512C-1 PN

Integrated Motion Control technology functions

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Additional integrated technology functions

Other technology functions

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

Design and handling

System diagnostics and alarms

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

2.3 Hardware properties and firmware functions

CPU 1512C-1 PN (6ES7512-1CK01-0AB0)

2.3.1 Hardware properties of the CPU part

View of the CPU

Figure 2-1 CPU 1512C-1 PN