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    24EC102

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    24EC102

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    Course Code L T P C

    DIGITAL PRINCIPLES AND SYSTEM DESIGN


    24EC102 (Theory Course with Laboratory Component) 3 0 2 4

    OBJECTIVES:
    The Course will enable learners to:
     acquire the knowledge in Digital fundamentals and its simplification methods.
     familiarize the design of various combinational digital circuits using logic gates.
     realize various sequential circuits using flip flops.
     elucidate various semiconductor memories and related technology.
     build various logic functions using Programmable Logic Devices

    UNIT I BOOLEAN ALGEBRA AND LOGIC GATES 9

    Review of number systems-representation-conversions, Review of Boolean algebra theorems, sum


    of product and product of sum simplification, canonical forms, min term and max term,
    Simplification of Boolean expressions-Karnaugh map, Implementation ofBoolean expressions using
    logic gates and universal gates.

    List of Exercise/Experiments:
    1. Implementation of Boolean expression using logic gates.

    UNIT II COMBINATIONAL LOGIC CIRCUITS 9

    Design of combinational circuits - Half and Full Adders, Half and Full Subtractors, BinaryParallel
    Adder – Carry look ahead Adder, Magnitude Comparator, Decoder, Encoder, Priority Encoder,
    Mux/De-mux, Parity Generator/Checker

    List of Exercise/Experiments:
    2. Design of adders
    3. Design of subtractors.
    4. Design of binary adder using IC7483
    5. Design of Multiplexers & Demultiplexers.
    6. Design of Encoders and Decoders.
    7. Implementation of a boolean function using a multiplexer
    UNIT III SEQUENTIAL CIRCUITS 9

    Flip flops – SR, JK, T, D, Master/Slave FF – operation and excitation tables, Asynchronous and
    Synchronous Counters Design - Shift registers, Universal Shift Register

    List of Exercise/Experiments:
    8. Design and implementation of 3 bit ripple counters.
    9. Design and implementation of 3 bit synchronous counter
    10. Design and implementation of shift registers

    UNIT IV SYNCHRONOUS SEQUENTIAL CIRCUITS DESIGN 9

    Design of clocked sequential circuits - Moore/Mealy models, state minimization, state


    assignment, circuit implementation

    UNIT V MEMORY AND PROGRAMMABLE LOGIC DEVICES 9

    Basic memory structure ROM: PROM – EPROM – EEPROM –RAM – Static anddynamic RAM –
    Programmable Logic Devices: Programmable Logic Array (PLA) – Programmable Array Logic
    (PAL) – Implementation of combinational logic circuits using PLA, PAL.

    TOTAL: 45 PERIODS (THEORY) + 30 PERIODS (LAB) = 75 PERIODS

    COURSE OUTCOMES:
    Upon completion of the course, the students will be able to:
    CO1: Apply Boolean algebra to simplify and implement digital circuits.
    CO2: Design combinational circuits to meet specific functional requirements using logic gates.
    CO3: Demonstrate the operation of counters and shift registers using flip-flops in sequential circuits.
    CO4: Analyze synchronous sequential circuits to determine their behavior and performance
    characteristics.
    CO5: Evaluate various types of memory devices, discussing their roles and functionalities in digital
    systems.
    CO6: Construct combinational circuits using Programmable Logic Devices (PLDs) to solve complex digital
    design problems.
    TEXTBOOKS:

    1. M. Morris Mano and Michael D. Ciletti, Digital Design, With an Introduction tothe
    Verilog HDL, VHDL, and System Verilog, 6th Edition, Pearson, 2018.
    2. S.Salivahanan and S.Arivazhagan,Digital Circuits and Design, 5th Edition,
    Oxford University Press, 2018.
    REFERENCES:
    1. A.Anandkumar, Fundamental of digital circuits, 4th Edition, PHI Publication,2016.
    2. WilliamKleitz, Digital Electronics-A Practical approach to VHDL, Prentice Hall
    International Inc, 2012.
    3. CharlesH.Roth, Jr. andLarry L. Kinney, Fundamentals of Logic Design, 7th
    Edition,Thomson Learning, 2014.
    4. Thomas L. Floyd, Digital Fundamentals, 11th Edition, Pearson Education Inc,
    2017.John.M Yarbrough, Digital Logic: Applications and Design, 1st Edition, Cengage
    India,2006

    NPTEL LINK:

    https://nptel.ac.in/courses/108105132

    LIST OF EQUIPMENT FOR A BATCH OF 30 STUDENTS

    IC Trainer Kit -15 Nos

    ICs each - 30 Nos ( 7400/ 7404 / 7486 / 7408 / 7432 / 7483 / 7473 / 7411/7474)

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