Application Report

SLVA317B – February 2009 – Revised October 2012

Create an Inverting Power Supply From a Step-Down

Regulator
David G. Daniels .............................................................................................. Swift DC/DC Converters

ABSTRACT
When generating a negative output voltage from a positive input voltage, use the buck (step down)
regulator that is already available. This step-by-step procedure helps guide the user through designing an
inverting power supply using a wide input voltage family of SWIFT dc/dc converters.
Applying duality to a buck regulator, allows the user to derive an inverting (buck-boost) regulator as shown
in the References (1 and 2) at the end of this application report .
The TPS54060A is used to demonstrate the design procedure. The design procedure is applicable to
other step down peak current mode control regulators and should be used with the complementary excel
worksheet (5). For example, higher power designs require devices with a higher current limit, such as the
TPS54360. The TPS54060A is a 0.5-A switching regulator, with a wide switching frequency range of
100 kHz to 2500 kHz and an input operating voltage of 3.5V to 60 V.

Table 1. Inverting Power Supply Requirement

VI Input voltage 24 V nominal 18 V to 30 V
Input voltage ripple < 1%
VO Output voltage –12 V
dVO Output voltage ripple < 0.5%
IO Maximum output current 0.3 A
fsw Switching frequency 500 kHz

VIN CIN
+

Cboot
Lo GND
VIN BOOT PH
Cd
R1
GND +
R2 Co
TPS54060A

VSENSE VOUT
EN

SS/TR COMP
Rcomp
RT/CLK

Czero Cpole
Css RT

Figure 1. Inverting Power Supply Schematic

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Output Voltage
The difference in the maximum input voltage, VImax, and the output voltage, VO should not exceed the
maximum operating device voltage of the regulator. For the TPS54060A, the maximum operating device
voltage, Vdevmax, is 60 V.
VImax £ Vdev max + VO (1)
æ -V ö
R1 = R2 ´ ç O - 1÷
V
è ref ø (2)
Assuming VO is –12 V and using Equation 1, the maximum input voltage for the power supply could be as
high as 48 V, easily supporting the 30-V maximum input requirement in Table 1. Use Equation 2 to
determine R1 for the output desired voltage, set R2 equal to 1 kΩ and Vref to 0.8 V for the TPS54060A. R1
equals 14 kΩ.

Input Voltage Range

The operating input voltage, VImin of the power supply should be greater than the minimum device
voltage, Vdevmin. For the TPS54060A, the Vdevmin is 3.5 V The minimum input voltage requirement for the
power supply is 18 V, thus, satisfying Equation 3.
VImin ³ Vdev min (3)

Duty Cycle
The ideal duty cycle for the inverting power supply is shown in Equation 4, neglecting the losses of the
power switching, inductor and diode drop. The output voltage, VO, is negative and the input voltage, VI, is
positive yielding a positive result for Equation 4.
- VO
D=
VI - VO (4)
The maximum duty cycle, Dmax, is calculated by using the minimum input voltage, VImin is substituted for
input voltage, VI in Equation 4. Assuming 18 V for VI and a VO of –12 V, the maximum duty cycle, Dmax,
is 0.40.

Output Current
To estimate whether the selected switching regulator will be capable of delivering the output current, use
Equation 5. The user must know the device’s minimum current limit, ICLmin, maximum duty cycle, Dmax,
and estimate the inductor ripple current value, ILripple.
ILripple
IO max £ (ICL min - ) ´ (1 - Dmax)
2 (5)
Assuming the minimum current limit is 0.6 A and the ILripple is 25% of the minimum current limit, the
maximum output current that is supported by the TPS54060A is estimated to be 315 mA.
Since the input voltage range and maximum output current is supported by the selected regulator, the next
steps are to calculate the inductor value, switching frequency and output capacitor value.
The maximum switching frequency should be calculated using the minimum controllable on time,
maximum input voltage and some of the losses in the supply. If the maximum frequency calculated is
greater than the 2500 kHz supported by the TPS54060A, limit the ƒskipmax to 2500 kHz.
1 ( - VO + Rdc ´ IO + V ¦d)
¦ skipmax £ ´
ton min (VI max - Rhs ´ IO + V ¦ d - VO ) (6)
A consideration specifically for the TPS54060A device is the frequency shift that occurs to prevent
overcurrent runaway during an output short circuit
¦ div ( - Vosc + Rdc × IO + V ¦ d)
¦ shiftmax £ ´
ton min (VImax - Rhs ´ Io + V ¦ d - VO sc) (7)

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The maximum switching frequency will be the lower frequency of ƒshiftmax or ƒskipmax. The VOsc term in
Equation 7 is the output voltage during the output fault. The ƒdiv is the frequency division. ƒdiv is 8 when
VOsc is less than 25% of the regulation voltage. See the Selecting the Switching Frequency section of
TPS54060A data sheet for more details on the frequency shift. The minimum on time, tOmin, is 130 ns and
the maximum MOSFET on resistance, Rhs, is 400 mΩ for the TPS54060A. Assuming diode voltage drop,
Vfd, is 0.5 V, inductor resistance, Rdc, is 325 mΩ, the maximum frequency calculated is 2286 kHz and
1210 kHz, using Equation 6 and Equation 7, respectively. The maximum switching frequency selected
should not be greater than 1210 kHz. Since the power supply specification requirement for the switching
frequency is 500 kHz and is lower than the 1210 kHz, no design changes are necessary.

Inductor
To determine the inductor value, calculate the average inductor current, ILavg, at the maximum output
current and maximum input voltage.
Use the maximum input voltage as a variable in Equation 4 to calculate minimum duty cycle, Dmin.
Assuming VImax is 30 V, Dmin is approximately 0.286 and ILavg is 0.42 A.
The inductor value is calculated, Equation 9, using a ripple current that is 25% of the average inductor
current. Using the Dmin to calculate the minimum inductance value gives the largest inductance.
Assuming VImax of 30 V, IO of 0.3 A and a ƒsw of 500 kHz, the Lo is calculated as 163 μH. The nearest
standard inductor of 150 μH is used for the inductor. The inductor saturation current should be greater
than the 0.548 A of peak current calculated in Equation 10. The inductor rms current should be greater
than 0.450 A calculated in Equation 11.
IO
ILavg =
1 - Dmin (8)
Vmax
I ´ Dmin
LO =
ƒsw ´ ILavg ´ 0.25
(9)
IO VImin ´ Dmax
IL peak = +
1 - Dmax 2 ´ ¦sw ´ L O (10)
0.5
æ 2
æ VI ´ D ö ö
2
ç æ IO ö 1
ILrms = ç + ´ ç ÷ ÷
ç è 1 - D ÷ø 12 è ¦ sw ´ LO ø ÷
è ø (11)

Output Capacitor
The output capacitor must supply the current when the high side switch is on. Use the minimum input
voltage to calculate the output capacitance needed. This is when the duty cycle and the peak-to-peak
current in the output capacitor is the maximum. Using the 0.5% voltage ripple specification, dVO, and
Equation 12, COmin is 4 μF. Assuming the 0.5% voltage ripple and maximum duty cycle, the Rc,
equivalent series resistance should be less than 109 mΩ, using Equation 13. The rms current for the
output capacitor is 0.245 A using Equation 14. Two 15 μF/25 V X5R in parallel are used for the output
capacitor because of the low ESR and size.
I max ´ Dmax
CO min ³ O
¦ sw ´ dVO (12)
dVO
Rc £
IO max 1 V m in ´ Dmax
+ ´ I
1 - Dmax 2 ¦ sw ´ L O (13)
0.5
æ Dmax ö
Icorms = IOmax ´ ç ÷
è 1 - Dm ax ø (14)

Diode Selection
The diode voltage needs to be greater than the difference of the maximum input voltage and output
voltage. For the example design, the diode needs to support a voltage greater than 42 V.

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Using Equation 15, the power dissipation is calculated using the diode forward voltage drop, Vƒd, at the
maximum input voltage and the average diode current. Assuming Vƒd of 0.5 V, Pdiode is 0.150 W. The
peak current in the diode is the same as the inductor, Equation 10. Select a diode which has a power
rating greater than 0.107 W and supports the inductor current.
Pdiode = V ¦ d × IO (15)

Power Dissipation in Package

The power dissipation in the package is dominated by the conduction losses and switching losses of the
power switch and should not exceed the limitations of the package. The conduction and switching losses
are calculated using Equation 16. The conduction losses are a function of the duty cycle, D, inductor rms
current, ILrms, and on resistance, Rhs. The switching losses are a function of the turn on, tr, and turn off, tf,
times, switching frequency, output current, input and output voltage.
1 æ I ö
Pdevice = D ´ IL rms2 ´ Rhs + ´ (VI - VO ) ´ ç O ÷ ´ (tr + tf ) ´ ¦sw
2 è1 - Dø (16)
ILrms is calculated to be 0.45 A at nominal duty cycle. Pdevice is 0.2295 W assuming a tr and tf of 25 ns.

Frequency Response of the Inverting Regulator

Using a buck regulator to generate a negative output does not close the feedback loop as would a buck
power supply. So, a different design method is needed. The inverting power supply transfer function has
two zeroes and a pole. Equation 17 is a simplified transfer function of an inverting power supply, see
Appendix A in References (3) or the application report (4) for more details on the derivation. The ESR
zero, ƒz1, is the same as in a Buck regulator, Equation 18, and is a function of the output capacitor and its
ESR. The other zero is a right half plane zero, ƒz2. The frequency response of the ƒz2 results in an
increasing gain and a decreasing phase. The ƒz2 frequency is a function of the duty cycle, output current,
and the inductor. Equation 19 calculates the minimum frequency of the ƒz2 which is used to determine the
crossover frequency. The dominant pole, ƒp1, is a function of the load current, output capacitor and duty
cycle, see Equation 20. Kbb is the dc gain and is used to calculate the frequency compensation
components. The gmps variable is the transconductance of the power stage, which is 1.9 A/V for the
TPS54060A.
The ƒz1 is estimated to be 1516 kHz. The output capacitor is derated by 30% because of the dc voltage
and the ESR is assumed to be 5 mΩ. The ƒz2 is estimated to be 38.3 kHz. Assuming resistance of the
inductor, Rdc is 325 mΩ. The ƒp1 is estimated to be 253 Hz assuming a nominal duty cycle. Kbb is
calculated as 38 V/V assuming nominal input voltage.
æ s ö æ s ö
ç1 + ÷ × ç1 - ÷
è 2 ´ p ´ ¦ z1 ø è 2 ´ p ´ ¦ z2 ø
T(s) = Kbb ´
s
1+
2 ´ p ´ ¦ p1 (17)
1
¦ z1 =
Rc × Co × 2 × p (18)
æ -V ö
(1 - Dmax)2 ´ ç O ÷ + Rdc × ((1 - Dmax) - Dmax)
¦ z2 = è IO ø
Dmax ´ LO ´ 2 ´ p (19)
(1 + D )
¦p1 =
æ - VO ö
ç ÷ × CO ´ 2 ´ p
è IO ø (20)
æ - VO ö
VI ´ ç ÷
è IO ø
Kbb = ´ gmps
VI + 2 ´ (- VO ) (21)

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The crossover of the power supply should be set between the ƒp1 and 1/3 of ƒz2 frequencies. It is
recommended to start with the crossover frequency, ƒco, given by Equation 22. The ƒco is estimated to
be 3.1 kHz.
¦co = ( ¦p1 × ¦ z2)0.5 (22)
The compensation resistor, Rcomp, needed to set the compensation gain at the fco frequency is calculated
using Equation 23. The Vref is 0.8 V and gmea is 92 μA/V for the TPS54060A.
æ ¦ co ö æ - VO ö
Rcomp = ç ÷ ´ ç ÷
è Kbb ´ ¦ p1 ø V
è ref ´ gm ea ø (23)
Substitute ƒco into Equation 23, to calculate Rcomp. Rcomp is equal to 52.8 kΩ. Use the nearest standard
value of 52.3 kΩ. The compensation zero is set to ½ of the dominant pole, ƒp1. To calculate the
compensation zero capacitor, Czero, use Equation 24. Equation 24 gives 24 nF, use the next larger
standard value which is 27 nF. The compensation pole is set to equal the RHP zero, ƒz2. Use
Equation 25, to calculate the frequency compensation pole, Cpole which gives 79 pF. The next standard
value is 82 pF.
1
Czero =
¦p1
´ 2p ´ Rcomp
2 (24)
1
Cpole =
¦ z2 ´ 2p ´ Rcomp
(25)

Input Capacitors
The TPS54060A needs a tightly coupled ceramic bypass capacitor, Cd in Figure 1, connected to the VIN
and GND pins of the device. Since the device GND is the power supply output voltage, the voltage rating
of the capacitor must be greater than the difference in the maximum input and output voltage of the power
supply. It is recommended to use a 1 μF/X5R/50 V.
Equation 26 to Equation 29 are used to estimate the capacitance, maximum ESR, and current rating for
the input capacitor, CI.
I ´ Dmax
IIavg = o
1 - Dmax (26)
IIavg
CI =
¦sw ´ 0.01 ´ VImin (27)
0.01 ´ Vmin
I
ESRci £
IIavg (28)
0.5
ææ æ Vmin
2 ö ö
çç I ´ Dmax ö ÷ ÷
çç ç ÷ ÷
L ´ ¦ sw ø ÷
( ) + è
2
÷ × Dmax + IIavg ´ (1 - Dmax )÷
o 2
Icirms = ç ç ILpeak - IIavg
çç 12 ÷ ÷
ç çç ÷÷ ÷
ç ÷
èè ø ø (29)

Slow Start Time

Placing a small ceramic capacitor on the SS/TR to the chip GND (that is, system VO) adjusts the slow start
time on the TPS54060A. The slow start capacitor is calculated using Equation 30. The equation assumes
a 2 μA pullup and 10% to 90% measurement for time.
tss(s) ´ 2 ´ 10 -6
Css =
Vref (V) ´ 0.8 (30)

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Frequency Set Resistor

The switching frequency is set with a resistor, RT, from the RT/CLK pin to the GND of the TPS54060A
device. Use Equation 31 to estimate the frequency set resistor.
206033
RT(kW ) =
¦ sw(kHz)1.0888 (31)

Synchronizing to an External Clock

The TPS54060A has a CLK pin that can be used to synchronize the power supply switching frequency to
an external system clock. But a level shift circuit needs to be used to translate a system ground reference
clock signal to the device’s ground.

Start Voltage
When used as a step down regulator, the TPS54060A has an adjustable start and stop voltage set by
using resistors on the EN pin. The stop voltage is lower than the start voltage. When used as an inverting
power supply only the start voltage can be useful. After the inverting power supply starts up, the effective
input voltage the TPS54060A device experiences rises as the output voltage reaches full regulation.
Therefore, it is recommended to use a lower value resistor on the high side to minimize the hysteresis
voltage. The input voltage must drop by the output voltage and the hysteresis voltage to shutdown the
supply. See the Enable and Adjusting Undervoltage Lockout section of the TPS54060A data sheet for the
equation.
VIN
+
CIN Cboot
0.1µF
Lo150 µH GND
VIN BOOT PH
Cd R1
1 µF 14 kΩ
GND + Co
R2 2x15 µF
TPS54060A 1kΩ
VSENSE VOUT
EN

SS/TR COMP
Rcomp
RT/CLK 52.3 kΩ
Cpole
Css RT Czero 82 pF
0.1 µF 237 kΩ 27 nF

Figure 2. 24 V to –12 V/0.3A Power Supply

Experimental Results
Figure 3 to Figure 16 show the experimental test results of the Figure 2 design. The discontinuous
conduction mode (DCM) to continuous conduction mode (CCM) boundary is at an output current of 27
mA. The pulse skip mode (PSM) boundary is at an output current of 2.5 mA. The input current draw at no
load at 24 V input voltage is 1.77 mA.

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100 80 20
VI = 24 V, VI = 24 V,
VO = -12 V 70 VO = -12 V 17.5
90

60 15

II - Input Current - mA
80
50 12.5

Efficiency - %
Efficiency - %

70 40 10

30 7.5
60

20 5

50
10 2.5

40 0 0
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0 0.005 0.01 0.015 0.02
IL - Load Current - A IL - Load Current - A

Figure 3. Efficiency Versus Load Current Figure 4. Light Load Efficiency Versus Load Current

100.5 1.0005
VI = 24 V, IO = 150 mA,
VO = -12 V VO = -12 V
100.3 1.0003
Normalized Output Voltage - %

Normalized Output Voltage - %

100.1 1.0001

99.9 0.9999

99.7 0.9997

99.5 0.9995
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 15 20 25 30 35
IL - Load Current - A VI - Input Voltage - V

Figure 5. Output Voltage Versus Load Current Figure 6. Output Voltage Versus Input Voltage

VO (ac) VO (ac)

IL IL

PH
PH

Figure 7. Output Voltage Ripple at 0.3 A Figure 8. Output Voltage Ripple at DCM

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VO (ac) VI (ac)

IL IL

PH PH

Figure 9. Output Voltage Ripple at PSM Figure 10. Input Ripple CCM AT IO = 0.3 A

VI (ac) VI (ac)

IL IL

PH PH

Figure 11. Input Ripple DCM Figure 12. Input Ripple PSM

VI
IL

IL

ENA
VO
VO

Figure 13. VO Startup with VI Figure 14. Start Up with EN and Input

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40 180

IO

Phase
Gain
VO
-40 -180

10 Frequency 1M

Figure 15. Load Transient Figure 16. Overall Loop Frequency Response

References
1. Using a buck converter in an inverting buck-boost topology, John Tucker, Literature Number SLYT286,
4Q 2007 Analog Applications Journal, Texas Instruments.
2. Using the TPS5430 as an Inverting Buck-Boost Converter, John Tucker, Literature number SLVA257A,
Application Report, August 20078, Texas Instruments.
3. Achieving High-Efficiency with a Multi-Output CCM Flyback Supply Using Self-Driven Synchronous
Rectifiers, Robert Kollman, Literature Number SLUP204, SEM1500 Seminar Paper, Texas
Instruments.
4. Understanding Buck-Boost Power Stages in Switch Mode Power Supplies, Everett Rogers, Literature
Number SLVA059A - March 1999 Application Report, Texas Instruments.
5. “TPS54060AINVERTING.xls” excel work sheet (SLVC211A), 2009 Texas Instruments Incorporated.
www.ti.com.

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