CLASS TEST

· St 01 'SK~EE:..A.8C,;>..::.030722 [G]

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Duration: 1:00 hr. Maximum Marks: 50

Read the following instructions carefully

1. This question paper contains 30 objective questions. Q.1-10 carry one mark each and
Q.11-30 carry two marks each .

2. Answer all the questions.

3. Questions must be answered on Objective Response Sheet (ORS) by darkening the appropriate
bubble (marked A , B, C, D) using HB pencil against the question number. Each question has
only one correct answer. In case you wish to change an answer, erase the old answer completely
using a good soft eraser.

4. There will be NEGATIVE marking. For each wrong answer 113rd of the full marks of the question
will be deducted. More than one answer marked against a question will be deemed as an
incorrect response and will be negatively marked.

5. Write your name & Roll No. at the specified locations on the right half of the ORS.
6. No charts or tables will be provided in the examination hall.

7. Choose the Closest numerical answer among the choices given.

8. If a candidate gives more than one answer, it will be treated as a wrong answer even if one
of the given answers happens to be correct and there will be same penalty as above to that
questions.

9. If a question is left blank, i.e., no answer is given by the candidate, there will be no penalty for
that question.
 2 I Electrical Engineering

v.wf]
Q.1 +
Consider the feedback amplifier shown in
the figure below:
+

. A,,

If th~ value of voltage on the secondary side

of transformer is V m(t) = V msin(rot), then
1 kQ the value of V0 is equal to
(a) 0.5Vm (b) 2Vm
Then the amplifier is a (c) Vm (d) -Vm
(a) Voltage amplifier Q.6 Consider the circuit shown in the figure
(b) Current Amplifier below
(c) Transresistance Amplifier
7.5 V lOV
( d) Transconductance Amplifier
Q.2 In a centre tap full-wave rectifier, 100 V is Sill lOkQ
the peak voltage between the centre tap and
one end of the secondary. What is the
lOkQ lOkQ
maximum voltage across the reverse biased
diode?
(a) 200V (b) 141 V If the cut-in voltage of the diode D1 is equal
(c) lO0V (d) 86 V to 0.7 V, then the value of current flowing
Q.3 An op-amp with an open loop gain of 1000 through the diode is
V/V is u~ed in the inverting configuration. (a) 0 (b) 1 mA
If in this application, the output voltage (c) 2mA (d) 3mA
nmges from +10 V to -10 V, then the Q.7 Consider a p-n-p common emitter amplifier
maximum voltage by which the virtual shown in the figure below:
ground node departs from its ideal value
is equal to
(a) +10 V from ideal voltage of V0
(b) +10 mV from ideal voltage of V 0
(c) +10 V from ideal voltage of zero
(d) +10 mV from ideal voltage of zero
Q.4 A BJT can act as a switch, when it changes -SV
from The transfer characteristic of the circuit can
(a) cut-off to active region be approximate~y l'epresented as
(b) active to saturation region Vo
(c) forward active mode to reverse active
mode
( d) saturation to cut-off region
(a)
Q.5 Consider the circuit shown in the figure
below : - -o+-- - - - - - -- v'"

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 rmmm Analog Electronics 3

(a) 149.58 mA (b) 47.61 mA

(c) 42mA (d) 18.26 mA

Q;' No. 11 to·ci No:· 30 'tarry·2 marks

. . ---·--·:,,c.-··-=-··,,. ·
.-.-..;.. ___ . ~· - · ·-.,.-~• .., ..
·each .
(b)
Q.11 Consider the circuit shown in the figure
- - - - - - -o
: +---- v'" below:
sv
lOkQ

(c)
1 V 0-- --1<.t---------l-- - o V
0

D2
4 V o---,---f<J--- - - '

If the dfodes D1 and D2 are ideal, then the

value of V0 and 10 are respectively
(d)
(a) 1 V and 0.1 mA (b) 4 V and 0.1 mA
(c) 1 V and 0.4 mA (d) 4 V and 0.4 mA

Q.8 In the figure shown below, the voltage V Q .12 Consider the circuit shown in the figure
0
- - - - - -- IB- below:
R

v.,o--{~
- v
out
+
vm sin mt ,..._,

The op-amp IB having an open loop finite

gain A 0• Rest of the parameters of op-amp
is ideal. Then value of pole for the above
(a) IV111 sin(mt)I (b) -2 Vm circuit is located at
-Ao
(c) -IV111 sin(mt)I (d) 2 Vm
(a) (RC+ 1)
Q.9 Which of the following statements is not Ao -(Ao+ 1)
correct? (c) RC (d) RC
(a) MOSFETs have lower power
Q.13 A negative feedback amplifier with open-
dissipation than BJTs.
(b) MOSFETs requires lower area for the
process of fabrication than B}Ts. loop gain is connected with a
• (J)
(c) MOSFETs are less noise than BJTs. l+J-
(d) MOSFETs can drive a larger current negative feedba~ circuit with A 0 > 0 and
than BJTs due to presence of majority feedback factor ~(> 0). The 3 dB cut-off
carriers only. frequency at which the gain of the resultant
feedback circuit reduces by a factor of 0.707
Q.10 A diode whose internal resistance is 40 Q,
IB
is used to supply power to a 1 kQ load from
(a) ffioAo~ (b) ffio(l + A0~)
a 110 V (RMS) source supply. Then the de
(c) m0 /(1 +A 0~) (d) too(1 - A0 ~)
load current will be

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 4 I Electrical Engineering
Q.14 Consider the circuit shown in the figure
below:

V,[3]D,
1=2mA lld1

R C
A diode D1 is connected in parallel with a
R C
diode D, with reverse saturation current
equal to -10-12 A and 10-10 A respectively.
The diodes are connected across a voltage
source (VJ in series with a resistance of 1 (a) 1 (b) 2
kQ. Then the value of voltage 'V; is (c) 3 (d) 4
approximately equal to
Q.18 Consider the Bff shown below:
(Assuming T) = 1 and VTh = 26 mV)
(a) 5.241 V (b) 2.004 V
(c) 2.436 V (d) 4.444 V

Q.15 In the figure shown below,

lOV

Which of the following relation is correct?

(a) Ic+I£+f3l 8 =0
1
The Vout of the circuit is _ _ _. (Assume (b) lc=f3I 8 +-Ico
the cut in voltage of the diode VY = 0.7 V) 1 + f3
(a) 8.4 V (b) 6.2 V 1
(c) lc=f3Is+--Ico
(c) 9.2V (d) 0V 1-a
(d) le= al 8 + (1 + f3)Ico
Q.16 For the operational amplifier circuit shown,
Q.19 A Bipolar junction transistor has a = 0.98,
the output saturation voltage are ±15 V. The
base current I 8 = 25 µA and lcoo = 200 nA.
upper and lower threshold voltages for the
The emitter current is
circuit are respectively,
(a) 1.05 mA (b) 1.235mA
(c) 1.33 mA (d) 1.26 mA
Q.20 Consider the circuit shown in the figure
below :
D V

'•IT· mt<l .
0

(a) +5 V and -5 V (b) +7 V and -3 V The diode 'D' can be modeled as a battery
(c) +3V and -7 V (d) +3 V and -3 V of voltage VY in series with a resistor 'r/
Q.17 In the following circuit, if the op-amp is when biased in forward direction. If th e
ideal, then the minimum required value of value of resistance R = 1 kQ, then the valu e
the ratio R2 / R1 to produce sustained of resistance r is equal to
1
oscillations will be (a) 0.923 Q (b) 7.133 Q
(c) 83.33 Q (d) 101.33 Q
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lm!!J l!I · Analog Electronics I 5

Q.21 In the diode ciicuit shown below, the value 3R

of voltage VA is (Assume V1 = 0.7 V for each
diode)
I +5V
I
I
I A t----~

o,
B
The output voltage V0 is
51&
5 5
V1 -3V2 (b) 2V1 -
(a)
2 2 V2
-lOV -SV
-3 7
(a) 2 V (b) ov (c) - V1 +-V2
2 2
(c) 1.75 V (d) -2.15 V
Q.25 Consider the circuit shown in the figure.
Q.22 The 6 V zener diode shown below has zero
Assume base-to-emitter voltage VBE = 0.8
zener resistance and a knee current of 5 mA.
V and common-base current gain (a) of the
The minimum value of R, so that the voltage
transistor is unity.
across it does not fall below 6 V is

10V

r: fv ·H
(a) 1.2 kQ
(c} 80 Q
(b) 50 Q
(d) 0Q
44kQ

16kQ
4kQ

21&

Q.23 In the circuit shown below, transistor Ml The value of the collector-to-emitter voltage
is in saturation and has transconductance VCE
gm = -0.01 S. Ignoring internal parasitic (a) 3 V (b) 4 V
capacitances and assuming the channel (c) 5 V (d) 6 V
length modulation A to be zero, then the
Q.26 In the circuit shown below, the condition
small signal input pole frequency (in kHz)
to be satisfied such that the silicon
is
transistor will never enter into saturation
is (Assume V BE= 0.7 V, V CE (sat) = 0 V)
lOkQ

~~:.FT I
Vm<>-----'VVV',-'
SkQ
+

r-
+ Boe= 50 -=. 20 V

(a) 57.87 kHz (b) 75.78 kHz

(c) 87.57 kHz (d) None

Q.24 Assuming that the op-amp in the circuit (a) Ra < 232.5 kQ (b) RB > 232.5 kQ
shown is idea l, (c) Ra < 116.25 kQ (d) R8 > 116.25 kQ

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 6 I Electrical Engineering
Q.27 Consider a differential amplifier as shown below,

Differential
Voutpul
2 Amplifier

Wh~re the first set of signals is V1 = 50 µ V, V2 = -50 µ V and the second set of signals is V1 = 1050 µ V,
V2 = 950 µV. If the common mode rejection ratio is 100, then the percentage difference in output
voltage obtained for the two sets of input signals is
(a) 10% (b) 15%
(c) 20% (d) 25%

Q.28 The op-amp shown in the figure is ideal, R1 = 20 kQ, R2 = 40 kQ and C = 10 µF:
C

>--------'---<> +
Vo"t (I)

If Vin(t) = 2e-21 u(t) V and VcC0) = 0, then V0(t) is

(a) 10 e-21 u(t) + 10 e-251 u(t)
(b) -20 e- 251 u(t) + 20 e- 21 u(t)
(c) -10 e- 21 u(t) -10 e-251 u(t)
( d) 20 e- 251 u(t) - 20 e-21 u(t)

Q.29 For a practical integrator, the component values are R1 = 120 kQ, RF = 1.2 MQ and the capacitor
CF = 10 nF. The de gain of the integrator is
(a) 10 dB (b) 20 dB
(c) 30 dB (d) 40 dB

Q.30 In the circuit below, a filter capacitor C is used to smooth out the pulses from the full wave
rectifier.

The value of capacitor C to maintain th e peak to peak ripple voltage as 1 % of maximum value of
input voltage (Vmax) is
(a) 10 µF (b) 50 µF
(c) 75 µF (d) 100 µF

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