JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

M. Tech. (EMBEDDED SYSTEMS & VLSI DESIGN/VLSI AND EMBEDDED SYSTEMS/

ELECTRONICS DESIGN TECHNOLOGY)

COURSE STRUCTURE AND SYLLABUS

I Year – II Semester
Category Course Title Int. Ext. L P C
marks marks
Core Course IV Low Power VLSI Design 25 75 4 -- 4
Core Course V CMOS Mixed Signal Circuit Design 25 75 4 -- 4
Core Course VI Real Time Operating Systems 25 75 4 -- 4
Core Elective III Digital Signal Processors and Architectures 25 75 4 -- 4
System On Chip Architecture
Embedded Networking
Core Elective IV Design for Testability 25 75 4 -- 4
Semiconductor Memory Design and Testing
Full Custom Design
Open Elective II Image and Video Processing 25 75 4 -- 4
Adhoc Wireless Networks
Sensors and Actuators
Laboratory II Embedded Systems Laboratory 25 75 -- 4 2
Seminar II Seminar 50 -- -- 4 2
Total Credits 24 8 28

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 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. Tech – I Year – II Sem. (ES & VLSID/VLSI & ES/EDT)

LOW POWER VLSI DESIGN

UNIT –I:
Fundamentals:
Need for Low Power Circuit Design, Sources of Power Dissipation – Switching Power Dissipation,
Short Circuit Power Dissipation, Leakage Power Dissipation, Glitching Power Dissipation, Short
Channel Effects –Drain Induced Barrier Lowering and Punch Through, Surface Scattering, Velocity
Saturation, Impact Ionization, Hot Electron Effect.

UNIT –II:
Low-Power Design Approaches:
Low-Power Design through Voltage Scaling – VTCMOS circuits, MTCMOS circuits, Architectural
Level Approach –Pipelining and Parallel Processing Approaches.
Switched Capacitance Minimization Approaches:
System Level Measures, Circuit Level Measures, Mask level Measures.

UNIT –III:
Low-Voltage Low-Power Adders:
Introduction, Standard Adder Cells, CMOS Adder’s Architectures – Ripple Carry Adders, Carry Look-
Ahead Adders, Carry Select Adders, Carry Save Adders, Low-Voltage Low-Power Design Techniques
–Trends of Technology and Power Supply Voltage, Low-Voltage Low-Power Logic Styles.

UNIT –IV:
Low-Voltage Low-Power Multipliers:
Introduction, Overview of Multiplication, Types of Multiplier Architectures, Braun Multiplier, Baugh-
Wooley Multiplier, Booth Multiplier, Introduction to Wallace Tree Multiplier.

UNIT –V:
Low-Voltage Low-Power Memories:
Basics of ROM, Low-Power ROM Technology, Future Trend and Development of ROMs, Basics of
SRAM, Memory Cell, Precharge and Equalization Circuit, Low-Power SRAM Technologies, Basics of
DRAM, Self-Refresh Circuit, Future Trend and Development of DRAM.

TEXT BOOKS:
1. CMOS Digital Integrated Circuits – Analysis and Design – Sung-Mo Kang, Yusuf Leblebici,
TMH, 2011.
2. Low-Voltage, Low-Power VLSI Subsystems – Kiat-Seng Yeo, Kaushik Roy, TMH Professional
Engineering.

REFERENCE BOOKS:
1. Introduction to VLSI Systems: A Logic, Circuit and System Perspective – Ming-BO Lin, CRC
Press, 2011
2. Low Power CMOS Design – AnanthaChandrakasan, IEEE Press/Wiley International, 1998.
3. Low Power CMOS VLSI Circuit Design – Kaushik Roy, Sharat C. Prasad, John Wiley & Sons,
2000.
4. Practical Low Power Digital VLSI Design – Gary K. Yeap, Kluwer Academic Press, 2002.
5. Low Power CMOS VLSI Circuit Design – A. Bellamour, M. I. Elamasri, Kluwer Academic
Press, 1995.
6. Leakage in Nanometer CMOS Technologies – Siva G. Narendran, AnathaChandrakasan,
Springer, 2005.

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 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. Tech – I Year – II Sem. (ES & VLSID/VLSI & ES/EDT)

CMOS MIXED SIGNAL CIRCUIT DESIGN

UNIT -I:
Switched Capacitor Circuits:
Introduction to Switched Capacitor circuits- basic building blocks, Operation and Analysis, Non-ideal
effects in switched capacitor circuits, Switched capacitor integrators first order filters, Switch sharing,
biquad filters.

UNIT -II:
Phased Lock Loop (PLL):
Basic PLL topology, Dynamics of simple PLL, Charge pump PLLs-Lock acquisition, Phase/Frequency
detector and charge pump, Basic charge pump PLL, Non-ideal effects in PLLs-PFD/CP non-idealities,
Jitter in PLLs, Delay locked loops, applications

UNIT -III:
Data Converter Fundamentals:
DC and dynamic specifications, Quantization noise, Nyquist rate D/A converters- Decoder based
converters, Binary-Scaled converters, Thermometer-code converters, Hybrid converters

UNIT -IV:
Nyquist Rate A/D Converters:
Successive approximation converters, Flash converter, Two-step A/D converters, Interpolating A/D
converters, Folding A/D converters, Pipelined A/D converters, Time-interleaved converters.

UNIT -V:
Oversampling Converters:
Noise shaping modulators, Decimating filters and interpolating filters, Higher order modulators, Delta
sigma modulators with multibit quantizers, Delta sigma D/A

TEXT BOOKS:
1. Design of Analog CMOS Integrated Circuits- Behzad Razavi, TMH Edition, 2002
2. CMOS Analog Circuit Design - Philip E. Allen and Douglas R. Holberg, Oxford University Press,
International Second Edition/Indian Edition, 2010.
3. Analog Integrated Circuit Design- David A. Johns,Ken Martin, Wiley Student Edition, 2013

REFERENCE BOOKS:
1. CMOS Integrated Analog-to- Digital and Digital-to-Analog converters-Rudy Van De Plassche,
Kluwer Academic Publishers, 2003
2. Understanding Delta-Sigma Data converters-Richard Schreier, Wiley Interscience, 2005.
3. CMOS Mixed-Signal Circuit Design - R. Jacob Baker, Wiley Interscience, 2009.

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 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. Tech – I Year – I Sem. (ES & VLSID/VLSI & ES/EDT)

REAL TIME OPERATING SYSTEMS

UNIT – I:
Introduction
Introduction to UNIX/LINUX, Overview of Commands, File I/O,( open, create, close, lseek, read,
write), Process Control ( fork, vfork, exit, wait, waitpid, exec.)

UNIT - II:
Real Time Operating Systems
Brief History of OS, Defining RTOS, The Scheduler, Objects, Services, Characteristics of RTOS,
Defining a Task, asks States and Scheduling, Task Operations, Structure, Synchronization,
Communication and Concurrency.
Defining Semaphores, Operations and Use, Defining Message Queue, States, Content, Storage,
Operations and Use

UNIT - III:
Objects, Services and I/O
Pipes, Event Registers, Signals, Other Building Blocks, Component Configuration, Basic I/O
Concepts, I/O Subsystem

UNIT - IV:
Exceptions, Interrupts and Timers
Exceptions, Interrupts, Applications, Processing of Exceptions and Spurious Interrupts, Real Time
Clocks, Programmable Timers, Timer Interrupt Service Routines (ISR), Soft Timers, Operations.

UNIT - V:
Case Studies of RTOS
RT Linux, MicroC/OS-II, Vx Works, Embedded Linux, Tiny OS, and Basic Concepts of Android OS.

TEXT BOOK:
Real Time Concepts for Embedded Systems – Qing Li, Elsevier, 2011

REFERENCE BOOKS:
1. Embedded Systems- Architecture, Programming and Design by Rajkamal, 2007, TMH.
2. Advanced UNIX Programming, Richard Stevens
3. Embedded Linux: Hardware, Software and Interfacing – Dr. Craig Hollabaugh

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 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. Tech – I Year – II Sem. (ES & VLSID/VLSI & ES/EDT)

DIGITAL SIGNAL PROCESSORS AND ARCHITECTURES

(Core Elective –III)

UNIT-I:
Introduction to Digital Signal Processing:
Introduction, A digital Signal – Processing system, the sampling process, Discrete time sequences,
Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), linear time-invariant systems,
Digital filters, Decimation and interpolation.
Architectures for Programmable DSP devices:
Basic Architectural features, DSP computational building blocks, Bus Architecture and Memory, Data
addressing capabilities, Address generation UNIT, programmability and program execution, speed
issues, features for external interfacing.

UNIT-II:
Programmable Digital Signal Processors:
Commercial Digital signal-processing Devices, Data Addressing modes of TMS320C54XX
processors, memory space of TMS320C54XX processors, program control, TMS320C54XX
instructions and programming, On-Chip peripherals, Interrupts of TMS320C54XX processors, Pipeline
operation of TMS320C54XX processors.

UNIT-III:
Architecture of ARM Processors:
Introduction to the architecture, Programmer’s model- operation modes and states, registers, special
registers, floating point registers, Behaviour of the application program status register(APSR)-Integer
status flags, Q status flag, GE bits, Memory system-Memory system features, memory map, stack
memory, memory protection unit (MPU), Exceptions and Interrupts-what are exceptions?, nested
vectored interrupt controller(NVIC), vector table, Fault handling, System control block (SCB), Debug,
Reset and reset sequence.
Technical Details of ARM Processors:
General information about Cortex-M3 and cortex M4 processors-Processor type, processor
architecture, instruction set, block diagram, memory system, interrupt and exception support,
Features of the cortex-M3 and Cortex-M4 Processors-Performance, code density, low power, memory
system, memory protection unit, interrupt handling, OS support and system level features, Cortex-M4
specific features, Ease of use, Debug support, Scalability, Compatibility.

UNIT-IV:
Instruction SET:
Background to the instruction set in ARM Cortex-M Processors, Comparison of the instruction set in
ARM Cortex-M Processors, understanding the assembly language syntax, Use of a suffix in
instructions, Unified assembly Language (UAL), Instruction set, Cortex-M4-specific instructions, Barrel
shifter, Accessing special instructions and special registers in Programming.

UNIT-V:
Floating Point Operations:
About Floating Point Data,Cortex-M4 Floating Point Unit (FPU)- overview, FP registers overview,
CPACR register, Floating point register bank, FPSCR, FPU->FPCCR, FPU-> FPCAR, FPU-
>FPDSCR, FPU->MVFR0, FPU->MVFR1.

TEXTBOOKS:
1. Digital Signal Processing- Avtar Singh and S. Srinivasan, CENGAGE Learning, 2004.
2. The Definitive Guide to ARM Cortex-M3 and Cortex-M4 Processors by Joseph Yiu, Elsevier
Publications, Third edition.
REFERENCES:
1. ARM System Developer’s Guide Designing and Optimizing System Software by Andrew N.
SLOSS, Dominic SYMES, Chris WRIGHT, Elsevier Publications, 2004.

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 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. Tech – I Year – II Sem. (ES & VLSID/VLSI & ES/EDT)

SYSTEM ON CHIP ARCHITECTURE

(Core Elective –III)

UNIT –I:
Introduction to the System Approach:
System Architecture, Components of the system, Hardware & Software, Processor Architectures,
Memory and Addressing. System level interconnection, An approach for SOC Design, System
Architecture and Complexity.

UNIT –II:
Processors:
Introduction , Processor Selection for SOC, Basic concepts in Processor Architecture, Basic concepts
in Processor Micro Architecture, Basic elements in Instruction handling. Buffers: minimizing Pipeline
Delays, Branches, More Robust Processors, Vector Processors and Vector Instructions extensions,
VLIW Processors, Superscalar Processors.

UNIT –III:
Memory Design for SOC:
Overview of SOC external memory, Internal Memory, Size, Scratchpads and Cache memory, Cache
Organization, Cache data, Write Policies, Strategies for line replacement at miss time, Types of
Cache, Split – I, and D – Caches, Multilevel Caches, Virtual to real translation , SOC Memory
System, Models of Simple Processor – memory interaction.

UNIT -IV:
Interconnect Customization and Configuration:
Inter Connect Architectures, Bus: Basic Architectures, SOC Standard Buses , Analytic Bus Models,
Using the Bus model, Effects of Bus transactions and contention time. SOC Customization: An
overview, Customizing Instruction Processor, Reconfiguration Technologies, Mapping design onto
Reconfigurable devices, Instance- Specific design, Customizable Soft Processor, Reconfiguration -
overhead analysis and trade-off analysis on reconfigurable Parallelism.

UNIT –V:
Application Studies / Case Studies:
SOC Design approach, AES algorithms, Design and evaluation, Image compression – JPEG
compression.

TEXT BOOKS:
1. Computer System Design System-on-Chip - Michael J. Flynn and Wayne Luk, Wiely India
Pvt. Ltd.
2. ARM System on Chip Architecture – Steve Furber –2nd Ed., 2000, Addison Wesley
Professional.

REFERENCE BOOKS:
st
1. Design of System on a Chip: Devices and Components – Ricardo Reis, 1 Ed., 2004, Springer
2. Co-Verification of Hardware and Software for ARM System on Chip Design (Embedded
Technology) – Jason Andrews – Newnes, BK and CDROM.
3. System on Chip Verification – Methodologies and Techniques –Prakash Rashinkar, Peter Paterson and
Leena Singh L, 2001, Kluwer Academic Publishers.

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 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. Tech – I Year – II Sem. (ES & VLSID/VLSI & ES/EDT)

EMBEDDED NETWORKING
(Core Elective –III)

UNIT –I:
Embedded Communication Protocols:
Embedded Networking: Introduction – Serial/Parallel Communication – Serial communication
protocols -RS232 standard – RS485 – Synchronous Serial Protocols -Serial Peripheral Interface (SPI)
– Inter Integrated Circuits (I2C) – PC Parallel port programming - ISA/PCI Bus protocols – Firewire.

UNIT –II:
USB and CAN Bus:
USB bus – Introduction – Speed Identification on the bus – USB States – USB bus communication:
Packets –Data flow types –Enumeration –Descriptors –PIC 18 Microcontroller USB Interface – C
Programs –CAN Bus – Introduction - Frames –Bit stuffing –Types of errors –Nominal Bit Timing – PIC
microcontroller CAN Interface –A simple application with CAN.

UNIT –III:
Ethernet Basics:
Elements of a network – Inside Ethernet – Building a Network: Hardware options – Cables,
Connections and network speed – Design choices: Selecting components –Ethernet Controllers –
Using the internet in local and internet communications – Inside the Internet protocol.

UNIT –IV:
Embedded Ethernet:
Exchanging messages using UDP and TCP – Serving web pages with Dynamic Data – Serving web
pages that respond to user Input – Email for Embedded Systems – Using FTP – Keeping Devices and
Network secure.

UNIT –V:
Wireless Embedded Networking:
Wireless sensor networks – Introduction – Applications – Network Topology – Localization –Time
Synchronization - Energy efficient MAC protocols –SMAC – Energy efficient and robust routing – Data
Centric routing.

TEXT BOOKS:
1. Embedded Systems Design: A Unified Hardware/Software Introduction - Frank Vahid, Tony
Givargis, John & Wiley Publications, 2002
2. Parallel Port Complete: Programming, interfacing and using the PCs parallel printer port - Jan
Axelson, Penram Publications, 1996.

REFERENCE BOOKS:
1. Advanced PIC microcontroller projects in C: from USB to RTOS with the PIC18F series -
Dogan Ibrahim, Elsevier 2008.
2. Embedded Ethernet and Internet Complete - Jan Axelson, Penram publications, 2003.
3. Networking Wireless Sensors - Bhaskar Krishnamachari‟, Cambridge press 2005.

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 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. Tech – I Year – II Sem. (ES & VLSID/VLSI & ES/EDT)

DESIGN FOR TESTABILITY

(Core Elective –IV)

UNIT -I:
Introduction to Testing:
Testing Philosophy, Role of Testing, Digital and Analog VLSI Testing, VLSI Technology Trends
affecting Testing, Types of Testing, Fault Modeling: Defects, Errors and Faults, Functional Versus
Structural Testing, Levels of Fault Models, Single Stuck-at Fault.

UNIT -II:
Logic and Fault Simulation:
Simulation for Design Verification and Test Evaluation, Modeling Circuits for Simulation, Algorithms
for True-value Simulation, Algorithms for Fault Simulation, ATPG.

UNIT -III:
Testability Measures:
SCOAP Controllability and Observability, High Level Testability Measures, Digital DFT and Scan
Design: Ad-Hoc DFT Methods, Scan Design, Partial-Scan Design, Variations of Scan.

UNIT -IV:
Built-In Self-Test:
The Economic Case for BIST, Random Logic BIST: Definitions, BIST Process, Pattern Generation,
Response Compaction, Built-In Logic Block Observers, Test-Per-Clock, Test-Per-Scan BIST
Systems, Circular Self Test Path System, Memory BIST, Delay Fault BIST.

UNIT -V:
Boundary Scan Standard:
Motivation, System Configuration with Boundary Scan: TAP Controller and Port, Boundary Scan Test
Instructions, Pin Constraints of the Standard, Boundary Scan Description Language: BDSL
Description Components, Pin Descriptions.

TEXT BOOK:
1. Essentials of Electronic Testing for Digital, Memory and Mixed Signal VLSI Circuits - M.L.
Bushnell, V. D. Agrawal, Kluwer Academic Pulishers.

REFERENCE BOOKS:
1. Digital Systems and Testable Design - M. Abramovici, M.A.Breuer and A.D Friedman, Jaico
Publishing House.
2. Digital Circuits Testing and Testability - P.K. Lala, Academic Press.

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 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. Tech – I Year – II Sem. (ES & VLSID/VLSI & ES/EDT)

SEMICONDUCTOR MEMORY DESIGN AND TESTING

(Core Elective –IV)

UNIT -I:
Random Access Memory Technologies:
SRAM – SRAM Cell structures, MOS SRAM Architecture, MOS SRAM cell and peripheral circuit
operation, Bipolar SRAM technologies, SOI technology, Advanced SRAM architectures and
technologies, Application specific SRAMs, DRAM – DRAM technology development, CMOS DRAM,
DRAM cell theory and advanced cell structures, BICMOS DRAM, soft error failure in DRAM,
Advanced DRAM design and architecture, Application specific DRAM

UNIT -II:
Non-volatile Memories:
Masked ROMs, High density ROM, PROM, Bipolar ROM, CMOS PROMS, EPROM, Floating gate
EPROM cell, One time programmable EPROM, EEPROM, EEPROM technology and architecture,
Non-volatile SRAM, Flash Memories (EPROM or EEPROM), advanced Flash memory architecture

UNIT -III:
Memory Fault Modeling Testing and Memory Design for Testability and Fault Tolerance: RAM
fault modeling, Electrical testing, Pseudo Random testing, Megabit DRAM Testing, non-volatile
memory modeling and testing, IDDQ fault modeling and testing, Application specific memory testing,
RAM fault modeling, BIST techniques for memory

UNIT -IV:
Semiconductor Memory Reliability and Radiation Effects:
General reliability issues RAM failure modes and mechanism, Non-volatile memory reliability,
reliability modeling and failure rate prediction, Design for Reliability, Reliability Test Structures,
Reliability Screening and qualification, Radiation effects, Single Event Phenomenon (SEP), Radiation
Hardening techniques, Radiation Hardening Process and Design Issues, Radiation Hardened
Memory characteristics, Radiation Hardness Assurance and Testing, Radiation Dosimetry, Water
Level Radiation Testing and Test structures

UNIT -V:
Advanced Memory Technologies and High-density Memory Packing Technologies: Ferroelectric
RAMs (FRAMs), GaAs FRAMs, Analog memories, magneto resistive RAMs (MRAMs), Experimental
memory devices, Memory Hybrids and MCMs (2D), Memory Stacks and MCMs (3D), Memory MCM
testing and reliability issues, Memory cards, High Density Memory Packaging Future Directions

TEXT BOOKS:
1. Semiconductor Memories Technology – Ashok K. Sharma, 2002, Wiley.
2. Advanced Semiconductor Memories – Architecture, Design and Applications - Ashok K.
Sharma- 2002, Wiley.
st
3. Modern Semiconductor Devices for Integrated Circuits – Chenming C Hu, 1 Ed., Prentice
Hall.

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 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. Tech – I Year – II Sem. (ES & VLSID/VLSI & ES/EDT)

FULL CUSTOM DESIGN

(Core Elective –IV)

Unit I
Introduction: Schematic fundamentals, Layout design, Introduction to CMOS VLSI manufacturing
processes, Layers and connectivity, Process design rules Significance of full custom IC design, layout
design flows.

Unit II
Advanced techniques for specialized building blocks Standard cell libraries, Pad cells and Laser fuse
cells, Advanced techniques for building blocks, Power grid Clock signals and

Unit III
Interconnect routing. Interconnect layout design, Special electrical requirements, Layout design
techniques to address electrical characteristics.

Unit IV
Layout considerations due to process constraints Large metal via implementations, Step coverage
rules, Special design rules, Latch-up and Guard rings, Constructing the pad ring, Minimizing Stress
effects.

Unit V
Proper layout CAD tools for layout, Planning tools, Layout generation tools, Support tools.

TEXT BOOKS:
1. CMOS IC Layout Concepts Methodologies and Tools, Dan Clein, Newnes, 2000.
2. The Art of Analog Layout, 2nd Edition, Ray Alan Hastings, Prentice Hall, 2006

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 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. Tech – I Year – I Sem. (ES & VLSID/VLSI & ES/EDT)

IMAGE AND VIDEO PROCESSING

(Open Elective –II)

UNIT –I:
Fundamentals of Image Processing and Image Transforms: Basic steps of Image Processing
System Sampling and Quantization of an image, Basic relationship between pixels.
Image Segmentation: Segmentation concepts, Point, Line and Edge Detection, Thresholding,
Region based segmentation.

UNIT –II:
Image Enhancement: Spatial domain methods: Histogram processing, Fundamentals of Spatial
filtering, Smoothing spatial filters, Sharpening spatial filters.
Frequency domain methods: Basics of filtering in frequency domain, image smoothing, image
sharpening, Selective filtering.

UNIT –III:
Image Compression: Image compression fundamentals - Coding Redundancy, Spatial and
Temporal redundancy, Compression models: Lossy & Lossless, Huffman coding, , Bit plane coding,
Transform coding, Predictive coding, Wavelet coding, Lossy Predictive coding, JPEG Standards.

UNIT -IV:
Basic Steps of Video Processing: Analog Video, Digital Video. Time-Varying Image Formation
models: Three-Dimensional Motion Models, Geometric Image Formation, Photometric Image
Formation, Sampling of Video signals, Filtering operations.

UNIT –V:
2-D Motion Estimation: Optical flow, General Methodologies, Pixel Based Motion Estimation, Block-
Matching Algorithm, Mesh based Motion Estimation, Global Motion Estimation, Region based Motion
Estimation, Multi resolution motion estimation, Waveform based coding, Block based transform
coding, Predictive coding, Application of motion estimation in Video coding.

TEXT BOOKS:
rd
1. Digital Image Processing – Gonzaleze and Woods, 3 Ed., Pearson.
2. Video Processing and Communication – Yao Wang, Joem Ostermann and Ya–quin Zhang.
st
1 Ed., PH Int.

REFRENCE BOOKS:
1. Digital Image Processing and Analysis-Human and Computer Vision Application with CVIP Tools
– Scotte Umbaugh, 2nd Ed, CRC Press, 2011.
2. Digital Video Processing – M. Tekalp, Prentice Hall International.
3. Digital Image Processing – S.Jayaraman, S.Esakkirajan, T.Veera Kumar – TMH, 2009.
nd
4. Multidimentional Signal, Image and Video Processing and Coding – John Woods, 2 Ed,
Elsevier.
5. Digital Image Processing with MATLAB and Labview – Vipula Singh, Elsevier.
th
6. Video Demystified – A Hand Book for the Digital Engineer – Keith Jack, 5 Ed., Elsevier.

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 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. Tech – I Year – I Sem. (ES & VLSID/VLSI & ES/EDT)

AD-HOC WIRELESS NETWORKS

(Open Elective –II)

UNIT - I:
Wireless Local Area Networks
Introduction, wireless LAN Topologies, Wireless LAN Requirements,
Physical Layer- Infrared Physical Layer, Microwave based Physical Layer Alternatives, Medium
Access Control Layer- HIPERLAN 1 Sublayer, IEEE 802.11 MAC Sublayer and Latest
Developments-802.11a, 802.11b, 802.11g
Personal Area Networks: Introduction to PAN technology and Applications, Bluetooth -specifications,
Radio Channel, Piconets and Scatternets, Inquiry, Paging and Link Establishment, Packet Format,
Link Types, Power Management, Security, Home RF -Physical and MAC Layer

UNIT - II:
MAC Protocols
Introduction, Issues in Designing a MAC protocol for Ad Hoc Wireless Networks, Design goals of a
MAC Protocol for Ad Hoc Wireless Networks, Classifications of MAC Protocols, Contention - Based
Protocols, Contention - Based Protocols with reservation Mechanisms, Contention – Based MAC
Protocols with Scheduling Mechanisms, MAC Protocols that use Directional Antennas, Other MAC
Protocols.

UNIT - III:
Routing Protocols
Introduction, Issues in Designing a Routing Protocol for Ad Hoc Wireless Networks, Classification of
Routing Protocols, Table –Driven Routing Protocols, On – Demand Routing Protocols, Hybrid Routing
Protocols, Routing Protocols with Efficient Flooding Mechanisms, Hierarchical Routing Protocols,
Power – Aware Routing Protocols.

UNIT – IV:
Transport Layer Protocols
Introduction, Issues in Designing a Transport Layer Protocol for Ad Hoc Wireless Networks, Design
Goals of a Transport Layer Protocol for Ad Hoc Wireless Networks, Classification of Transport Layer
Solutions, TCP Over Ad Hoc Wireless Networks, Other Transport Layer Protocol for Ad Hoc Wireless
Networks.

UNIT – V:
Quality of Service in Ad Hoc Wireless Networks:
Introduction, Real Time Traffic Support in Ad Hoc Wireless Networks, QoS Parameters in Ad Hoc
Wireless Network, Issues and Challenges in providing QoS in Ad Hoc Wireless Networks,
Classification of QoS Solutions: MAC Layer Solutions, Cluster TDMA, IEEE 802.11e, DBASE,
Network Layer Solutions, QoS Routing Protocols, Ticket Based QoS Routing Protocol, Predictive
Location Based QoS routing protocol, Trigger Based Distributed QoS Routing Protocol, QoS enabled
AODV Routing Protocol, Bandwidth QoS Routing Protocol, On Demand QoS Routing Protocol, On
Demand Link-State Multipath QoS Routing Protocol, Asynchronous Slot Allocation Strategies. QoS
Frameworks for Ad Hoc Wireless Networks.
TEXT BOOKS:
1. Ad Hoc Wireless Networks: Architectures and Protocols - C. Siva Ram Murthy and B.S.Manoj,
2004, PHI.
2. Wireless Networks -P Nicopolitidis and M S Obaidat, Wiley India Edition 2003.

REFERENCE BOOKS
1. Wireless Communication Technology- Roy Blake, CENGAGE,2012
2. Wireless Ad- hoc and Sensor Networks: Protocols, Performance and Control - Jagannathan
Sarangapani, CRC Press.

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 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. Tech – I Year – I Sem. (ES & VLSID/VLSI & ES/EDT)

SENSORS AND ACTUATORS

(Open Elective –II)

UNIT -I:
Sensors / Transducers: Principles – Classification – Parameters – Characteristics - Environmental
Parameters (EP) – Characterization
Mechanical and Electromechanical Sensors: Introduction – Resistive Potentiometer – Strain
Gauge – Resistance Strain Gauge – Semiconductor Strain Gauges -Inductive Sensors: Sensitivity
and Linearity of the Sensor –Types-Capacitive Sensors:– Electrostatic Transducer– Force/Stress
Sensors Using Quartz Resonators – Ultrasonic Sensors

UNIT –II:
Thermal Sensors: Introduction – Gas thermometric Sensors – Thermal Expansion Type
Thermometric Sensors – Acoustic Temperature Sensor – Dielectric Constant and Refractive Index
thermosensors – Helium Low Temperature Thermometer – Nuclear Thermometer – Magnetic
Thermometer – Resistance Change Type Thermometric Sensors –Thermoemf Sensors– Junction
Semiconductor Types– Thermal Radiation Sensors –Quartz Crystal Thermoelectric Sensors – NQR
Thermometry – Spectroscopic Thermometry – Noise Thermometry – Heat Flux Sensors
Magnetic sensors: Introduction – Sensors and the Principles Behind – Magneto-resistive Sensors –
Anisotropic Magnetoresistive Sensing – Semiconductor Magnetoresistors– Hall Effect and Sensors –
Inductance and Eddy Current Sensors– Angular/Rotary Movement Transducers – Synchros –
Synchro-resolvers - Eddy Current Sensors – Electromagnetic Flowmeter – Switching Magnetic
Sensors SQUID Sensors

UNIT -III:
Radiation Sensors: Introduction – Basic Characteristics – Types of Photosensistors/Photo
detectors– X-ray and Nuclear Radiation Sensors– Fiber Optic Sensors
Electro analytical Sensors: Introduction – The Electrochemical Cell – The Cell Potential - Standard
Hydrogen Electrode (SHE) – Liquid Junction and Other Potentials – Polarization – Concentration
Polarization-– Reference Electrodes - Sensor Electrodes – Electro ceramics in Gas Media .

UNIT -IV:
Smart Sensors: Introduction – Primary Sensors – Excitation – Amplification – Filters – Converters –
Compensation– Information Coding/Processing - Data Communication – Standards for Smart Sensor
Interface – The Automation
Sensors –Applications: Introduction – On-board Automobile Sensors (Automotive Sensors)– Home
Appliance Sensors – Aerospace Sensors –– Sensors for Manufacturing –Sensors for environmental
Monitoring

UNIT -V:
Actuators: Pneumatic and Hydraulic Actuation Systems- Actuation systems – Pneumatic and
hydraulic systems - Directional Control valves – Presure control valves – Cylinders - Servo and
proportional control valves – Process control valves – Rotary actuators
Mechanical Actuation Systems- Types of motion – Kinematic chains – Cams – Gears – Ratchet and
pawl – Belt and chain drives – Bearings – Mechanical aspects of motor selection
Electrical Actuation Systems-Electrical systems -Mechanical switches – Solid-state switches
Solenoids – D.C. Motors – A.C. motors – Stepper motors

TEXT BOOKS:
1. D. Patranabis – “Sensors and Transducers” –PHI Learning Private Limited.
2. W. Bolton – “Mechatronics” –Pearson Education Limited.

REFERENCE BOOK:
nd
1. Sensors and Actuators – D. Patranabis – 2 Ed., PHI, 2013.

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 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. Tech – I Year – I Sem. (ES & VLSID/VLSI & ES/EDT)

EMBEDDED SYSTEMS LABORATORY

Note:
 The following programs are to be implemented on ARM based Processors/Equivalent.
 Minimum of 10 programs from Part –I and 6 programs from Part -II are to be conducted.

Part -I:

The following Programs are to be implemented on ARM Processor

1. Simple Assembly Program for
a. Addition | Subtraction | Multiplication | Division
b. Operating Modes, System Calls and Interrupts
c. Loops, Branches
2. Write an Assembly programs to configure and control General Purpose Input/Output (GPIO)
port pins.
3. Write an Assembly programs to read digital values from external peripherals and execute
them with the Target board.
4. Program for reading and writing of a file
5. Program to demonstrate Time delay program using built in Timer / Counter feature on IDE
environment
6. Program to demonstrates a simple interrupt handler and setting up a timer
7. Program demonstrates setting up interrupt handlers. Press button to generate an interrupt
and trace the program flow with debug terminal.
8. Program to Interface 8 Bit LED and Switch Interface
9. Program to implement Buzzer Interface on IDE environment
10. Program to Displaying a message in a 2 line x 16 Characters LCD display and verify the
result in debug terminal.
11. Program to demonstrate I2C Interface on IDE environment
12. Program to demonstrate I2C Interface – Serial EEPROM
13. Demonstration of Serial communication. Transmission from Kit and reception from PC using
Serial Port on IDE environment use debug terminal to trace the program.
14. Generation of PWM Signal
15. Program to demonstrate SD-MMC Card Interface.

Part -II:
Write the following programs to understand the use of RTOS with ARM Processor on IDE
Environment using ARM Tool chain and Library:
1. Create an application that creates two tasks that wait on a timer whilst the main task loops.
2. Write an application that creates a task which is scheduled when a button is pressed, which
illustrates the use of an event set between an ISR and a task
3. Write an application that Demonstrates the interruptible ISRs(Requires timer to have higher
priority than external interrupt button)
4. a).Write an application to Test message queues and memory blocks.
b).Write an application to Test byte queues
5. Write an application that creates two tasks of the same priority and sets the time slice period
to illustrate time slicing.

Interfacing Programs:
6. Write an application that creates a two task to Blinking two different LEDs at different timings
7. Write an application that creates a two task displaying two different messages in LCD display
in two lines.
8. Sending messages to mailbox by one task and reading the message from mailbox by another
task.
9. Sending message to PC through serial port by three different tasks on priority Basis.
10. Basic Audio Processing on IDE environment.

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