IRF830B

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D Series Power MOSFET
D
FEATURES
• Optimal design
TO-220AB
- Low area specific on-resistance
- Low input capacitance (Ciss)
- Reduced capacitive switching losses
G
- High body diode ruggedness
- Avalanche energy rated (UIS)
S
D • Optimal efficiency and operation
G S
- Low cost
N-Channel MOSFET - Simple gate drive circuitry
- Low figure-of-merit (FOM): Ron x Qg
- Fast switching
PRODUCT SUMMARY • Material categorization: for definitions of compliance
VDS (V) at TJ max. 550 please see www.vishay.com/doc?99912
RDS(on) max. (Ω) at 25 °C VGS = 10 V 1.5
Qg max. (nC) 20 APPLICATIONS
Qgs (nC) 3 • Consumer electronics
Qgd (nC) 5 - Displays (LCD or plasma TV)
Configuration Single • Server and telecom power supplies
- SMPS
• Industrial
- Welding
- Induction heating
- Motor drives
• Battery chargers

ORDERING INFORMATION
Package TO-220AB
Lead (Pb)-free IRF830BPbF
Lead (Pb)-free and halogen-free IRF830BPbF-BE3

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT
Drain-source voltage VDS 500
Gate-source Voltage ± 30 V
VGS
Gate-source voltage AC (f > 1 Hz) 30
TC = 25 °C 5.3
Continuous drain current (TJ = 150 °C) VGS at 10 V ID
TC = 100 °C 3.4 A
Pulsed drain current a IDM 10
Linear derating factor 0.83 W/°C
Single pulse avalanche energy b EAS 28.8 mJ
Maximum power dissipation PD 104 W
Operating junction and storage temperature range TJ, Tstg -55 to +150 °C
Drain-source voltage slope TJ = 125 °C 24
dV/dt V/ns
Reverse diode dV/dt d 0.28
Soldering recommendations (peak temperature) c For 10 s 300 °C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature
b. VDD = 50 V, starting TJ = 25 °C, L = 2.3 mH, Rg = 25 Ω, IAS = 5 A
c. 1.6 mm from case
d. ISD ≤ ID, starting TJ = 25 °C

S21-1262-Rev. C, 27-Dec-2021 1 Document Number: 91520

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THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT
Maximum junction-to-ambient RthJA - 62
°C/W
Maximum junction-to-case (drain) RthJC - 1.2

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-source breakdown voltage VDS VGS = 0 V, ID = 250 μA 500 - - V
VDS temperature coefficient ΔVDS/TJ Reference to 25 °C, ID = 250 μA - 0.58 - V/°C
Gate-source threshold voltage (N) VGS(th) VDS = VGS, ID = 250 μA 3 - 5 V
Gate-source leakage IGSS VGS = ± 30 V - - ± 100 nA
VDS = 500 V, VGS = 0 V - - 1
Zero gate boltage drain current IDSS μA
VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 10
Drain-source on-state resistance RDS(on) VGS = 10 V ID = 2.5 A - 1.2 1.5 Ω
Forward transconductance a gfs VDS = 20 V, ID = 2.5 A - 1.8 - S
Dynamic
Input capacitance Ciss VGS = 0 V, - 325 -
Output capacitance Coss VDS = 100 V, - 34 -
Reverse transfer capacitance Crss f = 1 MHz - 6 -
Effective output capacitance, pF
Co(er) - 31 -
energy related b
VDS = 0 V to 400 V, VGS = 0 V
Effective output capacitance,
Co(tr) - 41 -
time related c
Total gate charge Qg - 10 20
Gate-source charge Qgs VGS = 10 V ID = 2.5 A, VDS = 400 V - 3 - nC
Gate-drain charge Qgd - 5 -
Turn-on delay time td(on) - 12 24
Rise time tr VDD = 400 V, ID = 2.5 A - 11 22
ns
Turn-off delay time td(off) Rg = 9.1 Ω, VGS = 10 V - 14 28
Fall time tf - 11 22
Gate input resistance Rg f = 1 MHz, open drain 0.8 1.7 3.4 Ω
Drain-Source Body Diode Characteristics

Continuous source-drain diode current IS MOSFET symbol D

- - 5
showing the A
integral reverse G

Pulsed diode forward current ISM P - N junction diode S

- - 20

Diode forward voltage VSD TJ = 25 °C, IS = 4 A, VGS = 0 V - - 1.2 V

Reverse recovery time trr - 320 - ns
TJ = 25 °C, IF = IS = 2.5 A,
Reverse recovery charge Qrr - 1.2 - μC
dI/dt = 100 A/μs, VR = 20 V
Reverse recovery current IRRM - 8 - A
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS.
c. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS.

S21-1262-Rev. C, 27-Dec-2021 2 Document Number: 91520

For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
 IRF830B
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

12 3
TOP 15 V TJ = 25 °C ID = 2.5 A
ID, Drain-to-Source Current (A)

14 V

On Resistance (Normalized)
13 V 2.5

RDS(on), Drain-to-Source
12 V
9 11 V
10 V
9V 2

6 1.5

8V 1 VGS = 10 V
3
7V 0.5
6V
0 0
0 5 10 15 20 25 30 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160
VDS, Drain-to-Source Voltage (V) TJ, Junction Temperature (°C)

Fig. 1 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature

8 1000
TOP 15 V
14 V TJ = 150 °C
ID, Drain-to-Source Current (A)

13 V Ciss
12 V
6 11 V
VGS = 0 V, f = 1 MHz
Capacitance (pF)

10 V
9.0 V 100 Ciss = Cgs + Cgd, Cds Shorted
8.0 V Crss = Cgd
7.0 V
6.0 V Coss = Cds + Cgd
4 Coss
5.0 V

10
Crss
2

0 1
0 5 10 15 20 25 30 0 100 200 300 400 500
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)

Fig. 2 - Typical Output Characteristics Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

12 24
VDS = 400 V
VGS, Gate-to-Source Voltage (V)
ID, Drain-to-Source Current (A)

VDS = 250 V
20 VDS = 100 V
9
16

6 12

8
TJ = 150 °C
3
4
TJ = 25 °C

0 0
0 5 10 15 20 25 0 3 6 9 12 15 18
VGS, Gate-to-Source Voltage (V) Qg, Total Gate Charge (nC)

Fig. 3 - Typical Transfer Characteristics Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

S21-1262-Rev. C, 27-Dec-2021 3 Document Number: 91520

For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
 IRF830B
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Vishay Siliconix

100 6
ISD, Reverse Drain Current (A)

ID, Drain Current (A)

TJ = 150 °C
10 4

3
TJ = 25 °C
1 2

1
VGS = 0 V
0.1 0
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 25 50 75 100 125 150
VSD, Source-Drain Voltage (V) TJ, Case Temperature (°C)

Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 9 - Maximum Drain Current vs. Case Temperature

100 625
Operation in this area
limited by RDS(on)
600
Breakdown Voltage (V)
VDS, Drain-to-Source
10
ID, Drain Current (A)

100 μs 575

1 550
Limited by RDS(on)* 1 ms

525
0.1 10 ms
TC = 25 °C
TJ = 150 °C 500
Single Pulse BVDSS Limited
0.01 475
1 10 100 1000 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160
VDS, Drain-to-Source Voltage (V)
TJ, Junction Temperature (°C)
* VGS > minimum VGS at which RDS(on) is specified

Fig. 8 - Maximum Safe Operating Area Fig. 10 - Typical Drain-to-Source Voltage vs. Temperature

1
Normalized Effective Transient

Duty Cycle = 0.5

Thermal Impedance

0.2

0.1

0.1 0.05

0.02

Single Pulse

0.01
0.0001 0.001 0.01 0.1 1
Pulse Time (s)

Fig. 11 - Normalized Thermal Transient Impedance, Junction-to-Case

S21-1262-Rev. C, 27-Dec-2021 4 Document Number: 91520

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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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 IRF830B
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RD
VDS
QG
VGS 10 V
D.U.T.
RG QGS QGD
+
- VDD

10 V VG
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

Charge
Fig. 12 - Switching Time Test Circuit
Fig. 16 - Basic Gate Charge Waveform

Current regulator
VDS Same type as D.U.T.

90 %
50 kΩ

12 V 0.2 µF
0.3 µF

+
10 % VDS
D.U.T. -
VGS
td(on) tr td(off) tf VGS

3 mA

Fig. 13 - Switching Time Waveforms

IG ID
Current sampling resistors

Fig. 17 - Gate Charge Test Circuit

L
VDS
Vary tp to obtain
required IAS

RG D.U.T +
V DD
-
IAS
10 V
tp 0.01 Ω

Fig. 14 - Unclamped Inductive Test Circuit

VDS
tp
VDD

VDS

IAS

Fig. 15 - Unclamped Inductive Waveforms

S21-1262-Rev. C, 27-Dec-2021 5 Document Number: 91520

For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
 IRF830B
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Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

+ Circuit layout considerations

D.U.T.
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
-

- +
-

Rg • dV/dt controlled by Rg +
• Driver same type as D.U.T. VDD
-
• ISD controlled by duty factor “D”
• D.U.T. - device under test

Driver gate drive

Period P.W.
D=
P.W. Period

VGS = 10 Va

D.U.T. lSD waveform

Reverse
recovery Body diode forward
current current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
VDD

Re-applied
voltage
Body diode forward drop
Inductor current

Ripple ≤ 5 % ISD

Note
a. VGS = 5 V for logic level devices

Fig. 18 - For N-Channel

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Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91520.

S21-1262-Rev. C, 27-Dec-2021 6 Document Number: 91520

For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 01-Jul-2024 1 Document Number: 91000

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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000