• subthreshold current fits a straight line on a semilog plot
• inverse of the slope of this line is called the subthreshold slope, S
• subthreshold slope indicates how much the gate voltage must drop to decrease the leakage current by an order of magnitude • A typical value is 100 mV/decade at room temperature • EQ (2.42) can be rewritten using the subthreshold slope as
K.SUJATHA , Associate Professor, BMSCE
(4) Leakage : (a)Subthreshold leakage • Find the subthreshold leakage current of an inverter at room temperature if the input A = 0. Let βn = 2βp = 1 mA/V2, n = 1.0, and |Vt| = 0.4 V. Assume the body effect and DIBL coefficients are γ = ƞ = 0.
• vT = 26 mV at room temperature • nMOS will be OFF & will see Vds = VDD, so its leakage is
K.SUJATHA , Associate Professor, BMSCE
(4) Leakage : (b)Gate leakage • According to quantum mechanics, the electron cloud surrounding an atom has a probabilistic spatial distribution • For gate oxides thinner than 15–20 Å, there is a nonzero probability that an electron in the gate will find itself on the wrong side of the oxide, where it will get whisked away through the channel • This effect of carriers crossing a thin barrier is called tunneling, & results in leakage current through the gate • Two physical mechanisms for gate tunneling are called Fowler-Nordheim (FN) tunneling & direct tunneling • FN tunneling is most important at high voltage & moderate oxide thickness & is used to program EEPROM memories • Direct tunneling is most important at lower voltage with thin oxides & is the dominant leakage component. direct gate tunneling current can be estimated as
• where A and B are technology constants.
K.SUJATHA , Associate Professor, BMSCE (4) Leakage : (b)Gate leakage • Transistors need high Cox to deliver good ON current, driving the decrease in oxide thickness • Tunneling current drops exponentially with the oxide thickness and has only recently become significant • Figure 2.21 plots gate leakage current density (current/area) JG against voltage for various oxide thicknesses
K.SUJATHA , Associate Professor, BMSCE
(4) Leakage : (b)Gate leakage • Gate leakage increases by a factor of 2.7 or more per angstrom reduction in thickness • Large tunneling currents impact not only dynamic nodes but also quiescent power consumption & thus limits equivalent oxide thicknesses tox to at least 10.5 Å to keep gate leakage below 100 A/cm2 • To keep these dimensions in perspective, recall that each atomic layer of SiO2 is about 3 Å, so such gate oxides are a handful of atomic layers thick • innovations in gate insulators with higher dielectric constants that offer good Cox while reducing tunneling • Tunneling current can be an order of magnitude higher for nMOS than pMOS transistors with SiO2 gate dielectrics because the electrons tunnel from the conduction band while the holes tunnel from the valence band and see a higher barrier • Different dielectrics may have different tunneling properties K.SUJATHA , Associate Professor, BMSCE
