LT1965 Series

1.1A, Low Noise,

Low Dropout Linear Regulator
Features Description
n Output Current: 1.1A The LT®1965 series are low noise, low dropout linear regu-
n Dropout Voltage: 310mV lators. The devices supply 1.1A of output current with a
n Low Noise: 40µVRMS (10Hz to 100kHz) 310mV typical dropout voltage. Operating quiescent current
n 500µA Quiescent Current (Adjustable Version) is 500µA for the adjustable version, reducing to <1µA in
n Wide Input Voltage Range: 1.8V to 20V shutdown. Quiescent current is well controlled; it does not
n No Protection Diodes Needed rise in dropout as with many other regulators. The LT1965
n Controlled Quiescent Current in Dropout regulators have very low output noise which makes them
n Adjustable Output from 1.20V to 19.5V ideal for sensitive RF and DSP supply applications.
n Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V
Output voltage ranges from 1.20V to 19.5V. The LT1965
n < 1µA Quiescent Current in Shutdown
regulators are stable with output capacitors as low as
n Stable with 10µF Output Capacitor
10µF. Internal protection circuitry includes reverse-battery
n Stable with Ceramic or Tantalum Capacitors
protection, current limiting with foldback, thermal limit-
n Reverse-Battery Protection
ing and reverse-current protection. The LT1965 series
n No Reverse Current
are available in fixed output voltages of 1.5V, 1.8V, 2.5V,
n Current Limit with Foldback Protection
3.3V, and as an adjustable device with a 1.20V reference
n Thermal Limiting
voltage. The package offerings include the 5-lead TO-220,
n 5-Lead TO-220, DD-Pak, Thermally Enhanced 8-Lead
5-lead DD-Pak as well as the thermally enhanced 8-lead
MSOP and 8-Lead 3mm × 3mm DFN Packages
MSOP and low profile (0.75mm) 8-lead 3mm × 3mm DFN.
Applications L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners.
n Logic Power Supplies
n Post Regulator for Switching Supplies
n Low Noise Instrumentation

Typical Application
Dropout Voltage
400
3.3V to 2.5V Regulator TJ = 25°C
350

300
DROPOUT VOLTAGE (mV)

2.5V
IN OUT
VIN > 3V + + 1.1A
250
TO 20V 10µF* LT1965-2.5 10µF*
200
SHDN SENSE
150
GND
*CERAMIC OR TANTALUM 100
1965 TA01
50

0
0 0.2 0.4 0.6 0.8 1 1.2
OUTPUT CURRENT (A) 1965 TA01b

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LT1965 Series
Absolute Maximum Ratings (Note 1)
IN Pin Voltage..........................................................±22V Output Short-Circuit Duration........................... Indefinite
OUT Pin Voltage.......................................................±22V Operating Junction Temperature Range (Notes 3, 5, 13)
Input to Output Differential Voltage (Note 2) ......... ±22V E-, I-Grades........................................ –40°C to 125°C
SENSE Pin Voltage...................................................±22V H-Grade.............................................. –40°C to 150°C
ADJ Pin Voltage.........................................................±9V Storage Temperature Range................... –65°C to 150°C
SHDN Pin Voltage....................................................±22V Lead Temperature (Soldering, 10 sec)
(Only for MSOP, TO-220, DD-Pak Packages)..... 300°C

Pin Configuration
TOP VIEW

TOP VIEW
OUT 1 8 IN
OUT 1 8 IN
OUT 2 7 IN OUT 2 7 IN
9 9
SENSE/ADJ* 3 6 SHDN SENSE/ADJ* 3 6 SHDN
GND 4 5 GND
GND 4 5 GND
MS8E PACKAGE
8-LEAD PLASTIC MSOP
DD PACKAGE TJMAX = 125°C, θJA = 60°C/W, θJC = 10°C/W
8-LEAD (3mm × 3mm) PLASTIC DFN
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
TJMAX = 150°C, θJA = 65°C/W, θJC = 3°C/W *PIN 3 = SENSE FOR LT1965-1.5/LT1965-1.8/LT1965-2.5/LT1965-3.3
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB *PIN 3 = ADJ FOR LT1965
*PIN 3 = SENSE FOR LT1965-1.5/LT1965-1.8/LT1965-2.5/LT1965-3.3
*PIN 3 = ADJ FOR LT1965

FRONT VIEW FRONT VIEW

5 SENSE/ADJ* 5 SENSE/ADJ*
4 OUT 4 OUT
TAB IS TAB IS
3 GND 3 GND
GND GND
2 IN 2 IN
1 SHDN 1 SHDN

Q PACKAGE T PACKAGE
5-LEAD PLASTIC DD-PAK 5-LEAD PLASTIC TO-220
TJMAX = 150°C, θJA = 30°C/W, θJC = 3°C/W TJMAX = 150°C, θJA = 50°C/W, θJC = 3°C/W
*PIN 5 = SENSE FOR LT1965-1.5/LT1965-1.8/LT1965-2.5/LT1965-3.3 *PIN 5 = SENSE FOR LT1965-1.5/LT1965-1.8/LT1965-2.5/LT1965-3.3
*PIN 5 = ADJ FOR LT1965 *PIN 5 = ADJ FOR LT1965

Order Information
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT1965EDD#PBF LT1965EDD#TRPBF LCXW 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LT1965IDD#PBF LT1965IDD#TRPBF LCXW 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LT1965EDD-1.5#PBF LT1965EDD-1.5#TRPBF LDKW 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LT1965IDD-1.5#PBF LT1965IDD-1.5#TRPBF LDKW 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LT1965EDD-1.8#PBF LT1965EDD-1.8#TRPBF LDKY 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LT1965IDD-1.8#PBF LT1965IDD-1.8#TRPBF LDKY 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LT1965EDD-2.5#PBF LT1965EDD-2.5#TRPBF LDMB 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LT1965IDD-2.5#PBF LT1965IDD-2.5#TRPBF LDMB 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LT1965EDD-3.3#PBF LT1965EDD-3.3#TRPBF LDMD 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C

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 LT1965 Series
order information
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT1965IDD-3.3#PBF LT1965IDD-3.3#TRPBF LDMD 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LT1965EMS8E#PBF LT1965EMS8E#TRPBF LTCXX 8-Lead Plastic MSOP –40°C to 125°C
LT1965IMS8E#PBF LT1965IMS8E#TRPBF LTCXX 8-Lead Plastic MSOP –40°C to 125°C
LT1965EMS8E-1.5#PBF LT1965EMS8E-1.5#TRPBF LTDKX 8-Lead Plastic MSOP –40°C to 125°C
LT1965IMS8E-1.5#PBF LT1965IMS8E-1.5#TRPBF LTDKX 8-Lead Plastic MSOP –40°C to 125°C
LT1965EMS8E-1.8#PBF LT1965EMS8E-1.8#TRPBF LTDKZ 8-Lead Plastic MSOP –40°C to 125°C
LT1965IMS8E-1.8#PBF LT1965IMS8E-1.8#TRPBF LTDKZ 8-Lead Plastic MSOP –40°C to 125°C
LT1965EMS8E-2.5#PBF LT1965EMS8E-2.5#TRPBF LTDMC 8-Lead Plastic MSOP –40°C to 125°C
LT1965IMS8E-2.5#PBF LT1965IMS8E-2.5#TRPBF LTDMC 8-Lead Plastic MSOP –40°C to 125°C
LT1965EMS8E-3.3#PBF LT1965EMS8E-3.3#TRPBF LTDMF 8-Lead Plastic MSOP –40°C to 125°C
LT1965IMS8E-3.3#PBF LT1965IMS8E-3.3#TRPBF LTDMF 8-Lead Plastic MSOP –40°C to 125°C
LT1965EQ#PBF LT1965EQ#TRPBF LT1965Q 5-Lead Plastic DD-Pak –40°C to 125°C
LT1965IQ#PBF LT1965IQ#TRPBF LT1965Q 5-Lead Plastic DD-Pak –40°C to 125°C
LT1965HQ#PBF LT1965HQ#TRPBF LT1965Q 5-Lead Plastic DD-Pak –40°C to 150°C
LT1965EQ-1.5#PBF LT1965EQ-1.5#TRPBF LT1965Q-1.5 5-Lead Plastic DD-Pak –40°C to 125°C
LT1965IQ-1.5#PBF LT1965IQ-1.5#TRPBF LT1965Q-1.5 5-Lead Plastic DD-Pak –40°C to 125°C
LT1965EQ-1.8#PBF LT1965EQ-1.8#TRPBF LT1965Q-1.8 5-Lead Plastic DD-Pak –40°C to 125°C
LT1965IQ-1.8#PBF LT1965IQ-1.8#TRPBF LT1965Q-1.8 5-Lead Plastic DD-Pak –40°C to 125°C
LT1965EQ-2.5#PBF LT1965EQ-2.5#TRPBF LT1965Q-2.5 5-Lead Plastic DD-Pak –40°C to 125°C
LT1965IQ-2.5#PBF LT1965IQ-2.5#TRPBF LT1965Q-2.5 5-Lead Plastic DD-Pak –40°C to 125°C
LT1965EQ-3.3#PBF LT1965EQ-3.3#TRPBF LT1965Q-3.3 5-Lead Plastic DD-Pak –40°C to 125°C
LT1965IQ-3.3#PBF LT1965IQ-3.3#TRPBF LT1965Q-3.3 5-Lead Plastic DD-Pak –40°C to 125°C
LT1965ET#PBF N/A LT1965T 5-Lead Plastic TO-220 –40°C to 125°C
LT1965IT#PBF N/A LT1965T 5-Lead Plastic TO-220 –40°C to 125°C
LT1965HT#PBF N/A LT1965T 5-Lead Plastic TO-220 –40°C to 150°C
LT1965ET-1.5#PBF N/A LT1965T-1.5 5-Lead Plastic TO-220 –40°C to 125°C
LT1965IT-1.5#PBF N/A LT1965T-1.5 5-Lead Plastic TO-220 –40°C to 125°C
LT1965ET-1.8#PBF N/A LT1965T-1.8 5-Lead Plastic TO-220 –40°C to 125°C
LT1965IT-1.8#PBF N/A LT1965T-1.8 5-Lead Plastic TO-220 –40°C to 125°C
LT1965ET-2.5#PBF N/A LT1965T-2.5 5-Lead Plastic TO-220 –40°C to 125°C
LT1965IT-2.5#PBF N/A LT1965T-2.5 5-Lead Plastic TO-220 –40°C to 125°C
LT1965ET-3.3#PBF N/A LT1965T-3.3 5-Lead Plastic TO-220 –40°C to 125°C
LT1965IT-3.3#PBF N/A LT1965T-3.3 5-Lead Plastic TO-220 –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

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LT1965 Series
Electrical Characteristics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 3)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Input Voltage ILOAD = 0.5A 1.65 V
(Notes 4, 12) ILOAD = 1.1A (TJ < 125°C) l 1.8 2.3 V
ILOAD = 1A (H-Grade, TJ > 125°C) 2.3 V
Regulated Output Voltage LT1965-1.5, VIN = 2.1V, ILOAD = 1mA 1.477 1.5 1.523 V
(Note 5) LT1965-1.5, 2.5 < VIN < 20V, 1mA < ILOAD < 1.1A l 1.455 1.5 1.545 V
LT1965-1.8, VIN = 2.3V, ILOAD = 1mA 1.773 1.8 1.827 V
LT1965-1.8, 2.8 < VIN < 20V, 1mA < ILOAD < 1.1A l 1.746 1.8 1.854 V
LT1965-2.5, VIN = 3V, ILOAD = 1mA 2.462 2.5 2.538 V
LT1965-2.5, 3.5 < VIN < 20V, 1mA < ILOAD < 1.1A l 2.425 2.5 2.575 V
LT1965-3.3, VIN = 3.8V, ILOAD = 1mA 3.25 3.3 3.35 V
LT1965-3.3, 4.3 < VIN < 20V, 1mA < ILOAD < 1.1A l 3.201 3.3 3.399 V
ADJ Pin Voltage (Notes 4, 5) VIN = 2.1V, ILOAD = 1mA 1.182 1.2 1.218 V
2.3V < VIN < 20V, 1mA < ILOAD < 1.1A (TJ < 125°C) l 1.164 1.2 1.236 V
2.3V < VIN < 20V, 1mA < ILOAD < 1A (H-Grade, TJ > 125°C) 1.158 1.236 V
Line Regulation LT1965-1.5, ∆VIN = 2.1V to 20V, ILOAD = 1mA l 3.5 9 mV
LT1965-1.8, ∆VIN = 2.3V to 20V, ILOAD = 1mA l 4 10 mV
LT1965-2.5, ∆VIN = 3V to 20V, ILOAD = 1mA l 4.5 11.5 mV
LT1965-3.3, ∆VIN = 3.8V to 20V, ILOAD = 1mA l 5.5 16 mV
LT1965, ∆VIN = 2.1V to 20V, ILOAD = 1mA (E-, I-Grades) (Note 4) l 3 8 mV
LT1965, ∆VIN = 2.1V to 20V, ILOAD = 1mA (H-Grade) (Note 4) l 3 12 mV
Load Regulation LT1965-1.5, VIN = 2.5V, ∆ILOAD = 1mA to 1.1A 5.25 10 mV
LT1965-1.5, VIN = 2.5V, ∆ILOAD = 1mA to 1.1A l 20 mV
LT1965-1.8, VIN = 2.8V, ∆ILOAD = 1mA to 1.1A 6.25 12 mV
LT1965-1.8, VIN = 2.8V, ∆ILOAD = 1mA to 1.1A l 24 mV
LT1965-2.5, VIN = 3.5V, ∆ILOAD = 1mA to 1.1A 8.75 16.5 mV
LT1965-2.5, VIN = 3.5V, ∆ILOAD = 1mA to 1.1A l 33 mV
LT1965-3.3, VIN = 4.3V, ∆ILOAD = 1mA to 1.1A 11.5 22 mV
LT1965-3.3, VIN = 4.3V, ∆ILOAD = 1mA to 1.1A l 44 mV
LT1965, VIN = 2.3V, ∆ILOAD = 1mA to 1.1A (Note 4) 4.25 8 mV
LT1965, VIN = 2.3V, ∆ILOAD = 1mA to 1.1A (TJ < 125°C) l 16 mV
LT1965, VIN = 2.3V, ∆ILOAD = 1mA to 1A (H-Grade, TJ > 125°C) 22 mV
Dropout Voltage ILOAD = 1mA 0.055 0.08 V
VIN = VOUT(NOMINAL) ILOAD = 1mA l 0.14 V
(Notes 6, 7, 12) ILOAD = 100mA 0.12 0.175 V
ILOAD = 100mA l 0.28 V
ILOAD = 500mA 0.21 0.25 V
ILOAD = 500mA l 0.36 V
ILOAD = 1.1A 0.31 0.36 V
ILOAD = 1.1A (TJ < 125°C) l 0.49 V
ILOAD = 1A (H-Grade, TJ > 125°C) 0.49 V
GND Pin Current ILOAD = 0mA l 0.5 1.1 mA
VIN = VOUT(NOMINAL) + 1V ILOAD = 1mA l 0.6 1.5 mA
(Notes 6, 8) ILOAD = 100mA l 2.2 5.5 mA
ILOAD = 500mA l 8.2 20 mA
ILOAD = 1.1A (TJ < 125°C) l 21 40 mA
ILOAD = 1A (H-Grade, TJ > 125°C) 40 mA
Output Voltage Noise COUT = 10µF, ILOAD = 1.1A, BW = 10Hz to 100kHz 40 µVRMS
ADJ Pin Bias Current 1.3 4.5 µA
(Notes 4, 9)
Shutdown Threshold VOUT = Off to On l 0.85 2 V
VOUT = On to Off l 0.2 0.45 V
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 LT1965 Series
Electrical Characteristics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 3)
PARAMETER CONDITIONS MIN TYP MAX UNITS
SHDN Pin Current (Note 10) VSHDN = 0V 0.01 1 µA
VSHDN = 20V 5.5 10 µA
Quiescent Current in Shutdown VIN = 6V, VSHDN = 0V 0.01 1 µA
Ripple Rejection VIN – VOUT = 1.5V (AVG), VRIPPLE = 0.5VP-P, 57 75 dB
fRIPPLE = 120Hz, ILOAD = 0.75A
Current Limit VIN = 7V, VOUT = 0 2.4 A
VIN = VOUT(NOMINAL) + 1V, ∆VOUT = –0.1V (TJ < 125°C) (Note 6) l 1.2 A
VIN = VOUT(NOMINAL) + 1V, ∆VOUT = –0.1V, (H-Grade, TJ > 125°C) (Note 6) 1.1 A
Input Reverse-Leakage Current VIN = –20V, VOUT = 0 1 mA
Reverse-Output Current (Note 11) LT1965-1.5, VOUT = 1.5V, VIN = 0 275 525 µA
LT1965-1.8, VOUT = 1.8V, VIN = 0 275 525 µA
LT1965-2.5, VOUT = 2.5V, VIN = 0 275 525 µA
LT1965-3.3, VOUT = 3.3V, VIN = 0 275 525 µA
LT1965 (Note 4), VOUT = 1.2V, VIN = 0 175 400 µA

Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 6: To satisfy minimum input voltage requirements, the LT1965
may cause permanent damage to the device. Exposure to any Absolute adjustable version is tested and specified for these conditions with an
Maximum Rating condition for extended periods may affect device external resistor divider (bottom 4.02k, top 4.32k) for an output voltage of
reliability and lifetime. 2.5V. The external resistor divider adds 300µA of output DC load current.
Note 2: Absolute maximum input to output differential voltage is not This external current is not factored into GND pin current.
achievable with all combinations of rated IN pin and OUT pin voltages. Note 7: Dropout voltage is the minimum input-to-output voltage
With the IN pin at 22V, the OUT pin may not be pulled below 0V. The total differential needed to maintain regulation at a specified output current. In
measured voltage from IN to OUT must not exceed ±22V. dropout, the output voltage equals: (VIN – VDROPOUT)
Note 3: The LT1965 regulators are tested and specified under pulse Note 8: GND pin current is tested with VIN = VOUT(NOMINAL) + 1V and a
load conditions such that TJ @ TA. The LT1965E regulators are 100% current source load. GND pin current increases slightly in dropout. For
tested at TA = 25°C and performance is guaranteed from 0°C to 125°C. the fixed output versions, an internal resistor divider will typically add
Performance of the LT1965E over the full –40°C to 125°C operating 100µA to the GND pin current. See GND pin current curves in the Typical
junction temperature range is assured by design, characterization and Performance Characteristics section.
correlation with statistical process controls. The LT1965I regulators are Note 9: ADJ pin bias current flows into the ADJ pin.
guaranteed over the full –40°C to 125°C operating junction temperature Note 10: SHDN pin current flows into the SHDN pin.
range. The LT1965H is tested at 150°C operating junction temperature.
Note 11: Reverse-output current is tested with the IN pin grounded and
High junction temperatures degrade operating lifetimes. Operating lifetime
the OUT pin forced to the rated output voltage. This current flows into the
is derated at junction temperatures greater than 125°C.
OUT pin and out of the GND pin.
Note 4: The LT1965 adjustable version is tested and specified for these
Note 12: For the LT1965, LT1965-1.5 and LT1965-1.8, the minimum input
conditions with the ADJ connected to the OUT pin.
voltage specification limits the dropout voltage under some output voltage/
Note 5: Maximum junction temperature limits operating conditions. The load conditions.
regulated output voltage specification does not apply for all possible
Note 13: This IC includes overtemperature protection that is intended
combinations of input voltage and output current. Limit the output current
to protect the device during momentary overload conditions. Junction
range if operating at the maximum input voltage. Limit the input-to-output
temperature will exceed 125°C (LT1965E, LT1965I) or 150°C (LT1965H)
voltage differential if operating at the maximum output current.
when overtemperature is active. Continuous operation above the specified
maximum operating junction temperature may impair device reliability.

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LT1965 Series
Typical Performance Characteristics

Typical Dropout Voltage Guaranteed Dropout Voltage Dropout Voltage

500 500 500
= TEST POINTS
450 450

GUARANTEED DROPOUT VOLTAGE (mV)

450
400 400 400

DROPOUT VOLTAGE (mV)

DROPOUT VOLTAGE (mV)

TJ = 125°C TJ = 125°C IL = 1A
350 350 350 IL = 1.1A
300 300 300
250 250 TJ = 25°C 250 IL = 500mA
200 200 200
TJ = 25°C
150 150 150 IL = 100mA

100 100 100

IL = 1mA
50 50 50
0 0 0
0 0.2 0.4 0.6 0.8 1 1.2 0 0.2 0.4 0.6 0.8 1 1.2 –50 –25 0 25 50 75 100 125 150
OUTPUT CURRENT (A) 1965 G01
OUTPUT CURRENT (A) 1965 G02
TEMPERATURE (°C) 1965 G03

Quiescent Current LT1965-1.5 Output Voltage LT1965-1.8 Output Voltage

1.0 1.522 1.827
VIN = 6V IL = 1mA IL = 1mA
0.9 RL = ∞, IL = 0 1.517 1.821
VSHDN = VIN
0.8 1.512 1.815
QUIESCENT CURRENT (mA)

OUTPUT VOLTAGE (V)

OUTPUT VOLTAGE (V)

0.7 LT1965-1.5/-1.8/-2.5/-3.3 1.507 1.809
0.6
LT1965 1.502 1.803
0.5
1.497 1.797
0.4
1.492 1.791
0.3
0.2 1.487 1.785

0.1 1.482 1.779

VSHDN = 0
0 1.477 1.773
–50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
1965 G04 1965 G05 1965 G06

LT1965-2.5 Output Voltage LT1965-3.3 Output Voltage LT1965 ADJ Pin Voltage
2.540 3.350 1.218
IL = 1mA IL = 1mA IL = 1mA
2.532 3.340 1.214
2.524 3.330 1.210
OUTPUT VOLTAGE (V)

OUTPUT VOLTAGE (V)

2.516
ADJ PIN VOLTAGE (V)

3.320
1.206
2.508 3.310
1.202
2.500 3.300
1.198
2.492 3.290
1.194
2.484 3.280
2.476 3.270 1.190

2.468 3.260 1.186

2.460 3.250 1.182
–50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C) 1965 G07
TEMPERATURE (°C) TEMPERATURE (°C)
1965 G08 1965 G09

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 LT1965 Series
Typical Performance Characteristics

LT1965-1.5 Quiescent Current LT1965-1.8 Quiescent Current LT1965-2.5 Quiescent Current

5 5 10
TJ = 25°C TJ = 25°C TJ = 25°C
RL = ∞ RL = ∞ RL = ∞
4 4 8

QUIESCENT CURRENT (mA)

QUIESCENT CURRENT (mA)
QUIESCENT CURRENT (mA)

3 3 6

2 2 4

1 1 VSHDN = VIN 2 VSHDN = 0V

VSHDN = VIN
VSHDN = VIN
VSHDN = 0V VSHDN = 0V
0 0 0
0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10
INPUT VOLTAGE (V) INPUT VOLTAGE (V) 1965 G11
INPUT VOLTAGE (V) 1965 G12
1965 G10

LT1965-1.5 GND Pin Current

LT1965-3.3 Quiescent Current LT1965 Quiescent Current (Light Load)
10 1.0 5
TJ = 25°C TJ = 25°C TJ = 25°C
RL = ∞ 0.9 RL = 4.02k VSHDN = VIN
*FOR VOUT = 1.5V
8 0.8 4
QUIESCENT CURRENT (mA)
QUIESCENT CURRENT (mA)

GND PIN CURRENT (mA)

0.7
6 0.6 3
VSHDN = VIN
0.5
4 0.4 2
RL = 30Ω, IL = 50mA*
0.3
2 VSHDN = 0V 0.2 1 RL = 150Ω, IL = 10mA*
VSHDN = VIN 0.1
VSHDN = 0V RL = 1.5k, IL = 1mA*
0 0 0
0 1 2 3 4 5 6 7 8 9 10 0 2 4 6 8 10 12 14 16 18 20 0 1 2 3 4 5 6 7 8 9 10
INPUT VOLTAGE (V) 1965 G13
INPUT VOLTAGE (V) INPUT VOLTAGE (V)
1965 G14 1965 G15

LT1965-1.5 GND Pin Current LT1965-1.8 GND Pin Current LT1965-1.8 GND Pin Current
(Heavy Load) (Light Load) (Heavy Load)
25 5 25
TJ = 25°C TJ = 25°C TJ = 25°C
VSHDN = VIN VSHDN = VIN VSHDN = VIN
*FOR VOUT = 1.5V *FOR VOUT = 1.8V *FOR VOUT = 1.8V
20 4 20
GND PIN CURRENT (mA)

GND PIN CURRENT (mA)

GND PIN CURRENT (mA)

15 RL = 1.363Ω, IL = 1.1A* 3 15 RL = 1.636Ω, IL = 1.1A*

10 2 10
RL = 36Ω, IL = 50mA* RL = 3.6Ω, IL = 500mA*

5 RL = 3Ω, IL = 500mA* 1 RL = 180Ω, IL = 10mA* 5

RL = 18Ω, IL = 100mA*
RL = 1.8k, IL = 1mA*
RL = 15Ω, IL = 100mA*
0 0 0
0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10
INPUT VOLTAGE (V) 1965 G16
INPUT VOLTAGE (V) 1965 G17
INPUT VOLTAGE (V) 1965 G18

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LT1965 Series
Typical Performance Characteristics
LT1965-2.5 GND Pin Current LT1965-2.5 GND Pin Current LT1965-3.3 GND Pin Current
(Light Load) (Heavy Load) (Light Load)
12 25 12
TJ = 25°C TJ = 25°C TJ = 25°C
VSHDN = VIN VSHDN = VIN VSHDN = VIN
10 *FOR VOUT = 2.5V *FOR VOUT = 2.5V 10 *FOR VOUT = 3.3V
20

GND PIN CURRENT (mA)

GND PIN CURRENT (mA)

GND PIN CURRENT (mA)

8 RL = 2.272Ω, IL = 1.1A* 8
15
6 6
10
RL = 5Ω, IL = 500mA*
4 RL = 250Ω, IL = 10mA* 4 RL = 330Ω, IL = 10mA*
RL = 2.5k, IL = 1mA* RL = 3.3k, IL = 1mA*
5
2 RL = 50Ω, IL = 50mA* 2 RL = 66Ω, IL = 50mA*
RL = 25Ω, IL = 100mA*

0 0 0
0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10
INPUT VOLTAGE (V) INPUT VOLTAGE (V) 1965 G20
INPUT VOLTAGE (V)
1965 G19 1965 G21

LT1965-3.3 GND Pin Current LT1965 GND Pin Current LT1965 GND Pin Current
(Heavy Load) (Light Load) (Heavy Load)
25 2.0 25
TJ = 25°C TJ = 25°C TJ = 25°C
VSHDN = VIN 1.8 VSHDN = VIN VSHDN = VIN
*FOR VOUT = 3.3V *FOR VOUT = 1.2V *FOR VOUT = 1.2V
20 1.6 20
RL = 24Ω, IL = 50mA*

GND PIN CURRENT (mA)

GND PIN CURRENT (mA)

GND PIN CURRENT (mA)

RL = 3Ω, IL = 1.1A* 1.4 RL = 1.091Ω, IL = 1.1A*

15 1.2 15
1.0
10 0.8 RL = 120Ω, IL = 10mA* 10
RL = 6.6Ω, IL = 500mA* RL = 2.4Ω, IL = 500mA*
0.6 RL = 1.2k, IL = 1mA*

5 0.4 5
RL = 33Ω, IL = 100mA* RL = 12Ω, IL = 100mA*
0.2
0 0 0
0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10
INPUT VOLTAGE (V) 1965 G22
INPUT VOLTAGE (V) 1965 G23
INPUT VOLTAGE (V) 1965 G24

GND Pin Current vs ILOAD SHDN Pin Threshold

25.0 1.0
VIN = VOUT(NOMINAL) + 1V
22.5 0.9 OFF TO ON
20.0 0.8
SHDN PIN THRESHOLD (V)
GND PIN CURRENT (mA)

17.5 0.7
15.0 0.6
12.5 0.5 ON TO OFF

10.0 0.4
7.50 0.3
5.00 0.2
2.50 0.1
0 0
0 0.2 0.4 0.6 0.8 1.0 1.2 –50 –25 0 25 50 75 100 125 150
LOAD CURRENT (A) 1965 G25
TEMPERATURE (°C) 1965 G26

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 LT1965 Series
Typical Performance Characteristics

SHDN Pin Input Current SHDN Pin Input Current ADJ Pin Bias Current
6 6.0 4.5
VSHDN = 20V
5.9 4.0
5
SHDN PIN INPUT CURRENT (µA)

SHDN PIN INPUT CURRENT (µA)

5.8

ADJ PIN BIAS CURRENT (µA)

3.5
5.7
4 3.0
5.6
2.5
3 5.5
2.0
5.4
2 1.5
5.3
5.2 1.0
1
5.1 0.5
0 5.0 0
0 2 4 6 8 10 12 14 16 18 20 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150
SHDN PIN VOLTAGE (V) TEMPERATURE (°C) TEMPERATURE (°C)
1965 G27 1965 G28 1965 G29

Current Limit vs VIN – VOUT Current Limit vs Temperature Reverse-Output Current

2.5 3.0 6
∆VOUT = 100mV VIN = 7V TJ = 25°C
VOUT = 0V VIN = 0V
LT1965

REVERSE OUTPUT CURRENT (mA)

TJ = –50°C 2.5 5 VOUT = VADJ (LT1965)
2.0 VOUT = VSENSE
TJ = 125°C (LT1965-1.5/-1.8/-2.5/-3.3)
TJ = 25°C
CURRENT LIMIT (A)
CURRENT LIMIT (A)

2.0 4 CURRENT FLOWS INTO

1.5 OUTPUT PIN
1.5 3
LT1965-1.5
1.0
TJ = 150°C 1.0 2 LT1965-1.8

0.5
0.5 1
LT1965-2.5
LT1965-3.3
0 0 0
0 2 4 6 8 10 12 14 16 18 20 –50 –25 0 25 50 75 100 125 150 0 1 2 3 4 5 6 7 8 9
INPUT/OUTPUT DIFFERENTIAL (V) 1965 G30 TEMPERATURE (°C) 1965 G31
OUTPUT VOLTAGE (V) 1965 G32

Reverse-Output Current Ripple Rejection vs Frequency

0.6 90
VIN = 0V
VOUT = 1.2V (LT1965) 80
REVERSE OUTPUT CURRENT (mA)

0.5 VOUT = 1.5V (LT1965-1.5)

VOUT = 1.8V (LT1965-1.8) 70
RIPPLE REJECTION (dB)

VOUT = 2.5V (LT1965-2.5)

0.4 VOUT = 3.3V (LT1965-3.3) 60

50
LT1965-1.5/-1.8/-2.5/-3.3
0.3
40
LT1965
0.2 30

20 IL = 0.75A
0.1 COUT = 10µF CERAMIC
10 VIN = VOUT(NOMINAL)
+ 1V + 50mVRMS RIPPLE
0 0
–50 –25 0 25 50 75 100 125 150 10 100 1k 10k 100k 1M
TEMPERATURE (°C) FREQUENCY (Hz)
1965 G33 1965 G34

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LT1965 Series
Typical Performance Characteristics

Ripple Rejection vs Temperature LT1965 Minimum Input Voltage Load Regulation

100 2.5 0
LT1965 LT1965-1.5
90 –5
80 –10

MINIMUM INPUT VOLTAGE (V)

2.0 IL = 1A

LOAD REGULATION (mV)

RIPPLE REJECTION (dB)

70 IL = 1.1A –15 LT1965-1.8

–20 LT1965-2.5
60 1.5
IL = 500mA LT1965-3.3
50 IL = 100mA –25
40 1.0 –30
30 –35
VIN = VOUT(NOMINAL) + 1V
20 IL = 0.75A 0.5 –40 (LT1965-1.5/-1.8/-2.5/-3.3)
10 VIN = VOUT(NOMINAL) + 1V + 0.5P-P –45 VIN = 2.3V (LT1965)
RIPPLE AT f = 120Hz ∆IL = 1mA TO 1.1A
0 0 –50
–50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C) 1965 G35
TEMPERATURE (°C) 1965 G36
TEMPERATURE (°C) 1965 G37

RMS Output Noise vs Load LT1965-1.8 10Hz to 100kHz

Output Noise Spectral Density Current (10Hz to 100kHz) Output Noise
1.00 80
COUT = 10µF
OUTPUT NOISE SPECTRAL DENSITY (µV Hz)

COUT = 10µF
IL = 1.1A
70 IL = 1.1A
OUTPUT NOISE VOLTAGE (µVRMS)

LT1965-2.5 60
LT1965-3.3
LT1965-3.3 VOUT
50
LT1965-2.5 100µV/DIV
0.10 40
LT1965-1.8
LT1965 30
LT1965-1.8
LT1965-1.5 20
LT1965 1965 G40
LT1965-1.5 400µs/DIV
10

0.01 0
10 100 1k 10k 100k 0.0001 0.001 0.01 0.1 1 10
LOAD CURRENT (A)
FREQUENCY (Hz)
1965 G38 1965 G39

LT1965-2.5 SHDN Transient

LT1965-3.3 Transient Response Response
100 4.0
VOUT = 3.3V
OUTPUT VOLTAGE
DEVIATION (mV)

50 3.5
SHDN AND OUTPUT VOLTAGE (V)

0 SHDN
3.0
–50
2.5
–100
2.0
1.5
LOAD CURRENT (A)

VIN = 4.3V
CIN = 10µF CERAMIC 1.5
1.0 OUTPUT
COUT = 10µF CERAMIC
1.0
0.5 0.5

0 0
0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80 90 100
TIME (µs) 1965 G41 TIME (µs)
1965 G42
VIN = 3.3V
COUT = 10µF CERAMIC
RL = 2.5k, IL = 1mA FOR VOUT = 2.5V
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 LT1965 Series
Pin Functions (DFN/MSOP/DD-Pak/TO-220)

OUT (Pins 1, 2 / 1, 2 / 4 / 4): Output. This pin supplies SHDN (Pin 6 / 6 / 1 / 1): Shutdown. Pulling the SHDN pin
power to the load. Use a minimum output capacitor of low puts the LT1965 into a low power state and turns the
10µF to prevent oscillations. Large load transient applica- output off. Drive the SHDN pin with either logic or an open
tions require larger output capacitors to limit peak voltage collector/drain with a pull-up resistor. The resistor sup-
transients. See the Applications Information section for plies the pull-up current to the open collector/drain logic,
more information on output capacitance and reverse-output normally several microamperes and the SHDN pin current,
characteristics. typically less than 5.5µA. If unused, connect the SHDN pin
SENSE (Pin 3 / 3 / 5 / 5): Sense. For fixed voltage versions to VIN. The SHDN pin cannot be driven below GND unless
of the LT1965 (LT1965-1.5/LT1965-1.8/ LT1965-2.5/ it is tied to the IN pin. If the SHDN pin is driven below
LT1965-3.3), the SENSE pin is the input to the error am- GND while IN is powered, the output will turn on. SHDN
plifier. Optimum regulation is obtained when the SENSE pin logic cannot be referenced to a negative supply rail.
pin is connected to the OUT pin of the regulator. In criti- IN (Pins 7, 8 / 7, 8 / 2 / 2): Input. This pin supplies power
cal applications, small voltage drops are caused by the to the device. The LT1965 requires a bypass capacitor at
resistance (RP) of PCB traces between the regulator and IN if located more than six inches from the main input filter
the load. These drops may be eliminated by connecting capacitor. Include a bypass capacitor in battery-powered
the SENSE pin to the output at the load as shown in Figure circuits as a battery’s output impedance generally rises
1 (Kelvin Sense Connection). Note that the voltage drop with frequency. A bypass capacitor in the range of 1µF to
across the external PCB traces will add to the dropout 10µF suffices. The LT1965’s design withstands reverse
voltage of the regulator. The SENSE pin bias current is voltages on the IN pin with respect to ground and the
100µA at the nominal rated output voltage. OUT pin. In the case of a reversed input, which occurs if
ADJ (Pin 3 / 3 / 5 / 5): Adjust. This pin is the input to the a battery is plugged in backwards, the LT1965 behaves
error amplifier. It has a typical bias current of 1.3µA that as if a diode is in series with its input. No reverse current
flows into the pin. The ADJ pin voltage is 1.20V referenced flows into the LT1965 and no reverse voltage appears at
to ground. the load. The device protects itself and the load.
GND (Pins 4, 5 / 4, 5 / 3 / 3): Ground. For the adjustable Exposed Pad (Pin 9 / 9, DFN and MSOP Packages Only):
LT1965, connect the bottom of the resistor divider, setting Ground. Tie this pin directly to Pins 4 and 5 and the PCB
output voltage, directly to GND for optimum regulation. ground. This pin provides enhanced thermal performance
with its connection to the PCB ground. See the Applica-
tions Information section for thermal considerations and
calculating junction temperature.

IN OUT
RP
LT1965
LOAD
+ SHDN SENSE +
VIN
GND

RP
1965 F01

Figure 1. Kelvin Sense Connection

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LT1965 Series
Applications Information
The LT1965 series are 1.1A low dropout regulators with 1.20V: VOUT/1.20V. For example, load regulation for an
shutdown. The devices are capable of supplying 1.1A at output current change of 1mA to 1.1A is typically –4.25mV
a typical dropout voltage of 310mV. The low operating at VOUT = 1.20V. At VOUT = 5V, load regulation is:
quiescent current (500µA for the adjustable version, 600µA
5V
for the fixed voltage versions) drops to less than 1µA in • – 4.25mV = – 17.71mV
shutdown. In addition to the low quiescent current, the 1.20V
LT1965 regulators incorporate several protection features
that makes them ideal for use in battery-powered systems. Output Capacitance
The devices protect themselves against both reverse-input The LT1965’s design is stable with a wide range of out-
and reverse-output voltages. In battery backup applica- put capacitors. The ESR of the output capacitor affects
tions, if a backup battery holds up the output when the input stability, most notably with small capacitors. A minimum
is pulled to ground, the LT1965 performs like it has a diode output capacitor of 10µF with an ESR of 0.3W or less is
in series with its output, preventing reverse-current flow. recommended to prevent oscillations. The LT1965 is a low
quiescent current device and output load transient response
Adjustable Operation is a function of output capacitance. Larger values of output
The LT1965 adjustable version has an output voltage range capacitance decrease the peak deviations and provide
of 1.20V to 19.5V. Figure 2 illustrates that the ratio of improved transient response for larger current changes.
two external resistors sets the output voltage. The device Ceramic capacitors require extra consideration. Manufac-
servos the output to maintain the ADJ pin voltage at 1.20V turers make ceramic capacitors with a variety of dielectrics,
referenced to ground. R1’s current equals 1.20V/R1. R2’s each with different behavior across temperature and applied
current equals R1’s current plus the ADJ pin bias current. voltage. The most common dielectrics used are specified
The ADJ pin bias current, 1.3µA at 25°C, flows through with EIA temperature characteristic codes of Z5U, Y5V,
R2 into the ADJ pin. Use the formula in Figure 2 to calcu- X5R and X7R. The Z5U and Y5V dielectrics provide high
late output voltage. Linear Technology recommends that C-V products in a small package at low cost, but exhibit
R1’s value be less than 12.1k to minimize output voltage strong voltage and temperature coefficients as shown in
errors due to the ADJ pin bias current. In shutdown, the Figures 3 and 4. When used with a 5V regulator, a 16V
output turns off and the divider current is zero. For curves 10µF Y5V capacitor can exhibit an effective value as low
depicting ADJ Pin Voltage vs Temperature and ADJ Pin as 1µF to 2µF for the DC bias applied and over the operat-
Bias Current vs Temperature, see the Typical Performance ing temperature range. The X5R and X7R dielectrics yield
Characteristics section. much more stable characteristics and are more suitable
The adjustable device is tested and specified with the ADJ for use as the output capacitor. The X7R type works over
pin tied to the OUT pin for an output voltage of 1.20V. a wider temperature range and has better temperature
Specifications for output voltages greater than 1.20V are stability whereas X5R is less expensive and is available in
proportional to the ratio of the desired output voltage to higher values. Care still must be exercised when using X5R
and X7R capacitors; the X5R and X7R codes only specify
operating temperature range and maximum capacitance
IN OUT VOUT
+ change over temperature. Capacitance change due to DC
VIN LT1965 R2
 R2
VOUT = 1.20V 1+  + IADJ • R2 bias with X5R and X7R capacitors is better than Y5V and
ADJ  R1
VADJ = 1.20V
Z5U capacitors, but can still be significant enough to drop
R1
GND
1965 F02 IADJ = 1.3µA AT 25ºC capacitor values below appropriate levels. Capacitor DC
OUTPUT RANGE = 1.20V TO 19.5V bias characteristics tend to improve as component case
size increases, but expected capacitance at operating
Figure 2. Adjustable Operation voltages should be verified.

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 LT1965 Series
Applications Information
Voltage and temperature coefficients are not the only Overload Recovery
sources of problems. Some ceramic capacitors have a
Like many IC power regulators, the LT1965 has safe oper-
piezoelectric response. A piezoelectric device generates ating area protection. The safe area protection decreases
voltage across its terminals due to mechanical stress, current limit as input-to-output voltage increases and keeps
similar to the way a piezoelectric accelerometer or micro- the power transistor inside a safe operating region for all
phone works. For a ceramic capacitor, the stress can be
values of input-to-output voltage. The protective design
induced by vibrations in the system or thermal transients.
provides some output current at all values of input-to-
The resulting voltages produced can cause appreciable
output voltage up to the device breakdown.
amounts of noise. A ceramic capacitor produced the trace
in Figure 5 in response to light tapping from a pencil. When power is first applied, as input voltage rises, the
Similar vibration induced behavior can masquerade as output follows the input, allowing the regulator to start up
increased output voltage noise. into very heavy loads. During start-up, as the input voltage

20 40
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF 20
0
X5R X5R
CHANGE IN VALUE (%)
0
CHANGE IN VALUE (%)

–20
–20
–40
–40
Y5V
–60
–60
Y5V
–80 –80 BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
–100 –100
0 2 4 6 8 10 12 14 16 –50 –25 0 25 50 75 100 125
DC BIAS VOLTAGE (V) 1965 F03
TEMPERATURE (°C) 1965 F04

Figure 3. Ceramic Capacitor DC Bias Characteristics Figure 4. Ceramic Capacitor Temperature Characteristics

1mV/DIV

1965 F05
VOUT = 1.3V 1ms/DIV
COUT = 10µF
ILOAD = 0

Figure 5. Noise Resulting from Tapping on a Ceramic Capacitor

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LT1965 Series
Applications Information
is rising, the input-to-output voltage differential is small, Thermal Considerations
allowing the regulator to supply large output currents. The LT1965’s maximum rated junction temperature of
With a high input voltage, a problem can occur wherein 125°C (LT1965E, LT1965I) or 150°C (LT1965H) limits
removal of an output short will not allow the output to its power handling capability. Two components comprise
recover. Other regulators, such as the LT1083/LT1084/ the power dissipated by the device:
LT1085 family, also exhibit this phenomenon, so it is not
unique to the LT1965. 1. Output current multiplied by the input/output voltage
differential: IOUT • (VIN – VOUT), and
The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low. Com- 2. GND pin current multiplied by the input voltage:
mon situations occur immediately after the removal of a IGND • VIN
short-circuit or if the shutdown pin is pulled high after the GND pin current is determined using the GND Pin Current
input voltage has already been turned on. The load line for curves in the Typical Performance Characteristics section.
such a load may intersect the output current curve at two Power dissipation equals the sum of the two components
points. If this happens, there are two stable output operat- listed.
ing points for the regulator. With this double intersection,
the input power supply may need to be cycled down to The LT1965 regulators have internal thermal limiting that
zero and brought up again to make the output recover. protect the device during overload conditions. For con-
tinuous normal conditions, do not exceed the maximum
Output Voltage Noise junction temperature rating of 125°C (E-grade, I-grade) or
150°C (H-grade). Carefully consider all sources of thermal
The LT1965 regulators are designed to provide low output resistance from junction to ambient including other heat
voltage noise over the 10Hz to 100kHz bandwidth while sources mounted in proximity to the LT1965.
operating at full load. Output voltage noise is approximately
80nV/√Hz over this frequency bandwidth for the LT1965 The underside of the LT1965 DFN package has exposed
adjustable version. For higher output voltages (generated metal (4mm2) from the lead frame to the die attachment.
by using a resistor divider), the output voltage noise gains The underside of the LT1965 MSOP package also has
up accordingly. exposed metal (3.7mm2). Both packages allow heat to
directly transfer from the die junction to the printed circuit
Higher values of output voltage noise may be measured board metal to control maximum operating junction tem-
if care is not exercised with regard to circuit layout and perature. The dual-in-line pin arrangement allows metal
testing. Crosstalk from nearby traces can induce unwanted to extend beyond the ends of the package on the topside
noise onto the LT1965’s output. Power supply ripple rejec- (component side) of a PCB. Connect this metal to GND
tion must also be considered; the LT1965 regulators do
on the PCB. The multiple IN and OUT pins of the LT1965
not have unlimited power supply rejection and will pass
also assist in spreading heat to the PCB.
a small portion of the input noise through to the output.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.

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 LT1965 Series
Applications Information
The following tables list thermal resistance for several Calculating Junction Temperature
different board sizes and copper areas. All measurements
Example: Given an output voltage of 2.5V, an input volt-
were taken in still air on a 2-layer 1/16" FR-4 board with age range of 3.3V ± 5%, an output current range of 0mA
one ounce copper. to 500mA and a maximum ambient temperature of 85°C,
Table 1. Measured Thermal Resistance for DFN Package what will the maximum junction temperature be?
Copper Area Thermal Resistance
Topside* Backside Board Area (Junction-to-Ambient) The power dissipated by the device equals:
2500mm2 2500mm2 2500mm2 60°C/W IOUT(MAX) • (VIN(MAX) – VOUT) + IGND • VIN(MAX)
1000mm 2 2500mm2 2500mm2 62°C/W
225mm 2 2500mm2 2500mm2 65°C/W where:
100mm2 2500mm2 2500mm2 68°C/W IOUT(MAX) = 500mA
50mm 2 2500mm2 2500mm2 70°C/W
*Device is mounted on topside VIN(MAX) = 3.465V

Table 2. Measured Thermal Resistance for MSOP Package

IGND at (IOUT = 500mA, VIN = 3.465V) = 8.2mA
Copper Area Thermal Resistance So,
Topside* Backside Board Area (Junction-to-Ambient)
2500mm2 2500mm2 2500mm2 55°C/W P = 500mA(3.465V – 2.5V) + 8.2mA(3.465V) = 0.511W
2 2500mm2 2500mm2
1000mm 57°C/W Using a DFN package, the thermal resistance will be in
225mm 2 2500mm2 2500mm2 60°C/W the range of 60°C/W to 70°C/W depending on the cop-
100mm2 2500mm2 2500mm2 65°C/W
2
per area. So the junction temperature rise above ambient
50mm 2500mm2 2500mm2 68°C/W
approximately equals:
*Device is mounted on topside
0.511W • 65°C/W = 33.22°C
Table 3. Measured Thermal Resistance for DD-Pak Package
The maximum junction temperature equals the maximum
Copper Area Thermal Resistance
Topside* Backside Board Area (Junction-to-Ambient) ambient temperature plus the maximum junction tempera-
2500mm2 2500mm2 2500mm2 25°C/W ture rise above ambient or:
1000mm2 2500mm2 2500mm2 30°C/W
TJMAX = 85°C + 33.22°C = 118.22°C
125mm2 2500mm2 2500mm2 35°C/W
*Device is mounted on topside
Protection Features
Measured Thermal Resistance for TO-220 Package The LT1965 regulators incorporate several protection
features that makes them ideal for use in battery-powered
Thermal Resistance (Junction-to-Case) = 3°C/W circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices also protect
against reverse-input voltages, reverse-output voltages
and reverse output-to-input voltages.
Current-limit protection and thermal overload protection
protect the device against current overload conditions
at its output. For normal operation, do not exceed the
maximum rated junction temperature of 125°C (LT1965E,
LT1965I) or 150°C (LT1965H).

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LT1965 Series
Applications Information
The input of the device withstands reverse voltages of 22V. voltage if the output is pulled high, the ADJ pin input
The LT1965 limits current flow to less than 1mA (typically current must be limited to less than 5mA. For example, a
less than 300µA) and no negative voltage appears at the resistor divider is used to provide a regulated 1.5V output
output. The device protects both itself and the load against from the 1.20V reference when the output is forced to 20V.
batteries that are plugged in backwards. The top resistor of the resistor divider must be chosen to
The LT1965 incurs no damage if its output is pulled be- limit the current into the ADJ pin to less than 5mA when
low ground. If the input is left open-circuit or grounded, the ADJ pin is at 9V. The 11V difference between the OUT
the output can be pulled below ground by 22V. For fixed and ADJ pins divided by the 5mA maximum current into
voltage versions, the output will act like a large resistor, the ADJ pin yields a minimum top resistor value of 2.2k.
typically 5k or higher, limiting current flow to typically In circuits where a backup battery is required, several
less than 300µA. For the adjustable version, the output different input/output conditions can occur. The output
acts like an open circuit and no current flows from the voltage may be held up while the input is either pulled
output. However, current flows out of (but is limited by) to ground, pulled to some intermediate voltage, or is left
the resistor divider that sets the output voltage. If the input open-circuit. Current flow back into the output follows the
is powered by a voltage source, the LT1965 protects itself curve shown in Figure 6.
by shutting off the output.
If the LT1965’s IN pin is forced below the OUT pin or the
The LT1965 adjustable version incurs no damage if the OUT pin is pulled above the IN pin, input current typically
ADJ pin is pulled above or below ground by 9V. If the input drops to less than 2µA. This occurs if the LT1965 input
is left open-circuit or grounded, the ADJ pin performs like is connected to a discharged (low voltage) battery and
a diode in series with typically 1.5k of resistance when either a backup battery or a second regulator holds up
pulled below ground and like a large resistor (typically 5k the output. The state of the SHDN pin has no effect on
up to 3V on the ADJ pin and then 1.5k up to 9V) in series the reverse-output current if the output is pulled above
with a diode when pulled above ground. the input.
In situations where the ADJ pin connects to a resistor
divider that would pull the ADJ pin above its 9V clamp

6
TJ = 25°C
VIN = 0V
5 VOUT = VADJ (LT1965)
REVERSE OUTPUT CURRENT (mA)

VOUT = VSENSE LT1965

(LT195-1.5/-1.8/-2.5/-3.3)
4 CURRENT FLOWS INTO
OUTPUT PIN
3
LT1965-1.5

2 LT1965-1.8

1
LT1965-2.5
LT1965-3.3
0
0 1 2 3 4 5 6 7 8 9
OUTPUT VOLTAGE (V) 1965 F06

Figure 6. Reverse-Output Current

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 LT1965 Series
Typical Applications
Paralleling of Regulators for Higher Output Current

R1
0.01Ω 3.3V
IN OUT 2.2A
+ C1 LT1965-3.3
+ C2
VIN > 3.7V
100µF 22µF
SHDN SENSE
GND
R2
0.01Ω
IN OUT
R6
LT1965 6.65k
1%
SHDN SHDN ADJ
GND R7
R3 R4 R5 4.02k
2.2k 2.2k 3 8 10k 1%
+
1/2 1
2 LT1366
– C3
4 0.01µF

1965 TA03

Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)

R = 0.125 0.40 ±0.10

TYP
5 8
0.70 ±0.05

3.5 ±0.05 1.65 ±0.05 3.00 ±0.10 1.65 ±0.10

2.10 ±0.05 (2 SIDES) (4 SIDES) (2 SIDES)
PIN 1
PACKAGE TOP MARK
OUTLINE (NOTE 6)
(DD8) DFN 0509 REV C

4 1
0.25 ±0.05 0.200 REF 0.75 ±0.05 0.25 ±0.05
0.50 0.50 BSC
BSC 2.38 ±0.10
2.38 ±0.05 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 5. EXPOSED PAD SHALL BE SOLDER PLATED
2. DRAWING NOT TO SCALE 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
3. ALL DIMENSIONS ARE IN MILLIMETERS ON TOP AND BOTTOM OF PACKAGE
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

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LT1965 Series
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

MS8E Package
8-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1662 Rev K)

BOTTOM VIEW OF
EXPOSED PAD OPTION
1.88
1 (.074) 0.29
1.88 ±0.102 1.68 REF
(.074 ±.004) 0.889 ±0.127
(.035 ±.005) (.066)

0.05 REF
5.10 DETAIL “B”
1.68 ±0.102 3.20 – 3.45 CORNER TAIL IS PART OF
(.201)
(.066 ±.004) (.126 – .136)
MIN DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
8
NO MEASUREMENT PURPOSE
3.00 ±0.102
0.65 0.52
0.42 ±0.038 (.118 ±.004)
(.0256)
(.0165 ±.0015) (NOTE 3) 8 7 6 5 (.0205)
BSC
TYP REF
RECOMMENDED SOLDER PAD LAYOUT

3.00 ±0.102
4.90 ±0.152
DETAIL “A” (.118 ±.004)
0.254 (.193 ±.006)
(NOTE 4)
(.010)
0° – 6° TYP
GAUGE PLANE
1 2 3 4
0.53 ±0.152
(.021 ±.006) 1.10 0.86
(.043) (.034)
DETAIL “A” MAX REF
0.18
(.007)
SEATING
PLANE 0.22 – 0.38 0.1016 ±0.0508
(.009 – .015) (.004 ±.002)
0.65
TYP MSOP (MS8E) 0213 REV K
(.0256)
NOTE:
BSC
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.

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18 For more information www.linear.com/LT1965

 LT1965 Series
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

Q Package
5-Lead Plastic DD Pak
(Reference LTC DWG # 05-08-1461 Rev F)

.060
(1.524) .390 – .415
.060 TYP (9.906 – 10.541) .165 – .180
.256
(6.502) (1.524) (4.191 – 4.572) .045 – .055
15° TYP (1.143 – 1.397)

+.008
.004 –.004
.060 .183 .059

( )
.330 – .370
(1.524) (4.648) (1.499) +0.203
(8.382 – 9.398) TYP 0.102 –0.102

.095 – .115
(2.413 – 2.921)
.075
(1.905) DETAIL A
.067 .050 ±.012
.300 +.012 .013 – .023
.143 –.020 (1.702) (1.270 ±0.305)
(7.620) (0.330 – 0.584)
.028 – .038 BSC
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
( +0.305
3.632 –0.508 ) (0.711 – 0.965)
TYP
COPPER HEAT SINK

DETAIL A

0° – 7° TYP 0° – 7° TYP

.420
.080
.420 .276

.350 .325
.205
.585 .585

.320

.090 .090

.067 .042 .067 .042

RECOMMENDED SOLDER PAD LAYOUT RECOMMENDED SOLDER PAD LAYOUT

FOR THICKER SOLDER PASTE APPLICATIONS
NOTE:
1. DIMENSIONS IN INCH/(MILLIMETER) Q(DD5) 0811 REV F

2. DRAWING NOT TO SCALE

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LT1965 Series
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

T-Package
5-Lead Plastic TO-220 (Standard)
(Reference LTC DWG # 05-08-1421)

.147 – .155 .165 – .180

.390 – .415 (3.734 – 3.937) (4.191 – 4.572) .045 – .055
(9.906 – 10.541) DIA (1.143 – 1.397)

.230 – .270
(5.842 – 6.858)
.570 – .620
.620
.460 – .500 (14.478 – 15.748)
(15.75)
(11.684 – 12.700) TYP
.330 – .370
.700 – .728
(8.382 – 9.398)
(17.78 – 18.491)

.095 – .115
SEATING PLANE
(2.413 – 2.921)
.152 – .202
.260 – .320 (3.861 – 5.131) .155 – .195*
(6.60 – 8.13) (3.937 – 4.953)

.013 – .023
(0.330 – 0.584)
.067
BSC .028 – .038 .135 – .165
(1.70)
(0.711 – 0.965) (3.429 – 4.191) * MEASURED AT THE SEATING PLANE
T5 (TO-220) 0801

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20 For more information www.linear.com/LT1965

 LT1965 Series
Revision History (Revision history begins at Rev B)

REV DATE DESCRIPTION PAGE NUMBER

B 08/13 Added H-grade, specs and curves 2-10
Lowered max ESR to 0.3Ω 12
Removed references to “starting up from negative output” 11, 12, 16

1965fb

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
For more
tion that the interconnection information
of its circuits www.linear.com/LT1965
as described herein will not infringe on existing patent rights. 21
LT1965 Series
Typical Application
Adjustable Current Source
R5, 0.01Ω LT1965
IN OUT LOAD
+ C1
R1 + C4
VIN > 2.7V 1k SHDN ADJ
10µF 10µF
LT1004-1.2 GND
R2 R4 R6 R8
C3
80.6k 2.2k 2.2k 100k
1µF

R3
2k 2 R7
8
– 470Ω
1/2 1
LT1366 1965 TA04
3
C2
+ 4
NOTE: ADJUST R1 FOR 3.3µF
0A TO 1.1A CONSTANT-CURRENT

Related Parts
PART NUMBER DESCRIPTION COMMENTS
LT1129 700mA, Micropower, LDO VIN: 4.2V to 30V, VOUT(MIN) = 3.8V, VDO = 0.40V, IQ = 50µA, ISD = 16µA;
DD, SOT-223, S8, TO220-5 and TSSOP20 Packages
LT1761 100mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 20µA, ISD = < 1µA,
Low Noise < 20µVRMS , Stable with 1µF Ceramic Capacitors, ThinSOT™ Package
LT1762 150mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 25µA, ISD = < 1µA,
Low Noise < 20µVRMS , MS8 Package
LT1763 500mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 30µA, ISD = < 1µA,
Low Noise < 20µVRMS , S8 Package
LT1764/ 3A, Low Noise, Fast Transient Response, VIN: 2.7V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD = < 1µA, Low Noise
LT1764A LDO < 40µVRMS , “A” Version Stable with Ceramic Capacitors, DD and TO220-5 Packages
LTC1844 150mA, Very Low Drop-Out LDO VIN: 1.6V to 6.5V, VOUT(MIN) = 1.25V, VDO = 0.08V, IQ = 35µA, ISD = < 1µA,
Low Noise < 60µVRMS , ThinSOT™ Package
LT1962 300mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.27V, IQ = 30µA, ISD = < 1µA,
Low Noise < 20µVRMS , MS8 Package
LT1963/ 1.5A, Low Noise, Fast Transient Response, VIN: 2.1V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD = < 1µA,
LT1963A LDO Low Noise < 40µVRMS , “A” Version Stable with Ceramic Capacitors;
DD, TO220-5, SOT-223 and S8 Packages
LT3020 100mA, Low Voltage VDO , VIN(MIN) = 0.9V, VIN: 0.9V to 10V, VOUT(MIN) = 0.20V, VDO = 0.15V, IQ = 120µA, ISD = 3µA, DFN and
LDO MS8 Packages
LT3021 500mA, Low Voltage VDO , VIN(MIN) = 0.9V, VIN: 0.9V to 10V, VOUT(MIN) = 0.20V, VDO = 0.16V, IQ = 120µA, ISD = 3µA, DFN and
LDO S8 Packages
LT3023 Dual, 2x 100mA, Low Noise Micropower, VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 40µA, ISD = < 1µA, DFN and
LDO MS10 Packages
LT3024 Dual, 100mA/500mA, Low Noise VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 60µA, ISD = < 1µA, DFN and
Micropower, LDO TSSOP Packages
LT3027 Dual, 2x 100mA, Low Noise Micropower, VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 25µA, ISD = < 1µA,
LDO with Independent Inputs Low Noise < 20µVRMS , DFN and MS10 Packages
LT3028 Dual, 100mA/500mA, Low Noise VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 30µA, ISD = < 1µA,
Micropower, LDO with Independent Inputs Low Noise < 20µVRMS , DFN and TSSOP Packages
LT3080/ 1.1A Parallelable, Low Noise, Low Dropout 300mV Dropout Voltage (2-Supply Operation), Low Noise: 40µVRMS, VIN: 1.2V to 36V,
LT3080-1 Linear Regulator VOUT: 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set; Directly Parallelable
(No Op Amp Required), Stable with Ceramic Caps, TO-220, SOT-223, MSOP and 3mm ×
3mm DFN Packages; LT3080-1 Version Has Integrated Internal Ballast Resistor

1965fb

22 Linear Technology Corporation

LT 0813 REV B • PRINTED IN USA

1630 McCarthy Blvd., Milpitas, CA 95035-7417

For more information www.linear.com/LT1965
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT1965  LINEAR TECHNOLOGY CORPORATION 2007