Demultiplexer, Encoder, Decoder, ALU

2
What is a Demultiplexer
(DEMUX)?
• A DEMUX is a digital switch Demultiplexer
with a single input (source) Block Diagram
and a multiple outputs
(destinations).

DEMUX
• The select lines determine 1 2N
Input Outputs
which output the input is (source) (destinations)
connected to.
• DEMUX Types N
 1-to-2 (1 select line)
Select
 1-to-4 (2 select lines)
Lines
 1-to-8 (3 select lines)
 1-to-16 (4 select lines)
3
Demultiplexers

 A demultiplexer has
 N control inputs
 1 data input
 2N outputs
 A demultiplexer routes (or connects) the data input
to the selected output.
 The value of the control inputs determines the
output that is selected.
 A demultiplexer performs the opposite function of a
multiplexer.
1 to 4 channel Demux
 Demultiplexers: Implemtation

G Out0

Out1

1:2 demux
1-to-4 De-Multiplexer (DEMUX)

D0

DEMUX
D1
X
D2

D3

B A

B A D0 D1 D2 D3

0 0 X 0 0 0

0 1 0 X 0 0

1 0 0 0 X 0

1 1 0 0 0 X
Demux Tree
 Encoders

• An encoder is a combinational logic circuit that

generate n output lines from 2n (or less) inputs.
It has the reverse function of the decoder

• An encoder accepts digit on its inputs, such as a

decimal or octal digit, and converts it to a coded
output, such as a binary or BCD. Encoder can
also be devised to encode various symbol and
alphabetic characters. This process of
converting from familiar symbols or numbers to a
coded format is called encoding.
Encoders
 Lecture Digital Systems

Binary Encoders
 Binary encoders convert its 2n
inputs to an n-bit output. I0 outputs
O0
2n
 Only one high value is inputs
n
presented as input. The result is On – 1
a binary-encoded output of size I 2n – 1
n.
Binary Encoder
 Binary encoders are useful for
compressing data.
 Lecture Digital Systems

4-to-2 Binary Encoder

 In encoder circuit only one input may be set high (1) at a certain
time.
 The output is a 2-bit number.

I0 I1 I2 I3 Y1 Y0
1 0 0 0 0 0 I0
Binary Y0
0 1 0 0 0 1 I1
I2
Encoder
0 0 1 0 1 0 Y1
I3 4-to-2
0 0 0 1 1 1
4 inputs 2 outputs
 Lecture Digital Systems

Octal to Binary (8 to 3) Encoder

 In this encoder circuit, at any certain I0 I1 I2 I3 I4 I5 I6 I7 Y2 Y1 Y0
time, only one input line has the 1 0 0 0 0 0 0 0 0 0 0
value of 1. 0 1 0 0 0 0 0 0 0 0 1
0 0 1 0 0 0 0 0 0 1 0
 The output is binary digits of Y2 Y1 Y0. 0 0 0 1 0 0 0 0 0 1 1
 This circuit is also called octal-to- 0 0 0 0 1 0 0 0 1 0 0
binary encoder. 0 0 0 0 0 1 0 0 1 0 1
0 0 0 0 0 0 1 0 1 1 0
I0 0 0 0 0 0 0 0 1 1 1 1

I1 Y0 = I 1 + I 3 + I 5 + I 7
I2
I3 Y1 = I 2 + I 3 + I 6 + I 7
I4
I5
I6
I7 Y2 = I 4 + I 5 + I 6 + I 7
I0 Y0
Binary
Encoder Y1

I7
8-to-3 Y2

8 inputs 3 outputs
 Priority Encoder

• The Priority Encoder solves the problems

mentioned above by allocating a priority level to
each input. The priority encoders output
corresponds to the currently active input which
has the highest priority. So when an input with a
higher priority is present, all other inputs with a
lower priority will be ignored.
 Lecture Digital Systems

4-to-2 Priority Encoder

 For some application, there can be more than one input line that
have a value of 1.
 One way to handle these inputs is to ignore the lower inputs and
only process the highest input (‘priority input’).

 This encoder has 4 input lines: D0 D1 D2 D3 A1 A0

D0 to D3. 1 0 0 0 0 0
 D3 has the highest priority, D0 has X 1 0 0 0 1
the lowest priority. X X 1 0 1 0
X X X 1 1 1
 Lecture Digital Systems

8-to-3 Priority Encoder

 The following is the truth table of an 8-to-3 priority encoder.
 X indicates don’t cares.

I0 I1 I2 I3 I4 I5 I6 I7 Y2 Y1 Y0 Idle

0 0 0 0 0 0 0 0 X X X 1
1 0 0 0 0 0 0 0 0 0 0 0
X 1 0 0 0 0 0 0 0 0 1 0
X X 1 0 0 0 0 0 0 1 0 0
X X X 1 0 0 0 0 0 1 1 0
X X X X 1 0 0 0 1 0 0 0
X X X X X 1 0 0 1 0 1 0
X X X X X X 1 0 1 1 0 0
X X X X X X X 1 1 1 1 0
 Lecture Digital Systems

8-to-3 Priority Encoder

 As one alternative solution, we can use a priority circuit that
implements the following logic functions:
H0 = I7’·I6’·I5’·I4’·I3’·I2’·I1’·I0
H1 = I7’·I6’·I5’·I4’·I3’·I2’·I1
H2 = I7’.I6’·I5’·I4’·I3’·I2
H3 = I7’.I6’·I5’·I4’·I3
H4 = I7’·I6’·I5’·I4
H5 = I7’·I6’·I5
H6 = I7’·I6
H7 = I7 (Highest Priority)
 Decoder

• A circuit that coverts binary information from n

input lines to a maximum of 2n unique output
lines
• May have fewer than 2n outputs
• For each possible input combination, there is
only one output that is equal to 1
 Lecture Digital Systems

Binary Decoders
 A binary decoder can be
considered as a black box I0 O0
with n input lines and 2n n
output lines. inputs 2n
 Only one output line is set to In – 1 outputs
1 for a given input.
O2n – 1
Enable E
Binary Decoder
 Lecture Digital Systems

Binary Decoders
 Binary decoders convert an n-bit input to a single output. It uses
its n-bit input to determine which of the 2n outputs will be
uniquely activated.
 Binary decoders can be developed using AND or OR Gates.
 Later on, binary decoders can be implemented in logic circuits.

 The outputs of a decoder are minterms. That is why decoders are

sometimes called as minterm generators.
 We can easily use a decoder to implement any sum of minterms
expression.
 Note: A minterm is a Boolean expression resulting in 1 only for
the output of a single row (in a truth table) or a single cell (in a
Karnaugh map), and 0s for all other row or cells, respectively.
 Lecture Digital Systems

2-to-4 Binary Decoder

 A circuit of 2-to-4 binary decoder is shown below.

F0
X
Binary
F1
Decoder
F2
Y 2-to-4 F3
2 inputs 4 outputs

Enable

 The truth table shows that for any given input combination,
exactly one output will turn to 1.
 The enable must be set to 1 to get an output.
 Lecture Digital Systems

3-to-8 Decoder
 Try to understand the logic circuit of X Y Z F0 F1 F2 F3 F4 F5 F6 F7
3-to-8 binary decoder below. 0 0 0 1 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0 0
0 1 0 0 0 1 0 0 0 0 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 0 0 0 0 0 0 0 1

X F0

Y Decoder
3-to-8
Z
F7
3 inputs 8 outputs
Enable
 ALU (Arithmetic Logic Unit )
• The IC 74181 is a 4-bit Arithmetic Logic Unit
(ALU) which can perform all the possible 16
logic operations on two variables and a variety
of arithmetic operations.
• Features
– ■ Provides 16 arithmetic operations: add, subtract,
compare, double, plus twelve other arithmetic
operations
– ■ Provides all 16 logic operations of two variables:
exclusive-OR, compare, AND, NAND, OR, NOR, plus
ten other logic operations
– ■ Full lookahead for high speed arithmetic operation
on long words
IC 74181 ALU