Semiconductor Electronics
Semiconductor Electronics
Semiconductor Electronics
Band gap
Valence band
Electron
In semiconductor materials there will be electrons in the conduction band
already due to thermal excitation, there will also be gaps in the valence
band where electrons have been liberated. These gaps in the valence band
are colloquially referred to as holes. These “holes” in valence band allow
other electrons to move into this gap, once again leaving a hole from
where the electron came. So holes therefore can move within the lattice
depending on whether there is an electric field present. The electrons and
holes within the matrix are called carriers, due to the fact that they are
mobile. In silicon at room temperature there is a given concentration of
holes and electrons, this is called the intrinsic concentration. This intrinsic
concentration determines whether the semiconductor will be able to
conduct a current. At very low temperatures, semiconductors act like
insulators while at room temperatures they can conduct a current .
There are other ways to increase the carrier concentration apart from
increasing the temperature. One of these ways is by introducing ions
into the semiconductor matrix that have valences different to that of
the semiconductor material. Usually group 3 and 5 elements are used
to dope silicon. Silicon has 4 valence electrons which it shares with its
surrounding atoms covalently. If a group 5 ion is introduced into the
matrix, it will bond covalently with the surrounding silicon atoms,
making bonds with 4 surrounding silicon atoms, however silicon only
needs 8 electrons in its outer orbital and the ninth electron, that is
additional due to the 5 valence electrons in group 5, will be unbonded
and will flow into the conduction band. This will increase the carrier
concentration. If a group 3 ion is implanted, there will be a hole present
in the matrix by the same logic . This arrangement can be seen below.
Group 5
Dopant
Unbonded electron
from group 5 dopant
Group 4
semiconductor
Group 3
Dopant
- - - - - - - - - - - - - - - - - - - - Negative Cores
Depleted Region
+ + + + + + + + + + + + + + + + + + + + Positive Cores
Once a photon has created an electron hole pair either in the positive or negatively
doped silicon, the minority carrier (Hole in N-type semiconductors and electrons in P-
type semiconductors) will be swept across the depleted zone by the electric field. Once
the minority carrier has been swept across the depleted region, it will once again be a
majority carrier. If there is a front and rear charge collection plate that is connected to a
circuit, the electron or hole will flow through this pathway, expending its energy and
eventually recombining when it reaches the side where it is once again a minority
carrier. This can be seen in the figure below.
The top plate that collects either holes or electrons, is either made up of metallic fingers
that collect the charge while letting photons into the semiconductive layer, or it is made
of a transparent coating oxide which collects the majority carriers and allows light to
pass through unimpeded.
Hole migrating to the N-type
side
Photon used to create the
electron hole pair
P-type
Electron hole pair
Stage 2
Stage 3
Stage 4
Stage 5
Czochralski process
A technique has also been developed that works on the same
principles as the Czochralski process but is slightly modified. A seed
is placed beneath a column of silicon, a mobile heating element then
slowly moves downward, heating a small region of the silicon and
allowing it to form a monocrystalline structure. This is called the
float zone technique. This process is less energy intensive than the
original czochralski process, however it is still very energy intensive.
Far less oxygen contaminant is present in this silicon due to the fact
that there is less movement of the silicon and hence it is more
difficult for impurities to diffuse into the structure. This process is
mostly used in laboratory grown silicon wafers.
Multicrystalline solar cells still have a highly ordered crystal
structure, however there are individual grains of monocrystalline
silicon within the wafer. Grain sizes are typically in the range of a few
millimeters.
Processors
• Processors are made up of a combination of
billions of transistors. Transistors consist of 3
layers of doped silicon. Either NPN or PNP
How transistors work
• Transistors work as switches. A sandwich of two
negatively doped silicon layers envelops a positively
doped layer. At the interface between the positively
doped and negatively doped layer a depletion zone
exists. This prevents electrons from flowing between the
layers. When a current is supplied to the base(usually
positive) it causes electrons in the p type layer to be
attracted to the base. This causes the depletion zone to
be minimised and a conducting channel to be created,
which allows electrons to flow across the transistor.
How transistors compute
• When transistors are arranged in specific ways
they produce structures called logic gates.
These logic gates allow calculations to be done
when they are arranged in certain
combinations. In the next slide some logic
gates are shown
Transistor arrangement for OR gate
Logic gate arrangement for full adder
How microprocessors are manufactured
1. Monocrystalline ingots of silicon are created
2. These ingots are sliced into wafers and are polished.
3. A photoresitive layer is deposited using spin deposition.
4. The photo resistive layer is exposed to UV light in the pattern of the final circuit
5. The exposed photoresistive layer is removed by chemical washes.
6. The silicon is doped via ion implantation
7. A second photoresist layer is applied. The exposed areas are removed by chemical
washes as before.
8. The silicon wafer is then etched to remove unwanted silicon.
9. A insulative layer is then deposited onto the surface along with electroplated copper
directly above that. The copper is then ground off untill it is only in the channels
10.Interconnects are formed
11.Heat sinks are applied
12.Processors are tested and binned according to their performance