Embedded

Systems
By: Dr. Pankaj Sahu
 Designing of an Embedded System

Basic Structure of an Embedded System

Sensor: Sensor used for sensing the change in
environment condition and it generate the electric
signal on the basis of change in environment
condition. Therefore it is also called as transducers for
providing electric input signal on the basis of change in
environment condition.
A-D Converter: An analog-to-digital converter is a
device that converts analog electric input signal into
its equivalent digital signal for further processing in an
embedded system.
Processor : Processor is used for processing the signal
and data to execute desired set of instructions with
high-speed of operation.
ASICs: Application specific integrated circuit (ASIC) is
an integrated circuit designed to perform task specific
operation inside an embedded system.

D-A Converter: A digital-to-analog converter is a

device that converts digital electric input signal into its
equivalent analog signal for further processing in an
embedded system.

Actuators: Actuators is a comparator used for

comparing the analog input signal level to desired
output signal level for providing the error free output
from the system.
Design steps required for the development of Embedded
System
 Embedded System processors

• Processors are the major part in embedded

systems.
• It takes response from sensors in digital form and
processing of this response to produce output in
real-time processing environment is performed
using processors.
• For an embedded system developer it is essential
to have the knowledge of both microprocessors
and micro-controllers.
Processors inside a system have two essential units:

Control unit: This unit in processors performed the

program flow control operation inside an embedded
system. The control unit also acts as a fetching unit
for fetching the set of instructions stored inside a
memory.
Execution unit: This unit is used for execution the
various tasks inside a processors. It mainly
comprises of arithmetic and logical unit (ALU) and it
also include a circuit that executes the instruction
sets used to perform program control operation
inside processors.
Types of processors:

1. Application Specific System Processor (ASSP):

ASSP is application dependent system processor
used for processing signal of embedded system.
Therefore for different application performing task a
unique set of system processors is required.

2. Application Specific Instruction Processor (ASIP):

ASIP is application dependent instruction
processors. It is used for processing the various
instruction set inside a combinational circuit of an
embedded system.
3. General Purpose Processor (GPP): GPP is used for
processing signal from input to output by controlling
the operation of system bus, address bus and data
bus inside an embedded system.

Types of general purpose processor are:

• Microprocessor.
• Microcontroller.
• Digital signal processor.
• Analog signal processor.
 Microprocessor

• A central processing unit built into a single VLSI

chip is called a microprocessor. It is a general
purpose device and an additional outside circuitry
is added to make it work as a microcomputer.
• Operations performed by microprocessor are
adding, subtracting, comparing two numbers and
fetching the data from memory for transferring it
from one place to another.
• Microprocessors is also called as Basic Input-
Output system (BIOS) which used for processing
the input received from sensors and produced the
equivalent output from the system.
 Basic components of Microprocessor

Arithmetic and Logic unit (ALU): ALU inside a

microprocessor used to perform the arithmetic and
logic operation. It performs the logic operation on
the data stored inside a register.
Accumulator: It is a register inside which the
intermediate arithmetic and logical operation data is
stored.
Working registers: It is a storage device used to
store the data inside a microprocessor in different
address location.
Program counter: It is used for counting the number
of program executed inside a microprocessor.
Stack pointer: Stack pointer act as a pointer to the
certain address. It is a register used to store the
address of the last program request made by the
processor inside a stack.
Clock circuit: It is used for generate the clock pulse
required as a reference signal for the
microprocessor.
Interrupt circuit: It is used for generating the
interrupt signal when the higher priority process
required to be served first on basis of priority by
microprocessor.
RIO Device architecture
The RIO architecture fundamentally consists of two targets
offering complementary capabilities:

Real-time (RT) processor – runs a LabVIEW VI in a similar

fashion as a desktop computer, but with a real-time
operating system (RTOS) to achieve deterministic
(predictable) process loop timing; the RT processor also
manages a flash-based file system, USB port, UART, and
network adapters for both wired and wireless networking.

Field-programmable gate array (FPGA) –“runs” a LabVIEW VI

by loading a bitstream configuration file (FPGA “personality”)
compiled directly from the VI source code; the FPGA
manages the hardware interface that connects to sensors,
actuators, and peripheral devices that constitute the
embedded system
RT target features
• Runs NI Linux Real-Time, a real-time operating
system (RTOS) designed specifically for NI
products
• Communicates with the desktop computer’s
LabVIEW development environment either
through a USB-based local area network
(USBLAN) or by a wireless network.
• Networking capabilities include TCP/IP, UDP,
HTTP, secure HTTP, SMTP email, and web
services.
• Manages an onboard flash-memory-based file
system accessible with LabVIEW VIs, browser,
and WebDAV
• USB port supports thumb drives and webcams.
The RIO Device and low-level VIs in concert with the
default Device “personality” (FPGA bitfile) provide
an effortless way to perform common interfacing
tasks; with this toolkit the myRIO may be viewed as
a single RT target with built-in analog and digital I/O,
pulse-width modulated (PWM) outputs, quadrature
encoder waveform decoding, serial bus protocols
(SPI and I2C), timers, and interrupt handling.
All of the code examples in the NI myRIO
Project Essentials Guide and the NI myRIO
Vision Essentials Guide take this programming
approach.
FPGA target features
• The FPGA target manages all digital input/output
(DIO) devices, analog I/O (AIO), stereo audio I/O,
and onboard devices (accelerometer, four LEDs,
and pushbutton).
• Programmed using LabVIEW FPGA; VIs use a
restricted subset of LabVIEW programming
constructs.
Resources include:
• 4,400 slices
• 17,600 slice LUTs (look-up tables)
• 35,200 slice registers
• 60 block RAMs
• 80 DSP48s
• 32 logical interrupts
• 16 DMA channels
The NI ELVIS III is based on the LabVIEW RIO
architecture, which incorporates the LabVIEW Real-
Time (RT) system, a user programmable FPGA, and user
programmable I/O.
A LabVIEW Real-Time system consists of software and
hardware components. The software components include
LabVIEW, the RT engine, and the LabVIEW projects and VIs
that you create. The hardware components of a RT system
include a host computer and an RT target such as the NI ELVIS
III.

For the NI ELVIS III, the RT system includes the following four
components:

Host computer—The host computer is a computer with

LabVIEW, the LabVIEW Real-Time Module, and the LabVIEW
ELVIS III Toolkit installed on which you develop the VIs for the
RT system. After developing the RT system VIs, you can
download and run the VIs on RT targets. The host computer
can run user interface VIs that communicate with VIs running
on the NI ELVIS III to provide a user interface.
LabVIEW—You develop VIs with LabVIEW on the host
computer. The Real-Time Module extends the capabilities
of LabVIEW with additional tools for creating, debugging,
and deploying deterministic VIs. The LabVIEW ELVIS III
Toolkit provides NI ELVIS III-specific support for LabVIEW RT
applications.
RT Run-Time engine—The RT run-time engine is a version
of LabVIEW that runs on the NI ELVIS III. The RT run-time
engine runs the host VIs you download to the NI ELVIS III.
RT target—The RT target is your NI ELVIS III. The NI ELVIS III
is a networked hardware platform with an embedded
processor and a Real-Time operating system that runs the
RT engine. You can use a separate host computer to
communicate with VIs on the NI ELVIS III through USB,
Ethernet, or Wi-Fi (Wi-Fi models only).
UART (Universal Asynchronous Receiver/Transmitter)

• A UART (Universal Asynchronous Receiver/Transmitter) is

the microchip with programming that controls a
computer's interface to its attached serial devices.
• Specifically, it provides the computer with the RS-
232C Data Terminal Equipment ( DTE ) interface so that it
can "talk" to and exchange data with modems and other
serial devices.
• UART is not a communication protocol like SPI and I2C,
but a physical circuit in a microcontroller, or a stand-alone
IC. A UART’s main purpose is to transmit and receive serial
data.
• One of the best things about UART is that it only uses two
wires to transmit data between devices.
• In UART communication, two UARTs communicate directly
with each other.
• The transmitting UART converts parallel data from a
controlling device like a CPU into serial form, transmits it
in serial to the receiving UART, which then converts the
serial data back into parallel data for the receiving device.
• Only two wires are needed to transmit data between two
UARTs. Data flows from the Tx pin of the transmitting
UART to the Rx pin of the receiving UART.
 Functions of UART

• Converts the bytes it receives from the computer

along parallel circuits into a single serial bit
stream for outbound transmission.
• On inbound transmission, converts the serial bit
stream into the bytes that the computer handles.
• Adds a parity bit (if it's been selected) on outbound
transmissions and checks the parity of incoming bytes
(if selected) and discards the parity bit.
• Adds start and stop delineators on outbound and strips
them from inbound transmissions.
• Handles interrupts from the keyboard and mouse
(which are serial devices with special port s).
• May handle other kinds of interrupt and device
management that require coordinating the computer's
speed of operation with device speeds.
• More advanced UARTs provide some amount
of buffering of data so that the computer and serial
devices data streams remain coordinated.
• The most recent UART, the 16550, has a 16-byte buffer
that can get filled before the computer's processor
needs to handle the data.
• UARTs transmit data asynchronously, which means there
is no clock signal to synchronize the output of bits from
the transmitting UART to the sampling of bits by the
receiving UART.
• Instead of a clock signal, the transmitting UART adds start
and stop bits to the data packet being transferred. These
bits define the beginning and end of the data packet so
the receiving UART knows when to start reading the bits.
• When the receiving UART detects a start bit, it starts to
read the incoming bits at a specific frequency known as
the baud rate. Baud rate is a measure of the speed of
data transfer, expressed in bits per second (bps).
• Both UARTs must operate at about the same baud rate.
The baud rate between the transmitting and receiving
UARTs can only differ by about 10% before the timing. of
bits gets too far off.
• The UART that is going to transmit data receives the
data from a data bus.
• The data bus is used to send data to the UART by
another device like a CPU, memory, or
microcontroller.
• Data is transferred from the data bus to the
transmitting UART in parallel form.
• After the transmitting UART gets the parallel data
from the data bus, it adds a start bit, a parity bit, and
a stop bit, creating the data packet.
• Next, the data packet is output serially, bit by bit at
the Tx pin.
• The receiving UART reads the data packet bit by bit at
its Rx pin.
• The receiving UART reads the data packet bit by bit at
its Rx pin.
• The receiving UART then converts the data back into
parallel form and removes the start bit, parity bit, and
stop bits.
• Finally, the receiving UART transfers the data packet
in parallel to the data bus on the receiving end.
• UART transmitted data is organized into packets.
Each packet contains 1 start bit, 5 to 9 data bits
(depending on the UART), an optional parity bit,
and 1 or 2 stop bits.
START BIT
The UART data transmission line is normally held at a
high voltage level when it’s not transmitting data. To
start the transfer of data, the transmitting UART pulls the
transmission line from high to low for one clock cycle.
When the receiving UART detects the high to low voltage
transition, it begins reading the bits in the data frame at
the frequency of the baud rate.
DATA FRAME
The data frame contains the actual data being
transferred. It can be 5 bits up to 8 bits long if a parity bit
is used. If no parity bit is used, the data frame can be 9
bits long. In most cases, the data is sent with the least
significant bit first.
PARITY
Parity describes the evenness or oddness of a number. The parity
bit is a way for the receiving UART to tell if any data has changed
during transmission.
Bits can be changed by electromagnetic radiation, mismatched
baud rates, or long distance data transfers.
After the receiving UART reads the data frame, it counts the
number of bits with a value of 1 and checks if the total is an even
or odd number.
If the parity bit is a 0 (even parity), the 1 bits in the data frame
should total to an even number.
If the parity bit is a 1 (odd parity), the 1 bits in the data frame
should total to an odd number.
When the parity bit matches the data, the UART knows that the
transmission was free of errors.
But if the parity bit is a 0, and the total is odd; or the parity bit is a
1, and the total is even, the UART knows that bits in the data
frame have changed.
STOP BITS
To signal the end of the data packet, the sending UART drives the
data transmission line from a low voltage to a high voltage for at
least two bit durations.

STEPS OF UART TRANSMISSION

1. The transmitting UART receives data in parallel from the data
bus:
2. The transmitting UART adds the start bit, parity bit, and the stop
bit(s) to the data frame.

3. The entire packet is sent serially from the transmitting UART to

the receiving UART. The receiving UART samples the data line at
the pre-configured baud rate:
4. The receiving UART discards the start bit, parity bit, and stop
bit from the data frame.

5. The receiving UART converts the serial data back into parallel
and transfers it to the data bus on the receiving end.
 ADVANTAGES AND DISADVANTAGES OF UARTS
No communication protocol is perfect, but UARTs are pretty good
at what they do. Here are some pros and cons to help you decide
whether or not they fit the needs of your project.

ADVANTAGES
• Only uses two wires
• No clock signal is necessary
• Has a parity bit to allow for error checking
• The structure of the data packet can be changed as long as
both sides are set up for it
• Well documented and widely used method

DISADVANTAGES
• The size of the data frame is limited to a maximum of 9 bits
• Doesn’t support multiple slave or multiple master systems
• The baud rates of each UART must be within 10% of each other