Lecture no.

 INTRODUCTION TO BASIC ELEMENT OF COMPUTER SYSTEM

 Basic Elements of
At a top level, a Computer
computer consists of processor,
memory, and I/O components, with one or more
modules of each type. These components are
interconnected in some fashion to achieve the
main function of the computer, which is to execute
programs. Thus, there are four main structural
elements:
1. Processor.
2. Main Memory.
3. I/O Modules.
4. System Bus.
 THE PROCESSOR
Controls the operation of
the Computer and
performs its data
processing functions. Major
producers of CPU (by
ranking) are:
1. Intel.

2. AMD.

3. NVIDIA.

4. IBM, etc…
 Evolution of
Microprocessor
Invention that brought about desktop
and handheld computing.
Processor on a single chip.
 Fastest general purpose processor.
Multiprocessors.
 Each chip (socket) contains multiple
processors (cores).
 Graphical Processing Units (GPUs)
 Provideefficient computation on arrays of
data using Single-Instruction Multiple Data
(SIMD) techniques.
 Used for general numerical processing.
 Physical simulations for games, and
 Computations on large spreadsheets
 Digital Signal Processors (DSPs)
 Deal with streaming signals such as audio or
video.
 Used to be embedded in devices like modems
 Encoding/decoding speech and video (codecs)
 Support for encryption and security
 System on a Chip (SoC)
To satisfy the requirements of handheld
devices, the microprocessor is giving way
to the SoC.
Components such as DSPs, GPUs,
codecs and main memory, in
addition to the CPUs and caches,
are on the same chip.
 THE MAIN MEMORY
Stores data and programs. This
memory is typically volatile; that
is, when the computer is shut
down, the contents of the
memory are lost.
In contrast, the contents of disk
memory are retained even when
the computer system is shut
down. Main memory is also
referred to as real memory or
primary memory.
I/O modules: Move data between the computer and its
external environment.

The external environment consists of a variety of

devices, including secondary memory devices (e. g.,
disks), communications equipment, and terminals.
 I/O MODULES
storage (e.g.
hard drive)

Moves Data between

the computer and communicatio
external environments ns equipment
such as:

terminals
 SYSTEM BUS
Provides for communication
among processors, main
memory, and I/O modules.

It combines the functions of a

Data bus to carry information,
an Address bus to determine
where it should be sent, and a
Control bus to determine its
operation.
 The Memory Hierarchy
There are three key characteristics of memory: namely,
capacity, access time, and cost. A variety of technologies
are used to implement memory systems, and across this
spectrum of technologies, the following relationships hold:

Greater
capacity =
smaller cost
per bit
Faster Greater
access time capacity =
= greater slower access
cost per bit speed
Going Down the Hierarchy

Decreasing cost per bit

Increasing capacity
Increasing access time
Decreasing frequency of
access to the memory by the
processor
 The Cache Memory
Cache memory, also called CPU memory, is random
access memory (RAM) that a computer microprocessor
can access more quickly than it can access regular RAM.
This memory is typically integrated directly with the CPU
chip or placed on a separate chip that has a separate bus
interconnect with the CPU.
Cache memory is a type of memory used to hold
frequently used data. Most web browsers use a cache to
load regularly viewed web pages fast. The most important
type of cache memory is the CPU cache.
Cache and Main Memory
 The Cache Mode of Operation
Contains copy of a portion of main memory
Processor first checks cache
If desired data item not found, relevant block of
memory read into cache
Because of locality of reference, it is likely that
future memory references are in that block
Cache/Main-Memory Structure
Cache Read Operation
 The Cache Principles
Cache size:
• Even small caches have significant impact on performance
Block size:
• The unit of data exchanged between cache and main
memory
Mapping function
• Determines which cache location the block will occupy
Replacement algorithm
• Chooses which block to replace
• Least-recently-used (LRU) algorithm
 Processor
 A processor includes a set of registers that provide memory
that is faster and smaller than main memory. Processor
registers serve two functions:
 User-visible registers:
 Enable the machine or assembly language
programmer
 to minimize main memory references by optimizing register
use.
 For high-level languages, an optimizing compiler will
attempt to make intelligent choices of which variables to
assign to registers and which to main memory locations.
 Some high-level languages, such as C, allow the programmer to
suggest to the compiler which variables should be held in
registers.
available to system (OS) and user programs
holds data, addresses, and some condition codes
 Control and status registers:

Used to control the operation of the processor and by

privileged OS routines to control the execution of
programs.
Generally not available to user
programs
some used by CPU to control its
operation
some used by OS to control program
execution
 Processor Registers
1. Memory address resister (MAR):
Specifies the address for the next read or write.
2. Memory buffer register (MBR):
Contains data written into memory or receives data read
from memory.

3. I/O address register:

Specifies a particular I/O Device
4. I/O buffer register:
Is used for the exchange of Data between an I/O module
Text/Pic
and the Processor.
 Control and Status
Registers
Program counter (PC):
• Contains the address of the next instruction to be
fetched Instruction register (IR):
• Contains the instruction most recently fetched
Program status word (PSW):
• Contains status information
 Instruction Execution
A program consists of a set of instructions
stored in memory
Two steps:
• processor reads (fetches) instructions
from memory one at a time and
executes each instruction.
• processor executes each instruction
 Processor-memory
 Data may be transferred from processor to memory or
 from memory to processor.
Basic Instruction Cycle
Instruction Fetch and Execute
 The processor fetches the instruction from
memory.
 Program Counter (PC) holds address of the
instruction to be fetched next.
 PC is incremented after each fetch.
 Instruction Register (IR)
• Processor
Fetched instruction interprets the
is loaded into
Instruction Register
instruction and
(IR) performs required
action:
• Processor-
memory
• Processor-I/O
• Data processing
• Control
 Program counter (PC) = Address of instruction
 Instruction register (IR) = Instruction being executed
 Accumulator (AC) = Temporary storage
 Figure 1.4 illustrates a partial program execution, showing
the relevant portions of memory and processor registers.
 What is an
Interrupt
 Virtually all Computers provide a mechanism by which
other modules (I/O, memory) may interrupt the normal
sequencing of the processor.

 Interrupts are provided primarily as a way to improve

processor utilization.
- Interrupt the normal sequencing of the processor
- Most I/O devices are slower than the processor
• Processor must pause to wait for device
1. I/O:
Classes of Interrupts
Signals normal completion of operation
or error
2. Program Exception:
Arithmetic Overflows
Try to execute illegal instruction
Reference outside user’s memory space

3. Timer:
preempts a program to perform another
task
4. Hardware failure (eg: memory parity
 Interrupt Stage
Processor checks for interrupts.
If interrupt occurred: -
• Suspend execution of program.
• Execute interrupt-handler routine.
• Afterwards control may be returned to suspended
program.
Transfer of Control via
Interrupts
 Interrupt Handler
Is a program that determines nature of the interrupt and
performs whatever actions required
Control is transferred to this program
Control must be transferred back to the interrupted
program so that it can be resumed from the point of
interruption
This point of interruption can occur anywhere in the
program
Thus: must save the state of the program (content of PC
+ PSW + registers + ...)
Instruction Cycle with
Interrupts
Simple Interrupt Processing
 Multiple Interrupt
Suppose that one or more interrupts can occur while an interrupt is being
processed. There are two approaches that can be taken to dealing with
multiple interrupts, i.e.
1. Disable interrupts:
• Processor will ignore further interrupts whilst processing one interrupt
• Interrupts remain pending and are checked after first interrupt has been
processed
• Interrupts handled in sequence as they occur
2. Define priorities:
Low priority interrupts can be interrupted by higher priority interrupts
When higher priority interrupt has been processed, processor returns to
previous interrupt.
Interrupt Processing
An interrupt triggers a number of events, both in the processor
hardware and in software. Figure 1.10 shows a typical sequence.
When an I/O device completes an I/O operation, the following
sequence of hardware events occurs:
1. The device issues an interrupt signal to the processor.
2. The processor finishes execution of the current instruction before
responding to the interrupt, as indicated in Figure 1.7.
3. The processor tests for a pending interrupt request, determines
that there is one, and sends an acknowledgment signal to the device
that issued the interrupt. The acknowledgment allows the device to
remove its interrupt signal
 I/O Communication Techniques
Three (3) techniques are possible for I/O
operation:
1. Programmed I/O:
Does not use interrupts: CPU has to wait for completion
of each I/O operation
2. Interrupt-driven I/O
CPU can execute code during I/O operation: it gets
interrupted when I/O operation is done.
3. Direct Memory Access:
A block of data is transferred directly from/to memory
without going through CPU
 Direct Memory Access (DMA)
 When large volumes of Data are to be moved a more
efficient techniques is required i.e. Direct Memory
Access(DMA).
 Then CPU tells DMA controller the following info.:-
• Whether Read/Write
• The address of the I/O Device involved
• Starting address of memory block for data
• Amount of data to be transferred
DMA module transfers a block of data directly to or
from memory (without going through CPU)
 Direct Memory Access (DMA)
An interrupt is sent when
the task is complete
The CPU is only involved
at the beginning and end
of the transfer
The CPU is free to perform
other tasks during data
transfer
More efficient
 The Multiprocessor Concepts
A multiprocessor is a computer system having two or more
processing units (multiple processors) each sharing main
memory and peripherals, in order to simultaneously
process programs.
The three most popular approaches to providing
parallelism by replicating processors are:
1. Symmetric Multi-Processing (SMP).
2. Multi-Core Computers and
3. Clusters.
 Symmetric Multiprocessors (SMP)
A stand-alone computer system with the following
characteristics:
Two or more similar processors of comparable
capability
Processors share the same main memory and are
interconnected by a bus or other internal
connection scheme
Processors share access to I/O devices
All processors can perform the same functions
The system is controlled by an integrated
operating system that provides interaction
between processors and their programs at the job,
 SMP Advantages
Performance
•a system with multiple
processors will yield
greater performance if
work can be done in
parallel

Availability
•the failure of a single
processor does not
halt the machine
 The Multi-core Computer
Concepts
 Also known as a chip multiprocessor
 Combines two or more processors (cores) on a
single piece of silicon (die)
- each core consists of all of the components of an
independent processor
 In addition, multi-core chips also include L2 cache
and in some cases L3 cache
Thank you
all