Computer Organization

and Architecture

Introduction
Prof. S.Shakya
Computer Organization and Architecture
1. Introduction(3 hours)
2. Central processing Unit(10 hours)
3. Control Unit(6 hours)
4. Pipeline and Vector processing(5 hours)
5. Computer Arithmetic(8 hours)
6. Memory system(5 hours)
7. Input‐Output organization( 6 hours)
8. Multiprocessors( 2 hours)
Practical:
1. Add of two unsigned Integer binary number
2. Multiplication of two unsigned Integer Binary numbers by
Partial‐Product Method
3. Subtraction of two unsigned integer binary number
4. Division using Restoring
5. Division using non‐ restoring methods
6. To simulate a direct mapping cache
References:

 M. Morris Mano: Computer System Architecture, Latest

Edition
 William Stalling: Computer organization and architecture,
Latest Edition
 John P. Hayes: Computer Architecture and Organization,
Latest Edition
 V.P. Heuring, H.F. Jordan: Computer System design and
architecture, Latest Edition
 S. Shakya: Lab Manual on Computer Architecture and design
 Overview
 Why study computer organization and architecture?
 Design better programs, including system software such as compilers, operating
systems, and device drivers.
 Optimize program behavior.
 Evaluate (benchmark) computer system performance.
 Understand time, space, and price tradeoffs.
 Computer organization
 Encompasses all physical aspects of computer systems.
 E.g., circuit design, control signals, memory types.
 How does a computer work?
 Computer architecture
 Logical aspects of system implementation as seen by the designer.
 E.g., instruction sets, instruction formats, data types, addressing modes.
 How do I design a computer?
o The microprocessor is a multipurpose, clock-driven, register-based, digital
integrated circuit that accepts binary data as input, processes it according to
instructions stored in its memory, and provides results (also in binary form) as output.
5
 Computer Components

At the most basic level, a computer is a device consisting of three

pieces:
• A processor to interpret and execute programs
• A memory ( Includes Cache, RAM, ROM) to store both data and
program instructions
A mechanism for transferring data to and from the outside world.
• I/O to communicate between computer and the world
• Bus to move info from one computer component to another

7
Architecture & Organization 1
 Architecture is those attributes visible to the programmer
 Instruction set, number of bits used for data representation,
I/O mechanisms, addressing techniques.
 e.g. Is there a multiply instruction?
 Organization is how features are implemented
 Control signals, interfaces, memory technology.
 e.g. Is there a hardware multiply unit or is it done by repeated
addition?
Architecture & Organization 2
 All Intel x86 family share the same basic architecture

 The IBM System/370 family share the same basic

architecture

 This gives code compatibility

 Organization differs between different versions

Structure & Function
 Structure is the way in which components relate to each
other
 Function is the operation of individual components as part of
the structure
Function
 All computer functions are:
 Data processing
 Data storage
 Data movement
 Control
 Operations (1)
 Data movement
 e.g. keyboard to screen

Data
Storage
Facility

Data
Control
Movement
Mechanism
Apparatus

Data
Processing
Facility
 Operations (2)
 Storage
 e.g. Internet download to disk

Data
Storage
Facility

Data
Control
Movement
Mechanism
Apparatus

Data
Processing
Facility
 Operation (3)
 Processing from/to storage
 e.g. updating bank statement

Data
Storage
Facility

Data
Control
Movement
Mechanism
Apparatus

Data
Processing
Facility
 Operation (4)
 Processing from storage to I/O
 e.g. printing a bank statement

Data
Storage
Facility

Data
Control
Movement
Mechanism
Apparatus

Data
Processing
Facility
Structure
 The Computer
 CPU
 Controls the operation of the computer and
performs its data processing functions.
 Main memory
 Stores data
 I/O
 Moves data between the computer and its
external environment
 System interconnection
 Provides for communication among CPU,
main memory, and I/O
 Structure - Top Level

Peripherals Computer

Central Main
Processing Memory
Unit

Computer
Systems
Interconnection

Input
Output
Communication
lines
 Structure - The CPU

CPU

Computer Arithmetic
Registers and
I/O Login Unit
System CPU
Bus
Internal CPU
Memory Interconnection

Control
Unit
 Structure - The Control Unit

Control Unit

CPU
Sequencing
ALU Logic
Control
Internal
Unit
Bus
Control Unit
Registers Registers and
Decoders

Control
Memory
What is a program?
 A sequence of steps
 For each step, an arithmetic or logical operation is done
 For each operation, a different set of control signals is needed
Function of Control Unit
 For each operation a unique code is provided
 e.g. ADD, MOVE
 A hardware segment accepts the code and issues the control
signals
Five Classic Components
 Since the 1940’s, computers have 5 classic components
 Input devices Computer
Processor Devices
 Keyboard, mouse, …
Control Input
 Output devices
Memory
 Display, printer, …
Datapath Output
 Storage devices
 Volatile memory devices: DRAM, SRAM, …
 Permanent storage devices: Magnetic, Optical, and Flash disks, …
 Datapath
Together, they are called the Processor
 Control
 Newly added 6th component: Network
 Essential component for communication in any computer system
Components
 The Control Unit and the Arithmetic and Logic Unit
constitute the Central Processing Unit
 Data and instructions need to get into the system and results
out
 Input/output
 Temporary storage of code and results is needed
 Main memory
Computer Components:
Top Level View
Central Processing Unit
The main operations of the CPU include four phases:
(1) Fetching instructions from the memory
(2) Decoding the instructions to decide what operations to
be performed
(3) Executing the instructions
(4) Storing the results back in the memory
Central Processing Unit
 Registers
 Arithmetic Unit
 Logic Unit
 Control Unit
Arithmetic Unit
 Arithmetic Unit is a part of the CPU that performs
arithmetic operations on the data. The arithmetic operations
can be addition, subtraction, multiplication or division.
Logic Unit
 Logic Unit is a part of the CPU that performs logical
operations on the data.
Control Unit
 Control Unit is an important component of CPU that
controls the flow of data and information. It maintains the
sequence of operations being performed by the CPU.
Main Memory Unit
 The main memory is referred to as the internal memory of
primary memory of the computer. It is also known as
Random Access Memory (RAM).
Cache Memory
 Cache memory is a small, fast and expensive memory that
stores the copies of data that needs to be accessed frequently
from the main memory.
Registers
 CPU contains a few special purpose, temporary storage units
known as registers. They are high-speed memory locations
used for holding instructions, data and intermediate results
that are currently being processed.
Internal Communications
 The internal communication of a processor in the computer
system can be divided into two major categories:
(1) Processor to memory communication
(2) Processor to I/O devices communication
Processor to Memory Communication
 The direct communication between the processor and
memory of the computer system is implemented with
the help of two registers:
(1) Memory Address Register
(2) Memory Buffer Register
The reading and writing operations performed by the
processor are called memory read and memory write
operations.
Processor to I/O Devices
Communication
 The communication between I/O devices and processor of
the computer system is implemented using an interface unit.
 The interface unit acts as an intermediary between the
processor and the device controllers of various peripheral
devices in the computer system.
Machine Cycle
 The cycle during which a machine language instruction is
executed by the processor of the computer system is known
as machine cycle.
Computer Function
 The basic function performed by a computer is execution of a
program, which consists of a set of instructions stored in memory.
 The objective is overview of key elements of program execution.
 Instruction processing consists of two steps: the processor reads
(fetches) instructions from memory one at a time and executes
each instruction.
 Program execution consists of repeating the process of instruction
fetch and instruction execution.
 The instruction execution may involve several operations and
depends on the nature of the instruction.
 Instruction Cycle

 The processing required for single instruction is called an

instruction cycle.
 Fetching: The CPU retrieves the instruction from the main
memory of the computer system.
 Decoding: Breaking down the instruction into different
parts, so that it can be easily understood before being
processed by the CPU.
Instruction Cycle
 Two steps:
 Fetch
 Execute
 Execution Cycle

 Executing: The decoded instruction is executed by the

ALU of the CPU.
 Storing: The result computed in the execution phase is
either sent to the memory or to an output device.
Fetch Cycle
 Program Counter (PC) holds address of next instruction to
fetch
 Processor fetches instruction from memory location pointed
to by PC
 Increment PC
 Unless told otherwise
 Instruction loaded into Instruction Register (IR)
 Processor interprets instruction and performs required
actions
Execute Cycle
 Processor-memory
 data transfer between CPU and main memory
 Processor I/O
 Data transfer between CPU and I/O module
 Data processing
 Some arithmetic or logical operation on data
 Control
 Alteration of sequence of operations
 e.g. jump
 Combination of above
Interrupts

 Mechanism by which other modules (e.g. I/O) may interrupt

normal sequence of processing.
 Interrupt Cycle
 Added to instruction cycle
 Processor checks for interrupt
 Indicated by an interrupt signal
 If no interrupt, fetch next instruction
 If interrupt pending:
 Suspend execution of current program
 Save context
 Set PC to start address of interrupt handler routine
 Process interrupt
 Restore context and continue interrupted program
Memory Connection
 Receives and sends data
 Receives addresses (of locations)
 Receives control signals
 Read
 Write
 Timing
Input/Output Connection(1)
 Similar to memory from computer’s viewpoint
 Output
 Receive data from computer
 Send data to peripheral
 Input
 Receive data from peripheral
 Send data to computer
Input/Output Connection(2)
 Receive control signals from computer
 Send control signals to peripherals
 Receive addresses from computer
 e.g. port number to identify peripheral
 Send interrupt signals (control)
CPU Connection
 Reads instruction and data
 Writes out data (after processing)
 Sends control signals to other units
 Receives (& acts on) interrupts
The Bus
 A bus is a set of wires that is used to connect the different internal
components of the computer system for the purpose of
transferring data as well addresses amongst them.
 Data bus: used to transfer data amongst the different internal
components. Modern computer systems use 32-bit data buses for
data transfer.
 Address bus: transfers the memory addresses for read and write
memory operations.
Buses
 There are a number of possible interconnection systems
 Single and multiple BUS structures are most common
 e.g. Control/Address/Data bus (PC)
 e.g. Unibus (DEC- digital equipment corporation, PDP-
Program Data Processor)
Expansion Buses
 These are “slots” on the motherboard
 Examples
 ISA – Industry Standard Architecture
 PCI – Peripheral Component Interconnect
 EISA – Extended ISA
 SIMM – Single Inline Memory Module
 DIMM – Dual Inline Memory Module
 MCA – Micro-Channel Architecture
 AGP – Accelerated Graphics Port
 VESA –Video Electronics Standards Association
 PCMCIA – Personal Computer Memory Card International
Association
3 ISA
slots

Pentium 6 SIMM 2 DIMM

5 PCI slots
CPU slots slots
What is a Bus?
 A communication pathway connecting two or more devices
 Usually broadcast
 Often grouped
 A number of channels in one bus
 e.g. 32 bit data bus is 32 separate single bit channels
Data Bus
 Carries data
 Remember that there is no difference between “data” and
“instruction” at this level
 Width is a key determinant of performance
 8, 16, 32, 64 bit
 Address bus

 Identify the source or destination of data

 e.g. CPU needs to read an instruction (data) from a given location
in memory
 Bus width determines maximum memory capacity of system
 e.g. 8080 has 16 bit address bus giving 64k address space
Control Bus
 Control and timing information
 Memory read/write signal
 Interrupt request
 Clock signals
Bus Interconnection Scheme
Single Bus Problems
 Lots of devices on one bus leads to:
 Propagation delays
 Long data paths mean that co-ordination of bus use can adversely affect
performance
 If aggregate data transfer approaches bus capacity

 Most systems use multiple buses to overcome these problems

Traditional Bus Architecture

SCSI-small computer system Interface

High Performance Bus
Bus Types
 Dedicated
 Separate data & address lines
 Multiplexed
 Shared lines
 Address valid or data valid control line
 Advantage - fewer lines
 Disadvantages
 More complex control
 Ultimate performance
Bus Arbitration
 More than one module controlling the bus
• e.g. CPU and DMA controller
 Only one module may control bus at one time
 Arbitration may be centralised or distributed
Centralised Arbitration
 Single hardware device controlling bus access
 Bus Controller
 Arbiter (bus controller)
 May be part of CPU or separate
 Centralized Arbitration

66
Distributed Arbitration
 Each module may claim the bus
 Control logic on all modules
Timing
 Co-ordination of events on bus
 Synchronous
 Events determined by clock signals
 Control Bus includes clock line
 All devices can read clock line
 Usually sync on leading edge
 Usually a single cycle for an event
Synchronous Timing Diagram
History
 PCI(Peripheral Component Interconnect) bus is based on ISA
(Industry Standard Architecture) Bus and VL (VESA Local) Bus.
 Introduced by Intel in 1992
 Revised twice into version 2.1 which is the 64-bit standard that it
is today.
 Great feature of PCI Bus was that it was invented as an industry
standard
 PCI provides direct access to system memory for the devices that
are connected to the bus which is then connected through a bridge
that connects to the front side bus.
 This configuration allowed for higher performance without
slowing down the processor
 BlockProcessor/Main
diagramMemory
of aSystem
PCI bus system
Copro- Main
CPU Cache
cessor Memory

PCI Motion
Audio
Bridge Video
PCI Bus

SCSI host Interface to LAN Graphics

I/O
adapter Expansion Bus adapter adapter

Expansin Bus (ISA/EISA)

Bus Slot Bus Slot Bus Slot Bus Slot

 History

•The PCI Bus was originally 33Mhz and then

changed to 66Mhz.
•PCI Bus became big with the release of
Windows 95 with “Plug and Play” technology
•“Plug and Play” utilized the PCI bus concept.

72
PCI
 Peripheral Component Interconnect
 Also called “Local Bus”
 History
 Developed by Intel (1993)
 Very successful, widely used
 Much faster than ISA
 Gradually replacing ISA
 Configuration
 Parallel, multi-drop
PCI
 Used for
 Just about any peripheral
 Can support multiple high-performance devices
 Graphics, full-motion video, SCSI, local area networks, etc.
 Specifications
 64-bit bus capability
 Usually implemented as a 32-bit bus
 Runs at 33 MHz or 66 MHz
 At 33 MHz and a 32-bit bus, data rate is 133 Mbytes/s
PCI Bus Lines (required)
 Systems lines
 Including clock and reset
 Address & Data
 32 time mux lines for address/data
 Interrupt & validate lines
 Interface Control
 Arbitration
 Not shared
 Direct connection to PCI bus arbiter
 Error lines
PCI Bus Lines (Optional)
 Interrupt lines
 Not shared
 Cache support
 64-bit Bus Extension
 Additional 32 lines
 Time multiplexed
 2 lines to enable devices to agree to use 64-bit transfer
PCI Commands
 Transaction between initiator (master) and target
 Master claims bus
 Determine type of transaction
 e.g. I/O read/write
 Address phase
 One or more data phases
 How PCI Compares to Other Buses
Bus Bus Speed MB/sec Advantages Disadvantages
Bus Type Width

ISA 16 bits 8MHz 16 MBps low cost, low speed, Jumpers

compatibility, & DIP (Dual In-line
widely used Package) switches.
becoming obsolete

PCI 64 bits 133 MHz 1 GBps very high speed, incompatible with
Plug & Play, older systems,
dominant board- can cost more
level bus
CompactPCI 64 bits 33MHz 132 MBps designed for lower speed than
industrial use, hot PCI, need adapter for
swapping/Plug & PC use, incompatible
Play, ideal for with older systems
embedded
systems

78 Table 1: How PCI compares to other buses (Tyson, 2004a; Quatech, 2004c)
 How PCI Works: Installing A New
Device
 Once a new device has 3. The device will respond
been inserted into a PCI with its identification and
slot on the motherboard send its device ID to the
1. Operating System Basic BIOS through the bus.
Input/Output System 4. PnP checks the Extended
(BIOS) initiates Plug and System Configuration
Play (PnP) BIOS. Data (ESCD) to make sure
2. PnP BIOS scans the PCI the configuration data
bus for any new hardware already exists for the card.
connected to the bus. If (If the card is new, then
new hardware is found, it
there will be no data for it.)
will ask for identification.

79
 New Device Cont…
5. PnP will assign an Interrupt 7. Windows will determine the
Request Line, Direct Memory device and attempt to install
Access, memory address and its driver. The operating
Input/Output settings to the system may ask the user to
card, then stores the
information in the ESCD. insert a disk containing the
driver or direct it to where the
6. When the Windows software
driver is located. In the event
loads, it will check the PCI
bus and the ESCD to see if that Windows is unable to
there is new hardware. determine what the device is,
Windows will alert the user it will provide a dialog window
that new hardware has been so the user can identify the
found if there is new hardware and load its driver.
hardware installed and will
also identify the hardware.

80
Reference
William Stallings, “ Computer Organization and Architecture”