Decimation Filtering For Complex Sigma

Delta Analog to Digital Conversion in A

Low-IF Receiver
Anjana Ghosh
SERC, Indian Institute of Science
Bangalore
February 2006
Presentation Outline
Fundamentals of Receiver Operation
Salient features of EA ADC
Decimation Filtering for Low Pass EA ADC
Existing literature on decimation for
bandpass EA modulators
Proposed architecture

Receiver Architectures: A Heterodyne
Receiver
if


Frequency Downconversion
High
Frequency
Filter
cose
c
t
LNA
Low
Pass
Filter
A/D
to Demodulator
Receiver Block Diagram
e
c
-e
c 0

e
-e

image
signal

High Frequency
Filter

e
c +
e
if

e
c -
e
if

-e
c -
e
if

-e
c +
e
if

0

-e
if e
if
LO Signal
desired
signal

Low IF Receiver

LO Signal
e
c -e
c
DC

e

-e

desired
signal

image signal

e
c +
e
if

e
c -
e
if

-e
c -
e
if

-e
c +
e
if

e
if
-e
if
DC

e

-e

RF
Stage
cose
c
t
sine
c
t
Analog to Digital
Conversion

Digital Filtering,
Baseband
Downconversion ,
Demodulation
X
Y
A
B
Frequency Downconversion
Receiver Block Diagram
ADC Sample rate : Effect on Analog
Antialias Filter (AAF)

f
N
/2 -f
N
/2
f
N
/2 -f
N
/2 f
OS
/2 -f
OS
/2
AAF in Nyquist
rate ADC
AAF in
Oversampled
ADC
Decimation
Filter
Analog AAF
ADC Quantization Noise

f
N
/2 -f
N
/2
f
os
/2 -f
os
/2
f
os
/2 -f
os
/2
Nyquist Rate
Converter
Oversampled
Converter
Oversampled Lowpass
EA Converter
0
0
0
Decimation Digital Filter for EA ADC
Purpose of decimation filters : Antialias
filtering followed by sample rate reduction
Multistage Decimation preferred to single
stage
Popular structure consists of a Cascaded
Integrator comb followed by one or two
FIR stages
CIC Filter
Moving Average Filter


Z transform

=

=
1
1
0
1
1
) ( ) (
M
i
M
i n x n y
)
) 1 (
) 1 (
1
( ) (
1
1
1
1

=
z
z
M
z H
M

) 1 (
.
sin
sin
) (
1
1 1
1 1
1 1
=
M fT j
e
tT M
T fM
f H
t
t
t
Order of the CIC Filter For A Low Pass
EA ADC
For a EA modulator of order l, a CIC of order l+1 is
suitable for antialias filtering in the first stage of
decimation

This CIC can be used to reduce the sample rate to as
low as 4 times the Nyquist sampling rate with negligible
SNR degradation (<0.25dB). Further reduction in the
sample rate using the CIC will degrade the SNR
significantly.

CIC Structure (Second Order)

REG REG
REG
-
REG
-
fs
1
/M
1

i/p o/p
1
1-z
-1


1
1-z
-1


1-z
-M
1


1-z
-M
1


1
M
1
2

fs
1
/M
1

1
1-z
-1


1
1-z
-1


1-z
-1


1-z
-1


1
M
1
2

fs
1
/M
1

1-z
-M
1

M
1
(1-z
-1
)

1-z
-M
1

M
1
(1-z
-1
)

fs
1
/M
1

1
M
1
2

Efficient Polyphase Decomposition of
Comb Filter
k
M
i
i
z z H
|
|
.
|

\
|
=

1
0
1
1
) (
) ( ) (
) 1 (
) 1 (
1
1
1
1

=
z
z
M
M
z H
( )
k
N
i
k
i
i
k
M
i
i
i
N
z z z z H
[

=

+ =
|
|
.
|

\
|
=
|
|
.
|

\
|
=
1
0
2
1 2
0
1
0
1 ) (
1
( )
( )
k
i
M
M
i
z z H
[

+ =
1 2 log
0
2
2
1
1 ) (

E
0
(z)
E
1
(z)
P
P
E
0
(z)
E
1
(z)
2
2
z
-1

z
-1

E
0
(z)
E
1
(z)
2
2
z
-1

y(n)
x(n)
E
P-1
(z)
P
z
-1

Modified SINC

-o o
M1=4 CIC
Angle
Rotation of
Zeros
Zeros of
Rotated
Sinc Filter

Noise Transfer Function(NTF) and
Signal Transfer Function(STF)

f
os
/2 -f
os
/2
Bandpass EA
0
NTF
STF
f
os
/2 -f
os
/2
Complex
Bandpass EA
0
NTF
STF
f
os
/2 -f
os
/2
Lowpass EA
0
NTF STF
Complex Downconversion &
Decimation

e
-jeot
I/P

Complex
low pass
filter
Complex
O/P
f
os
/2 -f
os
/2
Signal Before
Downconversion
0
f
os
/2 -f
os
/2
Signal After
Downconversion
0
f
os
/2 -f
os
/2 -f
IF

f
IF
-f
IF

0
Complex
Sinusoidal
Downconverter
Followed by
Complex LPF
signal
quantization
noise
e
-je
0
t

-2f
IF

Decimation structure for Band pass &
Complex E A modulator

cose
0
T = 1,1/\2,0,- 1/\2,-1,..
I/P

Low pass
filter
Real O/P
-sine
0
T = 0,-1/\2,-1,- 1/\2,0,..

Low pass
filter
eo=/4
Complex O/P

cose
0
T
Re

Low pass
filter
sine
0
T
Low pass
filter
-sine
0
T
cose
0
T
Im
Bandpass E A Complex E A
Existing Art : Downconversion of IF signal to Baseband followed by
Standard Low Pass Decimation Digital Filter
New Decimation Filter Architecture :
Motivation
Accepted approach imposes restrictions
on the choice of e in order to take
advantage of the optimization in the mixing
process
Compatability with the existing GPS
engine

New Architecture : Block Diagram
RF
Stage
cose
c
t
sine
c
t
Anti alias Filter
and Complex
Bandpass EA
Modulator
Digital
Baseband
X
Y
Digital
Decimation
Filters
A
B
Low IF Receiver : Signal Spectrum
e
c
-e
c
0

e

-e

desired
signal

image signal
band

e
c
-e
c
0

e

-e

1/2

e
c
-e
c
0

e

-e

j/2

-j/2

RF

C (cose
c
t)
S (sine
c
t)
e
if
-e
if
0

e

-e

1/2

A=IP*C
e
if -e
if
0

e

-e

j/2

B=IP*S
-j/2

e
if
-e
if
0

e

-e

1

IF
e
c +
e
if

e
c -
e
if

-e
c -
e
if

-e
c +
e
if

RF Stage
cose
c
t
sine
c
t
A
B
Use of Complex Digital Filters
e
c
-e
c
0

e

-e

desired
signal

image signal
band

IP

e
if
-e
if
0

e

-e

1/2

A=IP*cose
c
t
e
if
-e
if
0

e

-e

j/2

B=IP*Sine
c
t
-j/2

e
c +
e
if

e
c -
e
if

-e
c -
e
if

-e
c +
e
if

e
if
-e
if
0

e

-e

P=X+jY
X=A*AE
Y=B*AE
e
if
-e
if
0

e

-e

Q=X-jY
Noise Transfer
Function
Noise Transfer
Function
DF1 Transfer
Function
DF2 Transfer
Function
e
if
-e
if
0

e

-e

OP 1

RF Stage
cose
c
t
sine
c
t
A
Anti alias
Filter and
Complex
Sigma
Delta
Modulator
OP
j
-j
DF1 (Complex
Digital Filter)
X
Y
P
Q
DF2 (Complex
Digital Filter)
Complex Digital Filters : Real Filters From
Complex Filters
H
DF1
(z)

= H
RE
(z) - j.H
IM
(z) ;
H
DF2
(z)

= H
RE
(z) + j.H
IM
(z) ;
OP = P(z).H
DF1
(z) + Q(z).H
DF2
(z) ;


=>OP = [X(z) +j.Y(z)].[H
RE
(z) - j.H
IM
(z)] + [X(z)-j.Y(z)].[H
RE
(z) + j.H
IM
(z)]

=> OP= 2.[X(z). H
RE
(z) + Y(z). H
IM
(z)]
Thus the Complex Digital Filtering can be accomplished by using two real filters corresponding to
the real and imaginary parts of the transfer function of the individual complex filters.
e
if
-e
if
0

e

-e

e
if
-e
if
0

e

-e

DF1 Transfer
Function
DF2 Transfer
Function
Complex Digital Filters: Implementation
Real Filter Implementation of Digital Filtering, at Low IF.
Advantage: Number of Computations reduced from eight to two
RF
Amp
and
Filter
90
o
Antialias
Filter and
Complex
Sigma
Delta
Modulator
cose
c
t
sine
c
t
real
imaginary
IP
A
B
S
C
OP
H
RE
(z)
X
Y
H
IM
(z)
Decimation Filter : Requirements
antialias filtering and reduction of the
sample rate by 16
attenuation of remaining out of band
components in the signal
generation of a real two sided signal
centered around wif
Multistage Decimation Filter
Structure
COMPLEX FILTER
AAF1
4
AAF2
2
REAL
PART
2
4fs
2fs
16fs
16fs
fs
fs
DROOP
CORRECTION
FILTER
COMPLEX
EA ADC
MIXER
O/P
AAF1
4
AAF2
2
IMAGINARY
PART
2
4fs
2fs
I
Q
OP
ADC Output FFT

AAF1: Fourth Order Comb

Passband (3-5MHz) droop = 0.33dB
Stopband Attenuation : 83.1dB
Aliasing Bands: 59MHz to 69MHz,
123MHz to 128MHz on either side
COMPLEX FILTER
AAF1
4
AAF2
2
REAL
PART
2
4fs
2fs
16fs
16fs
fs
fs
DROOP
CORRECTION
FILTER
COMPLEX
EA ADC
MIXER
O/P
AAF1
4
AAF2
2
IMAGINARY
PART
2
4fs
2fs
I
Q
OP
AAF2: 11 Tap HalfBand

Passband (3-5MHz) Ripple =
0.0027dB/-0.0054dB
Stopband Attenuation : 75.8 dB
Aliasing Bands: 27MHz to 32MHz on
either side
COMPLEX FILTER
AAF1
4
AAF2
2
REAL
PART
2
4fs
2fs
16fs
16fs
fs
fs
DROOP
CORRECTION
FILTER
COMPLEX
EA ADC
MIXER
O/P
AAF1
4
AAF2
2
IMAGINARY
PART
2
4fs
2fs
I
Q
OP
Image Reject Filter

Passband (3-5MHz) Ripple =
0.0027dB/-0.0054dB
Stopband Attenuation : 75.8
dB
Aliasing Bands: 27MHz to
32MHz on either side
COMPLEX FILTER
AAF1
4
AAF2
2
REAL
PART
2
4fs
2fs
16fs
16fs
fs
fs
DROOP
CORRECTION
FILTER
COMPLEX
EA ADC
MIXER
O/P
AAF1
4
AAF2
2
IMAGINARY
PART
2
4fs
2fs
I
Q
OP
Image Reject Filter : Stopband

COMPLEX FILTER
AAF1
4
AAF2
2
REAL
PART
2
4fs
2fs
16fs
16fs
fs
fs
DROOP
CORRECTION
FILTER
COMPLEX
EA ADC
MIXER
O/P
AAF1
4
AAF2
2
IMAGINARY
PART
2
4fs
2fs
I
Q
OP
Image Reject Filter : Ripple, Phase
Response


Passband Droop = 0.94dB
Phase Response
COMPLEX FILTER
AAF1
4
AAF2
2
REAL
PART
2
4fs
2fs
16fs
16fs
fs
fs
DROOP
CORRECTION
FILTER
COMPLEX
EA ADC
MIXER
O/P
AAF1
4
AAF2
2
IMAGINARY
PART
2
4fs
2fs
I
Q
OP
Droop Correction filter


COMPLEX FILTER
AAF1
4
AAF2
2
REAL
PART
2
4fs
2fs
16fs
16fs
fs
fs
DROOP
CORRECTION
FILTER
COMPLEX
EA ADC
MIXER
O/P
AAF1
4
AAF2
2
IMAGINARY
PART
2
4fs
2fs
I
Q
OP
Net Transfer Function

COMPLEX FILTER
AAF1
4
AAF2
2
REAL
PART
2
4fs
2fs
16fs
16fs
fs
fs
DROOP
CORRECTION
FILTER
COMPLEX
EA ADC
MIXER
O/P
AAF1
4
AAF2
2
IMAGINARY
PART
2
4fs
2fs
I
Q
OP
Decimation Filter Structure
Sigma
Delta
Modulator
4
rth
order Comb
11 tap Half Band

49 tap
FIR
I
13 tap Image Reject
4 2 2
O/P
256 M samples/s
4
rth
order Comb 11 tap Half Band

13 tap Image Reject
4 2 2
Q
FFT of Silicon Data For A Single Tone Input

ADC O/P
Digital Filter O/P

Optimized Architecture : Scope
Sigma
Delta
Modulator
4
rth
order Comb
11 tap Half Band

49 tap
FIR
I
13 tap Image Reject
4 2 2
O/P
256 M samples/s
4
rth
order Comb 11 tap Half Band

13 tap Image Reject
4 2 2
Q
Low Pass Complex
Band Pass
Band Pass
Low Pass
Scope for optimization :Complex Bandpass?
Alternate Architecture : Block Diagram

-
_
OP
H
RE
(z)
H
IM
(z)
H
AAFRE

H
AAFIM

H
AAFIM

H
AAFRE

Complex
Sigma
Delta
ADC
X
Y
Alternate Architecture I:Decimate By 16








STAGE 1






STAGE 2






STAGE 3

H
c1R
(13 taps)
H
c1I
(13 taps)
H
c1I
(13 taps)
H
c1R
(13 taps)
X
Y
H
c2R
(5 taps)
H
c2I
(5 taps)
H
c2I
(5 taps)
H
c2R
(5 taps)
4
4 H
c3R
(5 taps)
H
c3I
(5 taps)
H
c3I
(5 taps)
H
c3R
(5 taps)
2
2
2
2
OP_Q
OP_I
- -
-

( )
4 8 4 4
4
3 2 1
4
) 1 ( ) 1 ( 1
16
1
) (

+ + + + +
|
.
|

\
|
= z z z z z z H
Shifted 4
th
Order Comb : Stage 1

13 tap , 15 bit coefficient quantization ; performs decimation by 4
Passband = 3MHz to 5 MHz
Aliasing bands = 67MHz to 69MHz, -59MHz to -61 MHz, -123MHz to -
125MHz
Shifted 4
th
Order Comb :Stage 2

5tap , 11 bit coefficient quantization;performs decimation by 2
Passband = 3MHz to 5 MHz
Aliasing bands = 35MHz to 37MHz, -27MHz to -29 MHz

Shifted 4th Order Comb :Stage 3
5 tap, 11 bit coefficient quantization; Performs decimation by 2
Passband = 3MHz to 5 MHz
Aliasing bands = 19MHz to 21MHz, -11MHz to -13 MHz
Image Reject Filter

5 tap, 15 bit coefficient quantization
Passband = 3MHz to 5 MHz
Aliasing bands = 19MHz to 21MHz, -11MHz to -13 MHz
Optimized Architecture






AAF & Decimation





ImageReject

Complex
AAF
Stage1
4
X
Y
Droop
correction
(48 taps)
IR
R
(5 taps)
IR
IM
(5 taps)
OP
Complex
AAF
Stage2
2
Complex
AAF
Stage3
2
Complex
Sigma
Delta
ADC



Multiplier less
polyphase
implementation
CSD coded; multiplier less polyphase implementation
Comparison of Transfer Function :
Original Architecture and Architecture I

Comparison of Transfer Function :
Original Architecture and Architecture I

Comparison of Image
Rejection
Comparison of Passband
Ripple






STAGE 1






STAGE 2






STAGE 3

4
th

order
Comb

(13 taps)
4rth
order
Comb

(13 taps)
X
Y
H
c2R
(5 taps)
H
c2I
(5 taps)
H
c2I
(5 taps)
H
c2R
(5 taps)
4
4 H
c3R
(5 taps)
H
c3I
(5 taps)
H
c3I
(5 taps)
H
c3R
(5 taps)
2
2
2
2
OP_Q
OP_I
- -
Optimized Architecture II
Low Pass COMB
Shifted COMB
Decimation Filter Stages in
Architecture II

Comparison of the Three
Architectures
Design Parameter Original Architecture Alternate Architecture I Alternate Architecture II
Stage 1 AAF
Filter Type
Number of taps
Coefficient Quantization
Data Quantization
Area
Real Filter
4
th
order comb
13
Ideal
10
1160
Complex Filter
4
th
order shifted comb
13
15 bits
16 bits
3409.5
Real Filter
4
th
order comb
13
Ideal
10 bits
971.75
Stage2 AAF
Filter Type
Number of Taps
Coefficient Quantization
Data Quantization
Area
Real Filter
Halfband
11
15 bits
13 bits
3154.5
Complex Filter
4
th
order shifted comb
5
11 bits
16 bits
4460.75
Complex Filter
4
th
order shifted comb
5
11 bits
15 bits
3147.75
Stage 3 AAF
Filter Type
Number of Taps
Coefficient Quantization
Data Quantization
Area
None Complex Filter
4
th
order shifted comb
5
11bits
15 bits
4657.75
Complex Filter
4
th
order shifted comb
5
11 bits
15 bits
4437.25
Image Reject
Filter Type
Number of Taps
Coefficient Quantization
Data Quantization
Area
Complex Filter
Shifted Modified Comb
13
15 bits
14 bits
11702
Complex Filter
Shifted Modified Comb
5
15 bits
14 bits
2208.5
Complex Filter
Shifted Modified Comb
5
15 bits
14 bits
2209.25
Total area 16037.25 14736.5 10766
Summary
Architecture and design of decimation
digital filtering of the output of a complex
E modulator for low IF receivers is
proposed.
Two optimized implementations with
variations of the same basic architecture
are proposed

Reference
REFERENCES
James C Candy and Gabor C Temes, Oversampling Methods for A/D and D/A Conversion,
Eugene B Hogenauer, An Economical Class of Digital Filters for Decimation and Interpolation, IEEE Transactions on Acoustics,Speech And Signal Processing, Vol
ASSP 29,No 2, April 1981
Brian Paul Brandt, Oversampled Analog to Digital Conversion, Doctoral Thesis, Stanford University, Electrical Engineering Department, Stanford, California, October
1991
Letizia Lo Presti, Efficient Modified-Sinc Filters For Sigma Delta A/D Converters,IEEE Transaction on Circuits and Systems-II:Analog and Digital Signal
Processing,Vol 47,No 11,November 2000
Richard Schreier and W Martin Snelgrove,Decimation For Bandpass Sigma Delta Analog to Digital Conversion, IEEE International Symposium on Circuits and
Systems,1990, 1-3 May, Pages 1801-1804 Vol 3
Stephen Andrew Jantzi, Quadrature Bandpass Delta Sigma Modulation for Digital Radio, PhD Thesis, Dept of Electrical and Computer Engineering,University of Toronto
Ashok Swaminathan,A Single-IF Receiver Architecture Using a Complex Sigma-Delta Modulator, ME thesis, Dept of Electronics, Ottawa-Carleton Institute for Electrical
Engineering, Carleton University,Ottawa,Canada
Stephen A Jantzi, Kenneth W Martin, Adel S Sedra, Quadrature Bandpass DS Modulation For Digital Radio, IEEE Journal Of Solid State Circuits, Vol 32,No 12,
December 1997
Asad A Abidi, Direct Conversion Radio Transceivers For Digital Communications, IEEE Journal Of Solid State Circuits, Vol 30,No12,December 1995
Jan Crols, Michiel S J Steyaert, Low-IF Topologies For High Performance Analog Front Ends of Fully Integrated Receivers, IEEE Transactions on Circuits And Systems-
II: Analog And Digital Signal Processing, Vol 45,No3,March1998
Hong-Kui Yang, W Martin Snelgrove, High Speed Polyphase CIC Decimation Filters, IEEE International Symposium on Circuits and Systems, 1996
Yonghong Gao, Lihong Jia, Hannu Tenhunen, A Partial-Polyphase VLSI Architecture For Very High Speed CIC Decimation Filters, Twelfth Annual IEEE International
ASIC/SOC Conference, 1999
Hassan Aboushady,Yannick Dumonteix, Marie Minverte Lourat, Habib Mehrez, Efficient Polyphase Decomposition of Comb Decimation Filters in EA Analog to Digital
Converters ,IEEE Transactions on Circuits And Systems-II: Analog And Digital Signal Processing, Vol 48,No10,October 2001
Youngbeom Jang, Sejung Yang, NonRecursive Cascaded Integrator Comb Decimation Filters With Integer Multiple Factors, 44th IEEE Midwest Symposium on Circuits
and Systems, Volume: 1 , 14-17 Aug. 2001
Yonghong Gao, Lihong Jia, Hannu Tenhunen, A Fifth Order Comb Decimation Filter For Multi-standard Transceiver Applications, IEEE International Symposium on
Circuits and Systems, May 28-31,2000,Geneva , Switzerland
Brian A White, Mohamed I Elmasry, Low Power Design of Decimation Filters For A Digital IF Receiver, IEEE Transactions On Very Large Scale Integration (VLSI)
Systems, Vol 8,No3, June 2000
Yonghong Gao, Lihong Jia, Hannu Tenhunen, An Improved Architecture and Implementation of Cascaded Integrator Comb Decimation Filters,IEEE Pacific Rim
Conference on Communications, Computers and Signal Processing, 1999
Farbod Behbahani,Yoji Kishigami, John Leete, Asad A Abidi,CMOS Mixers And Polyphase Filters For Large Image Rejection, IEEE Journal of Solid State Circuits, Vol
36. No 6, June 2001
James F Kaiser, Richard W Hamming, Sharpening the Response of A Symmetric Nonrecursive Filter by Multiple Use of the Same Filter, IEEE Transactions on Acoustics,
Speech, And Signal Processing, Vol ASSP 25, No 5, October 1977
Matthias Henker, Tim Hentschel, Gerhard Fettweis, Time Variant CIC Filters For Sample Rate Conversion With Arbitrary Rational Factors, The 6th IEEE International
Conference on Electronics, Circuits and Systems, Volume: 1 , 5-8 Sept. 1999
Ken Martin, Complex Signal Processing is Not Complex, Conference on European Solid-State Circuits, 2003, 16-18 Sept
James C Candy, Decimation for Sigma Delta Modulation, IEEE Transactions On Communications, Volume COM 34,No1,January 1986
Alan V Oppenheim , Ronald W Schafer, Discrete Time Signal Processing, Prentice Hall Signal Processing Series
Ghosh Anjana, BG Chandrashekar , Venkatraman Srinivasan and Nandy S K, Decimation For Complex Sigma Delta Analog to Digital Conversion In A Low-IF GPS
Receiver,10th International Symposium On Integrated Circuits, Devices & Systems, September 2004