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seeed_xiao_esp32c5 support (IDF v5.5) #17912

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seeed_xiao_esp32c5 support (IDF v5.5) #17912

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AZKKXL
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@AZKKXL AZKKXL commented Aug 13, 2025

Summary

The is esp32c5 officially supported in IDF v5.5
Pulling together changes and generic board support needed here.

Some details

  1. I2S is not enabled: #define MICROPY_PY_MACHINE_I2S (0)
  2. As of the release/v5.5 version of ESP-IDF, there is only one configuration option for XTAL_FREQ, which is XTAL_FREQ_AUTO. This causes configuration options like CONFIG_XTAL_FREQ_40 added in sdkconfig to not take effect. I have made simple modifications in the source code, which can be adjusted once ESP-IDF opens up the configuration options in the future.
  3. Reference links:CONFIG_XTAL_FREQ = 0 for esp32c5 #17903 and CONFIG_XTAL_FREQ & ESP32C5 with release/v5.5 (IDFGH-16270) espressif/esp-idf#17426

Tesing

  • machine.pin

  • machine.i2c

  • machine.adc

  • machine.pwm

  • machine.timer

@dpgeorge
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Thanks for the contribution.

Please can you separate the changes here into two commits:

  • adding C5 support
  • adding the new board

@AZKKXL AZKKXL force-pushed the seeed_xiao_esp32c5 branch from de16f50 to d66fea2 Compare August 14, 2025 01:20
AZKKXL added 2 commits August 14, 2025 09:22
@AZKKXL
esp32: Support esp32c5 with esp-idf v5.5.
1a088c8 
Signed-off-by: yuan_mo <2286087148@qq.com>
@AZKKXL
esp32: Add new board seeed_xiao_esp32c5.
24a0bda 
Signed-off-by: yuan_mo <2286087148@qq.com>
@AZKKXL AZKKXL force-pushed the seeed_xiao_esp32c5 branch from d66fea2 to 24a0bda Compare August 14, 2025 01:23
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AZKKXL commented Aug 14, 2025

@dpgeorge
Thank you for your reply. It has now been revised.

@dpgeorge dpgeorge mentioned this pull request Aug 16, 2025
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@projectgus projectgus self-requested a review August 20, 2025 05:00
@Vincent1-python
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@AZKKXL #17971 When this PR ends, this automatic reading problem may be avoided, and he will not ask for XTAL frequency at compile time.

@AZKKXL
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AZKKXL commented Aug 26, 2025

@Vincent1-python WOW! That's cool!

projectgus
projectgus reviewed Aug 28, 2025
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Couple of minor suggestions, but this PR looks mostly good to me.

Although it would be good to have a ESP32_GENERIC_C5 board as well as the SEEED board.

Note we currently do all nightly builds with IDF v5.4.2, so we won't be able to start building ESP32-C5 in nightly builds (or CI) until we bump that version. (Same applies for ESP32-P4 support, I think).

ports/esp32/boards/SEEED_XIAO_ESP32C5/board.json
"WiFi"
],
"images": [
"esp32c5_devkitmini.jpg"
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Is there a PR for this in https://github.com/micropython/micropython-media ?

ports/esp32/boards/SEEED_XIAO_ESP32C5/mpconfigboard.h
@@ -0,0 +1,7 @@
// This configuration is for a generic ESP32C2 board with 4MiB (or more) of flash.
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Suggested change
// This configuration is for a generic ESP32C2 board with 4MiB (or more) of flash.
// This configuration is for a generic ESP32C5 board with 4MiB (or more) of flash.

ports/esp32/boards/SEEED_XIAO_ESP32C5/mpconfigboard.h
@@ -0,0 +1,7 @@
// This configuration is for a generic ESP32C2 board with 4MiB (or more) of flash.

#define MICROPY_HW_BOARD_NAME "ESP32C5 module"
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Suggested change
#define MICROPY_HW_BOARD_NAME "ESP32C5 module"
#define MICROPY_HW_BOARD_NAME "SEEED XIAO ESP32C5"

ports/esp32/machine_i2c.c
// This causes CONFIG_XTAL_FREQ to be set to 0, resulting in compilation errors.
// For now, we'll set it to 40M, and we'll add a configuration item for it later if they open up the configuration interface.
// Detailed information: https://github.com/micropython/micropython/issues/17903
#define CONFIG_XTAL_FREQ 40 // If your external crystal frequency is 48, please change this 40 to 48 and recompile.
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Better we merge #17971 first and then rebase to not need this any more. 😀

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@AZKKXL @dpgeorge @Vincent1-python @projectgus