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F0 patches that rename registers should modify the existing register #538

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Merged
merged 1 commit into from
Apr 13, 2021

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lynaghk
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@lynaghk lynaghk commented Apr 13, 2021

While consuming a patched F0 SVD from https://github.com/lynaghk/svd2zig/ I noticed that a few patches add registers which alias existing ones at the same bitOffset.
E.g., AUTDLY and WAIT.

Based on the ST reference doc:

Screen Shot 2021-04-13 at 7 54 06 PM

I suspect the patch intent was actually to replace the former with the latter.
Ditto with DMA, which should also (I suspect) modify rather than alias:

Screen Shot 2021-04-13 at 7 55 49 PM

…rather than add a new one at same bitOffset.

While the Rust PAC generation code seems to have "overwite" semantics, the patched SVD is still incorrect and causes issues for other tools.
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Good catch, thanks!

bors merge

@bors bors bot merged commit 297f4e0 into stm32-rs:master Apr 13, 2021
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