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stm32wb: Updates for ADC, TIM16, TIM17 #625

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Merged
merged 3 commits into from
Sep 29, 2021
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karlp
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@karlp karlp commented Sep 10, 2021

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No semantic change, but keep peripherals sorted.

Signed-off-by: Karl Palsson <karlp@etactica.com>
Signed-off-by: Karl Palsson <karlp@etactica.com>
Missing registers, extra bits to delete, and a swathe of incorrect
addresses for TIM17

Compared by hand against RM0434rev8.

Signed-off-by: Karl Palsson <karlp@etactica.com>
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Memory map comparison

@adamgreig adamgreig mentioned this pull request Sep 29, 2021
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Looks good, thank you!

bors merge

@bors bors bot merged commit c3e3ca5 into stm32-rs:master Sep 29, 2021
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2 participants