Skip to content

STM32L4xx: Add GPIOx ASCR & BRR registers #680

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 3 commits into from
Jan 16, 2022
Merged

STM32L4xx: Add GPIOx ASCR & BRR registers #680

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
586b060
STM32L4x5: Add GPIOx ASCR & BRR registers
MathiasKoch Dec 21, 2021
96a4fea
Split gpio patch into BRR & ASCR files and apply BRR to 4x1, 4x2 & 4x…
MathiasKoch Jan 15, 2022
2251515
Merge branch 'master' into L4-gpio-ascr
richardeoin Jan 16, 2022
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
17 changes: 17 additions & 0 deletions devices/common_patches/l4_gpio_ascr.yaml
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
"GPIO*":
_add:
ASCR:
description: GPIO port analog switch control register
addressOffset: 0x2C
fields:
ASC:
description: These bits are written by software to configure the analog connection of the IOs.
access: read-write
bitOffset: 0
bitWidth: 16
ASCR:
_split: [ASC]
ASC*:
_write:
NoAction: [0, "Disconnect analog switch to the ADC input"]
Reset: [1, " Connect analog switch to the ADC input"]
17 changes: 17 additions & 0 deletions devices/common_patches/l4_gpio_brr.yaml
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
"GPIO*":
_add:
BRR:
description: GPIO port bit reset register
addressOffset: 0x28
fields:
BR:
description: These bits are write-only. A read to these bits returns the value 0x0000
access: write-only
bitOffset: 0
bitWidth: 16
BRR:
_split: [BR]
BR*:
_write:
NoAction: [0, "No action on the corresponding ODx bit"]
Reset: [1, "Reset the corresponding ODx bit"]
1 change: 1 addition & 0 deletions devices/stm32l4x1.yaml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -130,4 +130,5 @@ _include:
- ./common_patches/l4_adc_smpr.yaml
- ./common_patches/l4_adc_sqr1.yaml
- ./common_patches/l4_spi.yaml
- ./common_patches/l4_gpio_brr.yaml
- ../peripherals/spi/spi_l4.yaml
1 change: 1 addition & 0 deletions devices/stm32l4x2.yaml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,4 +9,5 @@ MPU:
_include:
- ./common_patches/stm32l4x2_l412.yaml
- common_patches/rtc/rtc_bkpr.yaml
- ./common_patches/l4_gpio_brr.yaml
- ../peripherals/fw/fw_l0_l4.yaml
1 change: 1 addition & 0 deletions devices/stm32l4x3.yaml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -161,5 +161,6 @@ _include:
- ./common_patches/l4_adc_smpr.yaml
- ./common_patches/l4_adc_sqr1.yaml
- ./common_patches/l4_spi.yaml
- ./common_patches/l4_gpio_brr.yaml
- ../peripherals/spi/spi_l4.yaml
- ./common_patches/l4_lcd_segment.yaml
11 changes: 11 additions & 0 deletions devices/stm32l4x5.yaml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,12 +9,21 @@ _modify:
ADC_Common:
CCR:
_modify:
MULT:
name: DUAL
description: Dual ADC mode selection
TSEN:
name: CH18SEL
description: CH18 selection (Vbat)
VBATEN:
name: CH17SEL
description: CH17 selection (temperature)
_add:
PRESC:
description: ADC prescaler
bitOffset: 18
bitWidth: 4
access: read-write

# Merge the thousands of individal bit fields into a single field for each
# CAN filter register. This is not only much easier to use but also saves
Expand Down Expand Up @@ -179,5 +188,7 @@ _include:
- ./common_patches/l4_adc_smpr.yaml
- ./common_patches/l4_adc_sqr1.yaml
- ./common_patches/l4_spi.yaml
- ./common_patches/l4_gpio_ascr.yaml
- ./common_patches/l4_gpio_brr.yaml
- ./common_patches/l4_dbg_apb_fzr_rename.yaml
- ../peripherals/spi/spi_l4.yaml