Apple-designed processors
Apple Inc. has designed System on Chip (SoC) and System in Package (SiP) processors for their mobile consumer devices. They combine a low-power central processing unit (CPU) and other components into a physically compact package to meet the stringent power and space constraints common to mobile devices.
Johny Srouji is the executive in charge of Apple's silicon design.[1]
Contents
Early series
Apple first used SoCs in early revisions of the iPhone and iPod touch. Specified by Apple and manufactured by Samsung, they combine in one package a single ARM-based processing core (CPU), a graphics processing unit (GPU), and other electronics necessary for mobile computing.
The APL0098 (also 8900B[2] or S5L8900) is a package on package (PoP) system on a chip (SoC) that was introduced on June 29, 2007, at the launch of the original iPhone. It includes a 412 MHz single-core ARM11 CPU and a PowerVR MBX Lite GPU. It was manufactured by Samsung on a 90 nm process.[3] The first-generation iPod touch also used it.[4]
The APL0278[5] (also S5L8720) is a PoP SoC introduced on September 9, 2008, at the launch of the second-generation iPod touch. It includes a 533 MHz single-core ARM11 CPU and a PowerVR MBX Lite GPU. It was manufactured by Samsung on a 65 nm process.[3][4]
The APL0298 (also S5L8920) is a PoP SoC introduced on June 8, 2009, at the launch of the iPhone 3GS. It includes a 600 MHz single-core Cortex-A8 CPU and a PowerVR SGX535 GPU. It was manufactured by Samsung on a 65 nm process.[6]
The APL2298 (also S5L8922) is a 45 nm die shrunk version of the iPhone 3GS SoC[3] and was introduced on September 9, 2009, at the launch of the third-generation iPod touch.
A series
Evolution of Apple "A" series |
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Notes: |
The Apple "A" series is a family of SoCs used in certain models of the iPhone, iPad, iPod touch, and the Apple TV digital media player. They integrate one or more ARM-based processing cores (CPU), a graphics processing unit (GPU), cache memory and other electronics necessary to provide mobile computing functions within a single physical package. They are manufactured by Samsung and TSMC.
Apple A4
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The Apple A4 is a PoP SoC manufactured by Samsung.[7] It combines an ARM Cortex-A8 CPU with a PowerVR GPU, and emphasizes power efficiency.[8] The chip commercially debuted with the release of Apple's iPad tablet;[9] followed shortly by the iPhone 4 smartphone,[10] the 4th generation iPod touch and the 2nd generation Apple TV. It was superseded in the iPad 2, released the following year, by the Apple A5 processor.
Apple A4 is based on the ARM processor architecture.[11] The first version released ran at 1 GHz for the iPad[12] and contains an ARM Cortex-A8 CPU core paired with a PowerVR SGX 535 graphics processor (GPU)[9][13][14] built on Samsung's 45-nanometer (nm) silicon chip fabrication process.[3][15] The clock speed for the units used in the iPhone 4 and the iPod touch (4th generation) is 800 MHz. The clock speed for the unit used in the Apple TV has not been revealed.
The Cortex-A8 core used in the A4 is thought to use performance enhancements developed by chip designer Intrinsity, which was subsequently acquired by Apple,[16] in collaboration with Samsung.[17] The resulting core, dubbed "Hummingbird", is able to run at far higher clock rates than other implementations while remaining fully compatible with the Cortex-A8 design provided by ARM.[18] Other performance improvements include additional L2 cache. The same Cortex-A8 CPU core used in the A4 is also used in Samsung's S5PC110A01 SoC.[19][20] The SGX535 in the A4 could theoretically push 35 million polygons per second and 500 million pixels per second, although real world performance may be considerably less.[21]
The A4 processor package does not contain RAM, but supports PoP installation. Hence, there is a package with two low-power 128 MB DDR SDRAM chips (totaling 256 MB) mounted on top of the A4 used in the first-generation iPad, the fourth-generation iPod touch,[22] and the second-generation Apple TV.[23] The iPhone 4 has two 256 MB packages for a total of 512 MB.[24][25][26] The RAM is connected to the processor using ARM's 64-bit-wide AMBA 3 AXI bus. To support the iPad's demand for high graphics bandwidth, the width of the RAM data bus is double that used in previous ARM11 and ARM9 based Apple devices.[27]
Apple A5
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The Apple A5 is an SoC manufactured by Samsung[28] that replaced the A4. The chip commercially debuted with the release of Apple's iPad 2 tablet in March 2011,[29] followed by its release in the iPhone 4S smartphone later that year. Apple claims that compared with its predecessor, the A4, the A5 CPU "can do twice the work" and the GPU has "up to nine times the graphics performance".[30]
The A5 contains a dual-core ARM Cortex-A9 CPU[31] with ARM's advanced SIMD extension, marketed as NEON, and a dual core PowerVR SGX543MP2 GPU. This GPU can push between 70 and 80 million polygons/second and has a pixel fill rate of 2 billion pixels/second. Apple lists the A5 to be clocked at 1 GHz on the iPad 2's technical specifications page,[32] though it can dynamically adjust its frequency to save battery life.[31][33] The clock speed of the unit used in the iPhone 4S is 800 MHz. Like the A4, the A5 process size is 45 nm.[34]
An updated 32 nm version of the A5 processor was used in the third generation Apple TV, the iPod touch (5th generation), the iPad Mini, and the new version of iPad 2 (version iPad2,4).[35] The chip in the Apple TV has one core locked.[36][37] The markings of the square package indicates that it is named APL2498, and in software, the chip is called S5L8942. The 32 nm variant of the A5 provides around 15% better battery life during web browsing, 30% better when playing 3D games and about 20% better battery life during video playback.[38]
In March 2013, Apple released an updated version of the third generation Apple TV (AppleTV3,2) containing a smaller, single-core version of the A5 processor. Unlike the other A5 variants, this version of the A5 is not a PoP, having no stacked RAM. The chip is very small, just 6.1×6.2 mm, but as the decrease in size is not due to a decrease in feature size (it is still on a 32 nm fabrication process), this indicates that this A5 revision is of a new design.[39] Markings tell that it is named APL7498, and in software, the chip is called S5L8947.[40][41]
Apple A5X
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The Apple A5X is an SoC announced on March 7, 2012, at the launch of the third-generation iPad. It is a high-performance variant of the Apple A5; Apple claims it has twice the graphics performance of the A5.[42] It was superseded in the fourth-generation iPad by the Apple A6X processor.
The A5X has a quad-core graphics unit (PowerVR SGX543MP4) instead of the previous dual-core as well as a quad-channel memory controller that provides a memory bandwidth of 12.8 GB/s, roughly three times more than in the A5. The added graphics cores and extra memory channels add up to a very large die size of 165 mm²,[43] for example twice the size of Nvidia Tegra 3.[44] This is mainly due to the large PowerVR SGX543MP4 GPU. The clock frequency of the dual ARM Cortex-A9 cores have been shown to operate at the same 1 GHz frequency as in A5.[45] The RAM in A5X is separate from the main CPU package.[46]
Apple A6
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The Apple A6 is a PoP SoC introduced on September 12, 2012, at the launch of the iPhone 5, then a year later was inherited by its minor successor the iPhone 5C. Apple states that it is up to twice as fast and has up to twice the graphics power compared to its predecessor the Apple A5.[47] It is 22% smaller and draws less power than the 45 nm A5.[48]
The A6 is said to use a 1.3 GHz[49] custom[50] Apple-designed ARMv7 based dual-core CPU, called Swift,[51] rather than a licensed CPU from ARM like in previous designs, and an integrated 266 MHz triple-core PowerVR SGX 543MP3[52] graphics processing unit (GPU). The Swift core in the A6 uses a new tweaked instruction set, ARMv7s, featuring some elements of the ARM Cortex-A15 such as support for the Advanced SIMD v2, and VFPv4.[50] The A6 is manufactured by Samsung on a high-κ metal gate (HKMG) 32 nm process.[53]
Apple A6X
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Apple A6X is an SoC introduced at the launch of the fourth-generation iPad on October 23, 2012. It is a high-performance variant of the Apple A6. Apple claims the A6X has twice the CPU performance and up to twice the graphics performance of its predecessor, the Apple A5X.[54]
Like the A6, this SoC continues to use the dual-core Swift CPU, but it has a new quad core GPU, quad channel memory and slightly higher 1.4 GHz CPU clock rate.[55] It uses an integrated quad-core PowerVR SGX 554MP4 graphics processing unit (GPU) running at 300 MHz and a quad-channel memory subsystem.[55][56] Compared to the A6 the A6X is 30% larger, but it continues to be manufactured by Samsung on a high-κ metal gate (HKMG) 32 nm process.[56]
Apple A7
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The Apple A7 is a 64-bit PoP SoC whose first appearance was in the iPhone 5S, which was introduced on September 10, 2013. The chip would also be used in the iPad Air, iPad Mini 2 and iPad Mini 3. Apple states that it is up to twice as fast and has up to twice the graphics power compared to its predecessor the Apple A6.[57]
The A7 features an Apple-designed 1.3[58]–1.4[59] GHz 64-bit[60] ARMv8-A[61][62] dual-core CPU,[58] called Cyclone,[61] and an integrated PowerVR G6430 GPU in a four cluster configuration.[63] The ARMv8-A architecture doubles the number of registers of the A7 compared to the A6.[64] It now has 31 general-purpose registers that are each 64-bits wide and 32 floating-point/NEON registers that are each 128-bits wide.[60] The A7 is manufactured by Samsung on a high-κ metal gate (HKMG) 28 nm process[65] and the chip includes over 1 billion transistors on a die 102 mm2 in size.[58]
Apple A8
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The Apple A8 is a 64-bit PoP SoC manufactured by TSMC. Its first appearance was in the iPhone 6 and iPhone 6 Plus, which were introduced on September 9, 2014.[66] A year later it would drive the iPad Mini 4. Apple states that it has 25% more CPU performance and 50% more graphics performance while drawing only 50% of the power compared to its predecessor, the Apple A7.[67] On February 9, 2018 Apple released the HomePod, which is powered by an Apple A8 with 1 GB of RAM.[68]
The A8 features an Apple-designed 1.4[69] GHz 64-bit[70] ARMv8-A[70] dual-core CPU, and an integrated custom PowerVR GX6450 GPU in a four cluster configuration.[69] The GPU features custom shader cores and compiler designed by Apple.[71] The A8 is manufactured on a 20 nm process[72] by TSMC,[73] which replaced Samsung as the manufacturer of Apple's mobile device processors. It contains 2 billion transistors. Despite that being double the number of transistors compared to the A7, its physical size has been reduced by 13% to 89 mm2 (consistent with a shrink only, not known to be a new microarchitecture).[74]
Apple A8X
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The Apple A8X is a 64-bit SoC introduced at the launch of the iPad Air 2 on October 16, 2014.[75] It is a high performance variant of the Apple A8. Apple states that it has 40% more CPU performance and 2.5 times the graphics performance of its predecessor, the Apple A7.[75][76]
Unlike the A8, this SoC uses a triple-core CPU, a new octa-core GPU, dual channel memory and slightly higher 1.5 GHz CPU clock rate.[77] It uses an integrated custom octa-core PowerVR GXA6850 graphics processing unit (GPU) running at 450 MHz and a dual-channel memory subsystem.[77] It is manufactured by TSMC on their 20 nm fabrication process, and consists of 3 billion transistors.
Apple A9
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The Apple A9 is a 64-bit ARM-based SoC that first appeared in the iPhone 6S and 6S Plus, which were introduced on September 9, 2015.[78] Apple states that it has 70% more CPU performance and 90% more graphics performance compared to its predecessor, the Apple A8.[78] It is dual sourced, a first for an Apple SoC; it is manufactured by Samsung on their 14 nm FinFET LPE process and by TSMC on their 16 nm FinFET process. It was subsequently included in the iPhone SE, and the iPad (2017).
Apple A9X
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The Apple A9X is a 64-bit SoC that was announced on September 9, 2015, and released on November 11, 2015, and first appeared in the iPad Pro.[79] It offers 80% more CPU performance and two times the GPU performance of its predecessor, the Apple A8X. It is manufactured by TSMC using a 16 nm FinFET process.[80]
Apple A10 Fusion
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The Apple A10 Fusion is a 64-bit ARM-based SoC that first appeared in the iPhone 7 and 7 Plus, which were introduced on September 7, 2016.[81] The A10 is also featured in the 2018 iPad, 2019 iPad and 7th generation iPod Touch.[82] It has a new quad core design with two high performance cores, and two smaller highly efficient cores. It is 40% faster than the A9, with 50% faster graphics. It is made by TSMC on their 16 nm FinFET process.
Apple A10X Fusion
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The Apple A10X Fusion is a 64-bit ARM-based SoC that first appeared in the 10.5" iPad Pro and the second generation of the 12.9" iPad Pro, which were both announced on June 5, 2017.[83] It is a variant of the A10 and Apple claims that it has 30 percent faster CPU performance and 40 percent faster GPU performance than its predecessor, the A9X.[83] On September 12, 2017, Apple announced that the Apple TV 4K would be powered by an A10X chip. It is made by TSMC on their 10 nm FinFET process.[84]
Apple A11 Bionic
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The Apple A11 Bionic is a 64-bit ARM-based SoC [85] that first appeared in the iPhone 8, iPhone 8 Plus, and iPhone X which were introduced on September 12, 2017.[85] It has two high-performance cores which are 25% faster than the A10 Fusion and four high-efficiency cores which are 70% faster than the energy-efficient cores in the A10.[85][86]
Apple A12 Bionic
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The Apple A12 Bionic is a 64-bit ARM-based SoC that first appeared in the iPhone XS, XS Max and XR which were introduced on September 12, 2018. It is also within the 2019 models of the iPad Air and iPad Mini. It has two high-performance cores which are 15% faster than the A11 Bionic and four high-efficiency cores which are 50% lower power usage than the energy-efficient cores in the A11 Bionic.[87] The A12 is manufactured by TSMC[88] using a 7 nm[89] FinFET process, the first to ship in a smartphone.[90][88]
Apple A12X Bionic
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The Apple A12X Bionic is a 64-bit ARM-based SoC that first appeared in the 11.0" iPad Pro and the third generation of the 12.9" iPad Pro, which were both announced on October 30, 2018.[91] It offers 35% faster single-core and 90% faster multi-core CPU performance than its predecessor, the A10X. It has four high-performance cores and four high-efficiency cores. The A12X is manufactured by TSMC using a 7 nm FinFET process, the first to ship in a tablet.
Apple A13 Bionic
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The Apple A13 Bionic is a 64-bit ARM-based SoC that first appeared in the iPhone 11, 11 Pro, and 11 Pro Max which were introduced on September 10, 2019.
S series
The Apple "S" series is a family of Systems in Package (SiP) used in the Apple Watch. It uses a customized application processor that together with memory, storage and support processors for wireless connectivity, sensors and I/O comprise a complete computer in a single package. They are designed by Apple, and manufactured by contract manufacturers such as Samsung.
Apple S1
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The Apple S1 is an integrated computer designed by Apple. It includes memory, storage and support circuits like wireless modems and I/O controllers in a sealed integrated package. It was announced on September 9, 2014 as part of the "Wish we could say more" event. Its first appearance was in the original Apple Watch.[92]
Apple S1P
Used in Apple Watch Series 1. It has a dual-core processor almost identical to the S2, with the exception of the built-in GPS receiver.
Apple S2
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Used in the Apple Watch Series 2. It has a dual-core processor and a built-in GPS receiver.
Apple S3
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Used in the Apple Watch Series 3. It has a dual-core processor that is 70% faster than the Apple S2 and a built-in GPS receiver.[93] There is also an option for a cellular modem and an internal eSIM module.[93] It also includes the W2 chip.[93]
Apple S4
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Used in the Apple Watch Series 4. It has an Apple designed custom 64-bit dual-core processor with up to 2× faster performance. It also contains the W3 wireless chip, which supports Bluetooth 5.
Apple S5
Used in the Apple Watch Series 5. It has the same Apple designed custom 64-bit dual-core processor and GPU as the S4,[94] with the exception of the built-in magnetometer.
T series
Apple T1
The Apple T1 chip is an ARMv7 SoC from Apple driving the System Management Controller (SMC) and Touch ID sensor of the 2016 and 2017 MacBook Pro with Touch Bar.[95] In addition to the traditional tasks of the SMC, this chip operates as a secure enclave for the processing and encryption of fingerprints as well as acting as a gatekeeper to the microphone and FaceTime HD camera protecting these possible targets from potential hacking attempts. The T1 runs bridgeOS,[96] a variant of watchOS,[96] separate from the Intel CPU running macOS.[96]
Apple T2
The Apple T2 chip is a SoC from Apple first released in the iMac Pro 2017. It is a 64-bit ARMv8 chip (a variant of the A10, or T8010), and runs a separate operating system called bridgeOS 2.0,[97] which is a watchOS derivative.[98] It provides a secure enclave for encrypted keys, gives users the ability to lock down the computer's boot process, handles system functions like the camera and audio control, and handles on-the-fly encryption and decryption for the solid-state drive.[99][100][101] T2 also delivers "enhanced imaging processing" for the iMac Pro's FaceTime HD camera.[102][103] On July 12, 2018, Apple released an updated MacBook Pro that includes the T2 chip, which among other things enables the "Hey Siri" feature.[104][105] On November 7, 2018, Apple released an updated Mac mini and MacBook Air with the T2 chip.[106][107]
W series
The Apple "W" series is a family of "System on Chip" (SoC) and wireless chips with a focus on Bluetooth and Wi-Fi connectivity.
Apple W1
The Apple W1 is a SoC from Apple used in the 2016 AirPods and select Beats headphones.[108][109] It maintains a Bluetooth[110] Class 1 connection with a computer device and decodes the audio stream that is sent to it.[111]
Apple W2
The Apple W2 is used in the Apple Watch Series 3. It is integrated into the Apple S3 SiP. Apple released that the implementation of the chip makes Wi-Fi 85% faster and Bluetooth and Wi-Fi 50% more power efficient than the previous model's chip design.[93]
Apple W3
The Apple W3 is used in the Apple Watch Series 4[112] and Series 5.[113] It is integrated into the Apple S4 SiP. It supports Bluetooth 5.0.
H series
Apple H1
The Apple H1 chip was first used in the 2019 version of AirPods, and was later used in the Powerbeats Pro, the Beats Solo Pro, and the AirPods Pro.[114] Specifically designed for headphones, it has Bluetooth 5.0, supports hands-free "Hey Siri" commands, and offers 30 percent lower latency compared to the W1 chip in the prior version of AirPods.[115]
U series
Apple U1
The Apple U1 chip, introduced in the 2019 iPhones, uses Ultra Wideband technology for spatial awareness functions such as an improved, spatially-aware AirDrop.[116][117][118]
List of Apple processors
A series list
Name | Model no. | Image | Semiconductor technology | Die size | Transistor count | CPU ISA | CPU | CPU cache | GPU | AI accelerator | Memory technology | Introduced | Utilizing devices |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
APL0098 | 90 nm[6] | 72 mm2[3] | ARMv6 | 412 MHz single-core ARM11 | L1i: 16 KB L1d: 16 KB |
PowerVR MBX Lite | N/A | 16-bit Single-channel 133 MHz LPDDR (533 MB/s)[119] | June 2007 | ||||
APL0278 | 65 nm[3] | 36 mm2[3] | ARMv6 | 412–533 MHz single-core ARM11 | L1i: 16 KB L1d: 16 KB |
PowerVR MBX Lite | 32-bit Single-channel 133 MHz LPDDR (1066 MB/s) | September 2008 | |||||
APL0298 | 65 nm[6] | 71.8 mm2[15] | ARMv7 | 600 MHz single-core Cortex-A8 | L1i: 32 KB L1d: 32 KB L2: 256 KB |
PowerVR SGX535 | 32-bit Single-channel 200 MHz LPDDR (1.6 GB/s) | June 2009 | |||||
APL2298 | 45 nm[3] | 41.6 mm2[3] | ARMv7 | 600–800 MHz single-core Cortex-A8 | L1i: 32 KB L1d: 32 KB L2: 256 KB |
PowerVR SGX535 | 32-bit Single-channel 200 MHz LPDDR (1.6 GB/s) | September 2009 | |||||
A4 | APL0398 | 45 nm[3][15] | 53.3 mm2[3][15] | ARMv7 | 0.8–1.0 GHz single-core Cortex-A8 | L1i: 32 KB L1d: 32 KB L2: 512 KB |
PowerVR SGX535[120] | 32-bit Dual-channel 200 MHz LPDDR (3.2 GB/s) | March 2010 | ||||
A5 | APL0498 | 45 nm[34] | 122.2 mm2[34] | ARMv7 | 0.8–1.0 GHz dual-core Cortex-A9 | L1i: 32 KB L1d: 32 KB L2: 1 MB |
PowerVR SGX543MP2 (dual-core) @ 200 MHz (12.8 GFLOPS)[121] | 32-bit Dual-channel 400 MHz LPDDR2-800 (6.4 GB/s) | March 2011 | ||||
APL2498 | 32 nm HKMG[35] | 69.6 mm2[35] | 0.8–1.0 GHz dual-core Cortex-A9 (one core locked in Apple TV) | L1i: 32 KB L1d: 32 KB L2: 1 MB |
PowerVR SGX543MP2 (dual-core) @ 200 MHz (12.8 GFLOPS)[121] | 32-bit Dual-channel 400 MHz LPDDR2-800 (6.4 GB/s) | March 2012 | ||||||
APL7498 | 32 nm HKMG[41] | 37.8 mm2[41] | Single-core Cortex-A9 | L1i: 32 KB L1d: 32 KB L2: 1 MB |
PowerVR SGX543MP2 (dual-core) @ 200 MHz (12.8 GFLOPS)[121] | 32-bit Dual-channel 400 MHz LPDDR2-800 (6.4 GB/s) | March 2013 |
|
|||||
A5X | APL5498 | 45 nm[43] | 165 mm2[43] | ARMv7 | 1.0 GHz dual-core Cortex-A9 | L1i: 32 KB L1d: 32 KB L2: 1 MB |
PowerVR SGX543MP4 (quad-core) @ 200 MHz (25 GFLOPS)[121] | 32-bit Quad-channel 400 MHz LPDDR2-800[122] (12.8 GB/s) | March 2012 | ||||
A6 | APL0598 | 32 nm HKMG[53][123] | 96.71 mm2[53][123] | ARMv7s[124] | 1.3 GHz[125] dual-core Swift[50] | L1i: 32 KB L1d: 32 KB L2: 1 MB[126] |
PowerVR SGX543MP3 (triple-core) @ 266 MHz (25.5 GFLOPS)[52] | 32-bit Dual-channel 533 MHz LPDDR2-1066[127] (8.528 GB/s) | September 2012 | ||||
A6X | APL5598 | 32 nm HKMG[56] | 123 mm2[56] | ARMv7s[124] | 1.4 GHz dual-core Swift[55] | L1i: 32 KB L1d: 32 KB L2: 1 MB |
PowerVR SGX554MP4 (quad-core) @ 266 MHz (68.1 GFLOPS)[55][128] | 32-bit Quad-channel 533 MHz LPDDR2-1066 (17.1 GB/s)[129] | October 2012 | ||||
A7 | APL0698 | 28 nm HKMG[65] | 102 mm2[60] | ≈1 billion | ARMv8.0-A[61] | 1.3 GHz[58] dual-core Cyclone[61] | L1i: 64 KB L1d: 64 KB L2: 1 MB L3: 4 MB[61] (Inclusive)[130] |
PowerVR G6430 (quad-core) @ 450 MHz (115.2 GFLOPS)[63][128] | 64-bit Single-channel 800 MHz LPDDR3-1600[70] (12.8 GB/s)[131] | September 2013 | |||
APL5698 | 28 nm HKMG[132] | 102 mm2[60][132] | ≈1 billion | 1.4 GHz[59] dual-core Cyclone[61] | L1i: 64 KB L1d: 64 KB L2: 1 MB L3: 4 MB[59] (Inclusive)[130] |
PowerVR G6430 (quad-core) @ 450 MHz (115.2 GFLOPS)[128] | 64-bit Single-channel 800 MHz LPDDR3-1600[70] (12.8 GB/s)[131] | October 2013 | |||||
A8 | APL1011 | 20 nm (TSMC)[70] | 89 mm2[133] | ~2 billion | ARMv8.0-A[69] | 1.1–1.5 GHz dual-core Typhoon[69][134] | L1i: 64 KB L1d: 64 KB L2: 1 MB L3: 4 MB[69] (Inclusive)[130] |
Custom PowerVR GXA6450 (quad-core)[71][135][136] @ ~533 MHz (136.5 GFLOPS) | 64-bit Single-channel 800 MHz LPDDR3-1600[70] (12.8 GB/s)[131] | September 2014 | |||
A8X | APL1012 | 20 nm (TSMC)[77][137] | 128 mm2[77] | ~3 billion | ARMv8.0-A | 1.5 GHz triple-core Typhoon[77][134] | L1i: 64 KB L1d: 64 KB L2: 2 MB L3: 4 MB[77] (Inclusive)[130] |
Custom PowerVR GXA6850 (octa-core)[71][77][137] @ ~450 MHz (230.4 GFLOPS) | 64-bit Dual-channel 800 MHz LPDDR3-1600[77] (25.6 GB/s)[131] | October 2014 | |||
A9 | APL0898 | 14 nm FinFET (Samsung)[138] | 96 mm2[139] | >2 billion | ARMv8.0-A | 1.85 GHz dual-core Twister[140][141] | L1i: 64 KB L1d: 64 KB L2: 3 MB L3: 4 MB (Victim)[130][142] |
Custom PowerVR GT7600 (hexa-core)[71][143] @ 650 MHz (249.6 GFLOPS) | 64-bit Single-channel 1600 MHz LPDDR4-3200[141][142] (25.6 GB/s)[141] | September 2015 | |||
APL1022 | 16 nm FinFET (TSMC)[139] | 104.5 mm2[139] | |||||||||||
A9X | APL1021 | 16 nm FinFET (TSMC)[144] | 143.9 mm2[144][84] | >3 billion | ARMv8.0-A | 2.16–2.26 GHz dual-core Twister[145][146] | L1i: 64 KB L1d: 64 KB L2: 3 MB L3: none[130][144] |
Custom PowerVR 7XT Series (12-core)[71][144] @ ~533 MHz (409.3 GFLOPS) | 64-bit Dual-channel 1600 MHz LPDDR4-3200 (51.2 GB/s) | November 2015 | |||
A10 Fusion | APL1W24 | 16 nm FinFET (TSMC)[147] | 125 mm2[147] | 3.3 billion | ARMv8.1-A | 2.34 GHz quad-core (2× Hurricane + 2× Zephyr)[148] | L1i: 64 KB L1d: 64 KB L2: 3 MB L3: 4 MB |
Custom PowerVR GT7600 Plus (hexa-core)[71][149][150] @ 900 MHz (364.8 GFLOPS[151]) | 64-bit Single-channel 1600 MHz LPDDR4 (25.6 GB/s) | September 2016 | |||
A10X Fusion | APL1071[152] | 100px | 10 nm FinFET (TSMC)[84] | 96.4 mm2[84] | >4 billion | ARMv8.1-A | 2.36 GHz hexa-core (3× Hurricane + 3× Zephyr)[153] | L1i: 64 KB L1d: 64 KB L2: 8 MB L3: none[153] |
Custom PowerVR GT7600 Plus (12-core)[71][83] | 64-bit Dual-channel 1600 MHz LPDDR4[153][152] (51.2 GB/s) | June 2017 | ||
A11 Bionic | APL1W72 | 100px | 10 nm FinFET (TSMC) | 87.66 mm2[154] | 4.3 billion | ARMv8.2-A[155] | 2.39 GHz hexa-core (2× Monsoon + 4× Mistral) | L1i: 64 KB L1d: 64 KB L2: 8 MB L3: none[156] |
Custom design (triple-core) | Neural Engine (dual-core) | 64-bit Single-channel 2133 MHz LPDDR4X[157][158] (34.1 GB/s) | September 2017 | |
A12 Bionic | APL1W81 | 100px | 7 nm FinFET (TSMC N7) | 83.27 mm2[159] | 6.9 billion | ARMv8.3-A[160] | 2.49 GHz hexa-core (2× Vortex + 4× Tempest)[161] | L1i: 128 KB L1d: 128 KB L2: 8 MB L3: none[161] |
Custom design (quad-core) | Neural Engine (octa-core) | 64-bit Single-channel 2133 MHz LPDDR4X[162][163] (34.1 GB/s) | September 2018 | |
A12X Bionic | APL1083 | 100px | 7 nm FinFET (TSMC N7) | ≈135 mm2[164] | 10 billion | ARMv8.3-A[160] | 2.49 GHz octa-core (4× Vortex + 4× Tempest) | L1i: 128 KB L1d: 128 KB L2: 8 MB L3: none[165] |
Custom design (hepta-core) | Neural Engine (octa-core) | 64-bit Dual-channel 2133 MHz LPDDR4X (68.2 GB/s) | October 2018 | |
A13 Bionic | APL1W85 | 7 nm FinFET (TSMC N7P) | 98.48 mm2[166] | 8.5 billion | ARMv8.3-A[citation needed] | 2.65 GHz hexa-core (2× Lightning + 4× Thunder) | L1i: 128 KB L1d: 128 KB L2: 8 MB L3: none[167] |
Custom design (quad-core) | Neural Engine (octa-core) + AMX blocks (dual-core) | September 2019 | |||
Name | Model no. | Image | Semiconductor technology | Die size | Transistor count | CPU ISA | CPU | CPU cache | GPU | AI accelerator | Memory technology | Introduced | Utilizing devices |
S series list
Name | Model no. | Image | Semiconductor technology | Die size | CPU ISA | CPU | CPU cache | GPU | Memory technology | Modem | Introduced | Utilizing devices |
---|---|---|---|---|---|---|---|---|---|---|---|---|
S1 | APL0778[168] | 28 nm HKMG[169][170] | 32 mm2[169] | ARMv7k[170][171] | 520 MHz single-core Cortex-A7[170] | L1d: 32 KB[170] L2: 256 KB[170] |
PowerVR Series 5[170][172] | LPDDR3[173] | April 2015 | |||
S1P | TBC | 100px | TBC | TBC | ARMv7k[174][175][176] | 520 MHz dual-core Cortex-A7 without GPS[174] | L1d: 64 KB[citation needed] L2: 1 MB[citation needed] |
PowerVR Series 6 'Rouge'[174] | LPDDR3 | September 2016 | ||
S2 | TBC | 100px | TBC | TBC | ARMv7k[174][175][176] | 520 MHz dual-core Cortex-A7 with GPS[174] | L1d: 64 KB[citation needed] L2: 1 MB[citation needed] |
PowerVR Series 6 'Rouge'[174] | LPDDR3 | September 2016 | ||
S3 Non-LTE and LTE | TBC | 100px | TBC | TBC | ARMv7k[177] | Dual-core | TBC | TBC | LPDDR4 | Qualcomm MDM9635M (Snapdragon X7 LTE) | September 2017 | |
S4 Non-LTE and LTE | TBC | 100px | TBC | TBC | ARMv8-A ILP32[178][179] | Dual-core | TBC | TBC | TBC | TBC | September 2018 | |
S5 Non-LTE and LTE | TBC | TBC | TBC | TBC | TBC | Dual-core | TBC | TBC | TBC | TBC | September 2019 |
T series list
Name | Model no. | Image | Semiconductor technology | Die size | CPU ISA | CPU | CPU cache | GPU | Memory technology | Introduced | Utilizing devices |
---|---|---|---|---|---|---|---|---|---|---|---|
T1 | APL1023[180] | Apple T1 Processor | ARMv7 | TBD | October 2016 | ||||||
T2 | APL1027[181] | Apple T2 Processor | ARMv8-A | TBD | LPDDR4 | December 2017 |
W series list
Name | Model no. | Image | Semiconductor technology | Die size | CPU ISA | CPU | CPU cache | Memory technology | Bluetooth | Introduced | Utilizing devices |
---|---|---|---|---|---|---|---|---|---|---|---|
W1 | 343S00130[182] 343S00131[182] |
Apple W1 chip | TBC | 14.3 mm2[182] | TBC | TBC | TBC | TBC | 4.2 | September 2016 | |
W2 | 338S00348[183] | Apple W2 chip | TBC | TBC | TBC | TBC | TBC | TBC | 4.2 | September 2017 | |
W3 | TBC | TBC | TBC | TBC | TBC | TBC | TBC | TBC | 5.0 | September 2018 |
H series list
Name | Model no. | Image | Bluetooth | Introduced | Utilizing devices |
---|---|---|---|---|---|
H1 | 343S00289[184] | TBC | 5.0 | March 2019 |
|
U series list
Name | Model no. | Image | Ultra-wideband | Introduced | Utilizing devices |
---|---|---|---|---|---|
U1 | TBC | TBC | TBC | September 2019 |
See also
- List of iOS devices
- Apple motion coprocessors
- List of Historical Samsung Systems on a Chip
- ARM Cortex-A9 MPCore
- PowerVR SGX GPUs were also used in the iPhone 3GS and the third-generation iPod touch
- PWRficient, a processor designed by P.A. Semi, a company Apple acquired to form an in-house custom chip design department
Similar platforms
- BCM2xxxx by Broadcom
- A31 by AllWinner
- Atom by Intel
- Exynos by Samsung
- i.MX by Freescale Semiconductor
- Jaguar and Puma by AMD
- Kirin by HiSilicon
- MTxxxx by MediaTek
- NovaThor by ST-Ericsson
- OMAP by Texas Instruments
- RK3xxx by Rockchip
- Snapdragon by Qualcomm
- Tegra by Nvidia
References
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- ↑ Lua error in package.lua at line 80: module 'strict' not found.
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- ↑ Lua error in package.lua at line 80: module 'strict' not found.
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- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
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- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
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- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
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- ↑ Lua error in package.lua at line 80: module 'strict' not found.
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- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
- ↑ Lua error in package.lua at line 80: module 'strict' not found.
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- ↑ Lua error in package.lua at line 80: module 'strict' not found.
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- ↑ Lua error in package.lua at line 80: module 'strict' not found.
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- ↑ Lua error in package.lua at line 80: module 'strict' not found.
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- ↑ https://www.beatsbydre.com/headphones/solo-pro
Further reading
- Gurman, Mark (January 29, 2018). "How Apple Built a Chip Powerhouse to Threaten Qualcomm and Intel". Bloomberg Businessweek.
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- Use mdy dates from April 2015
- Pages with broken file links
- Articles with unsourced statements from October 2019
- Articles with unsourced statements from January 2018
- Articles with invalid date parameter in template
- Apple Inc. mobile processors
- ARM architecture
- Computer-related introductions in 2011
- Microprocessors
- System on a chip