STS4DF60L PDF

STS4DNF60L
N-channel 60 V, 0.045 , 4 A, SO-8

STripFET Power MOSFET
Features
Type
VDSS
RDS(on)
ID
STS4DNF60L
60V
<0.055
4A
Standard outline for easy automated surface

mount assembly
Low threshold drive

SO-8
Application
Switching applications
Description
This Power MOSFET is the latest development of
STMicroelectronics unique single feature size
strip-based process. The resulting transistor
shows extremely high packing density for low onresistance, rugged avalanche characteristics and
less critical alignment steps therefore a
remarkable manufacturing reproducibility.
Table 1.
Figure 1.
Internal schematic diagram
Device summary
Order code
Marking
Package
Packaging
STS4DNF60L
4DF60L
SO-8
Tape & reel
March 2010
Doc ID 6121 Rev 9
1/12
www.st.com
12
Contents
STS4DNF60L
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................. 6
Test circuits
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12
.............................................. 8
Doc ID 6121 Rev 9
STS4DNF60L
Electrical ratings
Electrical ratings
Table 2.
Absolute maximum ratings
Symbol
Parameter
VDS
Drain-source voltage (VGS = 0)
VGS
Gate- source voltage
Value
Unit
60
15
ID
Drain current (continuous) at TC = 25 C
ID
Drain current (continuous) at TC = 100 C
2.5
(1)
Drain current (pulsed)
16
PTOT(2)
Total dissipation at TC = 25 C
EAS(3)
Single pulse avalanche energy
80
mJ
Tj
Tstg
Operating junction temperature

Storage temperature
- 55 to 150
Value
Unit
62.5
C/W
IDM
1. Pulse width limited by safe operating area

2. PTOT=1.6 W for single operation
3. Starting TJ = 25 C, ID = 4 A, VDD = 30 V
Table 3.
Symbol
Thermal data
Parameter
(1)
Rthj-pcb Thermal resistance junction-pcb D.O.
1. When mounted on inch FR-4 board, 2 Oz Cu, t < 10sec, dual operation
Doc ID 6121 Rev 9
3/12
Electrical characteristics
STS4DNF60L
(TC = 25 C unless otherwise specified)
Table 4.
Symbol
V(BR)DSS
Parameter
Test conditions
Drain-source
breakdown voltage
ID = 250 A, VGS = 0
IDSS
VDS = Max rating

Zero gate voltage
drain current (VGS = 0) VDS = Max rating, TC=125 C
IGSS
Gate-body leakage
current (VDS = 0)
Gate threshold voltage VDS = VGS, ID = 250 A
RDS(on)
Static drain-source on
resistance
Symbol
Min.
Typ.
Max.
60
Unit
V
1
10
A
A
100
nA
1.7
2.5
0.045
0.050
0.055
0.065
Min.
Typ.
Max.
Unit
VGS = 15 V
VGS(th)
Table 5.
VGS = 10 V, ID = 2 A
VGS = 4.5 V, ID = 2 A
Dynamic
Parameter
Test conditions
Forward
transconductance
VDS =25 V, ID =2 A
25
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 25 V, f = 1 MHz, VGS = 0
1030
140
40
pF
pF
pF
Qg
Qgs
Qgd
Total gate charge

Gate-source charge
Gate-drain charge
VDD = 48 V, ID = 4 A,
VGS = 4.5 V
(see Figure 13)
15
4
4
nC
nC
nC
gfs
4/12
On /off states
Doc ID 6121 Rev 9
STS4DNF60L
Table 6.
Switching times
Symbol
Parameter
td(on)
tr
Turn-on delay time

Rise time
td(off)
tf
Turn-off delay time

Fall time
Table 7.
Test conditions
VDD = 30 V, ID = 2.2 A,
RG = 4.7 , VGS = 10 V
(see Figure 12)
Parameter
ISD
ISDM (1)
Source-drain current
Source-drain current (pulsed)
VSD (2)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
IRRM
Typ.
Max. Unit
15
28
ns
ns
45
10
ns
ns
Min.
Typ.
Source drain diode
Symbol
trr
Qrr
Min.
Test conditions
Max. Unit
4
16
A
A
ISD = 4 A, VGS = 0
1.2
ISD = 4 A, di/dt = 100 A/s

VDD = 20 V
(see Figure 17)
85
85
2
ns
nC
A
1. Pulse width limited by safe operating area

2. Pulsed: Pulse duration = 300 s, duty cycle 1.5%
Doc ID 6121 Rev 9
5/12
STS4DNF60L
2.1
Electrical characteristics (curves)
Figure 2.
Safe operating area
Figure 3.
Thermal impedance
Figure 4.
Output characteristics
Figure 5.
Transfer characteristics
Figure 6.
Source-drain diode forward

characteristics
Figure 7.
Static drain-source on resistance
6/12
Doc ID 6121 Rev 9
STS4DNF60L
Figure 8.
Gate charge vs gate-source voltage Figure 9.
Figure 10. Normalized gate threshold voltage

vs temperature
Capacitance variations
Figure 11. Normalized on resistance vs

temperature
Doc ID 6121 Rev 9
7/12
Test circuits
STS4DNF60L
Test circuits
Figure 12. Switching times test circuit for

resistive load
Figure 13. Gate charge test circuit

VDD
12V
47k
1k
100nF
3.3
F
2200
RL
VGS
IG=CONST
VDD
100
Vi=20V=VGMAX
VD
RG
2200
F
D.U.T.
D.U.T.
VG
2.7k
PW
47k
1k
PW
AM01468v1
AM01469v1
Figure 14. Test circuit for inductive load

Figure 15. Unclamped Inductive load test
switching and diode recovery times
circuit
D.U.T.
FAST
DIODE
D
G
VD
L=100H
3.3
F
25
1000
F
VDD
2200
F
3.3
F
VDD
ID
G
RG
Vi
D.U.T.
Pw
AM01470v1
Figure 16. Unclamped inductive waveform
AM01471v1
Figure 17. Switching time waveform

ton
V(BR)DSS
tdon
VD
toff
tr
tdoff
tf
90%
90%
IDM
10%
ID
VDD
10%
0
VDD
VDS
90%
VGS
AM01472v1
8/12
Doc ID 6121 Rev 9
10%
AM01473v1
STS4DNF60L
Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.
Doc ID 6121 Rev 9
9/12
STS4DNF60L
SO-8 MECHANICAL DATA

DIM.
mm.
MIN.
TYP
A
a1
inch
MAX.
TYP.
1.75
0.1
MAX.
0.068
0.25
a2
0.003
0.009
1.65
0.064
a3
0.65
0.85
0.025
0.033
0.35
0.48
0.013
0.018
b1
0.19
0.25
0.007
0.010
0.25
0.5
0.010
0.019
4.8
5.0
0.188
0.196
5.8
6.2
0.228
c1
45 (typ.)
1.27
e
e3
0.244
0.050
3.81
0.150
3.8
4.0
0.14
0.4
1.27
0.015
0.6
10/12
MIN.
0.050
0.023
8 (max.)
Doc ID 6121 Rev 9
0.157
STS4DNF60L
Revision history
Revision history
Table 8.
Document revision history
Date
Revision
Changes
30-May-2005
Initial electronic version
29-Mar-2006
Modified Figure 2 and Figure 3
16-May-2006
Modified internal schematic diagram
29-Aug-2007
Marking has been updated
30-Mar-2010
Inserted EAS value in Table 2: Absolute maximum ratings
Doc ID 6121 Rev 9
11/12
STS4DNF60L
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STS4DNF60L

N-channel 60 V, 0.045 , 4 A, SO-8

Standard outline for easy automated surface

Low threshold drive

Internal schematic diagram

Tape & reel

Doc ID 6121 Rev 9

Electrical characteristics (curves)

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Doc ID 6121 Rev 9

Absolute maximum ratings

Drain-source voltage (VGS = 0)

Gate- source voltage

Drain current (continuous) at TC = 25 C

Drain current (continuous) at TC = 100 C

Drain current (pulsed)

Single pulse avalanche energy

Operating junction temperature

1. Pulse width limited by safe operating area

Rthj-pcb Thermal resistance junction-pcb D.O.

Doc ID 6121 Rev 9

VDS = Max rating

Gate threshold voltage VDS = VGS, ID = 250 A

VDS = 25 V, f = 1 MHz, VGS = 0

Total gate charge

Doc ID 6121 Rev 9

Turn-on delay time

Turn-off delay time

Source drain diode

ISD = 4 A, di/dt = 100 A/s

1. Pulse width limited by safe operating area

Doc ID 6121 Rev 9

Electrical characteristics (curves)

Safe operating area

Source-drain diode forward

Static drain-source on resistance

Doc ID 6121 Rev 9

Gate charge vs gate-source voltage Figure 9.

Figure 10. Normalized gate threshold voltage

Figure 11. Normalized on resistance vs

Doc ID 6121 Rev 9

Figure 12. Switching times test circuit for

Figure 13. Gate charge test circuit

Figure 14. Test circuit for inductive load

Figure 16. Unclamped inductive waveform

Figure 17. Switching time waveform

Doc ID 6121 Rev 9

Package mechanical data

Package mechanical data

Doc ID 6121 Rev 9

Package mechanical data

SO-8 MECHANICAL DATA

Doc ID 6121 Rev 9

Document revision history

Initial electronic version

Modified Figure 2 and Figure 3

Modified internal schematic diagram

Marking has been updated

Inserted EAS value in Table 2: Absolute maximum ratings