15 - Chepter 6
15 - Chepter 6
15 - Chepter 6
CONTROL SIGNAL
GENERATION
Following block diagram shows the procedure for the simulation, control signal
generation and implementation.
Control signals obtained applied to buffer, opto isolation and driver circuits.
Chapter 6
This chapter dicusses the processor used for gating signals applied to switches in
power circuit. As discussed earlier 18 switches are there in 3 phase Hybrid Multilevel
Inverter controlled separately with different modulation techniques as per requirement.
Thus processor chosen should provide minimum 18 separate pulses at the output.
Though complimentary pulses can be used but to avoid leg short circuiting and
intentional delay separate pulses are used in this topology.
Analog control can be used but for implementation of various modulation
techniques digital control is suggested. Control signals can be obtained using different
high level languages like C/C++ programming. But as per advancement in technology
control signals can directly be obtained using MATLAB SIMULINK Blocks with Code
Composer Studio and Emulator. All these interfaces are discussed in detail.
This chapter describes steps involved in generation and application of control
signals to power circuit.
6.1
High speed A/D converter, 12.5 MHz max sample rate, 16 channels, 12-bits.
6 high resolution (150 picosecond) pulse width modulators. Can readily be used
to implement D/A converters.
112
Chapter 6
DB25 Connector for 8 Digital Input and 8 Digital Output interface with +5V
compatibility
On board DB9 connector for CAN-A interface (Loop back mode possible)
On board 4 pin header for CAN-B interface (Loop back mode possible)
On board DB9 connector for 4 channel SPI based External DAC interface
Chapter 6
On board IEEE 1149.1 JTAG emulation connector (7x2 pins) with LED
indication
Chapter 6
Thus features utilised are GPIO and I/O ports for 18 control signals. JTAG for
interfacing emulator with DSP.
6.2
Chapter 6
Chapter 6
6.3
DRIVER CIRCUIT
The gate pulses obtained from DSP go through buffer, isolation and driver stage
before reaching to the power devices. As DSP can drive maximum up to 200mA current
and signals taken are 18 hence buffer is required. The isolation is must when gate pulses
are given to power devices connected in inverter configuration. The isolation is normally
provided to gate pulses through optocouplers, which isolates power circuit and low
power control circuit optically. Further these optically coupled signals are given to the
driver circuit. The gate pulse, which is given to the MOSFET, is with respect to the
source terminal. Fig. 6.7 shows circuit for buffer, isolation and driver which are
described in brief.
Circuit is designed as per requirement of gate pulse. Buffer selected [4] can drive
maximum 6 signals hence for 18 pulses three buffers are used. Buffer supply is 5V. 4049
inverting buffer is used. Component list is given in Table 6.1. R1, R2, R3 and R4 are
selected as standard current limiting, pull-up resistors. Similarly C1 and C2 are by pass
capacitors while C3 is used for floating supply as per requirement of driver IC IR2110
117
Chapter 6
[5]. Diode D2 is fast switching diode for boost up. High speed opto isolator 2630 is used
for isolation [6].
+5V
R1
1
5
+15V
C1
+15V
11
10
7
5
D1
C3
G1
+15VR3
IC-2
R1
3
R2
2
IC-1
+15V
C2
R2
R3
12
11
+15V
D1
G4
12
13
14
15
10
S1
D2
IC-3
R4
R4
S4
6.4
Value
330
10 k
1 k
3.3 k
0.1 F
0.47F
100F
IN4148
11DF4
4049
2630
IR2110
SUMMARY
In this chapter, procedure to obtain control signals is described. Signals obtained
from DSP are 3.3V compatible which are not enough for gate drive hence buffer and
driver circuits are introduced. As power circuit operates at very high voltage, isolation is
compulsory hence opto isolator is used.
118