NATIONAL INSTITUTE OF TECHNOLOGY,

ROURKELA

EMBEDDED SYSTEMS
LABORATORY
(EE3704)

SUBMITTED BY:
Group 6
121EE0551 _Dharavath Bindu Sree
121EE0553_Dinesh Kumar Sahu
121EE0554_Tarini Prasad Sahu

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 (TASK 2-3)
1) To Design Low pass (LP) with FIR structure of 2nd order for a given Cut-off frequency. RTOS
Structured code is developed with FIFO structure for signal access–to realize the filters in the
circuit developed in Task-1. Latency of designed system is determined.

SOFTWARE USED: PROTEUS 8

COMPONENTS USED:
1) 8051 MICROCONTROLLERS
2) ADC0808
3) DAC0808
4) OPAMP
5) DIGITAL OSCILLOSCOPE
6) VOLTAGE SOURCES
7) SINE SOURCES
8) DCLOCK PULSES

THEORY:

ADC:
The ADC0808 is an analog-to-digital converter (ADC) integrated circuit commonly used for
converting analog signals into digital data:
1) Type: The ADC0808 is an 8-bit successive approximation ADC, meaning it converts an analog
input signal into an 8-bit binary digital output.
2) Resolution: The term "8-bit" indicates the resolution of the converter, which means it can
represent the analog input signal with 2^8 (256) different levels.
3) Successive Approximation Method: The ADC0808 uses the successive approximation
method to convert analog signals. This involves comparing the input voltage with a reference
voltage and iteratively adjusting the digital output until a match is found.
4) Multiplexer (MUX): The ADC0808 typically includes an 8-channel analog multiplexer,
allowing it to select one of eight analog input channels for conversion.
5) Conversion Time: The time required for the ADC0808 to complete a conversion is determined
by the successive approximation process and is relatively fast compared to some other ADC
types.
6) Clock and Control Logic: ADC0808 requires an external clock signal to control the
conversion process. It also utilizes control signals such as start, interrupt, and end of conversion
(EOC) to manage the conversion sequence.
7) Reference Voltage: An important aspect of ADCs is the reference voltage against which the
analog input is compared. The ADC0808 requires an external reference voltage that sets the
full-scale range of the conversion.
8) Output Data: The digital output of the ADC0808 is typically in binary format, represented as
an 8-bit binary number corresponding to the analog input voltage.
9) Applications: ADC0808 is commonly used in applications where moderate accuracy and
resolution are acceptable, such as in data acquisition systems, industrial automation, and sensor
interfacing.

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 DAC:
The DAC0808 is a digital-to-analog converter (DAC) integrated circuit designed to convert
digital signals into corresponding analog voltages. Here is a brief theory overview.

Type: The DAC0808 is an 8-bit digital-to-analog converter, meaning it converts an 8-bit digital input into
an analog output voltage.
1) Resolution: The term "8-bit" indicates the resolution of the DAC, allowing it to convert digital
inputs into 2^8 (256) different analog output levels.
2) Binary Weighted Resistor Network: The DAC0808 typically employs a binary weighted
resistor ladder network. Each bit in the digital input corresponds to a resistor in the ladder, and
the weighted sum of these resistors determines the analog output voltage.
3) Reference Voltage: Like ADCs, DACs require a reference voltage against which the digital
input is converted. The DAC0808 requires an external reference voltage that establishes the
full-scale output range.
4) Buffered Output: The DAC0808 usually includes an output amplifier to buffer the analog
signal and provide a low-impedance output, making it suitable for driving external loads.
5) Applications: DAC0808 is commonly used in applications where digital control signals need
to be converted into analog voltages, such as waveform generation, motor control, and various
industrial automation applications.
6) Current Output: The DAC0808 produces a current output that can be converted into a voltage
by using an external resistor. This feature allows flexibility in interfacing with different types
of loads.
7) Fast Settling Time: The DAC0808 is designed for relatively fast settling times, making it
suitable for applications that require rapid response to changes in the digital input.
Compatibility: It is designed to be compatible with most microprocessors, microcontrollers, and digital
systems, simplifying integration into various digital control applications.

Digital Filter Design:

Digital filter design is the process of creating algorithms that manipulate digital signals to achieve
specific objectives. Filters are essential for tasks like noise reduction, frequency shaping, and signal
enhancement. Two main types of digital filters are Finite Impulse Response (FIR) and Infinite Impulse
Response (IIR).
FIR Filters
FIR filters are also known as non-recursive filters, convolution filters, or moving-average filters
because the output values of an FIR filter are described as a finite convolution:

The output values of a FIR filter depend only on the current and past input values. Because the output
values do not depend on past output values, the impulse response decays to zero in a finite period of time.
FIR filters have the following properties:
FIR filters can achieve linear phase response and pass a signal without phase

distortion. They are easier to implement than IIR filters.

The selection of the window function for a FIR filter is similar to the choice between Chebyshev and
Butterworth IIR filters where you have to choose between side lobes near the cutoff frequencies and
the width of the transition region.

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 Working:
Analog data is initially captured from a sensor and converted to digital using an ADC, such as the
ADC0808. The digital signal is then processed by a microcontroller, such as the 8051, which
subsequently sends the processed data to a DAC for reconversion into analog form. But before sending to
DAC, we introduce a FIR LPF with cutoff frequency of 553HZ as a part of filtering process. The analog
output undergoes further refinement through an operational amplifier (op-amp) before reaching an
oscilloscope for visualization. This process allows for the analysis and manipulation of analog signals in a
digital environment, offering flexibility and control over the data. Adjustment of components ensures that
the final analog signal observed on the oscilloscope aligns with the original input, and the entire setup is
documented for future reference.

Schematic diagram:

Fig 1: Schematic Circuit diagram of interfacing ADC and DAC with 8051 Microcontroller

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 Fig 2 : FIR Filter Design with cutoff frequency of 553Hz

Fig 3: Magnitude Response and Phase Response

Fig 4: Filter coefficients

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 Fig 5: Pole-Zero Plot

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 Code with comments:
;====================================================================
; Giving variable names.
ADOP EQU P0 ; port 0 as adc output
ALE EQU P1.2 ; port 1.2 as ale for adc
SOC EQU P1.3 ; port 1.3 as start conversion (sc) for ADC.
EOC EQU P3.3 ; external interrupt 0
DAIP EQU P2 ; port 2 as dac input
EXEDGE EQU TCON.2 ; setting external interrupt 1 as edge
trigger OE EQU p3.0
;====================================================================
; VARIABLES
;====================================================================
IEVALUE equ 84h
T2MODVAl equ 02h ;to set as up programmable clock output and T2OE enable
RCAP_L equ 0FCh ;lower byte of count value for 640kHz clock out at T2 pin with
11.059MHz clock
RCAP_H equ 0FFh ;higher byte of count value
;====================================================================
; FILTER COEFFICIENTS

; ================================================

An equ 4Fh ; 0.3115250704 *2^ (8)

An_1 equ 60h ; 0.3769498591 *2^ (8)

An_2 equ 4Fh ; 0.3115250704 *2^ (8)

;====================================================================
; RESET and INTERRUPT VECTORS
;====================================================================
; Reset Vector

ORG 0000h

JMP Start
ORG 0013h ; For external

interrupt 1 SJMP READ_ADC_ISR

;====================================================================
; CODE SEGMENT
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 Start:
MOV RCAP2H, ; higher byte of count value for 640kHz clock out at T2 pin with
#RCAP_H 11.059MHz
clock
MOV RCAP2L, #RCAP_L ; lower byte of count value
MOV T2MOD , #T2modval ;to set as up programmable clock output and T2OE

enable CLR T2CON.0 ;16bit Auto reload

CLR T2CON.1 ; In timer mode

SETB TR2 ; Start the timer.
MOV IE, #IEvalue ; to enable external interrupt 1
MOV ADop , #0FFh ;Configure P0 as an input port for receiving data of ADC
MOV DAip , ; Configure P2 as an output port for sending data to DAC

#00h MOV R0

,#00H ; MOV

R1 , #00H MOV

R2 , #00H MOV

R3 , #00H MOV

R5, #00H
SETB EXEDGE ; setting external interrupt 1 as edge trigger
; Start ADC conversion for 1st sample.
SETB ALE ; Set ALE to start conversion and selecting channel 1 input.
SETB SOC ; Set SC to start the conversion of ADC.

CLR ALE

CLR SOC
Loop:
JMP Loop

READ_ADC_IS

R: PUSH ACC
PUSH PSW
SETB OE ; set Output Enable to take the data
MOV A, ADOP ;Store data in B register to check whether the coming data is maximum

value or not MOV R3,A ;storing current sample in R3

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 MOV DAip,R5 SETB ALE SETB SOC CLR ALE CLR SOC
MOV
POP PSW
A,R1
POP ACC RETI END
MOV

R0,A

MOV

A,R2

MOV

R1,A

MOV

A,R3

MOV R2,A

MOV A,R0

MOV B,#An_1

MUL AB

MOV R5,B ;Storing in

R5 MOV A,R1

MOV

B,#An_1

MUL AB

MOV A,B

ADD A,R5

MOV R5,A

MOV A,R2

MOV

B,#An_2

MUL AB

MOV A,B

ADD A,R5

MOV R5,A

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;storing the previous
x[n-1] In A
;shifting the previous
x[n-1] in R0
;Store the previous
x[n] in A
;Store it in R1
;Store current sample
value in A
;Store current sample
in R2

;performing An*x[n]

;performing
An_1*x[n-1]

;Adding and storing in

R5

;performing
An_2*x[n-2]

;storing An*x[n] +
An_1*x[n-1] +
An_2*x[n-2] in R5
;To send the contents
to DAC Start ADC
conversion for next
sample

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Observations:

Fig 6: Input sine wave settings for 1 Amplitude Voltage

Readings:

Frequency(HZ) Input Output Gain Gain (in dB)

Amplitude(V) Amplitude(V)
50 1 1.25 1.25 1.938
100 1 1.25 1.25 1.938
150 1 1.25 1.25 1.938
200 1 1.25 1.25 1.938
250 1 1.25 1.25 1.938
300 1 1.13 1.13 1.06
350 1 1.13 1.13 1.06
400 1 1 1 0
450 1 0.95 0.95 -0.44
500 1 0.875 0.875 -1.15
550 1 0.82 0.82 -1.72
600 1 0.75 0.75 -2.49
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 650 1 0.69 0.69 -3.22
700 1 0.625 0.625 -4.08
800 1 0.5 0.5 -6.02
1000 1 0.25 0.25 -12.04
1500 1 0.20 0.20 -13.9
2000 1 0.125 0.125 -18.06

Waveforms:
Channel A contains output waveform and Channel B contains input waveform.

i) At 50hz ii) At 100hz

iii) At 200hz iv) At 400hz

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 v) At 600hz vi) At 1000hz

vii) At 600hz viii) At 1000hz

Problems faced during experimental design:

For ADC – DAC interfacing, we used polling method but here polling method is not useful because
microcontroller has to do some other works for filtering.
So, we updated the code with interrupt model so that whenever interrupt occurs then it will take
immediate samples.
During writing the code as FIR depends on past inputs. We need to store the PSW and ACC because
they will during FIR logic. So, to avoid this thing we stored them on stack memory by using PUSH
and later we get them back by using POP instruction.

Conclusion:
In this task, the successful interfacing experiment involving ADC0808 and DAC0808 with the 8051
microcontroller was conducted via simulation in Proteus along with FIR filter. From the above
waveforms, it is clear that with the increase in frequency of input sinusoid, there is decrease in
amplitude of output waveforms is significant above cutoff frequency. As it is a low pass FIR filter,
decrease in the amplitude is justified and the frequency response of output is also similar to that of
response obtained in FDA tool. The output waveforms become more distorted as we increase the
frequency closer to 2000Hz.

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