Digital Design 2 Lab: An-Najah University

Digital Design 2 Lab
An-Najah University
Computer Engineering Department
Sudqi Jawabreh
Laith Abu Khader
summry
this is the sum of every thing.
Contents
Summery
1 Introduction
2 Procedure
2.1 Auto up-down counter . . . . . . .
2.2 push button counter . . . . . . . .
2.3 rotary counter . . . . . . . . . . . .
2.4 output on seven Segments display .
2.5 Conclusion . . . . . . . . . . . . .
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1
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A auto up-down counter
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B push button counter
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C rotary counter
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Introduction
inputs and outputs devices provid an interaction with the user which is essintial in most of embeded systems.in
this experiment we will build a counter and control it using different inputs like push buttons ,swichtes and
rotery and in the same time we will use leds and seven segment displays to show the result.
Procedure
in this lab we will use :

ISE Design Suite by Xilnix.
Spartan 3E Board.
the experiment consists of 4 parts :
2.1
Auto up-down counter
auto up-down counter is a 4 bit counter that counts every one second either up or down according to the
input signal up-down and it goes back to zero when the reset signal is activated as shown in Figure 1.
Figure 1: auto updown counter abstract

first we will create the counter it self without worrying about the speed of the clk as showon in code 1.
code 1: 4 bit counter with reset and updown
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process(clk1,reset,updown)
variable count:std_logic_vector(3 downto 0):="0000";
begin
if(reset=1 )then
count:="0000";
elsif( clk1event and clk1=1 )then
if( updown=1)then
count:=count+1;
elsif(updown=0)then
count:=count-1;
end if;
end if;
cnt<=count;
end process;
for clk we create a process to divide the clk that comes from the spartan board which is 50mHz to 1H so
every second the counter counts as shown in code 2.
code 2: clock divider process
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process(clk)
variable temp: integer range 0 to 25000000 :=0;
begin
if(clkevent and clk=1)then
temp:=temp+1;
if(temp=24999999)then
clk1<=1;
else
clk1<=0;
end if;
end if;
end process;
then we will take the clock generated by clock divider process and connect it to the counter process so the
overall code will be as shown in the appendix A.
in the synthesizing process we will map the counter output to 4 leds and each of reset and updown input
to a switch.
2.2
push button counter
instead of making the counter counts every second we want user control the count number by using a push
button but the push doesnt produce a very clean signal because when the user push the button it will make
a bouncing so it will appear as multiple pushes rather than one as shown in the figure 2.
Figure 2: signal produced by push button

to solve the debouncing problem we have multiple choices which are :
connect the signal to schmmit trigger buffer.
connect the signal to 555 timer on one shoot mode.
debounce the signal using the software.
since it is hard to add an addittional component to the sparatn 3e board we used to solve it in software.the
software solution depends on wait enough time for the signal unitl it settels down so we can have a clear
signal.to do it in vhdl we will we should count make counter that counts for specific amount of time so we
used the the clk divider process we used in auto up-down counter in section 1 with some changes.
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code 3: delay process

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process(clk,pb_in)
variable temp: integer range 0 to rc :=0;
variable pb_old : std_logic:=0;
variable t_on:std_logic:=0;
begin
if(t_on=1)then
temp:=temp+1;
if(temp=749999)then
t_on:=0;
end if;
elsif(t_on=0)then
if(pb_old /= pb_in)then
t_on:=1;
clk1<=not(clk1);
end if;
end if;
pb_old:=pb_in;
end if;
end process;
as shown in code 3 we count for 3ms so the bouncing will end and the value will be stable,but the time
depends on how quick the user pushes the button.the output signal will be the input clk to the counter
process which is the same process in 1. the final code will be as shown in appendix B.
2.3
rotary counter
rotary input consist of two buttons . Because rotary shape doesnt look as a regular shape it will close on
of the buttons before the other so the rotation direction is determined by the values of the button signals
however the signals are not clean the have some bouncing so we have to eliminate the bouncing before using
the signals to control the counter.we can use the same process in section 2.2 but in this part we used different
approach.
Figure 3: signal generated by rotary with bouncing
code 4: direction
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direction:process(clk)
begin
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old<=q1;
if(q1 =1 and old=0) then
r_event<=1;
rotate_left<=q2;
else
r_event<=0;
rotate_left<=rotate_left;
end if;
end if;
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end process;
so to control the counter it should take more two inputs which are rotate direction and rotate event to
indicate there is a rotation as shown in code 5.
code 5: counter triggered with rotate signal
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counter:process(r_event,reset,rotate_left)
begin
if(reset=1 )then
count:="0000";
elsif( r_eventevent and r_event=1 )then
if( rotate_left=1)then
count:=count-1;
elsif(rotate_left=0)then
count:=count+1;
end if;
end if;
cnt<=count;
end process;
the overall code will be as shown in appendix C.
2.4
output on seven Segments display
seven segment display consists of multiple leds. the number displayed on it by turning some of leds on and
others off.table in figure 4 shows the the truth table of seven segment decoder.
Figure 4: seven segment decoder truth table

we implemented the table in vhdl as shown in code 6 in a component
code 6: 7 segment decoder
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----------------------------------------------------------------------------------- Company:
-- Engineer:
--- Create Date: 14:42:49 02/23/2016
-- Design Name:
-- Module Name: decoder - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--- Dependencies:
--- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
----------------------------------------------------------------------------------library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
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-- Uncomment the following library declaration if using

-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
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-- Uncomment the following library declaration if instantiating

-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
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entity decoder is
Port ( counter : in STD_LOGIC_VECTOR (3 downto 0);
segmantout: out std_logic_vector(6 downto 0)
);
end decoder;
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architecture Behavioral of decoder is

signal decoded :std_logic_vector(6 downto 0);
begin
process(counter)
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begin
case counter is
when "0000" => decoded<="1111110";
when "0001" => decoded<="0110000";
when "0010" => decoded<="1101101";
when "0011" => decoded<="1111001";
when "0100" => decoded<="0110011";
when "0101" => decoded<="1011011";
when "0110" => decoded<="1011111";
when "0111" => decoded<="1110000";
when "1000" => decoded<="1111111";
when "1001" => decoded<="1111011";
when others => decoded<=decoded;
end case;
end process;
segmantout<=decoded;
end Behavioral;
because seven segment display one digit we modified our counter to be as bcd counter .to make a 2 digit
bcd counter we made 2 counter of the same process but we made the first process drives the second one so
when it reaches it limits it triggers the second counter. as shown code 7.
code 7: 2 digit counter
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----------------------------------------------------------------------------------- Company:
-- Engineer:
--- Create Date: 14:49:04 02/23/2016
-- Design Name:
-- Module Name: updowncounter - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--- Dependencies:
--- Revision:
----------------------------------------------------------------------------------library IEEE;
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library IEEE;
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use ieee.std_logic_unsigned.all;
--library UNISIM;
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entity updowncounter is
Port ( clk : in STD_LOGIC;
reset : in STD_LOGIC;
updown : in STD_LOGIC;
segmant : out STD_LOGIC_VECTOR (6 downto 0);
led:out std_logic_vector(3 downto 0);
c : out std_logic);
end updowncounter;
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architecture Behavioral of updowncounter is

signal clk1 : std_logic;
signal cnt : std_logic_vector ( 3 downto 0);
signal trigger : std_logic;
signal cnt2:std_logic_vector(3 downto 0);
signal dec_in: std_logic_vector (3 downto 0);
signal oldc: std_logic:=0;
component decoder
Port ( counter : in STD_LOGIC_VECTOR (3 downto 0);
segmantout: out std_logic_vector(6 downto 0)
);
end component;
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begin
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process(clk)
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begin
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temp:=temp+1;
clk1<=1;
else
clk1<=0;
end if;
end if;
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end process;
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digit1:process(clk1,reset,updown)
begin
if(reset=1 )then
count:="0000";
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trigger<=0;
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if( updown=1)then
count:=count+1;
if(count="1010")then
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count:="0000";
trigger<=1;
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end if;
elsif(updown=0)then
count:=count-1;
count:="1001";
trigger<=1;
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end if;
end if;
end if;
cnt<=count;
end process;
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digit2: process(trigger,reset,updown)
begin
if(reset=1 )then
count:="0000";
elsif( triggerevent and trigger=1 )then
if( updown=1)then
count:=count+1;
count:="0000";
end if;
elsif(updown=0)then
count:=count-1;
count:="1001";
end if;
end if;
end if;
cnt2<=count;
end process;
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mult:process(clk)
variable count:integer range 0 to 250000:=0;
begin
if(clkevent and clk=1) then
count:= count +1;
if (count = 249999)then
if(oldc = 0 )then
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dec_in<=cnt2;
elsif(oldc=1)then
dec_in<=cnt;
end if;
oldc<=not(oldc);
count:=0;
end if;
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end if;
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end process;
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led<=cnt;
c<=oldc;
d1:decoder
port map(dec_in,segmant);
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end Behavioral;
2.5
Conclusion
input devices are essential to most of embedded systems but we have to make it works probably by study
how they work and insure to debounce them before using them in the system.
auto up-down counter

code 8: auto up-down counter module
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library IEEE;
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entity autocounter is
cnt : out STD_LOGIC_VECTOR (3 downto 0));
end counter;
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architecture Behavioral of autocounter is

begin
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process(clk)
begin
temp:=temp+1;
clk1<=1;
else
clk1<=0;
end if;
end if;
end process;
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begin
if(reset=1 )then
count:="0000";
if( updown=1)then
count:=count+1;
elsif(updown=0)then
count:=count-1;
end if;
end if;
cnt<=count;
end process;
end Behavioral;
10
push button counter

code 9: push button counter module
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----------------------------------------------------------------------------------- Company:
-- Engineer:
--- Create Date: 15:04:09 02/16/2016
-- Design Name:
-- Module Name: counter - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--- Dependencies:
--- Revision:
----------------------------------------------------------------------------------library IEEE;
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--library UNISIM;
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entity counter is
pb_in:in std_logic;
end counter;
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architecture Behavioral of counter is

begin
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process(clk,pb_in)
variable pb_old : std_logic:=0;
variable t_on:std_logic:=0;
begin
if(t_on=1)then
temp:=temp+1;
if(temp=749999)then
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t_on:=0;
end if;
elsif(t_on=0)then
if(pb_old /= pb_in)then
t_on:=1;
clk1<=not(clk1);
end if;
end if;
pb_old:=pb_in;
end if;
end process;
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begin
if(reset=1 )then
count:="0000";
if( updown=1)then
count:=count+1;
elsif(updown=0)then
count:=count-1;
end if;
end if;
cnt<=count;
end process;
end Behavioral;
rotary counter
code 10: rotary counter module
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----------------------------------------------------------------------------------- Company:
-- Engineer:
--- Create Date: 14:46:00 02/21/2016
-- Design Name:
-- Module Name: roterycounter - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--- Dependencies:
--- Revision:
----------------------------------------------------------------------------------library IEEE;
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--library UNISIM;
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entity roterycounter is
Port ( a_in : in STD_LOGIC;
b_in : in STD_LOGIC;
clk : in STD_LOGIC;
end roterycounter;
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architecture Behavioral of roterycounter is

signal r_in: std_logic_vector(1 downto 0);
signal q1,q2:std_logic;
signal old:std_logic;
signal r_event,rotate_left:std_logic;
begin
rotery_filter: process (clk)
begin
if clkevent and clk=1 then
r_in<=a_in & b_in;
case r_in is
when "00"=> q1<=0;
q2<=q2;
when "01"=> q1<=q1;
q2<=1;
when "10"=>q1<=q1;
q2<=0;
when "11" => q1<=1;
q2<=q2;
when others => q1<=q1;
q2<=q2;
end case;
end if;
end process;
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direction:process(clk)
begin
old<=q1;
if(q1 =1 and old=0) then
r_event<=1;
rotate_left<=q2;
else
r_event<=0;
rotate_left<=rotate_left;
end if;
end if;
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end process;
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counter:process(r_event,reset,rotate_left)
begin
if(reset=1 )then
count:="0000";
elsif( r_eventevent and r_event=1 )then
if( rotate_left=1)then
count:=count-1;
elsif(rotate_left=0)then
count:=count+1;
end if;
end if;
cnt<=count;
end process;
end Behavioral;
14

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Digital Design 2 Lab

A auto up-down counter

B push button counter

in this lab we will use :

Auto up-down counter

Figure 1: auto updown counter abstract

push button counter

Figure 2: signal produced by push button

code 3: delay process

Figure 3: signal generated by rotary with bouncing

if(clkevent and clk=1)then

the overall code will be as shown in appendix C.

output on seven Segments display

Figure 4: seven segment decoder truth table

-- Uncomment the following library declaration if using

-- Uncomment the following library declaration if instantiating

architecture Behavioral of decoder is

-- Uncomment the following library declaration if using

architecture Behavioral of updowncounter is

auto up-down counter

architecture Behavioral of autocounter is

push button counter

-- Uncomment the following library declaration if using

architecture Behavioral of counter is

-- Uncomment the following library declaration if using

-- Uncomment the following library declaration if instantiating

architecture Behavioral of roterycounter is

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