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    (Experiment 3) BJT - Common Emiter Amplifier

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    Arik Juniar
    This document describes an experiment to study the characteristics of a common collector (emitter follower) amplifier circuit. Key aspects that will be examined include the effect of load resistance on the output, frequency response, and how the common collector configuration differs from a common emitter amplifier. Procedures are outlined to measure voltage and signal levels at various points in the circuit as the load and input frequency are varied. Graphs of the frequency response will be plotted and used to determine bandwidth. The results will be analyzed to understand the behavior of the common collector amplifier.

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    (Experiment 3) BJT - Common Emiter Amplifier

    Uploaded by

    Arik Juniar
    154 views7 pages
    This document describes an experiment to study the characteristics of a common collector (emitter follower) amplifier circuit. Key aspects that will be examined include the effect of load resistance on the output, frequency response, and how the common collector configuration differs from a common emitter amplifier. Procedures are outlined to measure voltage and signal levels at various points in the circuit as the load and input frequency are varied. Graphs of the frequency response will be plotted and used to determine bandwidth. The results will be analyzed to understand the behavior of the common collector amplifier.

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    [Experiment 3] BJT - Common Emiter Amplifier

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    This document describes an experiment to study the characteristics of a common collector (emitter follower) amplifier circuit. Key aspects that will be examined include the effect of load resistance on the output, frequency response, and how the common collector configuration differs from a common emitter amplifier. Procedures are outlined to measure voltage and signal levels at various points in the circuit as the load and input frequency are varied. Graphs of the frequency response will be plotted and used to determine bandwidth. The results will be analyzed to understand the behavior of the common collector amplifier.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    154 views7 pages

    (Experiment 3) BJT - Common Emiter Amplifier

    Uploaded by

    Arik Juniar
    This document describes an experiment to study the characteristics of a common collector (emitter follower) amplifier circuit. Key aspects that will be examined include the effect of load resistance on the output, frequency response, and how the common collector configuration differs from a common emitter amplifier. Procedures are outlined to measure voltage and signal levels at various points in the circuit as the load and input frequency are varied. Graphs of the frequency response will be plotted and used to determine bandwidth. The results will be analyzed to understand the behavior of the common collector amplifier.

    Copyright:

    © All Rights Reserved
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    of 7

    EXPERIMENT IV

    COMMON COLLECTOR AMPLIFIER


    I. End Result
    Study the characteristics of common collector amplifiers, load effect and
    frequency response.
    II. Scope
    A. Theory
    This experiment will discuss the common collector BJT configuration, where
    the collector is grounded and the output of the circuit is taken from its emiter. The
    total amplification of the amplifier circuit is:

    AV

    rL
    rl r 'e

    Due to the small value of r'e, the amplification AV is close to 1. However, this
    is offset by the large current amplification, which is close to the of the
    transistor. Aside from that, high input impedance and small output impedance are
    also characteristics of a common collector amplifier. The common collector
    circuit is commonly referred to as the emitter-follower. Frequency response of
    this amplifier can be measured in decibels, namely:

    A v (dB) = 20 log A v
    The bandwidth can be obtained once the amplification decreases by 3 dB from
    the highest Av (dB) point. Throughout the experiment, we will see how the change
    in RL and frequency effects the output signal generated by a common collector
    amplifier

    Electronic Devices Guidance


    Experiment 4

    Computer Engineering Laboratory


    Page 1 of 7

    B. Reference
    1. Thomas L. Floyd. (2008). Electronic Devices, Conventional Current Version.
    Edisi 8. Pearson, Prentice Hall. New Jersey. 978-0-13-615581-2.
    2. Kevin F. Brennan & April S. Brown. (2002). Theory of Modern Electronic
    Semiconductor Devices. Edisi 1. John Wiley & Sons. New York. 0-47141541-3.
    3. Jimmie J.Cathey. (2002). Electronic Devices and Circuits. Edisi 2. McGrawHill. New York. 0-07-139830-9.
    4. Floyd, Thomas L.. (2003). Electronics Fundamentals: Circuits, Devices and
    Applications. Edisi 6. Prentice Hall. New Jersey. 0131111388.
    5. Robert L. Boylestad & Louis Nashelsky. (2006). Electronics Device and
    Circuit Theory. Edisi 9. Pearson, Prentice Ha. New Jersey. 0-13-197408-4.
    6. Robert T. Paynter. (2003). Introductory Electronic Devices and Circuits,
    Electron Flow Version. Edisi 6. Pearson, Prentice Ha. New Jersey. 0-13120675-3.
    7. Malvino, Albert Paul. (1985). Semiconductor Circuit Approximations. Edisi
    4. McGraw-Hill. New York. 0070398984.
    8. Millman and Halkias, Integrated Electronics Mc Graw-Hill,1982.
    9. Floyd,Electronic Device Conventional Current Version Pearson Prentice
    Hall, 2005.
    10. Malvino, Semiconductor Circuit Approximation, Prentice-Hall, 1985.

    III. Devices

    Oscilloscope

    Signal Generator

    Experiment Box

    Electronic Devices Experiment Module 2

    Electronic Devices Guidance


    Experiment 4

    Computer Engineering Laboratory


    Page 2 of 7

    VI.

    Instruction of Laboratory
    A. Procedure
    1. Common Collector Configuration (CC)

    Figure 4.1

    1. Use the COMMON COLECTOR CONFIGURATION module.


    2. Release VSG ON/OFF button to cut SG voltage (without VSG).
    3. Lower all the DIP Switch pins (no load circuit) as seen on Figure 4.1.
    4. Configure the OSCILLOSCOPE to DC mode, measure VPOT, and turn
    POTENSIOMETER until you get VCE = 7,5 Volt.
    5. Measure the voltage of VB and VE. Enter the result on the Table 4.1.
    6. Press VSG ON/OFF button to enable SG voltage (with VSG).
    7. Configure Signal Generator to get VIN = 1 Vpp and frequency = 1 KHz.
    8. Draw the input signal (VIN) and the output signal (VOUT) in one image
    axis, observe the phase.
    9. Repeat step 7 using VIN = 2 Vpp and frequency 1KHz.
    Table 4.1
    VB

    Electronic Devices Guidance


    Experiment 4

    VE

    Computer Engineering Laboratory


    Page 3 of 7

    2. Input and Output Impedance


    1. Configure the SG until you get VB = 1 VPP.
    2. Record VOUT for each RL in Table 4.2 (pin 1 for RL = 2K5 , pin 2 for RL
    = 4 K7, pin 3 for RL = 6K8).

    Table 4.2
    RL

    2K4

    4K7

    6K8

    VO

    3. Common Collector Amplifier (CC)


    +VCC

    1K

    SW2
    Dengan CC
    Tanpa CC

    10 K

    220uF

    VC
    100nF

    VOUT

    100nJ100

    BC 547

    1K
    VSG

    VIN2

    VB

    2.2uF
    DSW2
    ON

    1K

    6K8

    2
    4K7

    1
    2K4

    5K6

    VE

    GND

    Figure 4.2
    1. Use the COMMON COLECTOR AMPLIFIER module.
    2. Turn off the Signal Generator, record the value of VC,VB, and VE to Table
    4.3.
    3. Release CC Mode button to disable CC (without CC).
    4. Turn on the Signal Generator, configure VSG = 1 Vpp with a frequency of
    1 KHz.
    Electronic Devices Guidance
    Experiment 4

    Computer Engineering Laboratory


    Page 4 of 7

    5. Turn on pin 1 of DIP Switch for using 2K4 resistor as RL.


    6. Record the VIN2, VSG, and VOUT to Table 4.4.
    7. Repeat step 5 and 6 by replacing pin 1 to pin 2 (4K7 resistor), pin 3 (6K8
    resistor), or lower all pin to measure voltage without RL.
    8. Press CC Mode button to use CC (with CC), repeat steps 5, 6, and 7 and
    record the result on Table 4.5.
    9. When using CC (with CC), lower all DIP Switch pins (without RL).
    10. Measure the VOUT with VSG = 1 Vpp and frequency in accordance with
    Table 4.6.
    11. Release CE Mode button (without CE), lower all DIP Switch pins.
    Repeat step 10 and record the result to Table 4.6!

    Table 4.3
    VC

    VB

    VE

    Table 4.4
    RL

    2K4

    4K7

    6K8

    Without

    2K4

    4K7

    6K8

    Without

    VIN2
    VOut
    VSG

    Table 4.5
    RL
    VIN2
    VOut
    VSG

    Electronic Devices Guidance


    Experiment 4

    Computer Engineering Laboratory


    Page 5 of 7

    Table 4.6
    Freq (Hz)
    VO

    100

    500

    1K

    2K

    5K

    10 K

    15 K

    20 K

    50 K

    100K

    Dgn CC
    Tnp CC
    VIN2

    Freq (Hz)
    VO

    Dgn CC
    Tnp CC
    VIN2

    B. Final reports requirement for minimum grade


    1. An explanation regarding the Common Collector Amplifier and its
    characteristics.
    2. Explain the criteria of a good system, looking at its input impedance (Zin) and
    output impedance (Zout).
    3. Explain the characteristics of a Common Collector Amplifier and how it
    differs from a Common Emitter Amplifier.
    4. Draw the AC equivalent circuit of a CC Amplifier and derive AV, ZIN and ZO.
    5. Analyze the effects of using CC and RL (Table 4.4 & Table 4.5)!
    6. Analyze how frequency effects the function of CC Amplifier (see the
    frequency response table (Table 4.6)). Plot the frequency response (Av in dB)
    of Table 4.6 on a semilog paper and calculate the bandwidth obtained from
    this experiments!
    7. Analyze the effects of using bypass capacitor on the frequency response of a
    CC Amplifier.
    8. What factors influence the outcome of the experiment?
    9. Explain the function of CC in accordance to its characteristics.
    10. Simulate experiment 4.1, 4.2, and 4.3 using Multisim! Write the simulation
    results in the tables provided!
    11. Give conclusions to the experiment you just did (min 5)!
    Electronic Devices Guidance
    Experiment 4

    Computer Engineering Laboratory


    Page 6 of 7

    V.

    Attachments
    Figure 4.3:
    +VCC2

    100nF

    B/A

    1K
    C

    100K
    CH1

    VSG

    4K7

    RL

    VPS

    Figure 4.4 :
    +VCC2

    100nF

    B/A

    1K
    C

    100K
    CH1

    VSG

    4K7
    VPS

    RL
    G

    Figure 4.5 :

    Electronic Devices Guidance


    Experiment 4

    Computer Engineering Laboratory


    Page 7 of 7

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