BLE112 Datasheet1
BLE112 Datasheet1
BLE112 Datasheet1
DATA SHEET
Tuesday, 20 December 2011
Version 1.21
Copyright 2000-2011 Bluegiga Technologies
All rights reserved.
Bluegiga Technologies assumes no responsibility for any errors which may appear in this manual.
Furthermore, Bluegiga Technologies reserves the right to alter the hardware, software, and/or specifications
detailed here at any time without notice and does not make any commitment to update the information
contained here. Bluegigas products are not authorized for use as critical components in life support devices
or systems.
The WRAP is a registered trademark of Bluegiga Technologies
The Bluetooth trademark is owned by the Bluetooth SIG Inc., USA and is licensed to Bluegiga Technologies.
All other trademarks listed herein are owned by their respective owners.
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VERSION HISTORY
Version Comment
0.91 Prerelease
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TABLE OF CONTENTS
1 BLE112 Product numbering ......................................................................................................................... 6
2 Pinout and Terminal Description .................................................................................................................. 7
3 Electrical Characteristics ............................................................................................................................ 10
3.1 Absolute Maximum Ratings ................................................................................................................ 10
3.2 Recommended Operating Conditions ................................................................................................. 10
3.3 Current Consumption .......................................................................................................................... 10
3.4 Antenna characteristics ....................................................................................................................... 10
4 Physical Dimensions .................................................................................................................................. 13
5 Design Guidelines ...................................................................................................................................... 15
5.1 General Design Guidelines ................................................................................................................. 15
5.2 Layout Guide Lines ............................................................................................................................. 16
5.3 BLE112-A Layout Guide ..................................................................................................................... 16
5.4 BLE112-N Layout Guide ..................................................................................................................... 17
6 Soldering Recommendations ..................................................................................................................... 19
7 Block diagram ............................................................................................................................................. 20
8 Certifications ............................................................................................................................................... 23
8.1 Bluetooth ............................................................................................................................................. 23
8.2 FCC and IC ......................................................................................................................................... 23
8.2.1 FCC et IC ..................................................................................................................................... 24
8.3 CE ....................................................................................................................................................... 26
8.4 MIC Japan ........................................................................................................................................... 26
8.5 KCC (Korea) ........................................................................................................................................ 26
8.6 Qualified Antenna Types for BLE112-E and BLE112-N ..................................................................... 26
9 Contact Information .................................................................................................................................... 28
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BLE112 Bluetooth low energy single mode module
DESCRIPTION
KEY FEATURES:
BLE112, Bluetooth low energy single mode
module is a single mode device targeted for
Bluetooth v.4.0, single mode compliant
low power sensors and accessories.
o Supports master and slave
BLE112 offers all Bluetooth low energy
modes
features: radio, stack, profiles and application
space for customer applications, so no o 4+ simultaneous connection
external processor is needed. The module also in master mode
provides flexible hardware interfaces to
connect sensors, simple user interfaces or Integrated Bluetooth low energy stack
even displays directly to the module. o GAP, GATT, L2CAP, SMP
BLE112 can be powered directly with a o Bluetooth low energy profiles
standard 3V coin cell batteries or pair of AAA
batteries. In lowest power sleep mode it Radio performance
consumes only 400nA and will wake up in few o TX power: +3dBm to -23dBm
hundred microseconds.
o RX sensitivity: -87dBm to -
93dBm
APPLICATIONS:
Ultra low current consumption
Heart rate sensors
o Transmit: 27mA (0dBm)
Pedometers
o Sleep mode 3: 0.4uA
Watches
Programmable 8051 processor for
Blood pressure and glucose meters embedding full applications
Weight scales Bluetooth qualified
Key fobs CE qualified
Households sensors and collector Modular certification for FCC, IC and
devices KCC
Security tags MIC Japan compatibility fully tested
with ARIB STD-T66
Wireless keys (keyless go)
Proximity sensors
HID keyboards and mice
Indoor GPS broadcasting devices
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1 BLE112 Product numbering
Antenna:
A = Internal
E = External
N = RF pin
BLE112-A-X
BLE112-A-v1 BLE112 with integrated chip antenna and software version 1.0
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2 Pinout and Terminal Description
RFGND 32
RF 31
1 GND
2 AVDD
3 AVDD
4 P2_2
5 P2_1 GND 30
6 P2_0 RESET 29
7 P1_7 P0_0 28
8 P1_6 P0_1 27
9 VDD_USB P0_2 26
10 GND P0_3 25
11 USB+ P0_4 24
12 USB- P0_5 23
13 P1_5 P0_6 22
20 DVDD
15 P1_3
17 P1_1
19 P0_7
14 P1_4
16 P1_2
18 P1_0
21 GND
Figure 1: BLE112
PIN
PAD TYPE DESCRIPTION
NUMBER
RESET 29 Active low reset.
1, 10, 21,
GND GND GND
30
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PIN
PIN NAME PIN TYPE DESCRIPTION
NUMBER
4 P2_2 Digital I/O Configurable I/O port, See table 3
5 P2_1 Digital I/O Configurable I/O port, See table 3
6 P2_0 Digital I/O Configurable I/O port, See table 3
7 P1 7 Digital I/O Configurable I/O port, See table 3
8 P1_6 Digital I/O Configurable I/O port, See table 3
11 USB+ USB+ USB data plus
12 USB- USB- USB data minus
13 P1_5 Digital I/O Configurable I/O port, See table 3
14 P1_4 Digital I/O Configurable I/O port, See table 3
15 P1_3 Digital I/O Configurable I/O port, See table 3
16 P1_2 Digital I/O Configurable I/O port, See table 3
Configurable I/O port with 20mA driving capability, See
17 P1_1 Digital I/O
table 3
Configurable I/O port with 20mA driving capability, See
18 P1_0 Digital I/O
table 3
19 P0_7 Digital I/O Configurable I/O port, See table 3
22 P0_6 Digital I/O Configurable I/O port, See table 3
23 P0_5 Digital I/O Configurable I/O port, See table 3
24 P0_4 Digital I/O Configurable I/O port, See table 3
25 P0_3 Digital I/O Configurable I/O port, See table 3
26 P0_2 Digital I/O Configurable I/O port, See table 3
27 P0_1 Digital I/O Configurable I/O port, See table 3
28 P0_2 Digital I/O Configurable I/O port, See table 3
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PERIPHERAL / P0 P1 P2
FUNCTION 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 2 1 0
ADC A7 A6 A5 A4 A3 A2 A1 A0
Operational
amplifier O - +
Analog comparator + -
USART 0 SPI C SS MO MI
Alt. 2 MO MI C SS
USART 0 UART RT CT TX RX
Alt.2 TX RX RT CT
USART 1 SPI MI MO C SS
Alt.2 MI MO C SS
USART 1 UART RX TX RT CT
Alt.2 RX TX RT CT
TIMER 1 4 3 2 1 0
Alt.2 3 4 0 1 2
TIMER 3 1 0
Alt.2 1 0
TIMER 4 1 0
Alt.2 0
DEBUG DC DD
OBSSEL 5 4 3 2 1 0
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3 Electrical Characteristics
3.1 Absolute Maximum Ratings
Note: These are absolute maximum ratings beyond which the module can be permanently damaged. These are not
maximum operating conditions. The maximum recommended operating conditions are in the table 5.
For the I/O terminal characteristic refer to the CC2540 datasheet available in
(http://www.ti.com/lit/ds/symlink/cc2540.pdf)
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Figure 2: Radiation pattern of BLE112, top view
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Figure 4: Radiation pattern of BLE112, side view
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4 Physical Dimensions
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18.10 mm
Antenna
12.05 mm
U.fl
2.1 mm 2.3 mm
18.1 mm
Figure 8: Physical dimensions (side view)
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5 Design Guidelines
5.1 General Design Guidelines
BLE112 can be used directly with a coin cell battery. Due to relatively high internal resistance of a coin cell
battery it is recommended to place a 100uF capacitor in parallel with the battery. The internal resistance of a
coin cell battery is initially in the range of 10 ohms but the resistance increases rapidly as the capacity is used.
Basically the higher the value of the capacitor the higher is the effective capacity of the battery and thus the
longer the life time for the application. The minimum value for the capacitor depends on the end application
and the maximum transmit power used. The leakage current of a 100uF capacitor is in the range of 0.5 uA to
3 uA and generally ceramic capacitors have lower leakage current than tantalum or aluminum electrolytic
capacitors.
Optionally TIs TPS62730 can be used to reduce the current consumption during TX/RX and data processing
stages. TPS62730 is an ultra low power DC/DC converter with by-pass mode and will reduce the current
consumption during transmission nominally by ~20% when using 3V coin cell battery.
A ferrite bead is recommended to be used to filter any excessive noise in the power supply lines to guarantee
the radio performance.
OPTIONAL DC/DC
VBAT
2V...3V3_SW
MOD2
L1 J1
U5 BLE112-A
2.2H20%, 130mA, 0.43ohm 1 1 2
GND
2
3 2 AVDD P2_2 3 4 P2_1
VIN SW 3
AVDD
6 P2_2 4 5 6
VOUT P2_2
P2_1 5
P2_1 GND
30
7 8
C3 6 29 RESET_N RESET_N
C10 P2_0 RESET
GND
TPS62730 2.2uF/10V/X5R 10
DVDD_USB P0_2
25 HEADER_2X5_SMD_1.27MM
1 GND P0_3
11 24
USB+ P0_4
PROGRAMMING INTERFACE
12 23
USB- P0_5
13 22
C6 P1_5 P0_6
U4
DVDD
1uF/16V/X5R
P1_4
P1_3
P1_2
P1_1
P1_0
GND
P0:7
BATTERYHOLDER_SMD_CR2032 2
14
15
16
17
18
19
20
21
C5
1uF/16V/X5R
Figure 10: Example schematic for BLE112 with a coin cell battery
MCP1700T-3302E/T
CON-MINIUSB-SOCKET-SMD
L4 P1
J10 FB 1kohm
1 3 2
VBUS VIN VOUT
2
D-
2.2uF/10V/X5R
GND
0.47uF/6.3V/X5R
3
2.2uF/10V/X5R
D+
4 MOD3
NC
5
C32
GND
1
C20
C31
BLE112-A
1
GND
9
8
7
6
2
AVDD
3
AVDD
C7 4
P2_2
5 30
1uF/16V/X5R P2_1 GND
6
P2_0 RESET
29 RESET
7 28
P1_7 P0_0
8 27
P1_6 P0_1
9 26
DVDD_USB P0_2
10 25
GND P0_3
11 24
USB+ P0_4
C9 12 23
USB- P0_5
13 22
1uF/16V/X5R P1_5 P0_6
DVDD
P1_4
P1_3
P1_2
P1_1
P1_0
GND
P0:7
14
15
16
17
18
19
20
21
C8
1uF/16V/X5R
2
R15
1.5K, 50V, 0.063W
1
R13
1 2
C127 C128
47pF/50V/C0G 47pF/50V/C0G
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5.2 Layout Guide Lines
Use good layout practices to avoid excessive noise coupling to supply voltage traces or sensitive analog
signal traces. If using overlapping ground planes use stitching vias separated by max 3 mm to avoid emission
from the edges of the PCB. Connect all the GND pins directly to a solid GND plane and make sure that there
is a low impedance path for the return current following the signal and supply traces all the way from start to
the end.
A good practice is to dedicate one of the inner layers to a solid GND plane and one of the inner layers to
supply voltage planes and traces and route all the signals on top and bottom layers of the PCB. This
arrangement will make sure that any return current follows the forward current as close as possible and any
loops are minimized.
Signals
GND
Power
Signals
Figure 13: Use of stitching vias to avoid emissions from the edges of the PCB
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T
Figure 14: Recommended layout for BLE112-A
Board edge
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A transmission line impedance calculator, such as TX-Line made by AWR, can be used to approximate the
dimensions for the 50 ohm transmission line. Figure 16 shows an example for two different 50 ohm
transmission lines.
CPW Ground
W = 0.15 mm G = 0.25 mm
RF GROUND RF GROUND
Prepreg, r = 3.7 h = 0.076 mm
RF GROUND
FR4, r = 4.6
MICROSTRIP
W = 1.8 mm
FR4, r = 4.6 h = 1 mm
RF GROUND
Figure 16: Example cross section of two different 50 ohm transmission line
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6 Soldering Recommendations
BLE112 is compatible with industrial standard reflow profile for Pb-free solders. The reflow profile used is
dependent on the thermal mass of the entire populated PCB, heat transfer efficiency of the oven and
particular type of solder paste used. Consult the datasheet of particular solder paste for profile configurations.
Bluegiga Technologies will give following recommendations for soldering the module to ensure reliable solder
joint and operation of the module after soldering. Since the profile used is process and layout dependent, the
optimum profile should be studied case by case. Thus following recommendation should be taken as a
starting point guide.
- Reliability of the solder joint and self-alignment of the component are dependent on the solder volume.
Minimum of 150m stencil thickness is recommended.
- Aperture size of the stencil should be 1:1 with the pad size.
- A low residue, no clean solder paste should be used due to low mounted height of the component.
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7 Block diagram
BLE112 is based on TIs CC2540 chip. Embedded 32 MHz and 32.678 kHz crystals are used for clock
generation. Matched balun and low pass filter provide optimal radio performance with extremely low spurious
emissions. Small ceramic chip antenna gives good radiation efficiency even when the module is used in
layouts with very limited space.
32 MHz 32.768
2V 3.6V Reset
XTAL kHz XTAL
SRAM
Flash
OPAMP
I/O controller
ADC
USB
USART 0
USART 1 Frequency
Receive synthetisizer Transmit
TIMER 1
TIMER 2
TIMER 3
Balun +
Ant
TIMER 4 LPF
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The 8-KB SRAM maps to the DATA memory space and to parts of the XDATA memory spaces. The SRAM is
an ultralow-power SRAM that retains its contents even when the digital part is powered off (power modes 2
and 3).
The 128/256 KB flash block provides in-circuit programmable non-volatile program memory for the device,
and maps into the CODE and XDATA memory spaces.
Peripherals
Writing to the flash block is performed through a flash controller that allows page-wise erasure and 4-bytewise
programming.
A versatile five-channel DMA controller is available in the system, accesses memory using the XDATA
memory space, and thus has access to all physical memories. Each channel (trigger, priority, transfer mode,
addressing mode, source and destination pointers, and transfer count) is configured with DMA descriptors that
can be located anywhere in memory. Many of the hardware peripherals (AES core, flash controller, USARTs,
timers, ADC interface, etc.) can be used with the DMA controller for efficient operation by performing data
transfers between a single SFR or XREG address and flash/SRAM.
Each CC2540 contains a unique 48-bit IEEE address that can be used as the public device address for a
Bluetooth device. Designers are free to use this address, or provide their own, as described in the Bluetooth
specification.
The interrupt controller services a total of 18 interrupt sources, divided into six interrupt groups, each of which
is associated with one of four interrupt priorities. I/O and sleep timer interrupt requests are serviced even if the
device is in a sleep mode (power modes 1 and 2) by bringing the CC2540 back to the active mode.
The debug interface implements a proprietary two-wire serial interface that is used for in-circuit debugging.
Through this debug interface, it is possible to erase or program the entire flash memory, control which
oscillators are enabled, stop and start execution of the user program, execute instructions on the 8051 core,
set code breakpoints, and single-step through instructions in the code. Using these techniques, it is possible
to perform in-circuit debugging and external flash programming elegantly.
The I/O controller is responsible for all general-purpose I/O pins. The CPU can configure whether peripheral
modules control certain pins or whether they are under software control, and if so, whether each pin is
configured as an input or output and if a pullup or pulldown resistor in the pad is connected. Each peripheral
that connects to the I/O pins can choose between two different I/O pin locations to ensure flexibility in various
applications.
The sleep timer is an ultra low power timer that uses an external 32.768-kHz crystal oscillator. The sleep timer
runs continuously in all operating modes except power mode 3. Typical applications of this timer are as a real-
time counter or as a wake-up timer to exit power modes 1 or 2.
A built-in watchdog timer allows the CC2540 to reset itself if the firmware hangs. When enabled by software,
the watchdog timer must be cleared periodically; otherwise, it resets the device when it times out.
Timer 1 is a 16-bit timer with timer/counter/PWM functionality. It has a programmable prescaler, a 16-bit
period value, and five individually programmable counter/capture channels, each with a 16-bit compare value.
Each of the counter/capture channels can be used as a PWM output or to capture the timing of edges on input
signals. It can also be configured in IR generation mode, where it counts timer 3 periods and the output is
ANDed with the output of timer 3 to generate modulated consumer IR signals with minimal CPU interaction.
Timer 2 is a 40-bit timer used by the Bluetooth low energy stack. It has a 16-bit counter with a configurable
timer period and a 24-bit overflow counter that can be used to keep track of the number of periods that have
transpired. A 40-bit capture register is also used to record the exact time at which a start-of-frame delimiter is
received/transmitted or the exact time at which transmission ends. There are two 16-bit timer-compare
registers and two 24-bit overflow-compare registers that can be used to give exact timing for start of RX or TX
to the radio or general interrupts.
Timer 3 and timer 4 are 8-bit timers with timer/counter/PWM functionality. They have a programmable
prescaler, an 8-bit period value, and one programmable counter channel with an 8-bit compare value. Each of
the counter channels can be used as PWM output.
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USART 0 and USART 1 are each configurable as either an SPI master/slave or a UART. They provide double
buffering on both RX and TX and hardware flow control and are thus well suited to high-throughput full-duplex
applications. Each USART has its own high-precision baud-rate generator, thus leaving the ordinary timers
free for other uses. When configured as SPI slaves, the USARTs sample the input signal using SCK directly
instead of using some oversampling scheme, and are thus well-suited for high data rates.
The AES encryption/decryption core allows the user to encrypt and decrypt data using the AES algorithm with
128-bit keys. The AES core also supports ECB, CBC, CFB, OFB, CTR, and CBC-MAC, as well as hardware
support for CCM.
The ADC supports 7 to 12 bits of resolution with a corresponding range of bandwidths from 30-kHz to 4-kHz,
respectively. DC and audio conversions with up to eight input channels (I/O controller pins) are possible. The
inputs can be selected as single-ended or differential. The reference voltage can be internal, AVDD, or a
single-ended or differential external signal. The ADC also has a temperature-sensor input channel. The ADC
can automate the process of periodic sampling or conversion over a sequence of channels.
The operational amplifier is intended to provide front-end buffering and gain for the ADC. Both inputs as well
as the output are available on pins, so the feedback network is fully customizable. A chopper-stabilized mode
is available for applications that need good accuracy with high gain.
The ultralow-power analog comparator enables applications to wake up from PM2 or PM3 based on an analog
signal. Both inputs are brought out to pins; the reference voltage must be provided externally. The comparator
output is connected to the I/O controller interrupt detector and can be treated by the MCU as a regular I/O pin
interrupt.
RF front end
RF front end includes combined matched balun and low pass filter, and ceramic chip antenna with matching
network. Optimal matching combined with effective low pass filter provides extremely low in-band spurious
emissions and harmonics. Optionally as a module assembly variant RF can be traced either to an embedded
u.fl connector or to the RF pin of the module.
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8 Certifications
BLE112 is compliant to the following specifications.
8.1 Bluetooth
BLE112 Bluetooth low energy module is Bluetooth qualified and listed as a controller subsystem and it is
Bluetooth compliant to the following profiles of the core spec version v.4.0:
RF PHY
HCI
LL
The maximum antenna gain specified for BLE112 is 2.3 dBi. Bluetooth qualification is valid for any antenna
with gain less than 2.3 dBi.
(2) this device must accept any interference received, including interference that may
cause undesired operation.
This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. End
users must follow the specific operating instructions for satisfying RF exposure compliance. This transmitter
must not be co-located or operating in conjunction with any other antenna or transmitter.
IC Statements:
This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the
following two conditions: (1) this device may not cause interference, and (2) this device must accept any
interference, including interference that may cause undesired operation of the device.
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and
maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio
interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically
radiated power (e.i.r.p.) is not more than that necessary for successful communication.
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gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list,
having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this
device. See table 7 for the approved antennas for BLE112.
IMPORTANT NOTE: In the event that these conditions can not be met (for certain configurations or co-
location with another transmitter), then the FCC and Industry Canada authorizations are no longer considered
valid and the FCC ID and IC Certification Number can not be used on the final product. In these
circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the
transmitter) and obtaining a separate FCC and Industry Canada authorization.
The OEM of the BLE112 module must only use the approved antenna(s) listed in table 7, which have been
certified with this module.
The OEM integrator has to be aware not to provide information to the end user regarding how to install or
remove this RF module or change RF related parameters in the user manual of the end product.
8.2.1 FCC et IC
Dclaration dIC :
Ce dispositif est conforme aux normes RSS exemptes de licence dIndustrie Canada. Son fonctionnement est
assujetti aux deux conditions suivantes : (1) ce dispositif ne doit pas provoquer de perturbation et (2) ce
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dispositif doit accepter toute perturbation, y compris les perturbations qui peuvent entraner un fonctionnement
non dsir du dispositif.
Selon les rglementations dIndustrie Canada, cet metteur radio ne doit fonctionner quavec une antenne
dune typologie spcifique et dun gain maximum (ou infrieur) approuv pour lmetteur par Industrie
Canada. Pour rduire les ventuelles perturbations radiolectriques nuisibles dautres utilisateurs, le type
dantenne et son gain doivent tre choisis de manire ce que la puissance isotrope rayonne quivalente
(P.I.R.E.) nexcde pas les valeurs ncessaires pour obtenir une communication convenable.
Responsabilits des OEM quant la conformit avec les rglementations de FCC et dIndustrie
Canada
Le module BLE112 a t certifi pour tre intgr des produits fabriqus uniquement par les intgrateurs
OEM dans les conditions suivantes :Le module de lmetteur ne doit pas tre situ prs dune autre antenne
ou dun autre metteur ni ou fonctionner conjointement avec ceux-ci.
Dans la mesure o cette condition est observe, il ne sera pas ncessaire de soumettre lmetteur des
essais supplmentaires. Cependant, lintgrateur OEM est charg de tester son produit final pour sassurer
quil respecte toutes les autres exigences de conformit requises avec ce module install (par exemple :
missions du dispositif numrique, exigences priphriques de lordinateur, etc.).
REMARQUE IMPORTANTE : En cas dinobservance de ces conditions (en ce qui concerne certaines
configurations ou lemplacement du dispositif proximit dun autre metteur), les autorisations de FCC et
dIndustrie Canada ne seront plus considres valables et lidentification de FCC et le numro de certification
dIC ne pourront pas tre utiliss sur le produit final. Dans ces cas, lintgrateur OEM sera charg dvaluer
nouveau le produit final (y compris lmetteur) et dobtenir une autorisation indpendante de FCC et
dIndustrie Canada.
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LOEM du module BLE112 ne doit utiliser que la ou les antennes approuves numres dans le tableau 7,
qui ont t certifies avec ce module.
Dans le guide dutilisation du produit final, lintgrateur OEM doit sabstenir de fournir des informations
lutilisateur final portant sur les procdures suivre pour installer ou retirer ce module RF ou pour changer les
paramtres RF.
8.3 CE
BLE112 is in conformity with the essential requirements and other relevant requirements of the R&TTE
Directive (1999/5/EC). The product is conformity with the following standards and/or normative documents.
EMC (immunity only) EN 301 489-17 V.1.3.3 in accordance with EN 301 489-1 V1.8.1
Safety EN60950-1:2006+A11:2009+A1:2010+A12:2011
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9 Contact Information
Sales: sales@bluegiga.com
Orders: orders@bluegiga.com
WWW: www.bluegiga.com
www.bluegiga.hk
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