Dr. D. Sreenivasarao: Overview and Work Done at Nit Warangal
Dr. D. Sreenivasarao: Overview and Work Done at Nit Warangal
Dr. D. Sreenivasarao: Overview and Work Done at Nit Warangal
Dr. D. Sreenivasarao
Assistant Professor
Department of Electrical Engineering
National Institute of Technology Warangal
Phone no: +91 7842 001 002
Education qualifications
Ph.D. Power Quality Improvement using D-STATCOM 2014 IIT Roorkee, India
M.Tech. Power Apparatus and Electric Drives 2008 IIT Roorkee, India
Bapatla Engineering
B.Tech. Electrical and Electronics Engineering 2006
College, Bapatla
Professional experience
Ph.D. guidance
S. No. Student Name Reg. Year Research Area Status
Advanced
1 G. Eshwar Gowd July 2014 Multilevel inverter based PV system
stage
PWM techniques for reduced switch count Ready for
2 V. Hari Priya Dec 2014
multilevel inverters submission
Advanced
3 A. Pranay Kumar Dec 2015 Power quality improvement techniques
stage
Completed
4 S. Ram Kumar July 2016 Multi-phase power converters and applications
literature
M.Tech guidance
Number of M.Tech dissertations guided: 08
Number of M.Tech dissertations ongoing: 04 (3 Full-time and 1 Part-time)
PTO
B.Tech guidance
Number of B.Tech projects guided: 06
Number of B.Tech projects ongoing: 02
Research publications
International Journals: 05
1. V. Hari Priya, D. Sreenivasarao, and G. Siva Kumar, “Zero-sequence voltage injected fault
tolerant scheme for multiple open circuit faults in reduced switch count based MLDCL inverter,”
Accepted for publication in IET Power Electronics.
2. V. Hari Priya, D. Sreenivasarao, and G. Siva Kumar, “Reduced carrier PWM scheme with unified
logical expressions for reduced switch count multilevel inverters,” Accepted for publication in
IET Power Electronics.
3. M. Hareesh, G. Siva Kumar, and D. Sreenivasarao, “Dynamic dc voltage regulation of split-
capacitor DSTATCOM for power quality improvement,” IET Generation, Transmission &
Distribution, vol. 11, no. 17, pp. 4373–4383, Nov. 2017.
4. V. Hari Priya, D. Sreenivasarao, and G. Siva Kumar, “Improved pulse-width modulation scheme
for T-type multilevel inverter,” IET Power Electronics, vol. 10, no. 8, pp. 968–976, June 2017.
5. D. Sreenivasarao, Pramod Agarwal, and Biswarup Das, "Performance evaluation of carrier
rotation strategy in level shifted pulsewidth modulation technique," IET Power Electronics, vol.
7, no. 3, pp. 667–680, Mar. 2014.
International conferences: 08
Departmental activities
1. Faculty in-charge for real-time HIL system (OPAL-RT) for 3 semesters.
2. Course coordinator for II B.Tech EEE from Dec. 2014 to Dec. 2016 (4 semesters).
3. Serving as a member of department B.Tech and M.Tech project evaluation committees.
4. Faculty in-charge for research laboratory from 30-01-2015 to till date.
5. Department time table in-charge from 13-11-2017 to till date.
Academic activities
1. Designed and developed cascade H-bridge, diode-clamped, flying capacitor multilevel inverters
and several reduced switch count inverter topologies for conducting experiments in laboratory.
2. Designed and developed a cascade H-bridge converter based D-STATCOM in laboratory.
3. Developed several educational units for power electronics laboratory.
4. Developed enhanced power quality ac-dc converters and Power quality improvement
techniques courses for M.Tech specialization.
5. Developed power electronic simulation laboratory course for M.Tech Power Electronics and
Drives specialization.
6. Delivered about 20 expert lectures in various workshops, conferences and short-term courses
across India.
7. Reviewer for journal publishers such as IEEE, IET and Elsevier.
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