Embedded Systems Unit Vi
Embedded Systems Unit Vi
Embedded Systems Unit Vi
Computational Models
Models of computation (MoCs) describe the mechanism assumed for performing computations. It distinguishes
between the computations performed in the components and communication.
Components and the organization of computations in such components: Procedures, processes, functions, finite
state machines are possible components.
Communication protocols: These protocols describe methods for communication between components.
Asynchronous message passing is an example for communication protocols.
This model transforms input data to output data through operations on data. An inward arrow represents input
data, block or circle represents operation and outward arrow represents output data. DSP applications are
examples for it. For example, x= a+b, y= x-c.
a b
+ c
x
-
y
A DFG model is said to be Acyclic DFG (ADFG) if it does not contain multiple values for input variable and
multiple values for output variable. Feedback inputs are examples for non-acyclic inputs.
1. There is one input point to the process represented by the circle for calculating y6.
3. There is only one memory address and variable for each coefficient and each filler input. There is only one
value of each of the six inputs for x and there is only one value of each of the coefficients, a. (DFG is therefore
also the ADFG.) 1
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Figure (a): DFG for sixth FIR sequence, (b): DFG for set of processes with 6 inputs and
coefficients for FIR sequence
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A real world example for modeling the embedded application using CDFG is the capturing and saving of the
image to a format set by the user in a digital still camera.
Analog front end converts the CCD sensor generated analog signal generated to digital signal.
The task stores data from ADC to frame buffer for the use of a media processor which performs
operations like auto correction, balance adjustments etc;
The decision on which format the image is stored such as JPEG, TIFF, BMP etc.
1. Nodes can start their computations when their inputs are available.
2. Edges must be used whenever there is a data dependency between any two nodes.
4. For each firing, a number of tokens, representing data, is consumed and produced.
5. An SDFG model is like a DFG, but also models the delays as well as the number of inputs and outputs.
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6. In synchronous data flow, the number of tokens produced or consumed in one firing is constant. Constant
edge labels denote the corresponding numbers of tokens.
7. Constants facilitate the modeling of multi-rate signal processing applications, applications for which
certain signals are generated at frequencies that are multiples of other frequencies. For example, in a TV
set, some computations might be performed at a rate of 100 Hz while others are performed at a rate of 50
Hz.
8. The property of producing and consuming a constant number of tokens makes it possible to determine
execution order and memory requirements at compile time. Hence, complex run-time scheduling of
executions is avoided.
10. SDF is very useful, for example, in modeling multimedia systems. In this case, each token would
correspond to audio or video information, such as an audio sample or a video frame.
11. SDFGS have no risk of deadlocks.
12. Homogeneous synchronous data flow (HSDF) graphs are a special case of SDF graphs. For HSDF
graphs, the number of tokens consumed and produced per firing is always 1.
13. For cyclo-static data flow (CSDF), the number of tokens produced and consumed per firing can vary
over time, but has to be periodic.
Modelling of Multiprocessor Systems
A large complex program can be partitioned into the tasks or sets of instructions (or processes or threads) and the
ISRs. The tasks and ISRs can run concurrently on different processors and by some mechanism the tasks can
communicate with each other.
The problem is how to partition the program into tasks or sets of instructions between the various processors, and
then how to schedule the instructions and data over the available processor times and resources so that there is
optimum performance. The problems in modeling the processing of instructions in a multiprocessor system.
3. Static scheduling by the compiler, analogous to scheduling in a superscalar processor. (Each superscalar
processor has multiple processing units in parallel.)
4. When superscalar units are present in a processor, it means two or more pipelines of instructions are executed
in parallel. Problem is then not only of scheduling or concurrent processing instructions on different processors
but also scheduling of concurrent processing instructions on each superscalar unit and pipeline in the processor.
5. Hardware scheduling issue, for example, whether static scheduling of hardware (processors and memories) is
feasible or not.
6. Static scheduling issue (e.g., when the performance is not affected and when the processing actions arc
predictable and synchronous).
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7. Synchronizing issues, synchronization means the use of inter processor or process communications
(IPCs) such that there is a definite order (precedence) in which the computations arc fired on any processor in a
multiprocessor system.
8. Scheduling of the instructions, SIMDs (single instruction multiple data), MIMDs (multiple instructions and
multiple data) and VLIWs (very large instruction words within each process) and scheduling them for each
processor.
Case 1: Processors share the same address space through a common bus, called tight coupling between
processors.
Case 2: Processors have different autonomous address spaces (like in a network) as well as shared data sets and
arrays, called loose coupling.
Case 3: Processors share the memories in alternative architecture, for example, three-dimensional mesh, ring,
torrid or tree in place of a shared bus between the different tightly coupled processors. Processors process
concurrently as follows:
1. one way of concurrent processing is to schedule each task so that it is executed on different processors and
synchronize the tasks by some inter processor communication mechanism.
2. The second way is, when an SMID or M1MD or VLIW instruction has different data, each task is processed on
different processors (tightly coupled processing) for different data.
Static scheduling is one in which a compiler compiles such that the codes are run on different processors or
processing units as per the schedule decided and this schedule remains static during the program run even if a
processor waits for others to finish the scheduled processing.
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3. An alternate way is that a task instruction is executed on the same processor or different instructions of a task
can be done on different processors (loosely coupled). A compiler schedules the various instructions of the tasks
among the processors at an instance.
An SDFG models the delays as well as the number of inputs and outputs. The edges directed to circles are
assumed to have a physical memory buffer and till the buffer has the data. The computations do not fire.
For example, suppose that the outputs from vertex X' (a set of computations) is a and input to Y' (another set of
computations) is also a. An SDFG can therefore unfold into a HSDFG. An SDF graph can be unfolded into one or
more HSDFGs. Two vertices can be connected by two or more edges in the HSDF graph.
When there is an indefinitely long data sequence, SDFG-based modelling and the consequent unfolding into the
HSDF graphs helps.
For example, HSDFGs applied to the computations of a fast Fourier transform or for coding voice data. An
HSDF graph can also effectively model an IPC (inter processor communication) graph.
A SDF model program translates into a number of parallel concurrent or sequential model programs using
HSDFGs.
Figure (a): Modeling by SDFG, (b): HSDFG after unfolding SDFG, (c): APEG from HSDFG without delay
Complex problems are therefore first modeled as the SDFGs, then SDFGs are unfolded into HSDFGs and
HSDFGs are separated into APEGs.
When there are multiple processors in parallel, the partitioning of a program is done as follows.
1. There are minimum numbers of IPCs so that the total time of IPC delays (waiting periods) minimized.
2. There is load balancing. Each processor has the least waiting time by sharing the processing load.
(iv) Instructions of four different tasks are partitioned and scheduled on two processors differently in
different periods.
The state Machine model is used for modeling reactive or event-driven embedded systems whose processing
behavior is dependent on state transitions.
Embedded systems in control and industrial applications are examples for event driven systems.
A Finite State Machine (FSM) model is one in which the number of states are finite.
“The state machine model describes the system behavior with ‘STATES’, ‘EVENTS’, ‘ACTIONS’, and
‘TRANSTIONS’.
When the vehicle ignition is turned ON and seat belt is not fastened with in 10 seconds of ignition ON,
system generates an Alarm signal for 5 seconds.
The Alarm is turned OFF when alarm time expires or if driver/passenger fastens the belt or if the ignition
switch is turned OFF.
Events – Ignition key on, Ignition key off, Timer expire, Alarm Time expire and Seat belt on.
The ‘ignition key’ on event starts the 10 seconds timer count and transitions to ‘waiting’ state.
If ‘seat belt on’ or ‘ignition key off’ event occurs during wait state, state transitions to ‘alarm off’ state.
When wait timer expires in waiting state, the event ‘time expire’ is generated and it transitions to ‘alarm
on’.
The ‘alarm on’ state continues until a ‘seat belt on’ or ‘ignition key off’ event or ‘alarm time expires’
event whichever occurs first.
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The timer is said to be in ‘READY’ state when the timer is loaded with the count to the required time
delay.
The timer remains in ‘READY’ state until ‘Start timer’ event occurs. The timer changes its state to
‘RUNNING’ from the ‘READY’ state on receiving a ‘Start timer’ event and remains in the ‘RUNNING’
state until the timer count expires or a ‘Stop timer’ event occurs. The timer state changes to ‘IDLE’ from
‘RUNNING’ on receiving a ‘Stop timer’ or ‘Timer expire’ event.
State – ‘Wait for coin’, ‘Wait for user input’, ‘Dispense Tea’ and ‘Dispense Coffee’.
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The event ‘Insert Coin’ transitions the state to ‘Wait for user input’. The system stays in this state until
user input is received from buttons ‘Cancel’ or ‘Tea or Coffee’.
If the event triggered in ‘Wait state’ is ‘Cancel’ button press, the coin is pushed out and the state
transitions to ‘Wait for Coin’.
If the event received in the ‘Wait state’ is either ‘Tea’ button press or ‘Coffee’ button press, the state
changes to ‘Dispense Tea‘ and Dispense Coffee’ respectively. Once delivery is over it transitions to ‘Wait
for Coin’ state.
In the sequential program model, the functions or processing requirements are executed in
sequence.
The program instructions iterated and executed conditionally through a series of operations.
FSMs and Flow charts are the tools for sequential program modeling.
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Sequential execution leads to a single sequential execution of task which leads to poor processor
utilization. If the task is split in to multiple tasks then CPU usage will be improved but additional
overheads in task scheduling, task synchronization and task communication are required.
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Seat belt warning system task can be spilt multiple tasks as:
UML DIAGRAMS
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UML can be used to construct nine different types of diagrams to capture five different views of a system.
The UML diagrams can capture the following five views of a system:
• User’s view
• Structural view
• Behavioral view
• Implementation view
• Environmental view
User’s view: This view defines the functionalities (facilities) made available by the system to its users. The users’
view captures the external users’ view of the system in terms of the functionalities offered by the system.
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Use cases can be represented by drawing a use case diagram with text elaborating the drawing. The text
description should define the details of the interaction between the user and the computer and other aspects of the
use case.
In the use case diagram, each use case is represented by an ellipse with the name of the use case written inside the
ellipse.
Class Diagrams
A class diagram describes the static structure of a system. It shows how a system is structured rather than
how it behaves. The static structure of a system comprises of a number of class diagrams and their dependencies.
The main constituents of a class diagram are classes and their relationships: generalization, aggregation,
association, and various kinds of dependencies.
The classes represent entities with common features, i.e. attributes and operations. Classes are represented as
solid outline rectangles with compartments.
Association
Associations are needed to enable objects to communicate with each other. An association describes a
connection between classes. The association relation between two objects is called object connection or link.
Links are instances of associations. A link is a physical or conceptual connection between object instances.
Association between two classes is represented by drawing a straight line between the concerned classes.
For example, suppose Amit has borrowed the book Graph Theory. Here, borrowed is the connection
between the objects Amit and Graph Theory book.
Aggregation
Aggregation is a special type of association where the involved classes represent a whole-part
relationship. When an instance of one object contains instances of some other objects, then aggregation (or
composition) relationship exists between the composite object and the component object. Aggregation is
represented by the diamond symbol at the composite end of a relationship.
Composition
Composition is a stricter form of aggregation, in which the parts are existence-dependent on the whole. This
means that the life of the parts is closely tied to the life of the whole. When the whole is created, the parts are
created and when the whole is destroyed, the parts are destroyed.
Generalization
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Use case generalization can be used when one use case is similar to another, but does something slightly
differently or something more. Generalization works the same way with use cases as it does with classes. The
child use case inherits the behavior and meaning of the parent use case.
Interaction Diagrams
Interaction diagrams are models that describe how a group of objects collaborate to realize some behavior.
There are two kinds of interaction diagrams: sequence diagrams and collaboration diagrams.
Sequence Diagrams
A sequence diagram shows interaction among objects as a two dimensional chart.
The objects participating in the interaction are shown at the top of the chart as boxes attached to a vertical
dashed line. Inside the box, the name of the object is written with a colon separating it from the name of
the class, and both the name of the object and class are underlined.
The vertical dashed line is called the object’s lifeline. The lifeline indicates the existence of the object at
any particular point of time.
The rectangle drawn on the lifetime is called the activation symbol and indicates that the object is active
as long as the rectangle exists.
Each message is indicated as an arrow between the lifelines of two objects. Each message is labeled with
the message name. Some control information can also be included.
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Activity Diagrams
The activity diagram focuses on representing activities or chunks of processing which may or may not correspond
to the methods of classes. An activity is a state with an internal action and one or more outgoing transitions which
automatically follow the termination of the internal activity. If an activity has more than one outgoing transition,
then these must be identified through conditions. 16
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Activity diagrams are normally employed in business process modeling. This is carried out during the
initial stages of requirements analysis and specification. Activity diagrams can be very useful to understand
complex processing activities involving many components.
A major disadvantage of the FSM formalism is that the number of states becomes too many and the model
too complex when used to model practical systems. This problem is overcome in UML by using state charts.
Actions are associated with transitions and are considered to be processes that occur quickly and are not
interruptible. Activities are associated with states and can take a longer time. An activity can be interrupted by an
event.
The basic elements of the state chart diagram are as follows:
• Initial state. This is represented as a filled circle.
• Final state. This is represented by a filled circle inside a larger circle.
State. These are represented by rectangles with rounded corners.
• Transition. A transition is shown as an arrow between two states.
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